diff options
Diffstat (limited to 'drivers/net/chelsio/pm3393.c')
-rw-r--r-- | drivers/net/chelsio/pm3393.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/net/chelsio/pm3393.c b/drivers/net/chelsio/pm3393.c index 2117c4fbb107..a6eb30a6e2b9 100644 --- a/drivers/net/chelsio/pm3393.c +++ b/drivers/net/chelsio/pm3393.c | |||
@@ -251,8 +251,9 @@ static int pm3393_interrupt_handler(struct cmac *cmac) | |||
251 | /* Read the master interrupt status register. */ | 251 | /* Read the master interrupt status register. */ |
252 | pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS, | 252 | pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS, |
253 | &master_intr_status); | 253 | &master_intr_status); |
254 | CH_DBG(cmac->adapter, INTR, "PM3393 intr cause 0x%x\n", | 254 | if (netif_msg_intr(cmac->adapter)) |
255 | master_intr_status); | 255 | dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n", |
256 | master_intr_status); | ||
256 | 257 | ||
257 | /* TBD XXX Lets just clear everything for now */ | 258 | /* TBD XXX Lets just clear everything for now */ |
258 | pm3393_interrupt_clear(cmac); | 259 | pm3393_interrupt_clear(cmac); |
@@ -375,12 +376,12 @@ static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm) | |||
375 | rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN; | 376 | rx_mode |= SUNI1x10GEXP_BITMSK_RXXG_MHASH_EN; |
376 | } else if (t1_rx_mode_mc_cnt(rm)) { | 377 | } else if (t1_rx_mode_mc_cnt(rm)) { |
377 | /* Accept one or more multicast(s). */ | 378 | /* Accept one or more multicast(s). */ |
378 | u8 *addr; | 379 | struct dev_mc_list *dmi; |
379 | int bit; | 380 | int bit; |
380 | u16 mc_filter[4] = { 0, }; | 381 | u16 mc_filter[4] = { 0, }; |
381 | 382 | ||
382 | while ((addr = t1_get_next_mcaddr(rm))) { | 383 | netdev_for_each_mc_addr(dmi, t1_get_netdev(rm)) { |
383 | bit = (ether_crc(ETH_ALEN, addr) >> 23) & 0x3f; /* bit[23:28] */ | 384 | bit = (ether_crc(ETH_ALEN, dmi->dmi_addr) >> 23) & 0x3f; /* bit[23:28] */ |
384 | mc_filter[bit >> 4] |= 1 << (bit & 0xf); | 385 | mc_filter[bit >> 4] |= 1 << (bit & 0xf); |
385 | } | 386 | } |
386 | pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]); | 387 | pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]); |
@@ -776,11 +777,12 @@ static int pm3393_mac_reset(adapter_t * adapter) | |||
776 | successful_reset = (is_pl4_reset_finished && !is_pl4_outof_lock | 777 | successful_reset = (is_pl4_reset_finished && !is_pl4_outof_lock |
777 | && is_xaui_mabc_pll_locked); | 778 | && is_xaui_mabc_pll_locked); |
778 | 779 | ||
779 | CH_DBG(adapter, HW, | 780 | if (netif_msg_hw(adapter)) |
780 | "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, " | 781 | dev_dbg(&adapter->pdev->dev, |
781 | "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n", | 782 | "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, " |
782 | i, is_pl4_reset_finished, val, is_pl4_outof_lock, | 783 | "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n", |
783 | is_xaui_mabc_pll_locked); | 784 | i, is_pl4_reset_finished, val, |
785 | is_pl4_outof_lock, is_xaui_mabc_pll_locked); | ||
784 | } | 786 | } |
785 | return successful_reset ? 0 : 1; | 787 | return successful_reset ? 0 : 1; |
786 | } | 788 | } |