diff options
Diffstat (limited to 'drivers/net/chelsio/cpl5_cmd.h')
| -rw-r--r-- | drivers/net/chelsio/cpl5_cmd.h | 118 |
1 files changed, 59 insertions, 59 deletions
diff --git a/drivers/net/chelsio/cpl5_cmd.h b/drivers/net/chelsio/cpl5_cmd.h index 45e9248979f1..27925e487bcf 100644 --- a/drivers/net/chelsio/cpl5_cmd.h +++ b/drivers/net/chelsio/cpl5_cmd.h | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | /***************************************************************************** | 1 | /***************************************************************************** |
| 2 | * * | 2 | * * |
| 3 | * File: cpl5_cmd.h * | 3 | * File: cpl5_cmd.h * |
| 4 | * $Revision: 1.4 $ * | 4 | * $Revision: 1.6 $ * |
| 5 | * $Date: 2005/03/23 07:15:58 $ * | 5 | * $Date: 2005/06/21 18:29:47 $ * |
| 6 | * Description: * | 6 | * Description: * |
| 7 | * part of the Chelsio 10Gb Ethernet Driver. * | 7 | * part of the Chelsio 10Gb Ethernet Driver. * |
| 8 | * * | 8 | * * |
| @@ -36,8 +36,8 @@ | |||
| 36 | * * | 36 | * * |
| 37 | ****************************************************************************/ | 37 | ****************************************************************************/ |
| 38 | 38 | ||
| 39 | #ifndef _CPL5_CMD_H | 39 | #ifndef _CXGB_CPL5_CMD_H_ |
| 40 | #define _CPL5_CMD_H | 40 | #define _CXGB_CPL5_CMD_H_ |
| 41 | 41 | ||
| 42 | #include <asm/byteorder.h> | 42 | #include <asm/byteorder.h> |
| 43 | 43 | ||
| @@ -59,12 +59,12 @@ enum { /* TX_PKT_LSO ethernet types */ | |||
| 59 | }; | 59 | }; |
| 60 | 60 | ||
| 61 | struct cpl_rx_data { | 61 | struct cpl_rx_data { |
| 62 | __u32 rsvd0; | 62 | u32 rsvd0; |
| 63 | __u32 len; | 63 | u32 len; |
| 64 | __u32 seq; | 64 | u32 seq; |
| 65 | __u16 urg; | 65 | u16 urg; |
| 66 | __u8 rsvd1; | 66 | u8 rsvd1; |
| 67 | __u8 status; | 67 | u8 status; |
| 68 | }; | 68 | }; |
| 69 | 69 | ||
| 70 | /* | 70 | /* |
| @@ -73,73 +73,73 @@ struct cpl_rx_data { | |||
| 73 | * used so we break it into 2 16-bit parts to easily meet our alignment needs. | 73 | * used so we break it into 2 16-bit parts to easily meet our alignment needs. |
| 74 | */ | 74 | */ |
| 75 | struct cpl_tx_pkt { | 75 | struct cpl_tx_pkt { |
| 76 | __u8 opcode; | 76 | u8 opcode; |
| 77 | #if defined(__LITTLE_ENDIAN_BITFIELD) | 77 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
| 78 | __u8 iff:4; | 78 | u8 iff:4; |
| 79 | __u8 ip_csum_dis:1; | 79 | u8 ip_csum_dis:1; |
| 80 | __u8 l4_csum_dis:1; | 80 | u8 l4_csum_dis:1; |
| 81 | __u8 vlan_valid:1; | 81 | u8 vlan_valid:1; |
| 82 | __u8 rsvd:1; | 82 | u8 rsvd:1; |
| 83 | #else | 83 | #else |
| 84 | __u8 rsvd:1; | 84 | u8 rsvd:1; |
| 85 | __u8 vlan_valid:1; | 85 | u8 vlan_valid:1; |
| 86 | __u8 l4_csum_dis:1; | 86 | u8 l4_csum_dis:1; |
| 87 | __u8 ip_csum_dis:1; | 87 | u8 ip_csum_dis:1; |
| 88 | __u8 iff:4; | 88 | u8 iff:4; |
| 89 | #endif | 89 | #endif |
| 90 | __u16 vlan; | 90 | u16 vlan; |
| 91 | __u16 len_hi; | 91 | u16 len_hi; |
| 92 | __u16 len_lo; | 92 | u16 len_lo; |
| 93 | }; | 93 | }; |
| 94 | 94 | ||
| 95 | struct cpl_tx_pkt_lso { | 95 | struct cpl_tx_pkt_lso { |
| 96 | __u8 opcode; | 96 | u8 opcode; |
| 97 | #if defined(__LITTLE_ENDIAN_BITFIELD) | 97 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
| 98 | __u8 iff:4; | 98 | u8 iff:4; |
| 99 | __u8 ip_csum_dis:1; | 99 | u8 ip_csum_dis:1; |
| 100 | __u8 l4_csum_dis:1; | 100 | u8 l4_csum_dis:1; |
| 101 | __u8 vlan_valid:1; | 101 | u8 vlan_valid:1; |
| 102 | __u8 rsvd:1; | 102 | u8 rsvd:1; |
| 103 | #else | 103 | #else |
| 104 | __u8 rsvd:1; | 104 | u8 rsvd:1; |
| 105 | __u8 vlan_valid:1; | 105 | u8 vlan_valid:1; |
| 106 | __u8 l4_csum_dis:1; | 106 | u8 l4_csum_dis:1; |
| 107 | __u8 ip_csum_dis:1; | 107 | u8 ip_csum_dis:1; |
| 108 | __u8 iff:4; | 108 | u8 iff:4; |
| 109 | #endif | 109 | #endif |
| 110 | __u16 vlan; | 110 | u16 vlan; |
| 111 | __u32 len; | 111 | u32 len; |
| 112 | 112 | ||
| 113 | __u32 rsvd2; | 113 | u32 rsvd2; |
| 114 | __u8 rsvd3; | 114 | u8 rsvd3; |
| 115 | #if defined(__LITTLE_ENDIAN_BITFIELD) | 115 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
| 116 | __u8 tcp_hdr_words:4; | 116 | u8 tcp_hdr_words:4; |
| 117 | __u8 ip_hdr_words:4; | 117 | u8 ip_hdr_words:4; |
| 118 | #else | 118 | #else |
| 119 | __u8 ip_hdr_words:4; | 119 | u8 ip_hdr_words:4; |
| 120 | __u8 tcp_hdr_words:4; | 120 | u8 tcp_hdr_words:4; |
| 121 | #endif | 121 | #endif |
| 122 | __u16 eth_type_mss; | 122 | u16 eth_type_mss; |
| 123 | }; | 123 | }; |
| 124 | 124 | ||
| 125 | struct cpl_rx_pkt { | 125 | struct cpl_rx_pkt { |
| 126 | __u8 opcode; | 126 | u8 opcode; |
| 127 | #if defined(__LITTLE_ENDIAN_BITFIELD) | 127 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
| 128 | __u8 iff:4; | 128 | u8 iff:4; |
| 129 | __u8 csum_valid:1; | 129 | u8 csum_valid:1; |
| 130 | __u8 bad_pkt:1; | 130 | u8 bad_pkt:1; |
| 131 | __u8 vlan_valid:1; | 131 | u8 vlan_valid:1; |
| 132 | __u8 rsvd:1; | 132 | u8 rsvd:1; |
| 133 | #else | 133 | #else |
| 134 | __u8 rsvd:1; | 134 | u8 rsvd:1; |
| 135 | __u8 vlan_valid:1; | 135 | u8 vlan_valid:1; |
| 136 | __u8 bad_pkt:1; | 136 | u8 bad_pkt:1; |
| 137 | __u8 csum_valid:1; | 137 | u8 csum_valid:1; |
| 138 | __u8 iff:4; | 138 | u8 iff:4; |
| 139 | #endif | 139 | #endif |
| 140 | __u16 csum; | 140 | u16 csum; |
| 141 | __u16 vlan; | 141 | u16 vlan; |
| 142 | __u16 len; | 142 | u16 len; |
| 143 | }; | 143 | }; |
| 144 | 144 | ||
| 145 | #endif | 145 | #endif /* _CXGB_CPL5_CMD_H_ */ |