aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/chelsio/common.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/chelsio/common.h')
-rw-r--r--drivers/net/chelsio/common.h105
1 files changed, 91 insertions, 14 deletions
diff --git a/drivers/net/chelsio/common.h b/drivers/net/chelsio/common.h
index 8b1bedbce0d5..74758d2c7af8 100644
--- a/drivers/net/chelsio/common.h
+++ b/drivers/net/chelsio/common.h
@@ -45,6 +45,7 @@
45#include <linux/delay.h> 45#include <linux/delay.h>
46#include <linux/pci.h> 46#include <linux/pci.h>
47#include <linux/ethtool.h> 47#include <linux/ethtool.h>
48#include <linux/if_vlan.h>
48#include <linux/mii.h> 49#include <linux/mii.h>
49#include <linux/crc32.h> 50#include <linux/crc32.h>
50#include <linux/init.h> 51#include <linux/init.h>
@@ -53,13 +54,30 @@
53 54
54#define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver" 55#define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
55#define DRV_NAME "cxgb" 56#define DRV_NAME "cxgb"
56#define DRV_VERSION "2.1.1" 57#define DRV_VERSION "2.2"
57#define PFX DRV_NAME ": " 58#define PFX DRV_NAME ": "
58 59
59#define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__) 60#define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__)
60#define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__) 61#define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__)
61#define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__) 62#define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__)
62 63
64/*
65 * More powerful macro that selectively prints messages based on msg_enable.
66 * For info and debugging messages.
67 */
68#define CH_MSG(adapter, level, category, fmt, ...) do { \
69 if ((adapter)->msg_enable & NETIF_MSG_##category) \
70 printk(KERN_##level PFX "%s: " fmt, (adapter)->name, \
71 ## __VA_ARGS__); \
72} while (0)
73
74#ifdef DEBUG
75# define CH_DBG(adapter, category, fmt, ...) \
76 CH_MSG(adapter, DEBUG, category, fmt, ## __VA_ARGS__)
77#else
78# define CH_DBG(fmt, ...)
79#endif
80
63#define CH_DEVICE(devid, ssid, idx) \ 81#define CH_DEVICE(devid, ssid, idx) \
64 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx } 82 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
65 83
@@ -71,10 +89,6 @@
71 89
72typedef struct adapter adapter_t; 90typedef struct adapter adapter_t;
73 91
74void t1_elmer0_ext_intr(adapter_t *adapter);
75void t1_link_changed(adapter_t *adapter, int port_id, int link_status,
76 int speed, int duplex, int fc);
77
78struct t1_rx_mode { 92struct t1_rx_mode {
79 struct net_device *dev; 93 struct net_device *dev;
80 u32 idx; 94 u32 idx;
@@ -97,26 +111,53 @@ static inline u8 *t1_get_next_mcaddr(struct t1_rx_mode *rm)
97} 111}
98 112
99#define MAX_NPORTS 4 113#define MAX_NPORTS 4
114#define PORT_MASK ((1 << MAX_NPORTS) - 1)
115#define NMTUS 8
116#define TCB_SIZE 128
100 117
101#define SPEED_INVALID 0xffff 118#define SPEED_INVALID 0xffff
102#define DUPLEX_INVALID 0xff 119#define DUPLEX_INVALID 0xff
103 120
104enum { 121enum {
105 CHBT_BOARD_N110, 122 CHBT_BOARD_N110,
106 CHBT_BOARD_N210 123 CHBT_BOARD_N210,
124 CHBT_BOARD_7500,
125 CHBT_BOARD_8000,
126 CHBT_BOARD_CHT101,
127 CHBT_BOARD_CHT110,
128 CHBT_BOARD_CHT210,
129 CHBT_BOARD_CHT204,
130 CHBT_BOARD_CHT204V,
131 CHBT_BOARD_CHT204E,
132 CHBT_BOARD_CHN204,
133 CHBT_BOARD_COUGAR,
134 CHBT_BOARD_6800,
135 CHBT_BOARD_SIMUL,
107}; 136};
108 137
109enum { 138enum {
139 CHBT_TERM_FPGA,
110 CHBT_TERM_T1, 140 CHBT_TERM_T1,
111 CHBT_TERM_T2 141 CHBT_TERM_T2,
142 CHBT_TERM_T3
112}; 143};
113 144
114enum { 145enum {
146 CHBT_MAC_CHELSIO_A,
147 CHBT_MAC_IXF1010,
115 CHBT_MAC_PM3393, 148 CHBT_MAC_PM3393,
149 CHBT_MAC_VSC7321,
150 CHBT_MAC_DUMMY
116}; 151};
117 152
118enum { 153enum {
154 CHBT_PHY_88E1041,
155 CHBT_PHY_88E1111,
119 CHBT_PHY_88X2010, 156 CHBT_PHY_88X2010,
157 CHBT_PHY_XPAK,
158 CHBT_PHY_MY3126,
159 CHBT_PHY_8244,
160 CHBT_PHY_DUMMY
120}; 161};
121 162
122enum { 163enum {
@@ -150,16 +191,44 @@ struct chelsio_pci_params {
150 unsigned char is_pcix; 191 unsigned char is_pcix;
151}; 192};
152 193
194struct tp_params {
195 unsigned int pm_size;
196 unsigned int cm_size;
197 unsigned int pm_rx_base;
198 unsigned int pm_tx_base;
199 unsigned int pm_rx_pg_size;
200 unsigned int pm_tx_pg_size;
201 unsigned int pm_rx_num_pgs;
202 unsigned int pm_tx_num_pgs;
203 unsigned int rx_coalescing_size;
204 unsigned int use_5tuple_mode;
205};
206
207struct mc5_params {
208 unsigned int mode; /* selects MC5 width */
209 unsigned int nservers; /* size of server region */
210 unsigned int nroutes; /* size of routing region */
211};
212
213/* Default MC5 region sizes */
214#define DEFAULT_SERVER_REGION_LEN 256
215#define DEFAULT_RT_REGION_LEN 1024
216
153struct adapter_params { 217struct adapter_params {
154 struct sge_params sge; 218 struct sge_params sge;
219 struct mc5_params mc5;
220 struct tp_params tp;
155 struct chelsio_pci_params pci; 221 struct chelsio_pci_params pci;
156 222
157 const struct board_info *brd_info; 223 const struct board_info *brd_info;
158 224
225 unsigned short mtus[NMTUS];
159 unsigned int nports; /* # of ethernet ports */ 226 unsigned int nports; /* # of ethernet ports */
160 unsigned int stats_update_period; 227 unsigned int stats_update_period;
161 unsigned short chip_revision; 228 unsigned short chip_revision;
162 unsigned char chip_version; 229 unsigned char chip_version;
230 unsigned char is_asic;
231 unsigned char has_msi;
163}; 232};
164 233
165struct link_config { 234struct link_config {
@@ -207,17 +276,20 @@ struct adapter {
207 /* Terminator modules. */ 276 /* Terminator modules. */
208 struct sge *sge; 277 struct sge *sge;
209 struct peespi *espi; 278 struct peespi *espi;
279 struct petp *tp;
210 280
211 struct port_info port[MAX_NPORTS]; 281 struct port_info port[MAX_NPORTS];
212 struct delayed_work stats_update_task; 282 struct delayed_work stats_update_task;
213 struct timer_list stats_update_timer; 283 struct timer_list stats_update_timer;
214 284
215 struct semaphore mib_mutex;
216 spinlock_t tpi_lock; 285 spinlock_t tpi_lock;
217 spinlock_t work_lock; 286 spinlock_t work_lock;
287 spinlock_t mac_lock;
288
218 /* guards async operations */ 289 /* guards async operations */
219 spinlock_t async_lock ____cacheline_aligned; 290 spinlock_t async_lock ____cacheline_aligned;
220 u32 slow_intr_mask; 291 u32 slow_intr_mask;
292 int t1powersave;
221}; 293};
222 294
223enum { /* adapter flags */ 295enum { /* adapter flags */
@@ -256,6 +328,11 @@ struct board_info {
256 const char *desc; 328 const char *desc;
257}; 329};
258 330
331static inline int t1_is_asic(const adapter_t *adapter)
332{
333 return adapter->params.is_asic;
334}
335
259extern struct pci_device_id t1_pci_tbl[]; 336extern struct pci_device_id t1_pci_tbl[];
260 337
261static inline int adapter_matches_type(const adapter_t *adapter, 338static inline int adapter_matches_type(const adapter_t *adapter,
@@ -285,13 +362,15 @@ static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
285 return board_info(adap)->clock_core / 1000000; 362 return board_info(adap)->clock_core / 1000000;
286} 363}
287 364
365extern int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
366extern int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
288extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value); 367extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
289extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value); 368extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
290 369
291extern void t1_interrupts_enable(adapter_t *adapter); 370extern void t1_interrupts_enable(adapter_t *adapter);
292extern void t1_interrupts_disable(adapter_t *adapter); 371extern void t1_interrupts_disable(adapter_t *adapter);
293extern void t1_interrupts_clear(adapter_t *adapter); 372extern void t1_interrupts_clear(adapter_t *adapter);
294extern int elmer0_ext_intr_handler(adapter_t *adapter); 373extern int t1_elmer0_ext_intr_handler(adapter_t *adapter);
295extern int t1_slow_intr_handler(adapter_t *adapter); 374extern int t1_slow_intr_handler(adapter_t *adapter);
296 375
297extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc); 376extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
@@ -305,9 +384,7 @@ extern int t1_init_hw_modules(adapter_t *adapter);
305extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi); 384extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
306extern void t1_free_sw_modules(adapter_t *adapter); 385extern void t1_free_sw_modules(adapter_t *adapter);
307extern void t1_fatal_err(adapter_t *adapter); 386extern void t1_fatal_err(adapter_t *adapter);
308 387extern void t1_link_changed(adapter_t *adapter, int port_id);
309extern void t1_tp_set_udp_checksum_offload(adapter_t *adapter, int enable); 388extern void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
310extern void t1_tp_set_tcp_checksum_offload(adapter_t *adapter, int enable); 389 int speed, int duplex, int pause);
311extern void t1_tp_set_ip_checksum_offload(adapter_t *adapter, int enable);
312
313#endif /* _CXGB_COMMON_H_ */ 390#endif /* _CXGB_COMMON_H_ */