1 files changed, 5 insertions, 7 deletions

diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 59b9943b077d..f6e4030c73d1 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -3422,21 +3422,19 @@ done:
 static void cas_check_pci_invariants(struct cas *cp)
 {
         struct pci_dev *pdev = cp->pdev;
-        u8 rev;
 
         cp->cas_flags = 0;
-        pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
         if ((pdev->vendor == PCI_VENDOR_ID_SUN) &&
             (pdev->device == PCI_DEVICE_ID_SUN_CASSINI)) {
-                if (rev >= CAS_ID_REVPLUS)
+                if (pdev->revision >= CAS_ID_REVPLUS)
                         cp->cas_flags |= CAS_FLAG_REG_PLUS;
-                if (rev < CAS_ID_REVPLUS02u)
+                if (pdev->revision < CAS_ID_REVPLUS02u)
                         cp->cas_flags |= CAS_FLAG_TARGET_ABORT;
 
                 /* Original Cassini supports HW CSUM, but it's not
                  * enabled by default as it can trigger TX hangs.
                  */
-                if (rev < CAS_ID_REV2)
+                if (pdev->revision < CAS_ID_REV2)
                         cp->cas_flags |= CAS_FLAG_NO_HW_CSUM;
         } else {
                 /* Only sun has original cassini chips.  */
@@ -4919,13 +4917,13 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
         pci_cmd &= ~PCI_COMMAND_SERR;
         pci_cmd |= PCI_COMMAND_PARITY;
         pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
-        if (pci_set_mwi(pdev))
+        if (pci_try_set_mwi(pdev))
                 printk(KERN_WARNING PFX "Could not enable MWI for %s\n",
                        pci_name(pdev));
 
         /*
          * On some architectures, the default cache line size set
-         * by pci_set_mwi reduces perforamnce.  We have to increase
+         * by pci_try_set_mwi reduces perforamnce.  We have to increase
          * it for this case.  To start, we'll print some configuration
          * data.
          */