diff options
Diffstat (limited to 'drivers/net/bnx2x_reg.h')
-rw-r--r-- | drivers/net/bnx2x_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h index 40c3a7735d25..b5313c209caa 100644 --- a/drivers/net/bnx2x_reg.h +++ b/drivers/net/bnx2x_reg.h | |||
@@ -1677,6 +1677,7 @@ | |||
1677 | /* [RW 8] init credit counter for port0 in LLH */ | 1677 | /* [RW 8] init credit counter for port0 in LLH */ |
1678 | #define NIG_REG_LLH0_XCM_INIT_CREDIT 0x10554 | 1678 | #define NIG_REG_LLH0_XCM_INIT_CREDIT 0x10554 |
1679 | #define NIG_REG_LLH0_XCM_MASK 0x10130 | 1679 | #define NIG_REG_LLH0_XCM_MASK 0x10130 |
1680 | #define NIG_REG_LLH1_BRB1_DRV_MASK 0x10248 | ||
1680 | /* [RW 1] send to BRB1 if no match on any of RMP rules. */ | 1681 | /* [RW 1] send to BRB1 if no match on any of RMP rules. */ |
1681 | #define NIG_REG_LLH1_BRB1_NOT_MCP 0x102dc | 1682 | #define NIG_REG_LLH1_BRB1_NOT_MCP 0x102dc |
1682 | /* [RW 2] Determine the classification participants. 0: no classification.1: | 1683 | /* [RW 2] Determine the classification participants. 0: no classification.1: |
@@ -4962,6 +4963,7 @@ | |||
4962 | #define MISC_REGISTERS_GPIO_PORT_SHIFT 4 | 4963 | #define MISC_REGISTERS_GPIO_PORT_SHIFT 4 |
4963 | #define MISC_REGISTERS_GPIO_SET_POS 8 | 4964 | #define MISC_REGISTERS_GPIO_SET_POS 8 |
4964 | #define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588 | 4965 | #define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588 |
4966 | #define MISC_REGISTERS_RESET_REG_1_RST_NIG (0x1<<7) | ||
4965 | #define MISC_REGISTERS_RESET_REG_1_SET 0x584 | 4967 | #define MISC_REGISTERS_RESET_REG_1_SET 0x584 |
4966 | #define MISC_REGISTERS_RESET_REG_2_CLEAR 0x598 | 4968 | #define MISC_REGISTERS_RESET_REG_2_CLEAR 0x598 |
4967 | #define MISC_REGISTERS_RESET_REG_2_RST_BMAC0 (0x1<<0) | 4969 | #define MISC_REGISTERS_RESET_REG_2_RST_BMAC0 (0x1<<0) |
@@ -4997,6 +4999,7 @@ | |||
4997 | #define HW_LOCK_RESOURCE_8072_MDIO 0 | 4999 | #define HW_LOCK_RESOURCE_8072_MDIO 0 |
4998 | #define HW_LOCK_RESOURCE_GPIO 1 | 5000 | #define HW_LOCK_RESOURCE_GPIO 1 |
4999 | #define HW_LOCK_RESOURCE_SPIO 2 | 5001 | #define HW_LOCK_RESOURCE_SPIO 2 |
5002 | #define HW_LOCK_RESOURCE_UNDI 5 | ||
5000 | #define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (1<<18) | 5003 | #define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (1<<18) |
5001 | #define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (1<<31) | 5004 | #define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (1<<31) |
5002 | #define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (1<<9) | 5005 | #define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (1<<9) |