diff options
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r-- | drivers/net/bnx2x_main.c | 70 |
1 files changed, 33 insertions, 37 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index 721db2957e26..d3c4c1ed07ef 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -555,8 +555,8 @@ static void bnx2x_panic_dump(struct bnx2x *bp) | |||
555 | j, rx_bd[1], rx_bd[0], sw_bd->skb); | 555 | j, rx_bd[1], rx_bd[0], sw_bd->skb); |
556 | } | 556 | } |
557 | 557 | ||
558 | start = 0; | 558 | start = RX_SGE(fp->rx_sge_prod); |
559 | end = RX_SGE_CNT*NUM_RX_SGE_PAGES; | 559 | end = RX_SGE(fp->last_max_sge); |
560 | for (j = start; j < end; j++) { | 560 | for (j = start; j < end; j++) { |
561 | u32 *rx_sge = (u32 *)&fp->rx_sge_ring[j]; | 561 | u32 *rx_sge = (u32 *)&fp->rx_sge_ring[j]; |
562 | struct sw_rx_page *sw_page = &fp->rx_page_ring[j]; | 562 | struct sw_rx_page *sw_page = &fp->rx_page_ring[j]; |
@@ -885,6 +885,7 @@ static void bnx2x_tx_int(struct bnx2x_fastpath *fp, int work) | |||
885 | } | 885 | } |
886 | } | 886 | } |
887 | 887 | ||
888 | |||
888 | static void bnx2x_sp_event(struct bnx2x_fastpath *fp, | 889 | static void bnx2x_sp_event(struct bnx2x_fastpath *fp, |
889 | union eth_rx_cqe *rr_cqe) | 890 | union eth_rx_cqe *rr_cqe) |
890 | { | 891 | { |
@@ -940,6 +941,7 @@ static void bnx2x_sp_event(struct bnx2x_fastpath *fp, | |||
940 | bnx2x_fp(bp, cid, state) = BNX2X_FP_STATE_CLOSED; | 941 | bnx2x_fp(bp, cid, state) = BNX2X_FP_STATE_CLOSED; |
941 | break; | 942 | break; |
942 | 943 | ||
944 | |||
943 | case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_OPEN): | 945 | case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_OPEN): |
944 | case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_DIAG): | 946 | case (RAMROD_CMD_ID_ETH_SET_MAC | BNX2X_STATE_DIAG): |
945 | DP(NETIF_MSG_IFUP, "got set mac ramrod\n"); | 947 | DP(NETIF_MSG_IFUP, "got set mac ramrod\n"); |
@@ -1370,7 +1372,6 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) | |||
1370 | u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons; | 1372 | u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons; |
1371 | u16 hw_comp_cons, sw_comp_cons, sw_comp_prod; | 1373 | u16 hw_comp_cons, sw_comp_cons, sw_comp_prod; |
1372 | int rx_pkt = 0; | 1374 | int rx_pkt = 0; |
1373 | u16 queue; | ||
1374 | 1375 | ||
1375 | #ifdef BNX2X_STOP_ON_ERROR | 1376 | #ifdef BNX2X_STOP_ON_ERROR |
1376 | if (unlikely(bp->panic)) | 1377 | if (unlikely(bp->panic)) |
@@ -1436,7 +1437,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) | |||
1436 | if ((!fp->disable_tpa) && | 1437 | if ((!fp->disable_tpa) && |
1437 | (TPA_TYPE(cqe_fp_flags) != | 1438 | (TPA_TYPE(cqe_fp_flags) != |
1438 | (TPA_TYPE_START | TPA_TYPE_END))) { | 1439 | (TPA_TYPE_START | TPA_TYPE_END))) { |
1439 | queue = cqe->fast_path_cqe.queue_index; | 1440 | u16 queue = cqe->fast_path_cqe.queue_index; |
1440 | 1441 | ||
1441 | if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) { | 1442 | if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) { |
1442 | DP(NETIF_MSG_RX_STATUS, | 1443 | DP(NETIF_MSG_RX_STATUS, |
@@ -1635,17 +1636,17 @@ static irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) | |||
1635 | } | 1636 | } |
1636 | DP(NETIF_MSG_INTR, "got an interrupt status %u\n", status); | 1637 | DP(NETIF_MSG_INTR, "got an interrupt status %u\n", status); |
1637 | 1638 | ||
1638 | #ifdef BNX2X_STOP_ON_ERROR | ||
1639 | if (unlikely(bp->panic)) | ||
1640 | return IRQ_HANDLED; | ||
1641 | #endif | ||
1642 | |||
1643 | /* Return here if interrupt is disabled */ | 1639 | /* Return here if interrupt is disabled */ |
1644 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { | 1640 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { |
1645 | DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); | 1641 | DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); |
1646 | return IRQ_HANDLED; | 1642 | return IRQ_HANDLED; |
1647 | } | 1643 | } |
1648 | 1644 | ||
1645 | #ifdef BNX2X_STOP_ON_ERROR | ||
1646 | if (unlikely(bp->panic)) | ||
1647 | return IRQ_HANDLED; | ||
1648 | #endif | ||
1649 | |||
1649 | mask = 0x2 << bp->fp[0].sb_id; | 1650 | mask = 0x2 << bp->fp[0].sb_id; |
1650 | if (status & mask) { | 1651 | if (status & mask) { |
1651 | struct bnx2x_fastpath *fp = &bp->fp[0]; | 1652 | struct bnx2x_fastpath *fp = &bp->fp[0]; |
@@ -2827,7 +2828,7 @@ static void bnx2x_sp_task(struct work_struct *work) | |||
2827 | 2828 | ||
2828 | /* Return here if interrupt is disabled */ | 2829 | /* Return here if interrupt is disabled */ |
2829 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { | 2830 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { |
2830 | DP(BNX2X_MSG_SP, "called but intr_sem not 0, returning\n"); | 2831 | DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); |
2831 | return; | 2832 | return; |
2832 | } | 2833 | } |
2833 | 2834 | ||
@@ -2835,7 +2836,7 @@ static void bnx2x_sp_task(struct work_struct *work) | |||
2835 | /* if (status == 0) */ | 2836 | /* if (status == 0) */ |
2836 | /* BNX2X_ERR("spurious slowpath interrupt!\n"); */ | 2837 | /* BNX2X_ERR("spurious slowpath interrupt!\n"); */ |
2837 | 2838 | ||
2838 | DP(BNX2X_MSG_SP, "got a slowpath interrupt (updated %x)\n", status); | 2839 | DP(NETIF_MSG_INTR, "got a slowpath interrupt (updated %x)\n", status); |
2839 | 2840 | ||
2840 | /* HW attentions */ | 2841 | /* HW attentions */ |
2841 | if (status & 0x1) | 2842 | if (status & 0x1) |
@@ -2865,7 +2866,7 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) | |||
2865 | 2866 | ||
2866 | /* Return here if interrupt is disabled */ | 2867 | /* Return here if interrupt is disabled */ |
2867 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { | 2868 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { |
2868 | DP(BNX2X_MSG_SP, "called but intr_sem not 0, returning\n"); | 2869 | DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); |
2869 | return IRQ_HANDLED; | 2870 | return IRQ_HANDLED; |
2870 | } | 2871 | } |
2871 | 2872 | ||
@@ -4563,7 +4564,7 @@ static void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4563 | int func = BP_FUNC(bp); | 4564 | int func = BP_FUNC(bp); |
4564 | int i; | 4565 | int i; |
4565 | 4566 | ||
4566 | DP(NETIF_MSG_RX_STATUS, "rx mode is %d\n", mode); | 4567 | DP(NETIF_MSG_IFUP, "rx mode %d mask 0x%x\n", mode, mask); |
4567 | 4568 | ||
4568 | switch (mode) { | 4569 | switch (mode) { |
4569 | case BNX2X_RX_MODE_NONE: /* no Rx */ | 4570 | case BNX2X_RX_MODE_NONE: /* no Rx */ |
@@ -4922,7 +4923,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) | |||
4922 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0); | 4923 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0); |
4923 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x0); | 4924 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x0); |
4924 | REG_WR(bp, CFC_REG_DEBUG0, 0x1); | 4925 | REG_WR(bp, CFC_REG_DEBUG0, 0x1); |
4925 | NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x0); | 4926 | REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x0); |
4926 | 4927 | ||
4927 | /* Write 0 to parser credits for CFC search request */ | 4928 | /* Write 0 to parser credits for CFC search request */ |
4928 | REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0); | 4929 | REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0); |
@@ -4977,7 +4978,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) | |||
4977 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0); | 4978 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0); |
4978 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x0); | 4979 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x0); |
4979 | REG_WR(bp, CFC_REG_DEBUG0, 0x1); | 4980 | REG_WR(bp, CFC_REG_DEBUG0, 0x1); |
4980 | NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x0); | 4981 | REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x0); |
4981 | 4982 | ||
4982 | /* Write 0 to parser credits for CFC search request */ | 4983 | /* Write 0 to parser credits for CFC search request */ |
4983 | REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0); | 4984 | REG_WR(bp, PRS_REG_CFC_SEARCH_INITIAL_CREDIT, 0x0); |
@@ -5044,7 +5045,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) | |||
5044 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x7fffffff); | 5045 | REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x7fffffff); |
5045 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x1); | 5046 | REG_WR(bp, TCM_REG_PRS_IFEN, 0x1); |
5046 | REG_WR(bp, CFC_REG_DEBUG0, 0x0); | 5047 | REG_WR(bp, CFC_REG_DEBUG0, 0x0); |
5047 | NIG_WR(NIG_REG_PRS_REQ_IN_EN, 0x1); | 5048 | REG_WR(bp, NIG_REG_PRS_REQ_IN_EN, 0x1); |
5048 | 5049 | ||
5049 | DP(NETIF_MSG_HW, "done\n"); | 5050 | DP(NETIF_MSG_HW, "done\n"); |
5050 | 5051 | ||
@@ -5133,11 +5134,6 @@ static int bnx2x_init_common(struct bnx2x *bp) | |||
5133 | REG_WR(bp, PXP2_REG_RD_CDURD_SWAP_MODE, 1); | 5134 | REG_WR(bp, PXP2_REG_RD_CDURD_SWAP_MODE, 1); |
5134 | #endif | 5135 | #endif |
5135 | 5136 | ||
5136 | #ifndef BCM_ISCSI | ||
5137 | /* set NIC mode */ | ||
5138 | REG_WR(bp, PRS_REG_NIC_MODE, 1); | ||
5139 | #endif | ||
5140 | |||
5141 | REG_WR(bp, PXP2_REG_RQ_CDU_P_SIZE, 2); | 5137 | REG_WR(bp, PXP2_REG_RQ_CDU_P_SIZE, 2); |
5142 | #ifdef BCM_ISCSI | 5138 | #ifdef BCM_ISCSI |
5143 | REG_WR(bp, PXP2_REG_RQ_TM_P_SIZE, 5); | 5139 | REG_WR(bp, PXP2_REG_RQ_TM_P_SIZE, 5); |
@@ -5207,6 +5203,8 @@ static int bnx2x_init_common(struct bnx2x *bp) | |||
5207 | } | 5203 | } |
5208 | 5204 | ||
5209 | bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); | 5205 | bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); |
5206 | /* set NIC mode */ | ||
5207 | REG_WR(bp, PRS_REG_NIC_MODE, 1); | ||
5210 | if (CHIP_IS_E1H(bp)) | 5208 | if (CHIP_IS_E1H(bp)) |
5211 | REG_WR(bp, PRS_REG_E1HOV_MODE, IS_E1HMF(bp)); | 5209 | REG_WR(bp, PRS_REG_E1HOV_MODE, IS_E1HMF(bp)); |
5212 | 5210 | ||
@@ -6034,8 +6032,8 @@ static int bnx2x_req_msix_irqs(struct bnx2x *bp) | |||
6034 | bnx2x_msix_fp_int, 0, | 6032 | bnx2x_msix_fp_int, 0, |
6035 | bp->dev->name, &bp->fp[i]); | 6033 | bp->dev->name, &bp->fp[i]); |
6036 | if (rc) { | 6034 | if (rc) { |
6037 | BNX2X_ERR("request fp #%d irq failed rc %d\n", | 6035 | BNX2X_ERR("request fp #%d irq failed rc -%d\n", |
6038 | i + offset, rc); | 6036 | i + offset, -rc); |
6039 | bnx2x_free_msix_irqs(bp); | 6037 | bnx2x_free_msix_irqs(bp); |
6040 | return -EBUSY; | 6038 | return -EBUSY; |
6041 | } | 6039 | } |
@@ -6237,7 +6235,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode) | |||
6237 | { | 6235 | { |
6238 | u32 load_code; | 6236 | u32 load_code; |
6239 | int i, rc; | 6237 | int i, rc; |
6240 | |||
6241 | #ifdef BNX2X_STOP_ON_ERROR | 6238 | #ifdef BNX2X_STOP_ON_ERROR |
6242 | if (unlikely(bp->panic)) | 6239 | if (unlikely(bp->panic)) |
6243 | return -EPERM; | 6240 | return -EPERM; |
@@ -6444,8 +6441,7 @@ load_int_disable: | |||
6444 | /* Free SKBs, SGEs, TPA pool and driver internals */ | 6441 | /* Free SKBs, SGEs, TPA pool and driver internals */ |
6445 | bnx2x_free_skbs(bp); | 6442 | bnx2x_free_skbs(bp); |
6446 | for_each_queue(bp, i) | 6443 | for_each_queue(bp, i) |
6447 | bnx2x_free_rx_sge_range(bp, bp->fp + i, | 6444 | bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); |
6448 | RX_SGE_CNT*NUM_RX_SGE_PAGES); | ||
6449 | load_error: | 6445 | load_error: |
6450 | bnx2x_free_mem(bp); | 6446 | bnx2x_free_mem(bp); |
6451 | 6447 | ||
@@ -6683,11 +6679,11 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) | |||
6683 | u8 entry = (BP_E1HVN(bp) + 1)*8; | 6679 | u8 entry = (BP_E1HVN(bp) + 1)*8; |
6684 | 6680 | ||
6685 | val = (mac_addr[0] << 8) | mac_addr[1]; | 6681 | val = (mac_addr[0] << 8) | mac_addr[1]; |
6686 | EMAC_WR(EMAC_REG_EMAC_MAC_MATCH + entry, val); | 6682 | EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry, val); |
6687 | 6683 | ||
6688 | val = (mac_addr[2] << 24) | (mac_addr[3] << 16) | | 6684 | val = (mac_addr[2] << 24) | (mac_addr[3] << 16) | |
6689 | (mac_addr[4] << 8) | mac_addr[5]; | 6685 | (mac_addr[4] << 8) | mac_addr[5]; |
6690 | EMAC_WR(EMAC_REG_EMAC_MAC_MATCH + entry + 4, val); | 6686 | EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val); |
6691 | 6687 | ||
6692 | reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN; | 6688 | reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN; |
6693 | 6689 | ||
@@ -6773,8 +6769,7 @@ unload_error: | |||
6773 | /* Free SKBs, SGEs, TPA pool and driver internals */ | 6769 | /* Free SKBs, SGEs, TPA pool and driver internals */ |
6774 | bnx2x_free_skbs(bp); | 6770 | bnx2x_free_skbs(bp); |
6775 | for_each_queue(bp, i) | 6771 | for_each_queue(bp, i) |
6776 | bnx2x_free_rx_sge_range(bp, bp->fp + i, | 6772 | bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); |
6777 | RX_SGE_CNT*NUM_RX_SGE_PAGES); | ||
6778 | bnx2x_free_mem(bp); | 6773 | bnx2x_free_mem(bp); |
6779 | 6774 | ||
6780 | bp->state = BNX2X_STATE_CLOSED; | 6775 | bp->state = BNX2X_STATE_CLOSED; |
@@ -7411,9 +7406,8 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
7411 | bp->mf_config = | 7406 | bp->mf_config = |
7412 | SHMEM_RD(bp, mf_cfg.func_mf_config[func].config); | 7407 | SHMEM_RD(bp, mf_cfg.func_mf_config[func].config); |
7413 | 7408 | ||
7414 | val = | 7409 | val = (SHMEM_RD(bp, mf_cfg.func_mf_config[func].e1hov_tag) & |
7415 | (SHMEM_RD(bp, mf_cfg.func_mf_config[func].e1hov_tag) & | 7410 | FUNC_MF_CFG_E1HOV_TAG_MASK); |
7416 | FUNC_MF_CFG_E1HOV_TAG_MASK); | ||
7417 | if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { | 7411 | if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { |
7418 | 7412 | ||
7419 | bp->e1hov = val; | 7413 | bp->e1hov = val; |
@@ -8368,7 +8362,7 @@ static int bnx2x_set_pauseparam(struct net_device *dev, | |||
8368 | 8362 | ||
8369 | if (epause->autoneg) { | 8363 | if (epause->autoneg) { |
8370 | if (!(bp->port.supported & SUPPORTED_Autoneg)) { | 8364 | if (!(bp->port.supported & SUPPORTED_Autoneg)) { |
8371 | DP(NETIF_MSG_LINK, "Autoneg not supported\n"); | 8365 | DP(NETIF_MSG_LINK, "autoneg not supported\n"); |
8372 | return -EINVAL; | 8366 | return -EINVAL; |
8373 | } | 8367 | } |
8374 | 8368 | ||
@@ -9536,7 +9530,8 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
9536 | tx_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; | 9530 | tx_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; |
9537 | tx_bd->general_data = (UNICAST_ADDRESS << | 9531 | tx_bd->general_data = (UNICAST_ADDRESS << |
9538 | ETH_TX_BD_ETH_ADDR_TYPE_SHIFT); | 9532 | ETH_TX_BD_ETH_ADDR_TYPE_SHIFT); |
9539 | tx_bd->general_data |= 1; /* header nbd */ | 9533 | /* header nbd */ |
9534 | tx_bd->general_data |= (1 << ETH_TX_BD_HDR_NBDS_SHIFT); | ||
9540 | 9535 | ||
9541 | /* remember the first BD of the packet */ | 9536 | /* remember the first BD of the packet */ |
9542 | tx_buf->first_bd = fp->tx_bd_prod; | 9537 | tx_buf->first_bd = fp->tx_bd_prod; |
@@ -9898,6 +9893,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
9898 | { | 9893 | { |
9899 | struct mii_ioctl_data *data = if_mii(ifr); | 9894 | struct mii_ioctl_data *data = if_mii(ifr); |
9900 | struct bnx2x *bp = netdev_priv(dev); | 9895 | struct bnx2x *bp = netdev_priv(dev); |
9896 | int port = BP_PORT(bp); | ||
9901 | int err; | 9897 | int err; |
9902 | 9898 | ||
9903 | switch (cmd) { | 9899 | switch (cmd) { |
@@ -9913,7 +9909,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
9913 | return -EAGAIN; | 9909 | return -EAGAIN; |
9914 | 9910 | ||
9915 | mutex_lock(&bp->port.phy_mutex); | 9911 | mutex_lock(&bp->port.phy_mutex); |
9916 | err = bnx2x_cl45_read(bp, BP_PORT(bp), 0, bp->port.phy_addr, | 9912 | err = bnx2x_cl45_read(bp, port, 0, bp->port.phy_addr, |
9917 | DEFAULT_PHY_DEV_ADDR, | 9913 | DEFAULT_PHY_DEV_ADDR, |
9918 | (data->reg_num & 0x1f), &mii_regval); | 9914 | (data->reg_num & 0x1f), &mii_regval); |
9919 | data->val_out = mii_regval; | 9915 | data->val_out = mii_regval; |
@@ -9929,7 +9925,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
9929 | return -EAGAIN; | 9925 | return -EAGAIN; |
9930 | 9926 | ||
9931 | mutex_lock(&bp->port.phy_mutex); | 9927 | mutex_lock(&bp->port.phy_mutex); |
9932 | err = bnx2x_cl45_write(bp, BP_PORT(bp), 0, bp->port.phy_addr, | 9928 | err = bnx2x_cl45_write(bp, port, 0, bp->port.phy_addr, |
9933 | DEFAULT_PHY_DEV_ADDR, | 9929 | DEFAULT_PHY_DEV_ADDR, |
9934 | (data->reg_num & 0x1f), data->val_in); | 9930 | (data->reg_num & 0x1f), data->val_in); |
9935 | mutex_unlock(&bp->port.phy_mutex); | 9931 | mutex_unlock(&bp->port.phy_mutex); |