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Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c302
1 files changed, 183 insertions, 119 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 7c533797c064..d3e7775a9ccf 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -1,6 +1,6 @@
1/* bnx2x_main.c: Broadcom Everest network driver. 1/* bnx2x_main.c: Broadcom Everest network driver.
2 * 2 *
3 * Copyright (c) 2007-2008 Broadcom Corporation 3 * Copyright (c) 2007-2009 Broadcom Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
@@ -57,8 +57,8 @@
57#include "bnx2x.h" 57#include "bnx2x.h"
58#include "bnx2x_init.h" 58#include "bnx2x_init.h"
59 59
60#define DRV_MODULE_VERSION "1.45.23" 60#define DRV_MODULE_VERSION "1.45.26"
61#define DRV_MODULE_RELDATE "2008/11/03" 61#define DRV_MODULE_RELDATE "2009/01/26"
62#define BNX2X_BC_VER 0x040200 62#define BNX2X_BC_VER 0x040200
63 63
64/* Time in jiffies before concluding the transmitter is hung */ 64/* Time in jiffies before concluding the transmitter is hung */
@@ -69,7 +69,7 @@ static char version[] __devinitdata =
69 DRV_MODULE_NAME " " DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; 69 DRV_MODULE_NAME " " DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
70 70
71MODULE_AUTHOR("Eliezer Tamir"); 71MODULE_AUTHOR("Eliezer Tamir");
72MODULE_DESCRIPTION("Broadcom NetXtreme II BCM57710 Driver"); 72MODULE_DESCRIPTION("Broadcom NetXtreme II BCM57710/57711/57711E Driver");
73MODULE_LICENSE("GPL"); 73MODULE_LICENSE("GPL");
74MODULE_VERSION(DRV_MODULE_VERSION); 74MODULE_VERSION(DRV_MODULE_VERSION);
75 75
@@ -733,6 +733,24 @@ static u16 bnx2x_ack_int(struct bnx2x *bp)
733 * fast path service functions 733 * fast path service functions
734 */ 734 */
735 735
736static inline int bnx2x_has_tx_work(struct bnx2x_fastpath *fp)
737{
738 u16 tx_cons_sb;
739
740 /* Tell compiler that status block fields can change */
741 barrier();
742 tx_cons_sb = le16_to_cpu(*fp->tx_cons_sb);
743 return (fp->tx_pkt_cons != tx_cons_sb);
744}
745
746static inline int bnx2x_has_tx_work_unload(struct bnx2x_fastpath *fp)
747{
748 /* Tell compiler that consumer and producer can change */
749 barrier();
750 return (fp->tx_pkt_prod != fp->tx_pkt_cons);
751
752}
753
736/* free skb in the packet ring at pos idx 754/* free skb in the packet ring at pos idx
737 * return idx of last bd freed 755 * return idx of last bd freed
738 */ 756 */
@@ -5137,12 +5155,21 @@ static void enable_blocks_attention(struct bnx2x *bp)
5137} 5155}
5138 5156
5139 5157
5158static void bnx2x_reset_common(struct bnx2x *bp)
5159{
5160 /* reset_common */
5161 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
5162 0xd3ffff7f);
5163 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
5164}
5165
5140static int bnx2x_init_common(struct bnx2x *bp) 5166static int bnx2x_init_common(struct bnx2x *bp)
5141{ 5167{
5142 u32 val, i; 5168 u32 val, i;
5143 5169
5144 DP(BNX2X_MSG_MCP, "starting common init func %d\n", BP_FUNC(bp)); 5170 DP(BNX2X_MSG_MCP, "starting common init func %d\n", BP_FUNC(bp));
5145 5171
5172 bnx2x_reset_common(bp);
5146 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff); 5173 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff);
5147 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc); 5174 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc);
5148 5175
@@ -6123,8 +6150,8 @@ static void bnx2x_netif_start(struct bnx2x *bp)
6123static void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw) 6150static void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
6124{ 6151{
6125 bnx2x_int_disable_sync(bp, disable_hw); 6152 bnx2x_int_disable_sync(bp, disable_hw);
6153 bnx2x_napi_disable(bp);
6126 if (netif_running(bp->dev)) { 6154 if (netif_running(bp->dev)) {
6127 bnx2x_napi_disable(bp);
6128 netif_tx_disable(bp->dev); 6155 netif_tx_disable(bp->dev);
6129 bp->dev->trans_start = jiffies; /* prevent tx timeout */ 6156 bp->dev->trans_start = jiffies; /* prevent tx timeout */
6130 } 6157 }
@@ -6144,7 +6171,7 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp, int set)
6144 * multicast 64-127:port0 128-191:port1 6171 * multicast 64-127:port0 128-191:port1
6145 */ 6172 */
6146 config->hdr.length_6b = 2; 6173 config->hdr.length_6b = 2;
6147 config->hdr.offset = port ? 31 : 0; 6174 config->hdr.offset = port ? 32 : 0;
6148 config->hdr.client_id = BP_CL_ID(bp); 6175 config->hdr.client_id = BP_CL_ID(bp);
6149 config->hdr.reserved1 = 0; 6176 config->hdr.reserved1 = 0;
6150 6177
@@ -6308,7 +6335,7 @@ static void bnx2x_set_rx_mode(struct net_device *dev);
6308static int bnx2x_nic_load(struct bnx2x *bp, int load_mode) 6335static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6309{ 6336{
6310 u32 load_code; 6337 u32 load_code;
6311 int i, rc; 6338 int i, rc = 0;
6312#ifdef BNX2X_STOP_ON_ERROR 6339#ifdef BNX2X_STOP_ON_ERROR
6313 if (unlikely(bp->panic)) 6340 if (unlikely(bp->panic))
6314 return -EPERM; 6341 return -EPERM;
@@ -6316,48 +6343,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6316 6343
6317 bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD; 6344 bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
6318 6345
6319 /* Send LOAD_REQUEST command to MCP
6320 Returns the type of LOAD command:
6321 if it is the first port to be initialized
6322 common blocks should be initialized, otherwise - not
6323 */
6324 if (!BP_NOMCP(bp)) {
6325 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ);
6326 if (!load_code) {
6327 BNX2X_ERR("MCP response failure, aborting\n");
6328 return -EBUSY;
6329 }
6330 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED)
6331 return -EBUSY; /* other port in diagnostic mode */
6332
6333 } else {
6334 int port = BP_PORT(bp);
6335
6336 DP(NETIF_MSG_IFUP, "NO MCP load counts before us %d, %d, %d\n",
6337 load_count[0], load_count[1], load_count[2]);
6338 load_count[0]++;
6339 load_count[1 + port]++;
6340 DP(NETIF_MSG_IFUP, "NO MCP new load counts %d, %d, %d\n",
6341 load_count[0], load_count[1], load_count[2]);
6342 if (load_count[0] == 1)
6343 load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
6344 else if (load_count[1 + port] == 1)
6345 load_code = FW_MSG_CODE_DRV_LOAD_PORT;
6346 else
6347 load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
6348 }
6349
6350 if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
6351 (load_code == FW_MSG_CODE_DRV_LOAD_PORT))
6352 bp->port.pmf = 1;
6353 else
6354 bp->port.pmf = 0;
6355 DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf);
6356
6357 /* if we can't use MSI-X we only need one fp,
6358 * so try to enable MSI-X with the requested number of fp's
6359 * and fallback to inta with one fp
6360 */
6361 if (use_inta) { 6346 if (use_inta) {
6362 bp->num_queues = 1; 6347 bp->num_queues = 1;
6363 6348
@@ -6372,7 +6357,15 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6372 else 6357 else
6373 bp->num_queues = 1; 6358 bp->num_queues = 1;
6374 6359
6375 if (bnx2x_enable_msix(bp)) { 6360 DP(NETIF_MSG_IFUP,
6361 "set number of queues to %d\n", bp->num_queues);
6362
6363 /* if we can't use MSI-X we only need one fp,
6364 * so try to enable MSI-X with the requested number of fp's
6365 * and fallback to MSI or legacy INTx with one fp
6366 */
6367 rc = bnx2x_enable_msix(bp);
6368 if (rc) {
6376 /* failed to enable MSI-X */ 6369 /* failed to enable MSI-X */
6377 bp->num_queues = 1; 6370 bp->num_queues = 1;
6378 if (use_multi) 6371 if (use_multi)
@@ -6380,8 +6373,6 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6380 " to enable MSI-X\n"); 6373 " to enable MSI-X\n");
6381 } 6374 }
6382 } 6375 }
6383 DP(NETIF_MSG_IFUP,
6384 "set number of queues to %d\n", bp->num_queues);
6385 6376
6386 if (bnx2x_alloc_mem(bp)) 6377 if (bnx2x_alloc_mem(bp))
6387 return -ENOMEM; 6378 return -ENOMEM;
@@ -6390,30 +6381,85 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6390 bnx2x_fp(bp, i, disable_tpa) = 6381 bnx2x_fp(bp, i, disable_tpa) =
6391 ((bp->flags & TPA_ENABLE_FLAG) == 0); 6382 ((bp->flags & TPA_ENABLE_FLAG) == 0);
6392 6383
6384 for_each_queue(bp, i)
6385 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),
6386 bnx2x_poll, 128);
6387
6388#ifdef BNX2X_STOP_ON_ERROR
6389 for_each_queue(bp, i) {
6390 struct bnx2x_fastpath *fp = &bp->fp[i];
6391
6392 fp->poll_no_work = 0;
6393 fp->poll_calls = 0;
6394 fp->poll_max_calls = 0;
6395 fp->poll_complete = 0;
6396 fp->poll_exit = 0;
6397 }
6398#endif
6399 bnx2x_napi_enable(bp);
6400
6393 if (bp->flags & USING_MSIX_FLAG) { 6401 if (bp->flags & USING_MSIX_FLAG) {
6394 rc = bnx2x_req_msix_irqs(bp); 6402 rc = bnx2x_req_msix_irqs(bp);
6395 if (rc) { 6403 if (rc) {
6396 pci_disable_msix(bp->pdev); 6404 pci_disable_msix(bp->pdev);
6397 goto load_error; 6405 goto load_error1;
6398 } 6406 }
6407 printk(KERN_INFO PFX "%s: using MSI-X\n", bp->dev->name);
6399 } else { 6408 } else {
6400 bnx2x_ack_int(bp); 6409 bnx2x_ack_int(bp);
6401 rc = bnx2x_req_irq(bp); 6410 rc = bnx2x_req_irq(bp);
6402 if (rc) { 6411 if (rc) {
6403 BNX2X_ERR("IRQ request failed, aborting\n"); 6412 BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc);
6404 goto load_error; 6413 goto load_error1;
6405 } 6414 }
6406 } 6415 }
6407 6416
6408 for_each_queue(bp, i) 6417 /* Send LOAD_REQUEST command to MCP
6409 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), 6418 Returns the type of LOAD command:
6410 bnx2x_poll, 128); 6419 if it is the first port to be initialized
6420 common blocks should be initialized, otherwise - not
6421 */
6422 if (!BP_NOMCP(bp)) {
6423 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ);
6424 if (!load_code) {
6425 BNX2X_ERR("MCP response failure, aborting\n");
6426 rc = -EBUSY;
6427 goto load_error2;
6428 }
6429 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
6430 rc = -EBUSY; /* other port in diagnostic mode */
6431 goto load_error2;
6432 }
6433
6434 } else {
6435 int port = BP_PORT(bp);
6436
6437 DP(NETIF_MSG_IFUP, "NO MCP load counts before us %d, %d, %d\n",
6438 load_count[0], load_count[1], load_count[2]);
6439 load_count[0]++;
6440 load_count[1 + port]++;
6441 DP(NETIF_MSG_IFUP, "NO MCP new load counts %d, %d, %d\n",
6442 load_count[0], load_count[1], load_count[2]);
6443 if (load_count[0] == 1)
6444 load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
6445 else if (load_count[1 + port] == 1)
6446 load_code = FW_MSG_CODE_DRV_LOAD_PORT;
6447 else
6448 load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
6449 }
6450
6451 if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
6452 (load_code == FW_MSG_CODE_DRV_LOAD_PORT))
6453 bp->port.pmf = 1;
6454 else
6455 bp->port.pmf = 0;
6456 DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf);
6411 6457
6412 /* Initialize HW */ 6458 /* Initialize HW */
6413 rc = bnx2x_init_hw(bp, load_code); 6459 rc = bnx2x_init_hw(bp, load_code);
6414 if (rc) { 6460 if (rc) {
6415 BNX2X_ERR("HW init failed, aborting\n"); 6461 BNX2X_ERR("HW init failed, aborting\n");
6416 goto load_int_disable; 6462 goto load_error2;
6417 } 6463 }
6418 6464
6419 /* Setup NIC internals and enable interrupts */ 6465 /* Setup NIC internals and enable interrupts */
@@ -6425,7 +6471,7 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6425 if (!load_code) { 6471 if (!load_code) {
6426 BNX2X_ERR("MCP response failure, aborting\n"); 6472 BNX2X_ERR("MCP response failure, aborting\n");
6427 rc = -EBUSY; 6473 rc = -EBUSY;
6428 goto load_rings_free; 6474 goto load_error3;
6429 } 6475 }
6430 } 6476 }
6431 6477
@@ -6434,7 +6480,7 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6434 rc = bnx2x_setup_leading(bp); 6480 rc = bnx2x_setup_leading(bp);
6435 if (rc) { 6481 if (rc) {
6436 BNX2X_ERR("Setup leading failed!\n"); 6482 BNX2X_ERR("Setup leading failed!\n");
6437 goto load_netif_stop; 6483 goto load_error3;
6438 } 6484 }
6439 6485
6440 if (CHIP_IS_E1H(bp)) 6486 if (CHIP_IS_E1H(bp))
@@ -6447,7 +6493,7 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6447 for_each_nondefault_queue(bp, i) { 6493 for_each_nondefault_queue(bp, i) {
6448 rc = bnx2x_setup_multi(bp, i); 6494 rc = bnx2x_setup_multi(bp, i);
6449 if (rc) 6495 if (rc)
6450 goto load_netif_stop; 6496 goto load_error3;
6451 } 6497 }
6452 6498
6453 if (CHIP_IS_E1(bp)) 6499 if (CHIP_IS_E1(bp))
@@ -6463,18 +6509,18 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6463 case LOAD_NORMAL: 6509 case LOAD_NORMAL:
6464 /* Tx queue should be only reenabled */ 6510 /* Tx queue should be only reenabled */
6465 netif_wake_queue(bp->dev); 6511 netif_wake_queue(bp->dev);
6512 /* Initialize the receive filter. */
6466 bnx2x_set_rx_mode(bp->dev); 6513 bnx2x_set_rx_mode(bp->dev);
6467 break; 6514 break;
6468 6515
6469 case LOAD_OPEN: 6516 case LOAD_OPEN:
6470 netif_start_queue(bp->dev); 6517 netif_start_queue(bp->dev);
6518 /* Initialize the receive filter. */
6471 bnx2x_set_rx_mode(bp->dev); 6519 bnx2x_set_rx_mode(bp->dev);
6472 if (bp->flags & USING_MSIX_FLAG)
6473 printk(KERN_INFO PFX "%s: using MSI-X\n",
6474 bp->dev->name);
6475 break; 6520 break;
6476 6521
6477 case LOAD_DIAG: 6522 case LOAD_DIAG:
6523 /* Initialize the receive filter. */
6478 bnx2x_set_rx_mode(bp->dev); 6524 bnx2x_set_rx_mode(bp->dev);
6479 bp->state = BNX2X_STATE_DIAG; 6525 bp->state = BNX2X_STATE_DIAG;
6480 break; 6526 break;
@@ -6492,20 +6538,25 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6492 6538
6493 return 0; 6539 return 0;
6494 6540
6495load_netif_stop: 6541load_error3:
6496 bnx2x_napi_disable(bp); 6542 bnx2x_int_disable_sync(bp, 1);
6497load_rings_free: 6543 if (!BP_NOMCP(bp)) {
6544 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP);
6545 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
6546 }
6547 bp->port.pmf = 0;
6498 /* Free SKBs, SGEs, TPA pool and driver internals */ 6548 /* Free SKBs, SGEs, TPA pool and driver internals */
6499 bnx2x_free_skbs(bp); 6549 bnx2x_free_skbs(bp);
6500 for_each_queue(bp, i) 6550 for_each_queue(bp, i)
6501 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); 6551 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
6502load_int_disable: 6552load_error2:
6503 bnx2x_int_disable_sync(bp, 1);
6504 /* Release IRQs */ 6553 /* Release IRQs */
6505 bnx2x_free_irq(bp); 6554 bnx2x_free_irq(bp);
6506load_error: 6555load_error1:
6556 bnx2x_napi_disable(bp);
6557 for_each_queue(bp, i)
6558 netif_napi_del(&bnx2x_fp(bp, i, napi));
6507 bnx2x_free_mem(bp); 6559 bnx2x_free_mem(bp);
6508 bp->port.pmf = 0;
6509 6560
6510 /* TBD we really need to reset the chip 6561 /* TBD we really need to reset the chip
6511 if we want to recover from this */ 6562 if we want to recover from this */
@@ -6578,6 +6629,7 @@ static int bnx2x_stop_leading(struct bnx2x *bp)
6578 } 6629 }
6579 cnt--; 6630 cnt--;
6580 msleep(1); 6631 msleep(1);
6632 rmb(); /* Refresh the dsb_sp_prod */
6581 } 6633 }
6582 bp->state = BNX2X_STATE_CLOSING_WAIT4_UNLOAD; 6634 bp->state = BNX2X_STATE_CLOSING_WAIT4_UNLOAD;
6583 bp->fp[0].state = BNX2X_FP_STATE_CLOSED; 6635 bp->fp[0].state = BNX2X_FP_STATE_CLOSED;
@@ -6629,14 +6681,6 @@ static void bnx2x_reset_port(struct bnx2x *bp)
6629 /* TODO: Close Doorbell port? */ 6681 /* TODO: Close Doorbell port? */
6630} 6682}
6631 6683
6632static void bnx2x_reset_common(struct bnx2x *bp)
6633{
6634 /* reset_common */
6635 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
6636 0xd3ffff7f);
6637 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
6638}
6639
6640static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code) 6684static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code)
6641{ 6685{
6642 DP(BNX2X_MSG_MCP, "function %d reset_code %x\n", 6686 DP(BNX2X_MSG_MCP, "function %d reset_code %x\n",
@@ -6677,20 +6721,22 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
6677 bnx2x_set_storm_rx_mode(bp); 6721 bnx2x_set_storm_rx_mode(bp);
6678 6722
6679 bnx2x_netif_stop(bp, 1); 6723 bnx2x_netif_stop(bp, 1);
6680 if (!netif_running(bp->dev)) 6724
6681 bnx2x_napi_disable(bp);
6682 del_timer_sync(&bp->timer); 6725 del_timer_sync(&bp->timer);
6683 SHMEM_WR(bp, func_mb[BP_FUNC(bp)].drv_pulse_mb, 6726 SHMEM_WR(bp, func_mb[BP_FUNC(bp)].drv_pulse_mb,
6684 (DRV_PULSE_ALWAYS_ALIVE | bp->fw_drv_pulse_wr_seq)); 6727 (DRV_PULSE_ALWAYS_ALIVE | bp->fw_drv_pulse_wr_seq));
6685 bnx2x_stats_handle(bp, STATS_EVENT_STOP); 6728 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
6686 6729
6730 /* Release IRQs */
6731 bnx2x_free_irq(bp);
6732
6687 /* Wait until tx fast path tasks complete */ 6733 /* Wait until tx fast path tasks complete */
6688 for_each_queue(bp, i) { 6734 for_each_queue(bp, i) {
6689 struct bnx2x_fastpath *fp = &bp->fp[i]; 6735 struct bnx2x_fastpath *fp = &bp->fp[i];
6690 6736
6691 cnt = 1000; 6737 cnt = 1000;
6692 smp_rmb(); 6738 smp_rmb();
6693 while (BNX2X_HAS_TX_WORK(fp)) { 6739 while (bnx2x_has_tx_work_unload(fp)) {
6694 6740
6695 bnx2x_tx_int(fp, 1000); 6741 bnx2x_tx_int(fp, 1000);
6696 if (!cnt) { 6742 if (!cnt) {
@@ -6711,9 +6757,6 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
6711 /* Give HW time to discard old tx messages */ 6757 /* Give HW time to discard old tx messages */
6712 msleep(1); 6758 msleep(1);
6713 6759
6714 /* Release IRQs */
6715 bnx2x_free_irq(bp);
6716
6717 if (CHIP_IS_E1(bp)) { 6760 if (CHIP_IS_E1(bp)) {
6718 struct mac_configuration_cmd *config = 6761 struct mac_configuration_cmd *config =
6719 bnx2x_sp(bp, mcast_config); 6762 bnx2x_sp(bp, mcast_config);
@@ -6822,6 +6865,8 @@ unload_error:
6822 bnx2x_free_skbs(bp); 6865 bnx2x_free_skbs(bp);
6823 for_each_queue(bp, i) 6866 for_each_queue(bp, i)
6824 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); 6867 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
6868 for_each_queue(bp, i)
6869 netif_napi_del(&bnx2x_fp(bp, i, napi));
6825 bnx2x_free_mem(bp); 6870 bnx2x_free_mem(bp);
6826 6871
6827 bp->state = BNX2X_STATE_CLOSED; 6872 bp->state = BNX2X_STATE_CLOSED;
@@ -6874,10 +6919,6 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
6874 */ 6919 */
6875 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); 6920 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
6876 val = REG_RD(bp, DORQ_REG_NORM_CID_OFST); 6921 val = REG_RD(bp, DORQ_REG_NORM_CID_OFST);
6877 if (val == 0x7)
6878 REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0);
6879 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
6880
6881 if (val == 0x7) { 6922 if (val == 0x7) {
6882 u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; 6923 u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
6883 /* save our func */ 6924 /* save our func */
@@ -6885,6 +6926,9 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
6885 u32 swap_en; 6926 u32 swap_en;
6886 u32 swap_val; 6927 u32 swap_val;
6887 6928
6929 /* clear the UNDI indication */
6930 REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0);
6931
6888 BNX2X_DEV_INFO("UNDI is active! reset device\n"); 6932 BNX2X_DEV_INFO("UNDI is active! reset device\n");
6889 6933
6890 /* try unload UNDI on port 0 */ 6934 /* try unload UNDI on port 0 */
@@ -6910,6 +6954,9 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
6910 bnx2x_fw_command(bp, reset_code); 6954 bnx2x_fw_command(bp, reset_code);
6911 } 6955 }
6912 6956
6957 /* now it's safe to release the lock */
6958 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
6959
6913 REG_WR(bp, (BP_PORT(bp) ? HC_REG_CONFIG_1 : 6960 REG_WR(bp, (BP_PORT(bp) ? HC_REG_CONFIG_1 :
6914 HC_REG_CONFIG_0), 0x1000); 6961 HC_REG_CONFIG_0), 0x1000);
6915 6962
@@ -6954,7 +7001,9 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
6954 bp->fw_seq = 7001 bp->fw_seq =
6955 (SHMEM_RD(bp, func_mb[bp->func].drv_mb_header) & 7002 (SHMEM_RD(bp, func_mb[bp->func].drv_mb_header) &
6956 DRV_MSG_SEQ_NUMBER_MASK); 7003 DRV_MSG_SEQ_NUMBER_MASK);
6957 } 7004
7005 } else
7006 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
6958 } 7007 }
6959} 7008}
6960 7009
@@ -6971,7 +7020,7 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
6971 id |= ((val & 0xf) << 12); 7020 id |= ((val & 0xf) << 12);
6972 val = REG_RD(bp, MISC_REG_CHIP_METAL); 7021 val = REG_RD(bp, MISC_REG_CHIP_METAL);
6973 id |= ((val & 0xff) << 4); 7022 id |= ((val & 0xff) << 4);
6974 REG_RD(bp, MISC_REG_BOND_ID); 7023 val = REG_RD(bp, MISC_REG_BOND_ID);
6975 id |= (val & 0xf); 7024 id |= (val & 0xf);
6976 bp->common.chip_id = id; 7025 bp->common.chip_id = id;
6977 bp->link_params.chip_id = bp->common.chip_id; 7026 bp->link_params.chip_id = bp->common.chip_id;
@@ -8103,6 +8152,9 @@ static int bnx2x_get_eeprom(struct net_device *dev,
8103 struct bnx2x *bp = netdev_priv(dev); 8152 struct bnx2x *bp = netdev_priv(dev);
8104 int rc; 8153 int rc;
8105 8154
8155 if (!netif_running(dev))
8156 return -EAGAIN;
8157
8106 DP(BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n" 8158 DP(BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n"
8107 DP_LEVEL " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n", 8159 DP_LEVEL " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n",
8108 eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset, 8160 eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset,
@@ -8705,18 +8757,17 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up)
8705 8757
8706 if (loopback_mode == BNX2X_MAC_LOOPBACK) { 8758 if (loopback_mode == BNX2X_MAC_LOOPBACK) {
8707 bp->link_params.loopback_mode = LOOPBACK_BMAC; 8759 bp->link_params.loopback_mode = LOOPBACK_BMAC;
8708 bnx2x_acquire_phy_lock(bp);
8709 bnx2x_phy_init(&bp->link_params, &bp->link_vars); 8760 bnx2x_phy_init(&bp->link_params, &bp->link_vars);
8710 bnx2x_release_phy_lock(bp);
8711 8761
8712 } else if (loopback_mode == BNX2X_PHY_LOOPBACK) { 8762 } else if (loopback_mode == BNX2X_PHY_LOOPBACK) {
8763 u16 cnt = 1000;
8713 bp->link_params.loopback_mode = LOOPBACK_XGXS_10; 8764 bp->link_params.loopback_mode = LOOPBACK_XGXS_10;
8714 bnx2x_acquire_phy_lock(bp);
8715 bnx2x_phy_init(&bp->link_params, &bp->link_vars); 8765 bnx2x_phy_init(&bp->link_params, &bp->link_vars);
8716 bnx2x_release_phy_lock(bp);
8717 /* wait until link state is restored */ 8766 /* wait until link state is restored */
8718 bnx2x_wait_for_link(bp, link_up); 8767 if (link_up)
8719 8768 while (cnt-- && bnx2x_test_link(&bp->link_params,
8769 &bp->link_vars))
8770 msleep(10);
8720 } else 8771 } else
8721 return -EINVAL; 8772 return -EINVAL;
8722 8773
@@ -8822,6 +8873,7 @@ static int bnx2x_test_loopback(struct bnx2x *bp, u8 link_up)
8822 return BNX2X_LOOPBACK_FAILED; 8873 return BNX2X_LOOPBACK_FAILED;
8823 8874
8824 bnx2x_netif_stop(bp, 1); 8875 bnx2x_netif_stop(bp, 1);
8876 bnx2x_acquire_phy_lock(bp);
8825 8877
8826 if (bnx2x_run_loopback(bp, BNX2X_MAC_LOOPBACK, link_up)) { 8878 if (bnx2x_run_loopback(bp, BNX2X_MAC_LOOPBACK, link_up)) {
8827 DP(NETIF_MSG_PROBE, "MAC loopback failed\n"); 8879 DP(NETIF_MSG_PROBE, "MAC loopback failed\n");
@@ -8833,6 +8885,7 @@ static int bnx2x_test_loopback(struct bnx2x *bp, u8 link_up)
8833 rc |= BNX2X_PHY_LOOPBACK_FAILED; 8885 rc |= BNX2X_PHY_LOOPBACK_FAILED;
8834 } 8886 }
8835 8887
8888 bnx2x_release_phy_lock(bp);
8836 bnx2x_netif_start(bp); 8889 bnx2x_netif_start(bp);
8837 8890
8838 return rc; 8891 return rc;
@@ -8906,7 +8959,10 @@ static int bnx2x_test_intr(struct bnx2x *bp)
8906 return -ENODEV; 8959 return -ENODEV;
8907 8960
8908 config->hdr.length_6b = 0; 8961 config->hdr.length_6b = 0;
8909 config->hdr.offset = 0; 8962 if (CHIP_IS_E1(bp))
8963 config->hdr.offset = (BP_PORT(bp) ? 32 : 0);
8964 else
8965 config->hdr.offset = BP_FUNC(bp);
8910 config->hdr.client_id = BP_CL_ID(bp); 8966 config->hdr.client_id = BP_CL_ID(bp);
8911 config->hdr.reserved1 = 0; 8967 config->hdr.reserved1 = 0;
8912 8968
@@ -9271,6 +9327,18 @@ static int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
9271 return 0; 9327 return 0;
9272} 9328}
9273 9329
9330static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp)
9331{
9332 u16 rx_cons_sb;
9333
9334 /* Tell compiler that status block fields can change */
9335 barrier();
9336 rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb);
9337 if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
9338 rx_cons_sb++;
9339 return (fp->rx_comp_cons != rx_cons_sb);
9340}
9341
9274/* 9342/*
9275 * net_device service functions 9343 * net_device service functions
9276 */ 9344 */
@@ -9281,7 +9349,6 @@ static int bnx2x_poll(struct napi_struct *napi, int budget)
9281 napi); 9349 napi);
9282 struct bnx2x *bp = fp->bp; 9350 struct bnx2x *bp = fp->bp;
9283 int work_done = 0; 9351 int work_done = 0;
9284 u16 rx_cons_sb;
9285 9352
9286#ifdef BNX2X_STOP_ON_ERROR 9353#ifdef BNX2X_STOP_ON_ERROR
9287 if (unlikely(bp->panic)) 9354 if (unlikely(bp->panic))
@@ -9294,19 +9361,12 @@ static int bnx2x_poll(struct napi_struct *napi, int budget)
9294 9361
9295 bnx2x_update_fpsb_idx(fp); 9362 bnx2x_update_fpsb_idx(fp);
9296 9363
9297 if (BNX2X_HAS_TX_WORK(fp)) 9364 if (bnx2x_has_tx_work(fp))
9298 bnx2x_tx_int(fp, budget); 9365 bnx2x_tx_int(fp, budget);
9299 9366
9300 rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); 9367 if (bnx2x_has_rx_work(fp))
9301 if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
9302 rx_cons_sb++;
9303 if (BNX2X_HAS_RX_WORK(fp))
9304 work_done = bnx2x_rx_int(fp, budget); 9368 work_done = bnx2x_rx_int(fp, budget);
9305
9306 rmb(); /* BNX2X_HAS_WORK() reads the status block */ 9369 rmb(); /* BNX2X_HAS_WORK() reads the status block */
9307 rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb);
9308 if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
9309 rx_cons_sb++;
9310 9370
9311 /* must not complete if we consumed full budget */ 9371 /* must not complete if we consumed full budget */
9312 if ((work_done < budget) && !BNX2X_HAS_WORK(fp)) { 9372 if ((work_done < budget) && !BNX2X_HAS_WORK(fp)) {
@@ -9417,6 +9477,7 @@ static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
9417 return rc; 9477 return rc;
9418} 9478}
9419 9479
9480#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
9420/* check if packet requires linearization (packet is too fragmented) */ 9481/* check if packet requires linearization (packet is too fragmented) */
9421static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb, 9482static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
9422 u32 xmit_type) 9483 u32 xmit_type)
@@ -9494,6 +9555,7 @@ exit_lbl:
9494 9555
9495 return to_copy; 9556 return to_copy;
9496} 9557}
9558#endif
9497 9559
9498/* called with netif_tx_lock 9560/* called with netif_tx_lock
9499 * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call 9561 * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
@@ -9534,6 +9596,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
9534 skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr, 9596 skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
9535 ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type); 9597 ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
9536 9598
9599#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
9537 /* First, check if we need to linearize the skb 9600 /* First, check if we need to linearize the skb
9538 (due to FW restrictions) */ 9601 (due to FW restrictions) */
9539 if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) { 9602 if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
@@ -9546,6 +9609,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
9546 return NETDEV_TX_OK; 9609 return NETDEV_TX_OK;
9547 } 9610 }
9548 } 9611 }
9612#endif
9549 9613
9550 /* 9614 /*
9551 Please read carefully. First we use one BD which we mark as start, 9615 Please read carefully. First we use one BD which we mark as start,
@@ -9776,6 +9840,8 @@ static int bnx2x_open(struct net_device *dev)
9776{ 9840{
9777 struct bnx2x *bp = netdev_priv(dev); 9841 struct bnx2x *bp = netdev_priv(dev);
9778 9842
9843 netif_carrier_off(dev);
9844
9779 bnx2x_set_power_state(bp, PCI_D0); 9845 bnx2x_set_power_state(bp, PCI_D0);
9780 9846
9781 return bnx2x_nic_load(bp, LOAD_OPEN); 9847 return bnx2x_nic_load(bp, LOAD_OPEN);
@@ -9859,7 +9925,7 @@ static void bnx2x_set_rx_mode(struct net_device *dev)
9859 for (; i < old; i++) { 9925 for (; i < old; i++) {
9860 if (CAM_IS_INVALID(config-> 9926 if (CAM_IS_INVALID(config->
9861 config_table[i])) { 9927 config_table[i])) {
9862 i--; /* already invalidated */ 9928 /* already invalidated */
9863 break; 9929 break;
9864 } 9930 }
9865 /* invalidate */ 9931 /* invalidate */
@@ -10269,22 +10335,18 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
10269 return rc; 10335 return rc;
10270 } 10336 }
10271 10337
10272 rc = register_netdev(dev);
10273 if (rc) {
10274 dev_err(&pdev->dev, "Cannot register net device\n");
10275 goto init_one_exit;
10276 }
10277
10278 pci_set_drvdata(pdev, dev); 10338 pci_set_drvdata(pdev, dev);
10279 10339
10280 rc = bnx2x_init_bp(bp); 10340 rc = bnx2x_init_bp(bp);
10341 if (rc)
10342 goto init_one_exit;
10343
10344 rc = register_netdev(dev);
10281 if (rc) { 10345 if (rc) {
10282 unregister_netdev(dev); 10346 dev_err(&pdev->dev, "Cannot register net device\n");
10283 goto init_one_exit; 10347 goto init_one_exit;
10284 } 10348 }
10285 10349
10286 netif_carrier_off(dev);
10287
10288 bp->common.name = board_info[ent->driver_data].name; 10350 bp->common.name = board_info[ent->driver_data].name;
10289 printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx," 10351 printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx,"
10290 " IRQ %d, ", dev->name, bp->common.name, 10352 " IRQ %d, ", dev->name, bp->common.name,
@@ -10432,6 +10494,8 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp)
10432 bnx2x_free_skbs(bp); 10494 bnx2x_free_skbs(bp);
10433 for_each_queue(bp, i) 10495 for_each_queue(bp, i)
10434 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); 10496 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
10497 for_each_queue(bp, i)
10498 netif_napi_del(&bnx2x_fp(bp, i, napi));
10435 bnx2x_free_mem(bp); 10499 bnx2x_free_mem(bp);
10436 10500
10437 bp->state = BNX2X_STATE_CLOSED; 10501 bp->state = BNX2X_STATE_CLOSED;