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Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c178
1 files changed, 120 insertions, 58 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 4be05847f86f..7c533797c064 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -38,9 +38,7 @@
38#include <linux/time.h> 38#include <linux/time.h>
39#include <linux/ethtool.h> 39#include <linux/ethtool.h>
40#include <linux/mii.h> 40#include <linux/mii.h>
41#ifdef NETIF_F_HW_VLAN_TX 41#include <linux/if_vlan.h>
42 #include <linux/if_vlan.h>
43#endif
44#include <net/ip.h> 42#include <net/ip.h>
45#include <net/tcp.h> 43#include <net/tcp.h>
46#include <net/checksum.h> 44#include <net/checksum.h>
@@ -95,6 +93,7 @@ MODULE_PARM_DESC(debug, "default debug msglevel");
95module_param(use_multi, int, 0); 93module_param(use_multi, int, 0);
96MODULE_PARM_DESC(use_multi, "use per-CPU queues"); 94MODULE_PARM_DESC(use_multi, "use per-CPU queues");
97#endif 95#endif
96static struct workqueue_struct *bnx2x_wq;
98 97
99enum bnx2x_board_type { 98enum bnx2x_board_type {
100 BCM57710 = 0, 99 BCM57710 = 0,
@@ -671,7 +670,8 @@ static void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw)
671 synchronize_irq(bp->pdev->irq); 670 synchronize_irq(bp->pdev->irq);
672 671
673 /* make sure sp_task is not running */ 672 /* make sure sp_task is not running */
674 cancel_work_sync(&bp->sp_task); 673 cancel_delayed_work(&bp->sp_task);
674 flush_workqueue(bnx2x_wq);
675} 675}
676 676
677/* fast path */ 677/* fast path */
@@ -972,7 +972,7 @@ static inline void bnx2x_free_rx_sge(struct bnx2x *bp,
972 return; 972 return;
973 973
974 pci_unmap_page(bp->pdev, pci_unmap_addr(sw_buf, mapping), 974 pci_unmap_page(bp->pdev, pci_unmap_addr(sw_buf, mapping),
975 BCM_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE); 975 SGE_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE);
976 __free_pages(page, PAGES_PER_SGE_SHIFT); 976 __free_pages(page, PAGES_PER_SGE_SHIFT);
977 977
978 sw_buf->page = NULL; 978 sw_buf->page = NULL;
@@ -1000,7 +1000,7 @@ static inline int bnx2x_alloc_rx_sge(struct bnx2x *bp,
1000 if (unlikely(page == NULL)) 1000 if (unlikely(page == NULL))
1001 return -ENOMEM; 1001 return -ENOMEM;
1002 1002
1003 mapping = pci_map_page(bp->pdev, page, 0, BCM_PAGE_SIZE*PAGES_PER_SGE, 1003 mapping = pci_map_page(bp->pdev, page, 0, SGE_PAGE_SIZE*PAGES_PER_SGE,
1004 PCI_DMA_FROMDEVICE); 1004 PCI_DMA_FROMDEVICE);
1005 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { 1005 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
1006 __free_pages(page, PAGES_PER_SGE_SHIFT); 1006 __free_pages(page, PAGES_PER_SGE_SHIFT);
@@ -1096,9 +1096,9 @@ static void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
1096 struct eth_fast_path_rx_cqe *fp_cqe) 1096 struct eth_fast_path_rx_cqe *fp_cqe)
1097{ 1097{
1098 struct bnx2x *bp = fp->bp; 1098 struct bnx2x *bp = fp->bp;
1099 u16 sge_len = BCM_PAGE_ALIGN(le16_to_cpu(fp_cqe->pkt_len) - 1099 u16 sge_len = SGE_PAGE_ALIGN(le16_to_cpu(fp_cqe->pkt_len) -
1100 le16_to_cpu(fp_cqe->len_on_bd)) >> 1100 le16_to_cpu(fp_cqe->len_on_bd)) >>
1101 BCM_PAGE_SHIFT; 1101 SGE_PAGE_SHIFT;
1102 u16 last_max, last_elem, first_elem; 1102 u16 last_max, last_elem, first_elem;
1103 u16 delta = 0; 1103 u16 delta = 0;
1104 u16 i; 1104 u16 i;
@@ -1203,22 +1203,22 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1203 u16 cqe_idx) 1203 u16 cqe_idx)
1204{ 1204{
1205 struct sw_rx_page *rx_pg, old_rx_pg; 1205 struct sw_rx_page *rx_pg, old_rx_pg;
1206 struct page *sge;
1207 u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); 1206 u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd);
1208 u32 i, frag_len, frag_size, pages; 1207 u32 i, frag_len, frag_size, pages;
1209 int err; 1208 int err;
1210 int j; 1209 int j;
1211 1210
1212 frag_size = le16_to_cpu(fp_cqe->pkt_len) - len_on_bd; 1211 frag_size = le16_to_cpu(fp_cqe->pkt_len) - len_on_bd;
1213 pages = BCM_PAGE_ALIGN(frag_size) >> BCM_PAGE_SHIFT; 1212 pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT;
1214 1213
1215 /* This is needed in order to enable forwarding support */ 1214 /* This is needed in order to enable forwarding support */
1216 if (frag_size) 1215 if (frag_size)
1217 skb_shinfo(skb)->gso_size = min((u32)BCM_PAGE_SIZE, 1216 skb_shinfo(skb)->gso_size = min((u32)SGE_PAGE_SIZE,
1218 max(frag_size, (u32)len_on_bd)); 1217 max(frag_size, (u32)len_on_bd));
1219 1218
1220#ifdef BNX2X_STOP_ON_ERROR 1219#ifdef BNX2X_STOP_ON_ERROR
1221 if (pages > 8*PAGES_PER_SGE) { 1220 if (pages >
1221 min((u32)8, (u32)MAX_SKB_FRAGS) * SGE_PAGE_SIZE * PAGES_PER_SGE) {
1222 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n", 1222 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
1223 pages, cqe_idx); 1223 pages, cqe_idx);
1224 BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n", 1224 BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n",
@@ -1234,9 +1234,8 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1234 1234
1235 /* FW gives the indices of the SGE as if the ring is an array 1235 /* FW gives the indices of the SGE as if the ring is an array
1236 (meaning that "next" element will consume 2 indices) */ 1236 (meaning that "next" element will consume 2 indices) */
1237 frag_len = min(frag_size, (u32)(BCM_PAGE_SIZE*PAGES_PER_SGE)); 1237 frag_len = min(frag_size, (u32)(SGE_PAGE_SIZE*PAGES_PER_SGE));
1238 rx_pg = &fp->rx_page_ring[sge_idx]; 1238 rx_pg = &fp->rx_page_ring[sge_idx];
1239 sge = rx_pg->page;
1240 old_rx_pg = *rx_pg; 1239 old_rx_pg = *rx_pg;
1241 1240
1242 /* If we fail to allocate a substitute page, we simply stop 1241 /* If we fail to allocate a substitute page, we simply stop
@@ -1249,7 +1248,7 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1249 1248
1250 /* Unmap the page as we r going to pass it to the stack */ 1249 /* Unmap the page as we r going to pass it to the stack */
1251 pci_unmap_page(bp->pdev, pci_unmap_addr(&old_rx_pg, mapping), 1250 pci_unmap_page(bp->pdev, pci_unmap_addr(&old_rx_pg, mapping),
1252 BCM_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE); 1251 SGE_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE);
1253 1252
1254 /* Add one frag and update the appropriate fields in the skb */ 1253 /* Add one frag and update the appropriate fields in the skb */
1255 skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len); 1254 skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
@@ -1282,6 +1281,13 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1282 if (likely(new_skb)) { 1281 if (likely(new_skb)) {
1283 /* fix ip xsum and give it to the stack */ 1282 /* fix ip xsum and give it to the stack */
1284 /* (no need to map the new skb) */ 1283 /* (no need to map the new skb) */
1284#ifdef BCM_VLAN
1285 int is_vlan_cqe =
1286 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) &
1287 PARSING_FLAGS_VLAN);
1288 int is_not_hwaccel_vlan_cqe =
1289 (is_vlan_cqe && (!(bp->flags & HW_VLAN_RX_FLAG)));
1290#endif
1285 1291
1286 prefetch(skb); 1292 prefetch(skb);
1287 prefetch(((char *)(skb)) + 128); 1293 prefetch(((char *)(skb)) + 128);
@@ -1306,6 +1312,12 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1306 struct iphdr *iph; 1312 struct iphdr *iph;
1307 1313
1308 iph = (struct iphdr *)skb->data; 1314 iph = (struct iphdr *)skb->data;
1315#ifdef BCM_VLAN
1316 /* If there is no Rx VLAN offloading -
1317 take VLAN tag into an account */
1318 if (unlikely(is_not_hwaccel_vlan_cqe))
1319 iph = (struct iphdr *)((u8 *)iph + VLAN_HLEN);
1320#endif
1309 iph->check = 0; 1321 iph->check = 0;
1310 iph->check = ip_fast_csum((u8 *)iph, iph->ihl); 1322 iph->check = ip_fast_csum((u8 *)iph, iph->ihl);
1311 } 1323 }
@@ -1313,9 +1325,8 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
1313 if (!bnx2x_fill_frag_skb(bp, fp, skb, 1325 if (!bnx2x_fill_frag_skb(bp, fp, skb,
1314 &cqe->fast_path_cqe, cqe_idx)) { 1326 &cqe->fast_path_cqe, cqe_idx)) {
1315#ifdef BCM_VLAN 1327#ifdef BCM_VLAN
1316 if ((bp->vlgrp != NULL) && 1328 if ((bp->vlgrp != NULL) && is_vlan_cqe &&
1317 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & 1329 (!is_not_hwaccel_vlan_cqe))
1318 PARSING_FLAGS_VLAN))
1319 vlan_hwaccel_receive_skb(skb, bp->vlgrp, 1330 vlan_hwaccel_receive_skb(skb, bp->vlgrp,
1320 le16_to_cpu(cqe->fast_path_cqe. 1331 le16_to_cpu(cqe->fast_path_cqe.
1321 vlan_tag)); 1332 vlan_tag));
@@ -1355,11 +1366,23 @@ static inline void bnx2x_update_rx_prod(struct bnx2x *bp,
1355 rx_prods.cqe_prod = rx_comp_prod; 1366 rx_prods.cqe_prod = rx_comp_prod;
1356 rx_prods.sge_prod = rx_sge_prod; 1367 rx_prods.sge_prod = rx_sge_prod;
1357 1368
1369 /*
1370 * Make sure that the BD and SGE data is updated before updating the
1371 * producers since FW might read the BD/SGE right after the producer
1372 * is updated.
1373 * This is only applicable for weak-ordered memory model archs such
1374 * as IA-64. The following barrier is also mandatory since FW will
1375 * assumes BDs must have buffers.
1376 */
1377 wmb();
1378
1358 for (i = 0; i < sizeof(struct tstorm_eth_rx_producers)/4; i++) 1379 for (i = 0; i < sizeof(struct tstorm_eth_rx_producers)/4; i++)
1359 REG_WR(bp, BAR_TSTRORM_INTMEM + 1380 REG_WR(bp, BAR_TSTRORM_INTMEM +
1360 TSTORM_RX_PRODS_OFFSET(BP_PORT(bp), FP_CL_ID(fp)) + i*4, 1381 TSTORM_RX_PRODS_OFFSET(BP_PORT(bp), FP_CL_ID(fp)) + i*4,
1361 ((u32 *)&rx_prods)[i]); 1382 ((u32 *)&rx_prods)[i]);
1362 1383
1384 mmiowb(); /* keep prod updates ordered */
1385
1363 DP(NETIF_MSG_RX_STATUS, 1386 DP(NETIF_MSG_RX_STATUS,
1364 "Wrote: bd_prod %u cqe_prod %u sge_prod %u\n", 1387 "Wrote: bd_prod %u cqe_prod %u sge_prod %u\n",
1365 bd_prod, rx_comp_prod, rx_sge_prod); 1388 bd_prod, rx_comp_prod, rx_sge_prod);
@@ -1415,7 +1438,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
1415 DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x" 1438 DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x"
1416 " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags), 1439 " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags),
1417 cqe_fp_flags, cqe->fast_path_cqe.status_flags, 1440 cqe_fp_flags, cqe->fast_path_cqe.status_flags,
1418 cqe->fast_path_cqe.rss_hash_result, 1441 le32_to_cpu(cqe->fast_path_cqe.rss_hash_result),
1419 le16_to_cpu(cqe->fast_path_cqe.vlan_tag), 1442 le16_to_cpu(cqe->fast_path_cqe.vlan_tag),
1420 le16_to_cpu(cqe->fast_path_cqe.pkt_len)); 1443 le16_to_cpu(cqe->fast_path_cqe.pkt_len));
1421 1444
@@ -1547,7 +1570,7 @@ reuse_rx:
1547 } 1570 }
1548 1571
1549#ifdef BCM_VLAN 1572#ifdef BCM_VLAN
1550 if ((bp->vlgrp != NULL) && 1573 if ((bp->vlgrp != NULL) && (bp->flags & HW_VLAN_RX_FLAG) &&
1551 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & 1574 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) &
1552 PARSING_FLAGS_VLAN)) 1575 PARSING_FLAGS_VLAN))
1553 vlan_hwaccel_receive_skb(skb, bp->vlgrp, 1576 vlan_hwaccel_receive_skb(skb, bp->vlgrp,
@@ -1580,7 +1603,6 @@ next_cqe:
1580 /* Update producers */ 1603 /* Update producers */
1581 bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod, 1604 bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
1582 fp->rx_sge_prod); 1605 fp->rx_sge_prod);
1583 mmiowb(); /* keep prod updates ordered */
1584 1606
1585 fp->rx_pkt += rx_pkt; 1607 fp->rx_pkt += rx_pkt;
1586 fp->rx_calls++; 1608 fp->rx_calls++;
@@ -1660,7 +1682,7 @@ static irqreturn_t bnx2x_interrupt(int irq, void *dev_instance)
1660 1682
1661 1683
1662 if (unlikely(status & 0x1)) { 1684 if (unlikely(status & 0x1)) {
1663 schedule_work(&bp->sp_task); 1685 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
1664 1686
1665 status &= ~0x1; 1687 status &= ~0x1;
1666 if (!status) 1688 if (!status)
@@ -1887,7 +1909,8 @@ static int bnx2x_set_spio(struct bnx2x *bp, int spio_num, u32 mode)
1887 1909
1888static void bnx2x_calc_fc_adv(struct bnx2x *bp) 1910static void bnx2x_calc_fc_adv(struct bnx2x *bp)
1889{ 1911{
1890 switch (bp->link_vars.ieee_fc) { 1912 switch (bp->link_vars.ieee_fc &
1913 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK) {
1891 case MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE: 1914 case MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE:
1892 bp->port.advertising &= ~(ADVERTISED_Asym_Pause | 1915 bp->port.advertising &= ~(ADVERTISED_Asym_Pause |
1893 ADVERTISED_Pause); 1916 ADVERTISED_Pause);
@@ -1957,10 +1980,11 @@ static u8 bnx2x_initial_phy_init(struct bnx2x *bp)
1957 rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars); 1980 rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars);
1958 bnx2x_release_phy_lock(bp); 1981 bnx2x_release_phy_lock(bp);
1959 1982
1983 bnx2x_calc_fc_adv(bp);
1984
1960 if (bp->link_vars.link_up) 1985 if (bp->link_vars.link_up)
1961 bnx2x_link_report(bp); 1986 bnx2x_link_report(bp);
1962 1987
1963 bnx2x_calc_fc_adv(bp);
1964 1988
1965 return rc; 1989 return rc;
1966 } 1990 }
@@ -2220,9 +2244,7 @@ static void bnx2x_link_attn(struct bnx2x *bp)
2220 /* Make sure that we are synced with the current statistics */ 2244 /* Make sure that we are synced with the current statistics */
2221 bnx2x_stats_handle(bp, STATS_EVENT_STOP); 2245 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2222 2246
2223 bnx2x_acquire_phy_lock(bp);
2224 bnx2x_link_update(&bp->link_params, &bp->link_vars); 2247 bnx2x_link_update(&bp->link_params, &bp->link_vars);
2225 bnx2x_release_phy_lock(bp);
2226 2248
2227 if (bp->link_vars.link_up) { 2249 if (bp->link_vars.link_up) {
2228 2250
@@ -2471,6 +2493,8 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
2471 if (asserted & ATTN_HARD_WIRED_MASK) { 2493 if (asserted & ATTN_HARD_WIRED_MASK) {
2472 if (asserted & ATTN_NIG_FOR_FUNC) { 2494 if (asserted & ATTN_NIG_FOR_FUNC) {
2473 2495
2496 bnx2x_acquire_phy_lock(bp);
2497
2474 /* save nig interrupt mask */ 2498 /* save nig interrupt mask */
2475 bp->nig_mask = REG_RD(bp, nig_int_mask_addr); 2499 bp->nig_mask = REG_RD(bp, nig_int_mask_addr);
2476 REG_WR(bp, nig_int_mask_addr, 0); 2500 REG_WR(bp, nig_int_mask_addr, 0);
@@ -2526,8 +2550,10 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
2526 REG_WR(bp, hc_addr, asserted); 2550 REG_WR(bp, hc_addr, asserted);
2527 2551
2528 /* now set back the mask */ 2552 /* now set back the mask */
2529 if (asserted & ATTN_NIG_FOR_FUNC) 2553 if (asserted & ATTN_NIG_FOR_FUNC) {
2530 REG_WR(bp, nig_int_mask_addr, bp->nig_mask); 2554 REG_WR(bp, nig_int_mask_addr, bp->nig_mask);
2555 bnx2x_release_phy_lock(bp);
2556 }
2531} 2557}
2532 2558
2533static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) 2559static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
@@ -2795,8 +2821,10 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted)
2795static void bnx2x_attn_int(struct bnx2x *bp) 2821static void bnx2x_attn_int(struct bnx2x *bp)
2796{ 2822{
2797 /* read local copy of bits */ 2823 /* read local copy of bits */
2798 u32 attn_bits = bp->def_status_blk->atten_status_block.attn_bits; 2824 u32 attn_bits = le32_to_cpu(bp->def_status_blk->atten_status_block.
2799 u32 attn_ack = bp->def_status_blk->atten_status_block.attn_bits_ack; 2825 attn_bits);
2826 u32 attn_ack = le32_to_cpu(bp->def_status_blk->atten_status_block.
2827 attn_bits_ack);
2800 u32 attn_state = bp->attn_state; 2828 u32 attn_state = bp->attn_state;
2801 2829
2802 /* look for changed bits */ 2830 /* look for changed bits */
@@ -2820,7 +2848,7 @@ static void bnx2x_attn_int(struct bnx2x *bp)
2820 2848
2821static void bnx2x_sp_task(struct work_struct *work) 2849static void bnx2x_sp_task(struct work_struct *work)
2822{ 2850{
2823 struct bnx2x *bp = container_of(work, struct bnx2x, sp_task); 2851 struct bnx2x *bp = container_of(work, struct bnx2x, sp_task.work);
2824 u16 status; 2852 u16 status;
2825 2853
2826 2854
@@ -2844,7 +2872,7 @@ static void bnx2x_sp_task(struct work_struct *work)
2844 if (status & 0x2) 2872 if (status & 0x2)
2845 bp->stats_pending = 0; 2873 bp->stats_pending = 0;
2846 2874
2847 bnx2x_ack_sb(bp, DEF_SB_ID, ATTENTION_ID, bp->def_att_idx, 2875 bnx2x_ack_sb(bp, DEF_SB_ID, ATTENTION_ID, le16_to_cpu(bp->def_att_idx),
2848 IGU_INT_NOP, 1); 2876 IGU_INT_NOP, 1);
2849 bnx2x_ack_sb(bp, DEF_SB_ID, USTORM_ID, le16_to_cpu(bp->def_u_idx), 2877 bnx2x_ack_sb(bp, DEF_SB_ID, USTORM_ID, le16_to_cpu(bp->def_u_idx),
2850 IGU_INT_NOP, 1); 2878 IGU_INT_NOP, 1);
@@ -2875,7 +2903,7 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
2875 return IRQ_HANDLED; 2903 return IRQ_HANDLED;
2876#endif 2904#endif
2877 2905
2878 schedule_work(&bp->sp_task); 2906 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
2879 2907
2880 return IRQ_HANDLED; 2908 return IRQ_HANDLED;
2881} 2909}
@@ -2892,7 +2920,7 @@ static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
2892#define ADD_64(s_hi, a_hi, s_lo, a_lo) \ 2920#define ADD_64(s_hi, a_hi, s_lo, a_lo) \
2893 do { \ 2921 do { \
2894 s_lo += a_lo; \ 2922 s_lo += a_lo; \
2895 s_hi += a_hi + (s_lo < a_lo) ? 1 : 0; \ 2923 s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
2896 } while (0) 2924 } while (0)
2897 2925
2898/* difference = minuend - subtrahend */ 2926/* difference = minuend - subtrahend */
@@ -4496,7 +4524,7 @@ static void bnx2x_init_context(struct bnx2x *bp)
4496 4524
4497static void bnx2x_init_ind_table(struct bnx2x *bp) 4525static void bnx2x_init_ind_table(struct bnx2x *bp)
4498{ 4526{
4499 int port = BP_PORT(bp); 4527 int func = BP_FUNC(bp);
4500 int i; 4528 int i;
4501 4529
4502 if (!is_multi(bp)) 4530 if (!is_multi(bp))
@@ -4505,10 +4533,8 @@ static void bnx2x_init_ind_table(struct bnx2x *bp)
4505 DP(NETIF_MSG_IFUP, "Initializing indirection table\n"); 4533 DP(NETIF_MSG_IFUP, "Initializing indirection table\n");
4506 for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++) 4534 for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++)
4507 REG_WR8(bp, BAR_TSTRORM_INTMEM + 4535 REG_WR8(bp, BAR_TSTRORM_INTMEM +
4508 TSTORM_INDIRECTION_TABLE_OFFSET(port) + i, 4536 TSTORM_INDIRECTION_TABLE_OFFSET(func) + i,
4509 i % bp->num_queues); 4537 BP_CL_ID(bp) + (i % bp->num_queues));
4510
4511 REG_WR(bp, PRS_REG_A_PRSU_20, 0xf);
4512} 4538}
4513 4539
4514static void bnx2x_set_client_config(struct bnx2x *bp) 4540static void bnx2x_set_client_config(struct bnx2x *bp)
@@ -4517,12 +4543,12 @@ static void bnx2x_set_client_config(struct bnx2x *bp)
4517 int port = BP_PORT(bp); 4543 int port = BP_PORT(bp);
4518 int i; 4544 int i;
4519 4545
4520 tstorm_client.mtu = bp->dev->mtu + ETH_OVREHEAD; 4546 tstorm_client.mtu = bp->dev->mtu;
4521 tstorm_client.statistics_counter_id = BP_CL_ID(bp); 4547 tstorm_client.statistics_counter_id = BP_CL_ID(bp);
4522 tstorm_client.config_flags = 4548 tstorm_client.config_flags =
4523 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE; 4549 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE;
4524#ifdef BCM_VLAN 4550#ifdef BCM_VLAN
4525 if (bp->rx_mode && bp->vlgrp) { 4551 if (bp->rx_mode && bp->vlgrp && (bp->flags & HW_VLAN_RX_FLAG)) {
4526 tstorm_client.config_flags |= 4552 tstorm_client.config_flags |=
4527 TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE; 4553 TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE;
4528 DP(NETIF_MSG_IFUP, "vlan removal enabled\n"); 4554 DP(NETIF_MSG_IFUP, "vlan removal enabled\n");
@@ -4531,7 +4557,7 @@ static void bnx2x_set_client_config(struct bnx2x *bp)
4531 4557
4532 if (bp->flags & TPA_ENABLE_FLAG) { 4558 if (bp->flags & TPA_ENABLE_FLAG) {
4533 tstorm_client.max_sges_for_packet = 4559 tstorm_client.max_sges_for_packet =
4534 BCM_PAGE_ALIGN(tstorm_client.mtu) >> BCM_PAGE_SHIFT; 4560 SGE_PAGE_ALIGN(tstorm_client.mtu) >> SGE_PAGE_SHIFT;
4535 tstorm_client.max_sges_for_packet = 4561 tstorm_client.max_sges_for_packet =
4536 ((tstorm_client.max_sges_for_packet + 4562 ((tstorm_client.max_sges_for_packet +
4537 PAGES_PER_SGE - 1) & (~(PAGES_PER_SGE - 1))) >> 4563 PAGES_PER_SGE - 1) & (~(PAGES_PER_SGE - 1))) >>
@@ -4714,10 +4740,11 @@ static void bnx2x_init_internal_func(struct bnx2x *bp)
4714 bp->e1hov); 4740 bp->e1hov);
4715 } 4741 }
4716 4742
4717 /* Init CQ ring mapping and aggregation size */ 4743 /* Init CQ ring mapping and aggregation size, the FW limit is 8 frags */
4718 max_agg_size = min((u32)(bp->rx_buf_size + 4744 max_agg_size =
4719 8*BCM_PAGE_SIZE*PAGES_PER_SGE), 4745 min((u32)(min((u32)8, (u32)MAX_SKB_FRAGS) *
4720 (u32)0xffff); 4746 SGE_PAGE_SIZE * PAGES_PER_SGE),
4747 (u32)0xffff);
4721 for_each_queue(bp, i) { 4748 for_each_queue(bp, i) {
4722 struct bnx2x_fastpath *fp = &bp->fp[i]; 4749 struct bnx2x_fastpath *fp = &bp->fp[i];
4723 4750
@@ -4785,6 +4812,15 @@ static void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
4785 bnx2x_init_context(bp); 4812 bnx2x_init_context(bp);
4786 bnx2x_init_internal(bp, load_code); 4813 bnx2x_init_internal(bp, load_code);
4787 bnx2x_init_ind_table(bp); 4814 bnx2x_init_ind_table(bp);
4815 bnx2x_stats_init(bp);
4816
4817 /* At this point, we are ready for interrupts */
4818 atomic_set(&bp->intr_sem, 0);
4819
4820 /* flush all before enabling interrupts */
4821 mb();
4822 mmiowb();
4823
4788 bnx2x_int_enable(bp); 4824 bnx2x_int_enable(bp);
4789} 4825}
4790 4826
@@ -5134,7 +5170,6 @@ static int bnx2x_init_common(struct bnx2x *bp)
5134 REG_WR(bp, PXP2_REG_RQ_SRC_ENDIAN_M, 1); 5170 REG_WR(bp, PXP2_REG_RQ_SRC_ENDIAN_M, 1);
5135 REG_WR(bp, PXP2_REG_RQ_CDU_ENDIAN_M, 1); 5171 REG_WR(bp, PXP2_REG_RQ_CDU_ENDIAN_M, 1);
5136 REG_WR(bp, PXP2_REG_RQ_DBG_ENDIAN_M, 1); 5172 REG_WR(bp, PXP2_REG_RQ_DBG_ENDIAN_M, 1);
5137 REG_WR(bp, PXP2_REG_RQ_HC_ENDIAN_M, 1);
5138 5173
5139/* REG_WR(bp, PXP2_REG_RD_PBF_SWAP_MODE, 1); */ 5174/* REG_WR(bp, PXP2_REG_RD_PBF_SWAP_MODE, 1); */
5140 REG_WR(bp, PXP2_REG_RD_QM_SWAP_MODE, 1); 5175 REG_WR(bp, PXP2_REG_RD_QM_SWAP_MODE, 1);
@@ -5212,6 +5247,7 @@ static int bnx2x_init_common(struct bnx2x *bp)
5212 } 5247 }
5213 5248
5214 bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); 5249 bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END);
5250 REG_WR(bp, PRS_REG_A_PRSU_20, 0xf);
5215 /* set NIC mode */ 5251 /* set NIC mode */
5216 REG_WR(bp, PRS_REG_NIC_MODE, 1); 5252 REG_WR(bp, PRS_REG_NIC_MODE, 1);
5217 if (CHIP_IS_E1H(bp)) 5253 if (CHIP_IS_E1H(bp))
@@ -6393,17 +6429,8 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
6393 } 6429 }
6394 } 6430 }
6395 6431
6396 bnx2x_stats_init(bp);
6397
6398 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT; 6432 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
6399 6433
6400 /* Enable Rx interrupt handling before sending the ramrod
6401 as it's completed on Rx FP queue */
6402 bnx2x_napi_enable(bp);
6403
6404 /* Enable interrupt handling */
6405 atomic_set(&bp->intr_sem, 0);
6406
6407 rc = bnx2x_setup_leading(bp); 6434 rc = bnx2x_setup_leading(bp);
6408 if (rc) { 6435 if (rc) {
6409 BNX2X_ERR("Setup leading failed!\n"); 6436 BNX2X_ERR("Setup leading failed!\n");
@@ -7501,7 +7528,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
7501 7528
7502 mutex_init(&bp->port.phy_mutex); 7529 mutex_init(&bp->port.phy_mutex);
7503 7530
7504 INIT_WORK(&bp->sp_task, bnx2x_sp_task); 7531 INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task);
7505 INIT_WORK(&bp->reset_task, bnx2x_reset_task); 7532 INIT_WORK(&bp->reset_task, bnx2x_reset_task);
7506 7533
7507 rc = bnx2x_get_hwinfo(bp); 7534 rc = bnx2x_get_hwinfo(bp);
@@ -8727,6 +8754,8 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up)
8727 tx_bd->general_data = ((UNICAST_ADDRESS << 8754 tx_bd->general_data = ((UNICAST_ADDRESS <<
8728 ETH_TX_BD_ETH_ADDR_TYPE_SHIFT) | 1); 8755 ETH_TX_BD_ETH_ADDR_TYPE_SHIFT) | 1);
8729 8756
8757 wmb();
8758
8730 fp->hw_tx_prods->bds_prod = 8759 fp->hw_tx_prods->bds_prod =
8731 cpu_to_le16(le16_to_cpu(fp->hw_tx_prods->bds_prod) + 1); 8760 cpu_to_le16(le16_to_cpu(fp->hw_tx_prods->bds_prod) + 1);
8732 mb(); /* FW restriction: must not reorder writing nbd and packets */ 8761 mb(); /* FW restriction: must not reorder writing nbd and packets */
@@ -8778,7 +8807,6 @@ test_loopback_rx_exit:
8778 /* Update producers */ 8807 /* Update producers */
8779 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod, 8808 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
8780 fp->rx_sge_prod); 8809 fp->rx_sge_prod);
8781 mmiowb(); /* keep prod updates ordered */
8782 8810
8783test_loopback_exit: 8811test_loopback_exit:
8784 bp->link_params.loopback_mode = LOOPBACK_NONE; 8812 bp->link_params.loopback_mode = LOOPBACK_NONE;
@@ -9549,11 +9577,14 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
9549 "sending pkt %u @%p next_idx %u bd %u @%p\n", 9577 "sending pkt %u @%p next_idx %u bd %u @%p\n",
9550 pkt_prod, tx_buf, fp->tx_pkt_prod, bd_prod, tx_bd); 9578 pkt_prod, tx_buf, fp->tx_pkt_prod, bd_prod, tx_bd);
9551 9579
9552 if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb)) { 9580#ifdef BCM_VLAN
9581 if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb) &&
9582 (bp->flags & HW_VLAN_TX_FLAG)) {
9553 tx_bd->vlan = cpu_to_le16(vlan_tx_tag_get(skb)); 9583 tx_bd->vlan = cpu_to_le16(vlan_tx_tag_get(skb));
9554 tx_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_VLAN_TAG; 9584 tx_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_VLAN_TAG;
9555 vlan_off += 4; 9585 vlan_off += 4;
9556 } else 9586 } else
9587#endif
9557 tx_bd->vlan = cpu_to_le16(pkt_prod); 9588 tx_bd->vlan = cpu_to_le16(pkt_prod);
9558 9589
9559 if (xmit_type) { 9590 if (xmit_type) {
@@ -9705,6 +9736,15 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
9705 9736
9706 DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod); 9737 DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod);
9707 9738
9739 /*
9740 * Make sure that the BD data is updated before updating the producer
9741 * since FW might read the BD right after the producer is updated.
9742 * This is only applicable for weak-ordered memory model archs such
9743 * as IA-64. The following barrier is also mandatory since FW will
9744 * assumes packets must have BDs.
9745 */
9746 wmb();
9747
9708 fp->hw_tx_prods->bds_prod = 9748 fp->hw_tx_prods->bds_prod =
9709 cpu_to_le16(le16_to_cpu(fp->hw_tx_prods->bds_prod) + nbd); 9749 cpu_to_le16(le16_to_cpu(fp->hw_tx_prods->bds_prod) + nbd);
9710 mb(); /* FW restriction: must not reorder writing nbd and packets */ 9750 mb(); /* FW restriction: must not reorder writing nbd and packets */
@@ -9718,6 +9758,9 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
9718 dev->trans_start = jiffies; 9758 dev->trans_start = jiffies;
9719 9759
9720 if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) { 9760 if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) {
9761 /* We want bnx2x_tx_int to "see" the updated tx_bd_prod
9762 if we put Tx into XOFF state. */
9763 smp_mb();
9721 netif_stop_queue(dev); 9764 netif_stop_queue(dev);
9722 bp->eth_stats.driver_xoff++; 9765 bp->eth_stats.driver_xoff++;
9723 if (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3) 9766 if (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3)
@@ -9987,6 +10030,16 @@ static void bnx2x_vlan_rx_register(struct net_device *dev,
9987 struct bnx2x *bp = netdev_priv(dev); 10030 struct bnx2x *bp = netdev_priv(dev);
9988 10031
9989 bp->vlgrp = vlgrp; 10032 bp->vlgrp = vlgrp;
10033
10034 /* Set flags according to the required capabilities */
10035 bp->flags &= ~(HW_VLAN_RX_FLAG | HW_VLAN_TX_FLAG);
10036
10037 if (dev->features & NETIF_F_HW_VLAN_TX)
10038 bp->flags |= HW_VLAN_TX_FLAG;
10039
10040 if (dev->features & NETIF_F_HW_VLAN_RX)
10041 bp->flags |= HW_VLAN_RX_FLAG;
10042
9990 if (netif_running(dev)) 10043 if (netif_running(dev))
9991 bnx2x_set_client_config(bp); 10044 bnx2x_set_client_config(bp);
9992} 10045}
@@ -10143,6 +10196,7 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
10143 dev->features |= NETIF_F_HIGHDMA; 10196 dev->features |= NETIF_F_HIGHDMA;
10144#ifdef BCM_VLAN 10197#ifdef BCM_VLAN
10145 dev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX); 10198 dev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
10199 bp->flags |= (HW_VLAN_RX_FLAG | HW_VLAN_TX_FLAG);
10146#endif 10200#endif
10147 dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); 10201 dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN);
10148 dev->features |= NETIF_F_TSO6; 10202 dev->features |= NETIF_F_TSO6;
@@ -10519,12 +10573,20 @@ static struct pci_driver bnx2x_pci_driver = {
10519 10573
10520static int __init bnx2x_init(void) 10574static int __init bnx2x_init(void)
10521{ 10575{
10576 bnx2x_wq = create_singlethread_workqueue("bnx2x");
10577 if (bnx2x_wq == NULL) {
10578 printk(KERN_ERR PFX "Cannot create workqueue\n");
10579 return -ENOMEM;
10580 }
10581
10522 return pci_register_driver(&bnx2x_pci_driver); 10582 return pci_register_driver(&bnx2x_pci_driver);
10523} 10583}
10524 10584
10525static void __exit bnx2x_cleanup(void) 10585static void __exit bnx2x_cleanup(void)
10526{ 10586{
10527 pci_unregister_driver(&bnx2x_pci_driver); 10587 pci_unregister_driver(&bnx2x_pci_driver);
10588
10589 destroy_workqueue(bnx2x_wq);
10528} 10590}
10529 10591
10530module_init(bnx2x_init); 10592module_init(bnx2x_init);