diff options
Diffstat (limited to 'drivers/net/bnx2x_link.c')
-rw-r--r-- | drivers/net/bnx2x_link.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c index 32e79c359e89..ff70be898765 100644 --- a/drivers/net/bnx2x_link.c +++ b/drivers/net/bnx2x_link.c | |||
@@ -1594,7 +1594,7 @@ static u8 bnx2x_ext_phy_resolve_fc(struct link_params *params, | |||
1594 | MDIO_AN_REG_ADV_PAUSE_MASK) >> 8; | 1594 | MDIO_AN_REG_ADV_PAUSE_MASK) >> 8; |
1595 | pause_result |= (lp_pause & | 1595 | pause_result |= (lp_pause & |
1596 | MDIO_AN_REG_ADV_PAUSE_MASK) >> 10; | 1596 | MDIO_AN_REG_ADV_PAUSE_MASK) >> 10; |
1597 | DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x \n", | 1597 | DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n", |
1598 | pause_result); | 1598 | pause_result); |
1599 | bnx2x_pause_resolve(vars, pause_result); | 1599 | bnx2x_pause_resolve(vars, pause_result); |
1600 | if (vars->flow_ctrl == BNX2X_FLOW_CTRL_NONE && | 1600 | if (vars->flow_ctrl == BNX2X_FLOW_CTRL_NONE && |
@@ -1616,7 +1616,7 @@ static u8 bnx2x_ext_phy_resolve_fc(struct link_params *params, | |||
1616 | MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) >> 7; | 1616 | MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) >> 7; |
1617 | 1617 | ||
1618 | bnx2x_pause_resolve(vars, pause_result); | 1618 | bnx2x_pause_resolve(vars, pause_result); |
1619 | DP(NETIF_MSG_LINK, "Ext PHY CL37 pause result 0x%x \n", | 1619 | DP(NETIF_MSG_LINK, "Ext PHY CL37 pause result 0x%x\n", |
1620 | pause_result); | 1620 | pause_result); |
1621 | } | 1621 | } |
1622 | } | 1622 | } |
@@ -1974,7 +1974,7 @@ static u8 bnx2x_link_settings_status(struct link_params *params, | |||
1974 | } | 1974 | } |
1975 | } | 1975 | } |
1976 | 1976 | ||
1977 | DP(NETIF_MSG_LINK, "gp_status 0x%x phy_link_up %x line_speed %x \n", | 1977 | DP(NETIF_MSG_LINK, "gp_status 0x%x phy_link_up %x line_speed %x\n", |
1978 | gp_status, vars->phy_link_up, vars->line_speed); | 1978 | gp_status, vars->phy_link_up, vars->line_speed); |
1979 | DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x" | 1979 | DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x" |
1980 | " autoneg 0x%x\n", | 1980 | " autoneg 0x%x\n", |
@@ -3852,7 +3852,7 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars) | |||
3852 | SPEED_AUTO_NEG) && | 3852 | SPEED_AUTO_NEG) && |
3853 | ((params->speed_cap_mask & | 3853 | ((params->speed_cap_mask & |
3854 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) { | 3854 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) { |
3855 | DP(NETIF_MSG_LINK, "Setting 1G clause37 \n"); | 3855 | DP(NETIF_MSG_LINK, "Setting 1G clause37\n"); |
3856 | bnx2x_cl45_write(bp, params->port, ext_phy_type, | 3856 | bnx2x_cl45_write(bp, params->port, ext_phy_type, |
3857 | ext_phy_addr, MDIO_AN_DEVAD, | 3857 | ext_phy_addr, MDIO_AN_DEVAD, |
3858 | MDIO_AN_REG_ADV, 0x20); | 3858 | MDIO_AN_REG_ADV, 0x20); |
@@ -4234,14 +4234,14 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars) | |||
4234 | ext_phy_addr, | 4234 | ext_phy_addr, |
4235 | MDIO_PMA_DEVAD, | 4235 | MDIO_PMA_DEVAD, |
4236 | MDIO_PMA_REG_10G_CTRL2, &tmp1); | 4236 | MDIO_PMA_REG_10G_CTRL2, &tmp1); |
4237 | DP(NETIF_MSG_LINK, "1.7 = 0x%x \n", tmp1); | 4237 | DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); |
4238 | 4238 | ||
4239 | } else if ((params->req_line_speed == | 4239 | } else if ((params->req_line_speed == |
4240 | SPEED_AUTO_NEG) && | 4240 | SPEED_AUTO_NEG) && |
4241 | ((params->speed_cap_mask & | 4241 | ((params->speed_cap_mask & |
4242 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) { | 4242 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G))) { |
4243 | 4243 | ||
4244 | DP(NETIF_MSG_LINK, "Setting 1G clause37 \n"); | 4244 | DP(NETIF_MSG_LINK, "Setting 1G clause37\n"); |
4245 | bnx2x_cl45_write(bp, params->port, ext_phy_type, | 4245 | bnx2x_cl45_write(bp, params->port, ext_phy_type, |
4246 | ext_phy_addr, MDIO_AN_DEVAD, | 4246 | ext_phy_addr, MDIO_AN_DEVAD, |
4247 | MDIO_PMA_REG_8727_MISC_CTRL, 0); | 4247 | MDIO_PMA_REG_8727_MISC_CTRL, 0); |