diff options
Diffstat (limited to 'drivers/net/bnx2x_link.c')
-rw-r--r-- | drivers/net/bnx2x_link.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c index 22586ebd7b1e..ff2743db10d9 100644 --- a/drivers/net/bnx2x_link.c +++ b/drivers/net/bnx2x_link.c | |||
@@ -3572,7 +3572,8 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, | |||
3572 | LED_BLINK_RATE_VAL); | 3572 | LED_BLINK_RATE_VAL); |
3573 | REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + | 3573 | REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + |
3574 | port*4, 1); | 3574 | port*4, 1); |
3575 | if (((speed == SPEED_2500) || | 3575 | if (!CHIP_IS_E1H(bp) && |
3576 | ((speed == SPEED_2500) || | ||
3576 | (speed == SPEED_1000) || | 3577 | (speed == SPEED_1000) || |
3577 | (speed == SPEED_100) || | 3578 | (speed == SPEED_100) || |
3578 | (speed == SPEED_10))) { | 3579 | (speed == SPEED_10))) { |
@@ -3753,6 +3754,14 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars) | |||
3753 | vars->duplex = DUPLEX_FULL; | 3754 | vars->duplex = DUPLEX_FULL; |
3754 | vars->flow_ctrl = FLOW_CTRL_NONE; | 3755 | vars->flow_ctrl = FLOW_CTRL_NONE; |
3755 | vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD); | 3756 | vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD); |
3757 | /* enable on E1.5 FPGA */ | ||
3758 | if (CHIP_IS_E1H(bp)) { | ||
3759 | vars->flow_ctrl |= | ||
3760 | (FLOW_CTRL_TX | FLOW_CTRL_RX); | ||
3761 | vars->link_status |= | ||
3762 | (LINK_STATUS_TX_FLOW_CONTROL_ENABLED | | ||
3763 | LINK_STATUS_RX_FLOW_CONTROL_ENABLED); | ||
3764 | } | ||
3756 | 3765 | ||
3757 | bnx2x_emac_enable(params, vars, 0); | 3766 | bnx2x_emac_enable(params, vars, 0); |
3758 | bnx2x_pbf_update(params, vars->flow_ctrl, vars->line_speed); | 3767 | bnx2x_pbf_update(params, vars->flow_ctrl, vars->line_speed); |