1 files changed, 882 insertions, 219 deletions

diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h
index b21075ccb52e..d3e8198d7dba 100644
--- a/drivers/net/bnx2x_hsi.h
+++ b/drivers/net/bnx2x_hsi.h
@@ -132,6 +132,12 @@ struct shared_hw_cfg {					 /* NVRAM Offset */
 #define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1003G    0x00000008
 #define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1022G    0x00000009
 #define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1021G    0x0000000a
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1023G    0x0000000b
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1033G    0x0000000c
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957711T1101     0x0000000d
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957711ET1201    0x0000000e
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957711A1133G    0x0000000f
+#define SHARED_HW_CFG_BOARD_TYPE_BCM957711EA1233G   0x00000010
 
 #define SHARED_HW_CFG_BOARD_VER_MASK                0xffff0000
 #define SHARED_HW_CFG_BOARD_VER_SHIFT               16
@@ -313,6 +319,7 @@ struct shared_feat_cfg {				 /* NVRAM Offset */
 
         u32 config;                                             /* 0x450 */
 #define SHARED_FEATURE_BMC_ECHO_MODE_EN             0x00000001
+#define SHARED_FEATURE_MF_MODE_DISABLED             0x00000100
 
 };
 
@@ -502,28 +509,41 @@ struct port_feat_cfg {			    /* port 0: 0x454  port 1: 0x4c8 */
 };
 
 
-/*****************************************************************************
- * Device Information                                                        *
- *****************************************************************************/
-struct dev_info {                                                    /* size */
+/****************************************************************************
+ * Device Information                                                       *
+ ****************************************************************************/
+struct dev_info {                                                   /* size */
 
-        u32    bc_rev; /* 8 bits each: major, minor, build */           /* 4 */
+        u32    bc_rev; /* 8 bits each: major, minor, build */          /* 4 */
 
-        struct shared_hw_cfg     shared_hw_config;                     /* 40 */
+        struct shared_hw_cfg     shared_hw_config;                    /* 40 */
 
-        struct port_hw_cfg       port_hw_config[PORT_MAX];      /* 400*2=800 */
+        struct port_hw_cfg       port_hw_config[PORT_MAX];     /* 400*2=800 */
 
-        struct shared_feat_cfg   shared_feature_config;                 /* 4 */
+        struct shared_feat_cfg   shared_feature_config;                /* 4 */
 
-        struct port_feat_cfg     port_feature_config[PORT_MAX]; /* 116*2=232 */
+        struct port_feat_cfg     port_feature_config[PORT_MAX];/* 116*2=232 */
 
 };
 
 
 #define FUNC_0                          0
 #define FUNC_1                          1
+#define FUNC_2                          2
+#define FUNC_3                          3
+#define FUNC_4                          4
+#define FUNC_5                          5
+#define FUNC_6                          6
+#define FUNC_7                          7
 #define E1_FUNC_MAX                     2
-#define FUNC_MAX                        E1_FUNC_MAX
+#define E1H_FUNC_MAX                    8
+
+#define VN_0                            0
+#define VN_1                            1
+#define VN_2                            2
+#define VN_3                            3
+#define E1VN_MAX                        1
+#define E1HVN_MAX                       4
 
 
 /* This value (in milliseconds) determines the frequency of the driver
@@ -619,7 +639,9 @@ struct drv_port_mb {
 #define LINK_STATUS_LINK_PARTNER_15GXFD_CAPABLE         0x08000000
 #define LINK_STATUS_LINK_PARTNER_16GXFD_CAPABLE         0x10000000
 
-        u32 reserved[3];
+        u32 port_stx;
+
+        u32 reserved[2];
 
 };
 
@@ -642,6 +664,11 @@ struct drv_func_mb {
 #define DRV_MSG_CODE_GET_MANUF_KEY                      0x82000000
 #define DRV_MSG_CODE_LOAD_L2B_PRAM                      0x90000000
 
+#define BIOS_MSG_CODE_LIC_CHALLENGE                     0xff010000
+#define BIOS_MSG_CODE_LIC_RESPONSE                      0xff020000
+#define BIOS_MSG_CODE_VIRT_MAC_PRIM                     0xff030000
+#define BIOS_MSG_CODE_VIRT_MAC_ISCSI                    0xff040000
+
 #define DRV_MSG_SEQ_NUMBER_MASK                         0x0000ffff
 
         u32 drv_mb_param;
@@ -671,6 +698,11 @@ struct drv_func_mb {
 #define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE             0x90230000
 #define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE             0x90240000
 
+#define FW_MSG_CODE_LIC_CHALLENGE                       0xff010000
+#define FW_MSG_CODE_LIC_RESPONSE                        0xff020000
+#define FW_MSG_CODE_VIRT_MAC_PRIM                       0xff030000
+#define FW_MSG_CODE_VIRT_MAC_ISCSI                      0xff040000
+
 #define FW_MSG_SEQ_NUMBER_MASK                          0x0000ffff
 
         u32 fw_mb_param;
@@ -696,7 +728,13 @@ struct drv_func_mb {
         u32 iscsi_boot_signature;
         u32 iscsi_boot_block_offset;
 
-        u32 reserved[3];
+        u32 drv_status;
+#define DRV_STATUS_PMF                                  0x00000001
+
+        u32 virt_mac_upper;
+#define VIRT_MAC_SIGN_MASK                              0xffff0000
+#define VIRT_MAC_SIGNATURE                              0x564d0000
+        u32 virt_mac_lower;
 
 };
 
@@ -713,6 +751,92 @@ struct mgmtfw_state {
 
 
 /****************************************************************************
+ * Multi-Function configuration                                             *
+ ****************************************************************************/
+struct shared_mf_cfg {
+
+        u32 clp_mb;
+#define SHARED_MF_CLP_SET_DEFAULT                   0x00000000
+        /* set by CLP */
+#define SHARED_MF_CLP_EXIT                          0x00000001
+        /* set by MCP */
+#define SHARED_MF_CLP_EXIT_DONE                     0x00010000
+
+};
+
+struct port_mf_cfg {
+
+        u32 dynamic_cfg;        /* device control channel */
+#define PORT_MF_CFG_OUTER_VLAN_TAG_MASK             0x0000ffff
+#define PORT_MF_CFG_OUTER_VLAN_TAG_SHIFT            0
+#define PORT_MF_CFG_DYNAMIC_CFG_ENABLED             0x00010000
+#define PORT_MF_CFG_DYNAMIC_CFG_DEFAULT             0x00000000
+
+        u32 reserved[3];
+
+};
+
+struct func_mf_cfg {
+
+        u32 config;
+        /* E/R/I/D */
+        /* function 0 of each port cannot be hidden */
+#define FUNC_MF_CFG_FUNC_HIDE                       0x00000001
+
+#define FUNC_MF_CFG_PROTOCOL_MASK                   0x00000007
+#define FUNC_MF_CFG_PROTOCOL_ETHERNET               0x00000002
+#define FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA     0x00000004
+#define FUNC_MF_CFG_PROTOCOL_ISCSI                  0x00000006
+#define FUNC_MF_CFG_PROTOCOL_DEFAULT\
+        FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA
+
+#define FUNC_MF_CFG_FUNC_DISABLED                   0x00000008
+
+        /* PRI */
+        /* 0 - low priority, 3 - high priority */
+#define FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK          0x00000300
+#define FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT         8
+#define FUNC_MF_CFG_TRANSMIT_PRIORITY_DEFAULT       0x00000000
+
+        /* MINBW, MAXBW */
+        /* value range - 0..100, increments in 100Mbps */
+#define FUNC_MF_CFG_MIN_BW_MASK                     0x00ff0000
+#define FUNC_MF_CFG_MIN_BW_SHIFT                    16
+#define FUNC_MF_CFG_MIN_BW_DEFAULT                  0x00000000
+#define FUNC_MF_CFG_MAX_BW_MASK                     0xff000000
+#define FUNC_MF_CFG_MAX_BW_SHIFT                    24
+#define FUNC_MF_CFG_MAX_BW_DEFAULT                  0x64000000
+
+        u32 mac_upper;          /* MAC */
+#define FUNC_MF_CFG_UPPERMAC_MASK                   0x0000ffff
+#define FUNC_MF_CFG_UPPERMAC_SHIFT                  0
+#define FUNC_MF_CFG_UPPERMAC_DEFAULT                FUNC_MF_CFG_UPPERMAC_MASK
+        u32 mac_lower;
+#define FUNC_MF_CFG_LOWERMAC_DEFAULT                0xffffffff
+
+        u32 e1hov_tag;  /* VNI */
+#define FUNC_MF_CFG_E1HOV_TAG_MASK                  0x0000ffff
+#define FUNC_MF_CFG_E1HOV_TAG_SHIFT                 0
+#define FUNC_MF_CFG_E1HOV_TAG_DEFAULT               FUNC_MF_CFG_E1HOV_TAG_MASK
+
+        u32 reserved[2];
+
+};
+
+struct mf_cfg {
+
+        struct shared_mf_cfg    shared_mf_config;
+        struct port_mf_cfg      port_mf_config[PORT_MAX];
+#if defined(b710)
+        struct func_mf_cfg      func_mf_config[E1_FUNC_MAX];
+#else
+        struct func_mf_cfg      func_mf_config[E1H_FUNC_MAX];
+#endif
+
+};
+
+
+/****************************************************************************
  * Shared Memory Region                                                     *
  ****************************************************************************/
 struct shmem_region {                          /*   SharedMem Offset (size) */
@@ -747,14 +871,349 @@ struct shmem_region {			       /*   SharedMem Offset (size) */
         struct mgmtfw_state     mgmtfw_state;          /* 0x4ac     (0x1b8) */
 
         struct drv_port_mb      port_mb[PORT_MAX];     /* 0x664 (16*2=0x20) */
-        struct drv_func_mb      func_mb[FUNC_MAX];     /* 0x684 (44*2=0x58) */
+        struct drv_func_mb      func_mb[E1H_FUNC_MAX];
+
+        struct mf_cfg           mf_cfg;
 
 };                                                     /* 0x6dc */
 
 
+struct emac_stats {
+    u32     rx_stat_ifhcinoctets;
+    u32     rx_stat_ifhcinbadoctets;
+    u32     rx_stat_etherstatsfragments;
+    u32     rx_stat_ifhcinucastpkts;
+    u32     rx_stat_ifhcinmulticastpkts;
+    u32     rx_stat_ifhcinbroadcastpkts;
+    u32     rx_stat_dot3statsfcserrors;
+    u32     rx_stat_dot3statsalignmenterrors;
+    u32     rx_stat_dot3statscarriersenseerrors;
+    u32     rx_stat_xonpauseframesreceived;
+    u32     rx_stat_xoffpauseframesreceived;
+    u32     rx_stat_maccontrolframesreceived;
+    u32     rx_stat_xoffstateentered;
+    u32     rx_stat_dot3statsframestoolong;
+    u32     rx_stat_etherstatsjabbers;
+    u32     rx_stat_etherstatsundersizepkts;
+    u32     rx_stat_etherstatspkts64octets;
+    u32     rx_stat_etherstatspkts65octetsto127octets;
+    u32     rx_stat_etherstatspkts128octetsto255octets;
+    u32     rx_stat_etherstatspkts256octetsto511octets;
+    u32     rx_stat_etherstatspkts512octetsto1023octets;
+    u32     rx_stat_etherstatspkts1024octetsto1522octets;
+    u32     rx_stat_etherstatspktsover1522octets;
+
+    u32     rx_stat_falsecarriererrors;
+
+    u32     tx_stat_ifhcoutoctets;
+    u32     tx_stat_ifhcoutbadoctets;
+    u32     tx_stat_etherstatscollisions;
+    u32     tx_stat_outxonsent;
+    u32     tx_stat_outxoffsent;
+    u32     tx_stat_flowcontroldone;
+    u32     tx_stat_dot3statssinglecollisionframes;
+    u32     tx_stat_dot3statsmultiplecollisionframes;
+    u32     tx_stat_dot3statsdeferredtransmissions;
+    u32     tx_stat_dot3statsexcessivecollisions;
+    u32     tx_stat_dot3statslatecollisions;
+    u32     tx_stat_ifhcoutucastpkts;
+    u32     tx_stat_ifhcoutmulticastpkts;
+    u32     tx_stat_ifhcoutbroadcastpkts;
+    u32     tx_stat_etherstatspkts64octets;
+    u32     tx_stat_etherstatspkts65octetsto127octets;
+    u32     tx_stat_etherstatspkts128octetsto255octets;
+    u32     tx_stat_etherstatspkts256octetsto511octets;
+    u32     tx_stat_etherstatspkts512octetsto1023octets;
+    u32     tx_stat_etherstatspkts1024octetsto1522octets;
+    u32     tx_stat_etherstatspktsover1522octets;
+    u32     tx_stat_dot3statsinternalmactransmiterrors;
+};
+
+
+struct bmac_stats {
+    u32     tx_stat_gtpkt_lo;
+    u32     tx_stat_gtpkt_hi;
+    u32     tx_stat_gtxpf_lo;
+    u32     tx_stat_gtxpf_hi;
+    u32     tx_stat_gtfcs_lo;
+    u32     tx_stat_gtfcs_hi;
+    u32     tx_stat_gtmca_lo;
+    u32     tx_stat_gtmca_hi;
+    u32     tx_stat_gtbca_lo;
+    u32     tx_stat_gtbca_hi;
+    u32     tx_stat_gtfrg_lo;
+    u32     tx_stat_gtfrg_hi;
+    u32     tx_stat_gtovr_lo;
+    u32     tx_stat_gtovr_hi;
+    u32     tx_stat_gt64_lo;
+    u32     tx_stat_gt64_hi;
+    u32     tx_stat_gt127_lo;
+    u32     tx_stat_gt127_hi;
+    u32     tx_stat_gt255_lo;
+    u32     tx_stat_gt255_hi;
+    u32     tx_stat_gt511_lo;
+    u32     tx_stat_gt511_hi;
+    u32     tx_stat_gt1023_lo;
+    u32     tx_stat_gt1023_hi;
+    u32     tx_stat_gt1518_lo;
+    u32     tx_stat_gt1518_hi;
+    u32     tx_stat_gt2047_lo;
+    u32     tx_stat_gt2047_hi;
+    u32     tx_stat_gt4095_lo;
+    u32     tx_stat_gt4095_hi;
+    u32     tx_stat_gt9216_lo;
+    u32     tx_stat_gt9216_hi;
+    u32     tx_stat_gt16383_lo;
+    u32     tx_stat_gt16383_hi;
+    u32     tx_stat_gtmax_lo;
+    u32     tx_stat_gtmax_hi;
+    u32     tx_stat_gtufl_lo;
+    u32     tx_stat_gtufl_hi;
+    u32     tx_stat_gterr_lo;
+    u32     tx_stat_gterr_hi;
+    u32     tx_stat_gtbyt_lo;
+    u32     tx_stat_gtbyt_hi;
+
+    u32     rx_stat_gr64_lo;
+    u32     rx_stat_gr64_hi;
+    u32     rx_stat_gr127_lo;
+    u32     rx_stat_gr127_hi;
+    u32     rx_stat_gr255_lo;
+    u32     rx_stat_gr255_hi;
+    u32     rx_stat_gr511_lo;
+    u32     rx_stat_gr511_hi;
+    u32     rx_stat_gr1023_lo;
+    u32     rx_stat_gr1023_hi;
+    u32     rx_stat_gr1518_lo;
+    u32     rx_stat_gr1518_hi;
+    u32     rx_stat_gr2047_lo;
+    u32     rx_stat_gr2047_hi;
+    u32     rx_stat_gr4095_lo;
+    u32     rx_stat_gr4095_hi;
+    u32     rx_stat_gr9216_lo;
+    u32     rx_stat_gr9216_hi;
+    u32     rx_stat_gr16383_lo;
+    u32     rx_stat_gr16383_hi;
+    u32     rx_stat_grmax_lo;
+    u32     rx_stat_grmax_hi;
+    u32     rx_stat_grpkt_lo;
+    u32     rx_stat_grpkt_hi;
+    u32     rx_stat_grfcs_lo;
+    u32     rx_stat_grfcs_hi;
+    u32     rx_stat_grmca_lo;
+    u32     rx_stat_grmca_hi;
+    u32     rx_stat_grbca_lo;
+    u32     rx_stat_grbca_hi;
+    u32     rx_stat_grxcf_lo;
+    u32     rx_stat_grxcf_hi;
+    u32     rx_stat_grxpf_lo;
+    u32     rx_stat_grxpf_hi;
+    u32     rx_stat_grxuo_lo;
+    u32     rx_stat_grxuo_hi;
+    u32     rx_stat_grjbr_lo;
+    u32     rx_stat_grjbr_hi;
+    u32     rx_stat_grovr_lo;
+    u32     rx_stat_grovr_hi;
+    u32     rx_stat_grflr_lo;
+    u32     rx_stat_grflr_hi;
+    u32     rx_stat_grmeg_lo;
+    u32     rx_stat_grmeg_hi;
+    u32     rx_stat_grmeb_lo;
+    u32     rx_stat_grmeb_hi;
+    u32     rx_stat_grbyt_lo;
+    u32     rx_stat_grbyt_hi;
+    u32     rx_stat_grund_lo;
+    u32     rx_stat_grund_hi;
+    u32     rx_stat_grfrg_lo;
+    u32     rx_stat_grfrg_hi;
+    u32     rx_stat_grerb_lo;
+    u32     rx_stat_grerb_hi;
+    u32     rx_stat_grfre_lo;
+    u32     rx_stat_grfre_hi;
+    u32     rx_stat_gripj_lo;
+    u32     rx_stat_gripj_hi;
+};
+
+
+union mac_stats {
+    struct emac_stats   emac_stats;
+    struct bmac_stats   bmac_stats;
+};
+
+
+struct mac_stx {
+    /* in_bad_octets */
+    u32     rx_stat_ifhcinbadoctets_hi;
+    u32     rx_stat_ifhcinbadoctets_lo;
+
+    /* out_bad_octets */
+    u32     tx_stat_ifhcoutbadoctets_hi;
+    u32     tx_stat_ifhcoutbadoctets_lo;
+
+    /* crc_receive_errors */
+    u32     rx_stat_dot3statsfcserrors_hi;
+    u32     rx_stat_dot3statsfcserrors_lo;
+    /* alignment_errors */
+    u32     rx_stat_dot3statsalignmenterrors_hi;
+    u32     rx_stat_dot3statsalignmenterrors_lo;
+    /* carrier_sense_errors */
+    u32     rx_stat_dot3statscarriersenseerrors_hi;
+    u32     rx_stat_dot3statscarriersenseerrors_lo;
+    /* false_carrier_detections */
+    u32     rx_stat_falsecarriererrors_hi;
+    u32     rx_stat_falsecarriererrors_lo;
+
+    /* runt_packets_received */
+    u32     rx_stat_etherstatsundersizepkts_hi;
+    u32     rx_stat_etherstatsundersizepkts_lo;
+    /* jabber_packets_received */
+    u32     rx_stat_dot3statsframestoolong_hi;
+    u32     rx_stat_dot3statsframestoolong_lo;
+
+    /* error_runt_packets_received */
+    u32     rx_stat_etherstatsfragments_hi;
+    u32     rx_stat_etherstatsfragments_lo;
+    /* error_jabber_packets_received */
+    u32     rx_stat_etherstatsjabbers_hi;
+    u32     rx_stat_etherstatsjabbers_lo;
+
+    /* control_frames_received */
+    u32     rx_stat_maccontrolframesreceived_hi;
+    u32     rx_stat_maccontrolframesreceived_lo;
+    u32     rx_stat_bmac_xpf_hi;
+    u32     rx_stat_bmac_xpf_lo;
+    u32     rx_stat_bmac_xcf_hi;
+    u32     rx_stat_bmac_xcf_lo;
+
+    /* xoff_state_entered */
+    u32     rx_stat_xoffstateentered_hi;
+    u32     rx_stat_xoffstateentered_lo;
+    /* pause_xon_frames_received */
+    u32     rx_stat_xonpauseframesreceived_hi;
+    u32     rx_stat_xonpauseframesreceived_lo;
+    /* pause_xoff_frames_received */
+    u32     rx_stat_xoffpauseframesreceived_hi;
+    u32     rx_stat_xoffpauseframesreceived_lo;
+    /* pause_xon_frames_transmitted */
+    u32     tx_stat_outxonsent_hi;
+    u32     tx_stat_outxonsent_lo;
+    /* pause_xoff_frames_transmitted */
+    u32     tx_stat_outxoffsent_hi;
+    u32     tx_stat_outxoffsent_lo;
+    /* flow_control_done */
+    u32     tx_stat_flowcontroldone_hi;
+    u32     tx_stat_flowcontroldone_lo;
+
+    /* ether_stats_collisions */
+    u32     tx_stat_etherstatscollisions_hi;
+    u32     tx_stat_etherstatscollisions_lo;
+    /* single_collision_transmit_frames */
+    u32     tx_stat_dot3statssinglecollisionframes_hi;
+    u32     tx_stat_dot3statssinglecollisionframes_lo;
+    /* multiple_collision_transmit_frames */
+    u32     tx_stat_dot3statsmultiplecollisionframes_hi;
+    u32     tx_stat_dot3statsmultiplecollisionframes_lo;
+    /* deferred_transmissions */
+    u32     tx_stat_dot3statsdeferredtransmissions_hi;
+    u32     tx_stat_dot3statsdeferredtransmissions_lo;
+    /* excessive_collision_frames */
+    u32     tx_stat_dot3statsexcessivecollisions_hi;
+    u32     tx_stat_dot3statsexcessivecollisions_lo;
+    /* late_collision_frames */
+    u32     tx_stat_dot3statslatecollisions_hi;
+    u32     tx_stat_dot3statslatecollisions_lo;
+
+    /* frames_transmitted_64_bytes */
+    u32     tx_stat_etherstatspkts64octets_hi;
+    u32     tx_stat_etherstatspkts64octets_lo;
+    /* frames_transmitted_65_127_bytes */
+    u32     tx_stat_etherstatspkts65octetsto127octets_hi;
+    u32     tx_stat_etherstatspkts65octetsto127octets_lo;
+    /* frames_transmitted_128_255_bytes */
+    u32     tx_stat_etherstatspkts128octetsto255octets_hi;
+    u32     tx_stat_etherstatspkts128octetsto255octets_lo;
+    /* frames_transmitted_256_511_bytes */
+    u32     tx_stat_etherstatspkts256octetsto511octets_hi;
+    u32     tx_stat_etherstatspkts256octetsto511octets_lo;
+    /* frames_transmitted_512_1023_bytes */
+    u32     tx_stat_etherstatspkts512octetsto1023octets_hi;
+    u32     tx_stat_etherstatspkts512octetsto1023octets_lo;
+    /* frames_transmitted_1024_1522_bytes */
+    u32     tx_stat_etherstatspkts1024octetsto1522octets_hi;
+    u32     tx_stat_etherstatspkts1024octetsto1522octets_lo;
+    /* frames_transmitted_1523_9022_bytes */
+    u32     tx_stat_etherstatspktsover1522octets_hi;
+    u32     tx_stat_etherstatspktsover1522octets_lo;
+    u32     tx_stat_bmac_2047_hi;
+    u32     tx_stat_bmac_2047_lo;
+    u32     tx_stat_bmac_4095_hi;
+    u32     tx_stat_bmac_4095_lo;
+    u32     tx_stat_bmac_9216_hi;
+    u32     tx_stat_bmac_9216_lo;
+    u32     tx_stat_bmac_16383_hi;
+    u32     tx_stat_bmac_16383_lo;
+
+    /* internal_mac_transmit_errors */
+    u32     tx_stat_dot3statsinternalmactransmiterrors_hi;
+    u32     tx_stat_dot3statsinternalmactransmiterrors_lo;
+
+    /* if_out_discards */
+    u32     tx_stat_bmac_ufl_hi;
+    u32     tx_stat_bmac_ufl_lo;
+};
+
+
+#define MAC_STX_IDX_MAX                     2
+
+struct host_port_stats {
+    u32            host_port_stats_start;
+
+    struct mac_stx mac_stx[MAC_STX_IDX_MAX];
+
+    u32            brb_drop_hi;
+    u32            brb_drop_lo;
+
+    u32            host_port_stats_end;
+};
+
+
+struct host_func_stats {
+    u32     host_func_stats_start;
+
+    u32     total_bytes_received_hi;
+    u32     total_bytes_received_lo;
+
+    u32     total_bytes_transmitted_hi;
+    u32     total_bytes_transmitted_lo;
+
+    u32     total_unicast_packets_received_hi;
+    u32     total_unicast_packets_received_lo;
+
+    u32     total_multicast_packets_received_hi;
+    u32     total_multicast_packets_received_lo;
+
+    u32     total_broadcast_packets_received_hi;
+    u32     total_broadcast_packets_received_lo;
+
+    u32     total_unicast_packets_transmitted_hi;
+    u32     total_unicast_packets_transmitted_lo;
+
+    u32     total_multicast_packets_transmitted_hi;
+    u32     total_multicast_packets_transmitted_lo;
+
+    u32     total_broadcast_packets_transmitted_hi;
+    u32     total_broadcast_packets_transmitted_lo;
+
+    u32     valid_bytes_received_hi;
+    u32     valid_bytes_received_lo;
+
+    u32     host_func_stats_end;
+};
+
+
 #define BCM_5710_FW_MAJOR_VERSION                       4
-#define BCM_5710_FW_MINOR_VERSION                       0
-#define BCM_5710_FW_REVISION_VERSION                    14
+#define BCM_5710_FW_MINOR_VERSION                       5
+#define BCM_5710_FW_REVISION_VERSION                    1
 #define BCM_5710_FW_COMPILE_FLAGS                       1
 
 
@@ -793,7 +1252,7 @@ struct doorbell_hdr {
 };
 
 /*
- * doorbell message send to the chip
+ * doorbell message sent to the chip
  */
 struct doorbell {
 #if defined(__BIG_ENDIAN)
@@ -849,8 +1308,10 @@ struct parsing_flags {
         u16 flags;
 #define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE (0x1<<0)
 #define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE_SHIFT 0
-#define PARSING_FLAGS_NUMBER_OF_NESTED_VLANS (0x3<<1)
-#define PARSING_FLAGS_NUMBER_OF_NESTED_VLANS_SHIFT 1
+#define PARSING_FLAGS_VLAN (0x1<<1)
+#define PARSING_FLAGS_VLAN_SHIFT 1
+#define PARSING_FLAGS_EXTRA_VLAN (0x1<<2)
+#define PARSING_FLAGS_EXTRA_VLAN_SHIFT 2
 #define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL (0x3<<3)
 #define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT 3
 #define PARSING_FLAGS_IP_OPTIONS (0x1<<5)
@@ -874,6 +1335,12 @@ struct parsing_flags {
 };
 
 
+struct regpair {
+        u32 lo;
+        u32 hi;
+};
+
+
 /*
  * dmae command structure
  */
@@ -901,8 +1368,10 @@ struct dmae_command {
 #define DMAE_COMMAND_SRC_RESET_SHIFT 13
 #define DMAE_COMMAND_DST_RESET (0x1<<14)
 #define DMAE_COMMAND_DST_RESET_SHIFT 14
-#define DMAE_COMMAND_RESERVED0 (0x1FFFF<<15)
-#define DMAE_COMMAND_RESERVED0_SHIFT 15
+#define DMAE_COMMAND_E1HVN (0x3<<15)
+#define DMAE_COMMAND_E1HVN_SHIFT 15
+#define DMAE_COMMAND_RESERVED0 (0x7FFF<<17)
+#define DMAE_COMMAND_RESERVED0_SHIFT 17
         u32 src_addr_lo;
         u32 src_addr_hi;
         u32 dst_addr_lo;
@@ -952,72 +1421,107 @@ struct double_regpair {
 
 
 /*
- * The eth Rx Buffer Descriptor
- */
-struct eth_rx_bd {
-        u32 addr_lo;
-        u32 addr_hi;
-};
-
-/*
- * The eth storm context of Ustorm
+ * The eth storm context of Ustorm (configuration part)
  */
-struct ustorm_eth_st_context {
+struct ustorm_eth_st_context_config {
 #if defined(__BIG_ENDIAN)
-        u8 sb_index_number;
+        u8 flags;
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT (0x1<<0)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT_SHIFT 0
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_DYNAMIC_HC (0x1<<1)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_DYNAMIC_HC_SHIFT 1
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA (0x1<<2)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA_SHIFT 2
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING (0x1<<3)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING_SHIFT 3
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0xF<<4)
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 4
         u8 status_block_id;
-        u8 __local_rx_bd_cons;
-        u8 __local_rx_bd_prod;
+        u8 clientId;
+        u8 sb_index_numbers;
+#define USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER (0xF<<0)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER_SHIFT 0
+#define USTORM_ETH_ST_CONTEXT_CONFIG_BD_SB_INDEX_NUMBER (0xF<<4)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_BD_SB_INDEX_NUMBER_SHIFT 4
 #elif defined(__LITTLE_ENDIAN)
-        u8 __local_rx_bd_prod;
-        u8 __local_rx_bd_cons;
+        u8 sb_index_numbers;
+#define USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER (0xF<<0)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER_SHIFT 0
+#define USTORM_ETH_ST_CONTEXT_CONFIG_BD_SB_INDEX_NUMBER (0xF<<4)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_BD_SB_INDEX_NUMBER_SHIFT 4
+        u8 clientId;
         u8 status_block_id;
-        u8 sb_index_number;
+        u8 flags;
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT (0x1<<0)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT_SHIFT 0
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_DYNAMIC_HC (0x1<<1)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_DYNAMIC_HC_SHIFT 1
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA (0x1<<2)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA_SHIFT 2
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING (0x1<<3)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING_SHIFT 3
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0xF<<4)
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 4
 #endif
 #if defined(__BIG_ENDIAN)
-        u16 rcq_cons;
-        u16 rx_bd_cons;
+        u16 bd_buff_size;
+        u16 mc_alignment_size;
 #elif defined(__LITTLE_ENDIAN)
-        u16 rx_bd_cons;
-        u16 rcq_cons;
+        u16 mc_alignment_size;
+        u16 bd_buff_size;
 #endif
-        u32 rx_bd_page_base_lo;
-        u32 rx_bd_page_base_hi;
-        u32 rcq_base_address_lo;
-        u32 rcq_base_address_hi;
 #if defined(__BIG_ENDIAN)
-        u16 __num_of_returned_cqes;
-        u8 num_rss;
-        u8 flags;
-#define USTORM_ETH_ST_CONTEXT_ENABLE_MC_ALIGNMENT (0x1<<0)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_MC_ALIGNMENT_SHIFT 0
-#define USTORM_ETH_ST_CONTEXT_ENABLE_DYNAMIC_HC (0x1<<1)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_DYNAMIC_HC_SHIFT 1
-#define USTORM_ETH_ST_CONTEXT_ENABLE_TPA (0x1<<2)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_TPA_SHIFT 2
-#define __USTORM_ETH_ST_CONTEXT_RESERVED0 (0x1F<<3)
-#define __USTORM_ETH_ST_CONTEXT_RESERVED0_SHIFT 3
+        u8 __local_sge_prod;
+        u8 __local_bd_prod;
+        u16 sge_buff_size;
 #elif defined(__LITTLE_ENDIAN)
-        u8 flags;
-#define USTORM_ETH_ST_CONTEXT_ENABLE_MC_ALIGNMENT (0x1<<0)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_MC_ALIGNMENT_SHIFT 0
-#define USTORM_ETH_ST_CONTEXT_ENABLE_DYNAMIC_HC (0x1<<1)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_DYNAMIC_HC_SHIFT 1
-#define USTORM_ETH_ST_CONTEXT_ENABLE_TPA (0x1<<2)
-#define USTORM_ETH_ST_CONTEXT_ENABLE_TPA_SHIFT 2
-#define __USTORM_ETH_ST_CONTEXT_RESERVED0 (0x1F<<3)
-#define __USTORM_ETH_ST_CONTEXT_RESERVED0_SHIFT 3
-        u8 num_rss;
-        u16 __num_of_returned_cqes;
+        u16 sge_buff_size;
+        u8 __local_bd_prod;
+        u8 __local_sge_prod;
 #endif
 #if defined(__BIG_ENDIAN)
-        u16 mc_alignment_size;
-        u16 agg_threshold;
+        u16 __bd_cons;
+        u16 __sge_cons;
 #elif defined(__LITTLE_ENDIAN)
-        u16 agg_threshold;
-        u16 mc_alignment_size;
+        u16 __sge_cons;
+        u16 __bd_cons;
 #endif
+        u32 bd_page_base_lo;
+        u32 bd_page_base_hi;
+        u32 sge_page_base_lo;
+        u32 sge_page_base_hi;
+};
+
+/*
+ * The eth Rx Buffer Descriptor
+ */
+struct eth_rx_bd {
+        u32 addr_lo;
+        u32 addr_hi;
+};
+
+/*
+ * The eth Rx SGE Descriptor
+ */
+struct eth_rx_sge {
+        u32 addr_lo;
+        u32 addr_hi;
+};
+
+/*
+ * Local BDs and SGEs rings (in ETH)
+ */
+struct eth_local_rx_rings {
         struct eth_rx_bd __local_bd_ring[16];
+        struct eth_rx_sge __local_sge_ring[12];
+};
+
+/*
+ * The eth storm context of Ustorm
+ */
+struct ustorm_eth_st_context {
+        struct ustorm_eth_st_context_config common;
+        struct eth_local_rx_rings __rings;
 };
 
 /*
@@ -1088,9 +1592,9 @@ struct xstorm_eth_extra_ag_context_section {
 #if defined(__BIG_ENDIAN)
         u16 __reserved3;
         u8 __reserved2;
-        u8 __agg_misc7;
+        u8 __da_only_cnt;
 #elif defined(__LITTLE_ENDIAN)
-        u8 __agg_misc7;
+        u8 __da_only_cnt;
         u8 __reserved2;
         u16 __reserved3;
 #endif
@@ -1368,7 +1872,13 @@ struct timers_block_context {
         u32 __reserved_0;
         u32 __reserved_1;
         u32 __reserved_2;
-        u32 __reserved_flags;
+        u32 flags;
+#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0)
+#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0
+#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2)
+#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2
+#define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3)
+#define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3
 };
 
 /*
@@ -1478,11 +1988,19 @@ struct xstorm_eth_st_context {
         u32 tx_bd_page_base_hi;
 #if defined(__BIG_ENDIAN)
         u16 tx_bd_cons;
-        u8 __reserved0;
+        u8 statistics_data;
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_COUNTER_ID (0x7F<<0)
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_COUNTER_ID_SHIFT 0
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE (0x1<<7)
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE_SHIFT 7
         u8 __local_tx_bd_prod;
 #elif defined(__LITTLE_ENDIAN)
         u8 __local_tx_bd_prod;
-        u8 __reserved0;
+        u8 statistics_data;
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_COUNTER_ID (0x7F<<0)
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_COUNTER_ID_SHIFT 0
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE (0x1<<7)
+#define XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE_SHIFT 7
         u16 tx_bd_cons;
 #endif
         u32 db_data_addr_lo;
@@ -1559,7 +2077,7 @@ struct eth_tx_doorbell {
 struct ustorm_def_status_block {
         u16 index_values[HC_USTORM_DEF_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1570,7 +2088,7 @@ struct ustorm_def_status_block {
 struct cstorm_def_status_block {
         u16 index_values[HC_CSTORM_DEF_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1581,7 +2099,7 @@ struct cstorm_def_status_block {
 struct xstorm_def_status_block {
         u16 index_values[HC_XSTORM_DEF_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1592,7 +2110,7 @@ struct xstorm_def_status_block {
 struct tstorm_def_status_block {
         u16 index_values[HC_TSTORM_DEF_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1615,7 +2133,7 @@ struct host_def_status_block {
 struct ustorm_status_block {
         u16 index_values[HC_USTORM_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1626,7 +2144,7 @@ struct ustorm_status_block {
 struct cstorm_status_block {
         u16 index_values[HC_CSTORM_SB_NUM_INDICES];
         u16 status_block_index;
-        u8 reserved0;
+        u8 func;
         u8 status_block_id;
         u32 __flags;
 };
@@ -1664,20 +2182,21 @@ struct eth_dynamic_hc_config {
  * regular eth FP CQE parameters struct
  */
 struct eth_fast_path_rx_cqe {
-        u8 type;
-        u8 error_type_flags;
-#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<0)
-#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 0
-#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<1)
-#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 1
-#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<2)
-#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 2
-#define ETH_FAST_PATH_RX_CQE_START_FLG (0x1<<3)
-#define ETH_FAST_PATH_RX_CQE_START_FLG_SHIFT 3
-#define ETH_FAST_PATH_RX_CQE_END_FLG (0x1<<4)
-#define ETH_FAST_PATH_RX_CQE_END_FLG_SHIFT 4
-#define ETH_FAST_PATH_RX_CQE_RESERVED0 (0x7<<5)
-#define ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT 5
+        u8 type_error_flags;
+#define ETH_FAST_PATH_RX_CQE_TYPE (0x1<<0)
+#define ETH_FAST_PATH_RX_CQE_TYPE_SHIFT 0
+#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<1)
+#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 1
+#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<2)
+#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 2
+#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<3)
+#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 3
+#define ETH_FAST_PATH_RX_CQE_START_FLG (0x1<<4)
+#define ETH_FAST_PATH_RX_CQE_START_FLG_SHIFT 4
+#define ETH_FAST_PATH_RX_CQE_END_FLG (0x1<<5)
+#define ETH_FAST_PATH_RX_CQE_END_FLG_SHIFT 5
+#define ETH_FAST_PATH_RX_CQE_RESERVED0 (0x3<<6)
+#define ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT 6
         u8 status_flags;
 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE (0x7<<0)
 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT 0
@@ -1692,11 +2211,13 @@ struct eth_fast_path_rx_cqe {
 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG (0x1<<7)
 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7
         u8 placement_offset;
+        u8 queue_index;
         u32 rss_hash_result;
         u16 vlan_tag;
         u16 pkt_len;
-        u16 queue_index;
+        u16 len_on_bd;
         struct parsing_flags pars_flags;
+        u16 sgl[8];
 };
 
 
@@ -1710,6 +2231,23 @@ struct eth_halt_ramrod_data {
 
 
 /*
+ * The data for statistics query ramrod
+ */
+struct eth_query_ramrod_data {
+#if defined(__BIG_ENDIAN)
+        u8 reserved0;
+        u8 collect_port_1b;
+        u16 drv_counter;
+#elif defined(__LITTLE_ENDIAN)
+        u16 drv_counter;
+        u8 collect_port_1b;
+        u8 reserved0;
+#endif
+        u32 ctr_id_vector;
+};
+
+
+/*
  * Place holder for ramrods protocol specific data
  */
 struct ramrod_data {
@@ -1739,15 +2277,20 @@ struct eth_rx_bd_next_page {
  * Eth Rx Cqe structure- general structure for ramrods
  */
 struct common_ramrod_eth_rx_cqe {
-        u8 type;
+        u8 ramrod_type;
+#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x1<<0)
+#define COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT 0
+#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x7F<<1)
+#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 1
         u8 conn_type_3b;
-        u16 reserved;
+        u16 reserved1;
         u32 conn_and_cmd_data;
 #define COMMON_RAMROD_ETH_RX_CQE_CID (0xFFFFFF<<0)
 #define COMMON_RAMROD_ETH_RX_CQE_CID_SHIFT 0
 #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24)
 #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24
         struct ramrod_data protocol_data;
+        u32 reserved2[4];
 };
 
 /*
@@ -1756,8 +2299,7 @@ struct common_ramrod_eth_rx_cqe {
 struct eth_rx_cqe_next_page {
         u32 addr_lo;
         u32 addr_hi;
-        u32 reserved0;
-        u32 reserved1;
+        u32 reserved[6];
 };
 
 /*
@@ -1787,11 +2329,6 @@ struct spe_hdr {
         u16 reserved;
 };
 
-struct regpair {
-        u32 lo;
-        u32 hi;
-};
-
 /*
  * ethernet slow path element
  */
@@ -1802,6 +2339,7 @@ union eth_specific_data {
         struct eth_halt_ramrod_data halt_ramrod_data;
         struct regpair leading_cqe_addr;
         struct regpair update_data_addr;
+        struct eth_query_ramrod_data query_ramrod_data;
 };
 
 /*
@@ -1824,10 +2362,13 @@ struct eth_tx_db_data {
 
 
 /*
- * Common configuration parameters per port in Tstorm
+ * Common configuration parameters per function in Tstorm
  */
 struct tstorm_eth_function_common_config {
-        u32 config_flags;
+#if defined(__BIG_ENDIAN)
+        u8 leading_client_id;
+        u8 rss_result_mask;
+        u16 config_flags;
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0)
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1)
@@ -1840,17 +2381,32 @@ struct tstorm_eth_function_common_config {
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_ENABLE_SHIFT 4
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_DEFAULT_ENABLE (0x1<<5)
 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_DEFAULT_ENABLE_SHIFT 5
-#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0x3FFFFFF<<6)
-#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 6
-#if defined(__BIG_ENDIAN)
-        u16 __secondary_vlan_id;
-        u8 leading_client_id;
-        u8 rss_result_mask;
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_IN_CAM (0x1<<6)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_IN_CAM_SHIFT 6
+#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0x1FF<<7)
+#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 7
 #elif defined(__LITTLE_ENDIAN)
+        u16 config_flags;
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_ENABLE (0x1<<4)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_ENABLE_SHIFT 4
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_DEFAULT_ENABLE (0x1<<5)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_DEFAULT_ENABLE_SHIFT 5
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_IN_CAM (0x1<<6)
+#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_IN_CAM_SHIFT 6
+#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0x1FF<<7)
+#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 7
         u8 rss_result_mask;
         u8 leading_client_id;
-        u16 __secondary_vlan_id;
 #endif
+        u16 vlan_id[2];
 };
 
 /*
@@ -1868,7 +2424,7 @@ struct eth_update_ramrod_data {
 struct mac_configuration_hdr {
         u8 length_6b;
         u8 offset;
-        u16 reserved0;
+        u16 client_id;
         u32 reserved1;
 };
 
@@ -1925,15 +2481,55 @@ struct mac_configuration_cmd {
 
 
 /*
+ * MAC address in list for ramrod
+ */
+struct mac_configuration_entry_e1h {
+        u16 lsb_mac_addr;
+        u16 middle_mac_addr;
+        u16 msb_mac_addr;
+        u16 vlan_id;
+        u16 e1hov_id;
+        u8 client_id;
+        u8 flags;
+#define MAC_CONFIGURATION_ENTRY_E1H_PORT (0x1<<0)
+#define MAC_CONFIGURATION_ENTRY_E1H_PORT_SHIFT 0
+#define MAC_CONFIGURATION_ENTRY_E1H_ACTION_TYPE (0x1<<1)
+#define MAC_CONFIGURATION_ENTRY_E1H_ACTION_TYPE_SHIFT 1
+#define MAC_CONFIGURATION_ENTRY_E1H_RDMA_MAC (0x1<<2)
+#define MAC_CONFIGURATION_ENTRY_E1H_RDMA_MAC_SHIFT 2
+#define MAC_CONFIGURATION_ENTRY_E1H_RESERVED0 (0x1F<<3)
+#define MAC_CONFIGURATION_ENTRY_E1H_RESERVED0_SHIFT 3
+};
+
+/*
+ * MAC filtering configuration command
+ */
+struct mac_configuration_cmd_e1h {
+        struct mac_configuration_hdr hdr;
+        struct mac_configuration_entry_e1h config_table[32];
+};
+
+
+/*
+ * approximate-match multicast filtering for E1H per function in Tstorm
+ */
+struct tstorm_eth_approximate_match_multicast_filtering {
+        u32 mcast_add_hash_bit_array[8];
+};
+
+
+/*
  * Configuration parameters per client in Tstorm
  */
 struct tstorm_eth_client_config {
 #if defined(__BIG_ENDIAN)
-        u16 statistics_counter_id;
+        u8 max_sges_for_packet;
+        u8 statistics_counter_id;
         u16 mtu;
 #elif defined(__LITTLE_ENDIAN)
         u16 mtu;
-        u16 statistics_counter_id;
+        u8 statistics_counter_id;
+        u8 max_sges_for_packet;
 #endif
 #if defined(__BIG_ENDIAN)
         u16 drop_flags;
@@ -1941,42 +2537,42 @@ struct tstorm_eth_client_config {
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_IP_CS_ERR_SHIFT 0
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_TCP_CS_ERR (0x1<<1)
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_TCP_CS_ERR_SHIFT 1
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_MAC_ERR (0x1<<2)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_MAC_ERR_SHIFT 2
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0 (0x1<<3)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0_SHIFT 3
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR (0x1<<4)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR_SHIFT 4
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1 (0x7FF<<5)
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1_SHIFT 5
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0 (0x1<<2)
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0_SHIFT 2
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR (0x1<<3)
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR_SHIFT 3
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1 (0xFFF<<4)
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1_SHIFT 4
         u16 config_flags;
 #define TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE (0x1<<0)
 #define TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE_SHIFT 0
 #define TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE (0x1<<1)
 #define TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE_SHIFT 1
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0 (0x3FFF<<2)
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0_SHIFT 2
+#define TSTORM_ETH_CLIENT_CONFIG_ENABLE_SGE_RING (0x1<<2)
+#define TSTORM_ETH_CLIENT_CONFIG_ENABLE_SGE_RING_SHIFT 2
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0 (0x1FFF<<3)
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0_SHIFT 3
 #elif defined(__LITTLE_ENDIAN)
         u16 config_flags;
 #define TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE (0x1<<0)
 #define TSTORM_ETH_CLIENT_CONFIG_VLAN_REMOVAL_ENABLE_SHIFT 0
 #define TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE (0x1<<1)
 #define TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE_SHIFT 1
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0 (0x3FFF<<2)
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0_SHIFT 2
+#define TSTORM_ETH_CLIENT_CONFIG_ENABLE_SGE_RING (0x1<<2)
+#define TSTORM_ETH_CLIENT_CONFIG_ENABLE_SGE_RING_SHIFT 2
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0 (0x1FFF<<3)
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED0_SHIFT 3
         u16 drop_flags;
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_IP_CS_ERR (0x1<<0)
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_IP_CS_ERR_SHIFT 0
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_TCP_CS_ERR (0x1<<1)
 #define TSTORM_ETH_CLIENT_CONFIG_DROP_TCP_CS_ERR_SHIFT 1
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_MAC_ERR (0x1<<2)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_MAC_ERR_SHIFT 2
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0 (0x1<<3)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0_SHIFT 3
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR (0x1<<4)
-#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR_SHIFT 4
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1 (0x7FF<<5)
-#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1_SHIFT 5
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0 (0x1<<2)
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0_SHIFT 2
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR (0x1<<3)
+#define TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR_SHIFT 3
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1 (0xFFF<<4)
+#define __TSTORM_ETH_CLIENT_CONFIG_RESERVED1_SHIFT 4
 #endif
 };
 
@@ -1992,103 +2588,119 @@ struct tstorm_eth_mac_filter_config {
         u32 bcast_drop_all;
         u32 bcast_accept_all;
         u32 strict_vlan;
-        u32 __secondary_vlan_clients;
+        u32 vlan_filter[2];
+        u32 reserved;
 };
 
 
-struct rate_shaping_per_protocol {
+/*
+ * Three RX producers for ETH
+ */
+struct tstorm_eth_rx_producers {
 #if defined(__BIG_ENDIAN)
-        u16 reserved0;
-        u16 protocol_rate;
+        u16 bd_prod;
+        u16 cqe_prod;
 #elif defined(__LITTLE_ENDIAN)
-        u16 protocol_rate;
-        u16 reserved0;
+        u16 cqe_prod;
+        u16 bd_prod;
 #endif
-        u32 protocol_quota;
-        s32 current_credit;
-        u32 reserved;
-};
-
-struct rate_shaping_vars {
-        struct rate_shaping_per_protocol protocol_vars[NUM_OF_PROTOCOLS];
-        u32 pause_mask;
-        u32 periodic_stop;
-        u32 rs_periodic_timeout;
-        u32 rs_threshold;
-        u32 last_periodic_time;
-        u32 reserved;
-};
-
-struct fairness_per_protocol {
-        u32 credit_delta;
-        s32 fair_credit;
 #if defined(__BIG_ENDIAN)
-        u16 reserved0;
-        u8 state;
-        u8 weight;
+        u16 reserved;
+        u16 sge_prod;
 #elif defined(__LITTLE_ENDIAN)
-        u8 weight;
-        u8 state;
-        u16 reserved0;
+        u16 sge_prod;
+        u16 reserved;
 #endif
-        u32 reserved1;
 };
 
-struct fairness_vars {
-        struct fairness_per_protocol protocol_vars[NUM_OF_PROTOCOLS];
-        u32 upper_bound;
-        u32 port_rate;
-        u32 pause_mask;
-        u32 fair_threshold;
-};
 
-struct safc_struct {
-        u32 cur_pause_mask;
-        u32 expire_time;
+/*
+ * common flag to indicate existance of TPA.
+ */
+struct tstorm_eth_tpa_exist {
 #if defined(__BIG_ENDIAN)
-        u16 reserved0;
-        u8 cur_cos_types;
-        u8 safc_timeout_usec;
+        u16 reserved1;
+        u8 reserved0;
+        u8 tpa_exist;
 #elif defined(__LITTLE_ENDIAN)
-        u8 safc_timeout_usec;
-        u8 cur_cos_types;
-        u16 reserved0;
+        u8 tpa_exist;
+        u8 reserved0;
+        u16 reserved1;
 #endif
-        u32 reserved1;
+        u32 reserved2;
 };
 
-struct demo_struct {
+
+/*
+ * per-port SAFC demo variables
+ */
+struct cmng_flags_per_port {
         u8 con_number[NUM_OF_PROTOCOLS];
 #if defined(__BIG_ENDIAN)
-        u8 reserved1;
         u8 fairness_enable;
         u8 rate_shaping_enable;
-        u8 cmng_enable;
+        u8 cmng_protocol_enable;
+        u8 cmng_vn_enable;
 #elif defined(__LITTLE_ENDIAN)
-        u8 cmng_enable;
+        u8 cmng_vn_enable;
+        u8 cmng_protocol_enable;
         u8 rate_shaping_enable;
         u8 fairness_enable;
-        u8 reserved1;
 #endif
 };
 
-struct cmng_struct {
-        struct rate_shaping_vars rs_vars;
-        struct fairness_vars fair_vars;
-        struct safc_struct safc_vars;
-        struct demo_struct demo_vars;
+
+/*
+ * per-port rate shaping variables
+ */
+struct rate_shaping_vars_per_port {
+        u32 rs_periodic_timeout;
+        u32 rs_threshold;
 };
 
 
-struct cos_to_protocol {
-        u8 mask[MAX_COS_NUMBER];
+/*
+ * per-port fairness variables
+ */
+struct fairness_vars_per_port {
+        u32 upper_bound;
+        u32 fair_threshold;
+        u32 fairness_timeout;
 };
 
 
 /*
- * Common statistics collected by the Xstorm (per port)
+ * per-port SAFC variables
  */
-struct xstorm_common_stats {
+struct safc_struct_per_port {
+#if defined(__BIG_ENDIAN)
+        u16 __reserved0;
+        u8 cur_cos_types;
+        u8 safc_timeout_usec;
+#elif defined(__LITTLE_ENDIAN)
+        u8 safc_timeout_usec;
+        u8 cur_cos_types;
+        u16 __reserved0;
+#endif
+        u8 cos_to_protocol[MAX_COS_NUMBER];
+};
+
+
+/*
+ * Per-port congestion management variables
+ */
+struct cmng_struct_per_port {
+        struct rate_shaping_vars_per_port rs_vars;
+        struct fairness_vars_per_port fair_vars;
+        struct safc_struct_per_port safc_vars;
+        struct cmng_flags_per_port flags;
+};
+
+
+/*
+ * Protocol-common statistics collected by the Xstorm (per client)
+ */
+struct xstorm_per_client_stats {
         struct regpair total_sent_bytes;
         u32 total_sent_pkts;
         u32 unicast_pkts_sent;
@@ -2097,9 +2709,31 @@ struct xstorm_common_stats {
         u32 multicast_pkts_sent;
         u32 broadcast_pkts_sent;
         struct regpair broadcast_bytes_sent;
-        struct regpair done;
+        u16 stats_counter;
+        u16 reserved0;
+        u32 reserved1;
 };
 
+
+/*
+ * Common statistics collected by the Xstorm (per port)
+ */
+struct xstorm_common_stats {
+ struct xstorm_per_client_stats client_statistics[MAX_X_STAT_COUNTER_ID];
+};
+
+
+/*
+ * Protocol-common statistics collected by the Tstorm (per port)
+ */
+struct tstorm_per_port_stats {
+        u32 mac_filter_discard;
+        u32 xxoverflow_discard;
+        u32 brb_truncate_discard;
+        u32 mac_discard;
+};
+
+
 /*
  * Protocol-common statistics collected by the Tstorm (per client)
  */
@@ -2117,20 +2751,17 @@ struct tstorm_per_client_stats {
         u32 rcv_multicast_pkts;
         u32 no_buff_discard;
         u32 ttl0_discard;
-        u32 mac_discard;
-        u32 reserved;
+        u16 stats_counter;
+        u16 reserved0;
+        u32 reserved1;
 };
 
 /*
- * Protocol-common statistics collected by the Tstorm (per port)
+ * Protocol-common statistics collected by the Tstorm
  */
 struct tstorm_common_stats {
-        struct tstorm_per_client_stats client_statistics[MAX_T_STAT_COUNTER_ID];
-        u32 mac_filter_discard;
-        u32 xxoverflow_discard;
-        u32 brb_truncate_discard;
-        u32 reserved;
-        struct regpair done;
+        struct tstorm_per_port_stats port_statistics;
+ struct tstorm_per_client_stats client_statistics[MAX_T_STAT_COUNTER_ID];
 };
 
 /*
@@ -2143,6 +2774,16 @@ struct eth_stats_query {
 
 
 /*
+ * per-vnic fairness variables
+ */
+struct fairness_vars_per_vn {
+        u32 protocol_credit_delta[NUM_OF_PROTOCOLS];
+        u32 vn_credit_delta;
+        u32 __reserved0;
+};
+
+
+/*
  * FW version stored in the Xstorm RAM
  */
 struct fw_version {
@@ -2160,8 +2801,10 @@ struct fw_version {
 #define FW_VERSION_OPTIMIZED_SHIFT 0
 #define FW_VERSION_BIG_ENDIEN (0x1<<1)
 #define FW_VERSION_BIG_ENDIEN_SHIFT 1
-#define __FW_VERSION_RESERVED (0x3FFFFFFF<<2)
-#define __FW_VERSION_RESERVED_SHIFT 2
+#define FW_VERSION_CHIP_VERSION (0x3<<2)
+#define FW_VERSION_CHIP_VERSION_SHIFT 2
+#define __FW_VERSION_RESERVED (0xFFFFFFF<<4)
+#define __FW_VERSION_RESERVED_SHIFT 4
 };
 
 
@@ -2169,15 +2812,9 @@ struct fw_version {
  * FW version stored in first line of pram
  */
 struct pram_fw_version {
-#if defined(__BIG_ENDIAN)
-        u16 patch;
-        u8 primary;
-        u8 client;
-#elif defined(__LITTLE_ENDIAN)
         u8 client;
         u8 primary;
         u16 patch;
-#endif
         u8 flags;
 #define PRAM_FW_VERSION_OPTIMIZED (0x1<<0)
 #define PRAM_FW_VERSION_OPTIMIZED_SHIFT 0
@@ -2185,8 +2822,34 @@ struct pram_fw_version {
 #define PRAM_FW_VERSION_STORM_ID_SHIFT 1
 #define PRAM_FW_VERSION_BIG_ENDIEN (0x1<<3)
 #define PRAM_FW_VERSION_BIG_ENDIEN_SHIFT 3
-#define __PRAM_FW_VERSION_RESERVED0 (0xF<<4)
-#define __PRAM_FW_VERSION_RESERVED0_SHIFT 4
+#define PRAM_FW_VERSION_CHIP_VERSION (0x3<<4)
+#define PRAM_FW_VERSION_CHIP_VERSION_SHIFT 4
+#define __PRAM_FW_VERSION_RESERVED0 (0x3<<6)
+#define __PRAM_FW_VERSION_RESERVED0_SHIFT 6
+};
+
+
+/*
+ * a single rate shaping counter. can be used as protocol or vnic counter
+ */
+struct rate_shaping_counter {
+        u32 quota;
+#if defined(__BIG_ENDIAN)
+        u16 __reserved0;
+        u16 rate;
+#elif defined(__LITTLE_ENDIAN)
+        u16 rate;
+        u16 __reserved0;
+#endif
+};
+
+
+/*
+ * per-vnic rate shaping variables
+ */
+struct rate_shaping_vars_per_vn {
+        struct rate_shaping_counter protocol_counters[NUM_OF_PROTOCOLS];
+        struct rate_shaping_counter vn_counter;
 };