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Diffstat (limited to 'drivers/net/bnx2x_fw_defs.h')
-rw-r--r--drivers/net/bnx2x_fw_defs.h154
1 files changed, 77 insertions, 77 deletions
diff --git a/drivers/net/bnx2x_fw_defs.h b/drivers/net/bnx2x_fw_defs.h
index 6e35761fc7dc..192fa981b930 100644
--- a/drivers/net/bnx2x_fw_defs.h
+++ b/drivers/net/bnx2x_fw_defs.h
@@ -9,171 +9,171 @@
9 9
10 10
11#define CSTORM_ASSERT_LIST_INDEX_OFFSET \ 11#define CSTORM_ASSERT_LIST_INDEX_OFFSET \
12 (IS_E1H_OFFSET? 0x7000 : 0x1000) 12 (IS_E1H_OFFSET ? 0x7000 : 0x1000)
13#define CSTORM_ASSERT_LIST_OFFSET(idx) \ 13#define CSTORM_ASSERT_LIST_OFFSET(idx) \
14 (IS_E1H_OFFSET? (0x7020 + (idx * 0x10)) : (0x1020 + (idx * 0x10))) 14 (IS_E1H_OFFSET ? (0x7020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
15#define CSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \ 15#define CSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
16 (IS_E1H_OFFSET? (0x8522 + ((function>>1) * 0x40) + ((function&1) \ 16 (IS_E1H_OFFSET ? (0x8522 + ((function>>1) * 0x40) + \
17 * 0x100) + (index * 0x4)) : (0x1922 + (function * 0x40) + (index \ 17 ((function&1) * 0x100) + (index * 0x4)) : (0x1922 + (function * \
18 * 0x4))) 18 0x40) + (index * 0x4)))
19#define CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \ 19#define CSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
20 (IS_E1H_OFFSET? (0x8500 + ((function>>1) * 0x40) + ((function&1) \ 20 (IS_E1H_OFFSET ? (0x8500 + ((function>>1) * 0x40) + \
21 * 0x100)) : (0x1900 + (function * 0x40))) 21 ((function&1) * 0x100)) : (0x1900 + (function * 0x40)))
22#define CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \ 22#define CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
23 (IS_E1H_OFFSET? (0x8508 + ((function>>1) * 0x40) + ((function&1) \ 23 (IS_E1H_OFFSET ? (0x8508 + ((function>>1) * 0x40) + \
24 * 0x100)) : (0x1908 + (function * 0x40))) 24 ((function&1) * 0x100)) : (0x1908 + (function * 0x40)))
25#define CSTORM_FUNCTION_MODE_OFFSET \ 25#define CSTORM_FUNCTION_MODE_OFFSET \
26 (IS_E1H_OFFSET? 0x11e8 : 0xffffffff) 26 (IS_E1H_OFFSET ? 0x11e8 : 0xffffffff)
27#define CSTORM_HC_BTR_OFFSET(port) \ 27#define CSTORM_HC_BTR_OFFSET(port) \
28 (IS_E1H_OFFSET? (0x8704 + (port * 0xf0)) : (0x1984 + (port * 0xc0))) 28 (IS_E1H_OFFSET ? (0x8704 + (port * 0xf0)) : (0x1984 + (port * 0xc0)))
29#define CSTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \ 29#define CSTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
30 (IS_E1H_OFFSET? (0x801a + (port * 0x280) + (cpu_id * 0x28) + \ 30 (IS_E1H_OFFSET ? (0x801a + (port * 0x280) + (cpu_id * 0x28) + \
31 (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \ 31 (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
32 (index * 0x4))) 32 (index * 0x4)))
33#define CSTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \ 33#define CSTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
34 (IS_E1H_OFFSET? (0x8018 + (port * 0x280) + (cpu_id * 0x28) + \ 34 (IS_E1H_OFFSET ? (0x8018 + (port * 0x280) + (cpu_id * 0x28) + \
35 (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \ 35 (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
36 (index * 0x4))) 36 (index * 0x4)))
37#define CSTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \ 37#define CSTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
38 (IS_E1H_OFFSET? (0x8000 + (port * 0x280) + (cpu_id * 0x28)) : \ 38 (IS_E1H_OFFSET ? (0x8000 + (port * 0x280) + (cpu_id * 0x28)) : \
39 (0x1400 + (port * 0x280) + (cpu_id * 0x28))) 39 (0x1400 + (port * 0x280) + (cpu_id * 0x28)))
40#define CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \ 40#define CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
41 (IS_E1H_OFFSET? (0x8008 + (port * 0x280) + (cpu_id * 0x28)) : \ 41 (IS_E1H_OFFSET ? (0x8008 + (port * 0x280) + (cpu_id * 0x28)) : \
42 (0x1408 + (port * 0x280) + (cpu_id * 0x28))) 42 (0x1408 + (port * 0x280) + (cpu_id * 0x28)))
43#define CSTORM_STATS_FLAGS_OFFSET(function) \ 43#define CSTORM_STATS_FLAGS_OFFSET(function) \
44 (IS_E1H_OFFSET? (0x1108 + (function * 0x8)) : (0x5108 + \ 44 (IS_E1H_OFFSET ? (0x1108 + (function * 0x8)) : (0x5108 + \
45 (function * 0x8))) 45 (function * 0x8)))
46#define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(function) \ 46#define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(function) \
47 (IS_E1H_OFFSET? (0x31c0 + (function * 0x20)) : 0xffffffff) 47 (IS_E1H_OFFSET ? (0x31c0 + (function * 0x20)) : 0xffffffff)
48#define TSTORM_ASSERT_LIST_INDEX_OFFSET \ 48#define TSTORM_ASSERT_LIST_INDEX_OFFSET \
49 (IS_E1H_OFFSET? 0xa000 : 0x1000) 49 (IS_E1H_OFFSET ? 0xa000 : 0x1000)
50#define TSTORM_ASSERT_LIST_OFFSET(idx) \ 50#define TSTORM_ASSERT_LIST_OFFSET(idx) \
51 (IS_E1H_OFFSET? (0xa020 + (idx * 0x10)) : (0x1020 + (idx * 0x10))) 51 (IS_E1H_OFFSET ? (0xa020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
52#define TSTORM_CLIENT_CONFIG_OFFSET(port, client_id) \ 52#define TSTORM_CLIENT_CONFIG_OFFSET(port, client_id) \
53 (IS_E1H_OFFSET? (0x3358 + (port * 0x3e8) + (client_id * 0x28)) : \ 53 (IS_E1H_OFFSET ? (0x3358 + (port * 0x3e8) + (client_id * 0x28)) \
54 (0x9c8 + (port * 0x2f8) + (client_id * 0x28))) 54 : (0x9c8 + (port * 0x2f8) + (client_id * 0x28)))
55#define TSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \ 55#define TSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
56 (IS_E1H_OFFSET? (0xb01a + ((function>>1) * 0x28) + ((function&1) \ 56 (IS_E1H_OFFSET ? (0xb01a + ((function>>1) * 0x28) + \
57 * 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \ 57 ((function&1) * 0xa0) + (index * 0x4)) : (0x141a + (function * \
58 0x4))) 58 0x28) + (index * 0x4)))
59#define TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \ 59#define TSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
60 (IS_E1H_OFFSET? (0xb000 + ((function>>1) * 0x28) + ((function&1) \ 60 (IS_E1H_OFFSET ? (0xb000 + ((function>>1) * 0x28) + \
61 * 0xa0)) : (0x1400 + (function * 0x28))) 61 ((function&1) * 0xa0)) : (0x1400 + (function * 0x28)))
62#define TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \ 62#define TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
63 (IS_E1H_OFFSET? (0xb008 + ((function>>1) * 0x28) + ((function&1) \ 63 (IS_E1H_OFFSET ? (0xb008 + ((function>>1) * 0x28) + \
64 * 0xa0)) : (0x1408 + (function * 0x28))) 64 ((function&1) * 0xa0)) : (0x1408 + (function * 0x28)))
65#define TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \ 65#define TSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
66 (IS_E1H_OFFSET? (0x2b80 + (function * 0x8)) : (0x4b68 + \ 66 (IS_E1H_OFFSET ? (0x2b80 + (function * 0x8)) : (0x4b68 + \
67 (function * 0x8))) 67 (function * 0x8)))
68#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(function) \ 68#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(function) \
69 (IS_E1H_OFFSET? (0x3000 + (function * 0x38)) : (0x1500 + \ 69 (IS_E1H_OFFSET ? (0x3000 + (function * 0x38)) : (0x1500 + \
70 (function * 0x38))) 70 (function * 0x38)))
71#define TSTORM_FUNCTION_MODE_OFFSET \ 71#define TSTORM_FUNCTION_MODE_OFFSET \
72 (IS_E1H_OFFSET? 0x1ad0 : 0xffffffff) 72 (IS_E1H_OFFSET ? 0x1ad0 : 0xffffffff)
73#define TSTORM_HC_BTR_OFFSET(port) \ 73#define TSTORM_HC_BTR_OFFSET(port) \
74 (IS_E1H_OFFSET? (0xb144 + (port * 0x30)) : (0x1454 + (port * 0x18))) 74 (IS_E1H_OFFSET ? (0xb144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
75#define TSTORM_INDIRECTION_TABLE_OFFSET(function) \ 75#define TSTORM_INDIRECTION_TABLE_OFFSET(function) \
76 (IS_E1H_OFFSET? (0x12c8 + (function * 0x80)) : (0x22c8 + \ 76 (IS_E1H_OFFSET ? (0x12c8 + (function * 0x80)) : (0x22c8 + \
77 (function * 0x80))) 77 (function * 0x80)))
78#define TSTORM_INDIRECTION_TABLE_SIZE 0x80 78#define TSTORM_INDIRECTION_TABLE_SIZE 0x80
79#define TSTORM_MAC_FILTER_CONFIG_OFFSET(function) \ 79#define TSTORM_MAC_FILTER_CONFIG_OFFSET(function) \
80 (IS_E1H_OFFSET? (0x3008 + (function * 0x38)) : (0x1508 + \ 80 (IS_E1H_OFFSET ? (0x3008 + (function * 0x38)) : (0x1508 + \
81 (function * 0x38))) 81 (function * 0x38)))
82#define TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \ 82#define TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \
83 (IS_E1H_OFFSET ? (0x2010 + (port * 0x5b0) + (stats_counter_id * \ 83 (IS_E1H_OFFSET ? (0x2010 + (port * 0x5b0) + (stats_counter_id * \
84 0x50)) : (0x4000 + (port * 0x3f0) + (stats_counter_id * 0x38))) 84 0x50)) : (0x4000 + (port * 0x3f0) + (stats_counter_id * 0x38)))
85#define TSTORM_RX_PRODS_OFFSET(port, client_id) \ 85#define TSTORM_RX_PRODS_OFFSET(port, client_id) \
86 (IS_E1H_OFFSET? (0x3350 + (port * 0x3e8) + (client_id * 0x28)) : \ 86 (IS_E1H_OFFSET ? (0x3350 + (port * 0x3e8) + (client_id * 0x28)) \
87 (0x9c0 + (port * 0x2f8) + (client_id * 0x28))) 87 : (0x9c0 + (port * 0x2f8) + (client_id * 0x28)))
88#define TSTORM_STATS_FLAGS_OFFSET(function) \ 88#define TSTORM_STATS_FLAGS_OFFSET(function) \
89 (IS_E1H_OFFSET? (0x2c00 + (function * 0x8)) : (0x4b88 + \ 89 (IS_E1H_OFFSET ? (0x2c00 + (function * 0x8)) : (0x4b88 + \
90 (function * 0x8))) 90 (function * 0x8)))
91#define TSTORM_TPA_EXIST_OFFSET (IS_E1H_OFFSET? 0x3b30 : 0x1c20) 91#define TSTORM_TPA_EXIST_OFFSET (IS_E1H_OFFSET ? 0x3b30 : 0x1c20)
92#define USTORM_AGG_DATA_OFFSET (IS_E1H_OFFSET? 0xa040 : 0x2c10) 92#define USTORM_AGG_DATA_OFFSET (IS_E1H_OFFSET ? 0xa040 : 0x2c10)
93#define USTORM_AGG_DATA_SIZE (IS_E1H_OFFSET? 0x2440 : 0x1200) 93#define USTORM_AGG_DATA_SIZE (IS_E1H_OFFSET ? 0x2440 : 0x1200)
94#define USTORM_ASSERT_LIST_INDEX_OFFSET \ 94#define USTORM_ASSERT_LIST_INDEX_OFFSET \
95 (IS_E1H_OFFSET? 0x8000 : 0x1000) 95 (IS_E1H_OFFSET ? 0x8000 : 0x1000)
96#define USTORM_ASSERT_LIST_OFFSET(idx) \ 96#define USTORM_ASSERT_LIST_OFFSET(idx) \
97 (IS_E1H_OFFSET? (0x8020 + (idx * 0x10)) : (0x1020 + (idx * 0x10))) 97 (IS_E1H_OFFSET ? (0x8020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
98#define USTORM_CQE_PAGE_BASE_OFFSET(port, clientId) \ 98#define USTORM_CQE_PAGE_BASE_OFFSET(port, clientId) \
99 (IS_E1H_OFFSET? (0x3298 + (port * 0x258) + (clientId * 0x18)) : \ 99 (IS_E1H_OFFSET ? (0x3298 + (port * 0x258) + (clientId * 0x18)) : \
100 (0x5450 + (port * 0x1c8) + (clientId * 0x18))) 100 (0x5450 + (port * 0x1c8) + (clientId * 0x18)))
101#define USTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \ 101#define USTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
102 (IS_E1H_OFFSET? (0x951a + ((function>>1) * 0x28) + ((function&1) \ 102 (IS_E1H_OFFSET ? (0x951a + ((function>>1) * 0x28) + \
103 * 0xa0) + (index * 0x4)) : (0x191a + (function * 0x28) + (index * \ 103 ((function&1) * 0xa0) + (index * 0x4)) : (0x191a + (function * \
104 0x4))) 104 0x28) + (index * 0x4)))
105#define USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \ 105#define USTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
106 (IS_E1H_OFFSET? (0x9500 + ((function>>1) * 0x28) + ((function&1) \ 106 (IS_E1H_OFFSET ? (0x9500 + ((function>>1) * 0x28) + \
107 * 0xa0)) : (0x1900 + (function * 0x28))) 107 ((function&1) * 0xa0)) : (0x1900 + (function * 0x28)))
108#define USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \ 108#define USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
109 (IS_E1H_OFFSET? (0x9508 + ((function>>1) * 0x28) + ((function&1) \ 109 (IS_E1H_OFFSET ? (0x9508 + ((function>>1) * 0x28) + \
110 * 0xa0)) : (0x1908 + (function * 0x28))) 110 ((function&1) * 0xa0)) : (0x1908 + (function * 0x28)))
111#define USTORM_FUNCTION_MODE_OFFSET \ 111#define USTORM_FUNCTION_MODE_OFFSET \
112 (IS_E1H_OFFSET? 0x2448 : 0xffffffff) 112 (IS_E1H_OFFSET ? 0x2448 : 0xffffffff)
113#define USTORM_HC_BTR_OFFSET(port) \ 113#define USTORM_HC_BTR_OFFSET(port) \
114 (IS_E1H_OFFSET? (0x9644 + (port * 0xd0)) : (0x1954 + (port * 0xb8))) 114 (IS_E1H_OFFSET ? (0x9644 + (port * 0xd0)) : (0x1954 + (port * 0xb8)))
115#define USTORM_MAX_AGG_SIZE_OFFSET(port, clientId) \ 115#define USTORM_MAX_AGG_SIZE_OFFSET(port, clientId) \
116 (IS_E1H_OFFSET? (0x3290 + (port * 0x258) + (clientId * 0x18)) : \ 116 (IS_E1H_OFFSET ? (0x3290 + (port * 0x258) + (clientId * 0x18)) : \
117 (0x5448 + (port * 0x1c8) + (clientId * 0x18))) 117 (0x5448 + (port * 0x1c8) + (clientId * 0x18)))
118#define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(function) \ 118#define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(function) \
119 (IS_E1H_OFFSET? (0x2408 + (function * 0x8)) : (0x5408 + \ 119 (IS_E1H_OFFSET ? (0x2408 + (function * 0x8)) : (0x5408 + \
120 (function * 0x8))) 120 (function * 0x8)))
121#define USTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \ 121#define USTORM_SB_HC_DISABLE_OFFSET(port, cpu_id, index) \
122 (IS_E1H_OFFSET? (0x901a + (port * 0x280) + (cpu_id * 0x28) + \ 122 (IS_E1H_OFFSET ? (0x901a + (port * 0x280) + (cpu_id * 0x28) + \
123 (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \ 123 (index * 0x4)) : (0x141a + (port * 0x280) + (cpu_id * 0x28) + \
124 (index * 0x4))) 124 (index * 0x4)))
125#define USTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \ 125#define USTORM_SB_HC_TIMEOUT_OFFSET(port, cpu_id, index) \
126 (IS_E1H_OFFSET? (0x9018 + (port * 0x280) + (cpu_id * 0x28) + \ 126 (IS_E1H_OFFSET ? (0x9018 + (port * 0x280) + (cpu_id * 0x28) + \
127 (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \ 127 (index * 0x4)) : (0x1418 + (port * 0x280) + (cpu_id * 0x28) + \
128 (index * 0x4))) 128 (index * 0x4)))
129#define USTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \ 129#define USTORM_SB_HOST_SB_ADDR_OFFSET(port, cpu_id) \
130 (IS_E1H_OFFSET? (0x9000 + (port * 0x280) + (cpu_id * 0x28)) : \ 130 (IS_E1H_OFFSET ? (0x9000 + (port * 0x280) + (cpu_id * 0x28)) : \
131 (0x1400 + (port * 0x280) + (cpu_id * 0x28))) 131 (0x1400 + (port * 0x280) + (cpu_id * 0x28)))
132#define USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \ 132#define USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, cpu_id) \
133 (IS_E1H_OFFSET? (0x9008 + (port * 0x280) + (cpu_id * 0x28)) : \ 133 (IS_E1H_OFFSET ? (0x9008 + (port * 0x280) + (cpu_id * 0x28)) : \
134 (0x1408 + (port * 0x280) + (cpu_id * 0x28))) 134 (0x1408 + (port * 0x280) + (cpu_id * 0x28)))
135#define XSTORM_ASSERT_LIST_INDEX_OFFSET \ 135#define XSTORM_ASSERT_LIST_INDEX_OFFSET \
136 (IS_E1H_OFFSET? 0x9000 : 0x1000) 136 (IS_E1H_OFFSET ? 0x9000 : 0x1000)
137#define XSTORM_ASSERT_LIST_OFFSET(idx) \ 137#define XSTORM_ASSERT_LIST_OFFSET(idx) \
138 (IS_E1H_OFFSET? (0x9020 + (idx * 0x10)) : (0x1020 + (idx * 0x10))) 138 (IS_E1H_OFFSET ? (0x9020 + (idx * 0x10)) : (0x1020 + (idx * 0x10)))
139#define XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) \ 139#define XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) \
140 (IS_E1H_OFFSET? (0x24a8 + (port * 0x40)) : (0x3ba0 + (port * 0x40))) 140 (IS_E1H_OFFSET ? (0x24a8 + (port * 0x40)) : (0x3ba0 + (port * 0x40)))
141#define XSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \ 141#define XSTORM_DEF_SB_HC_DISABLE_OFFSET(function, index) \
142 (IS_E1H_OFFSET? (0xa01a + ((function>>1) * 0x28) + ((function&1) \ 142 (IS_E1H_OFFSET ? (0xa01a + ((function>>1) * 0x28) + \
143 * 0xa0) + (index * 0x4)) : (0x141a + (function * 0x28) + (index * \ 143 ((function&1) * 0xa0) + (index * 0x4)) : (0x141a + (function * \
144 0x4))) 144 0x28) + (index * 0x4)))
145#define XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \ 145#define XSTORM_DEF_SB_HOST_SB_ADDR_OFFSET(function) \
146 (IS_E1H_OFFSET? (0xa000 + ((function>>1) * 0x28) + ((function&1) \ 146 (IS_E1H_OFFSET ? (0xa000 + ((function>>1) * 0x28) + \
147 * 0xa0)) : (0x1400 + (function * 0x28))) 147 ((function&1) * 0xa0)) : (0x1400 + (function * 0x28)))
148#define XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \ 148#define XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(function) \
149 (IS_E1H_OFFSET? (0xa008 + ((function>>1) * 0x28) + ((function&1) \ 149 (IS_E1H_OFFSET ? (0xa008 + ((function>>1) * 0x28) + \
150 * 0xa0)) : (0x1408 + (function * 0x28))) 150 ((function&1) * 0xa0)) : (0x1408 + (function * 0x28)))
151#define XSTORM_E1HOV_OFFSET(function) \ 151#define XSTORM_E1HOV_OFFSET(function) \
152 (IS_E1H_OFFSET? (0x2ab8 + (function * 0x2)) : 0xffffffff) 152 (IS_E1H_OFFSET ? (0x2ab8 + (function * 0x2)) : 0xffffffff)
153#define XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \ 153#define XSTORM_ETH_STATS_QUERY_ADDR_OFFSET(function) \
154 (IS_E1H_OFFSET? (0x2418 + (function * 0x8)) : (0x3b70 + \ 154 (IS_E1H_OFFSET ? (0x2418 + (function * 0x8)) : (0x3b70 + \
155 (function * 0x8))) 155 (function * 0x8)))
156#define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(function) \ 156#define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(function) \
157 (IS_E1H_OFFSET? (0x2568 + (function * 0x70)) : (0x3c60 + \ 157 (IS_E1H_OFFSET ? (0x2568 + (function * 0x70)) : (0x3c60 + \
158 (function * 0x70))) 158 (function * 0x70)))
159#define XSTORM_FUNCTION_MODE_OFFSET \ 159#define XSTORM_FUNCTION_MODE_OFFSET \
160 (IS_E1H_OFFSET? 0x2ac8 : 0xffffffff) 160 (IS_E1H_OFFSET ? 0x2ac8 : 0xffffffff)
161#define XSTORM_HC_BTR_OFFSET(port) \ 161#define XSTORM_HC_BTR_OFFSET(port) \
162 (IS_E1H_OFFSET? (0xa144 + (port * 0x30)) : (0x1454 + (port * 0x18))) 162 (IS_E1H_OFFSET ? (0xa144 + (port * 0x30)) : (0x1454 + (port * 0x18)))
163#define XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \ 163#define XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, stats_counter_id) \
164 (IS_E1H_OFFSET ? (0xc000 + (port * 0x3f0) + (stats_counter_id * \ 164 (IS_E1H_OFFSET ? (0xc000 + (port * 0x3f0) + (stats_counter_id * \
165 0x38)) : (0x3378 + (port * 0x3f0) + (stats_counter_id * 0x38))) 165 0x38)) : (0x3378 + (port * 0x3f0) + (stats_counter_id * 0x38)))
166#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(function) \ 166#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(function) \
167 (IS_E1H_OFFSET? (0x2528 + (function * 0x70)) : (0x3c20 + \ 167 (IS_E1H_OFFSET ? (0x2528 + (function * 0x70)) : (0x3c20 + \
168 (function * 0x70))) 168 (function * 0x70)))
169#define XSTORM_SPQ_PAGE_BASE_OFFSET(function) \ 169#define XSTORM_SPQ_PAGE_BASE_OFFSET(function) \
170 (IS_E1H_OFFSET? (0x2000 + (function * 0x10)) : (0x3328 + \ 170 (IS_E1H_OFFSET ? (0x2000 + (function * 0x10)) : (0x3328 + \
171 (function * 0x10))) 171 (function * 0x10)))
172#define XSTORM_SPQ_PROD_OFFSET(function) \ 172#define XSTORM_SPQ_PROD_OFFSET(function) \
173 (IS_E1H_OFFSET? (0x2008 + (function * 0x10)) : (0x3330 + \ 173 (IS_E1H_OFFSET ? (0x2008 + (function * 0x10)) : (0x3330 + \
174 (function * 0x10))) 174 (function * 0x10)))
175#define XSTORM_STATS_FLAGS_OFFSET(function) \ 175#define XSTORM_STATS_FLAGS_OFFSET(function) \
176 (IS_E1H_OFFSET? (0x23d8 + (function * 0x8)) : (0x3b60 + \ 176 (IS_E1H_OFFSET ? (0x23d8 + (function * 0x8)) : (0x3b60 + \
177 (function * 0x8))) 177 (function * 0x8)))
178#define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0 178#define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0
179 179