diff options
Diffstat (limited to 'drivers/net/bnx2x')
-rw-r--r-- | drivers/net/bnx2x/bnx2x.h | 30 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_cmn.c | 65 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_cmn.h | 20 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_ethtool.c | 25 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_init.h | 2 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_link.c | 65 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_main.c | 77 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_stats.c | 4 |
8 files changed, 171 insertions, 117 deletions
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 8e4183717d91..7897d114b290 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * (you will need to reboot afterwards) */ | 22 | * (you will need to reboot afterwards) */ |
23 | /* #define BNX2X_STOP_ON_ERROR */ | 23 | /* #define BNX2X_STOP_ON_ERROR */ |
24 | 24 | ||
25 | #define DRV_MODULE_VERSION "1.62.00-4" | 25 | #define DRV_MODULE_VERSION "1.62.00-6" |
26 | #define DRV_MODULE_RELDATE "2011/01/18" | 26 | #define DRV_MODULE_RELDATE "2011/01/30" |
27 | #define BNX2X_BC_VER 0x040200 | 27 | #define BNX2X_BC_VER 0x040200 |
28 | 28 | ||
29 | #define BNX2X_MULTI_QUEUE | 29 | #define BNX2X_MULTI_QUEUE |
@@ -1613,19 +1613,23 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1613 | #define BNX2X_BTR 4 | 1613 | #define BNX2X_BTR 4 |
1614 | #define MAX_SPQ_PENDING 8 | 1614 | #define MAX_SPQ_PENDING 8 |
1615 | 1615 | ||
1616 | 1616 | /* CMNG constants, as derived from system spec calculations */ | |
1617 | /* CMNG constants | 1617 | /* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */ |
1618 | derived from lab experiments, and not from system spec calculations !!! */ | 1618 | #define DEF_MIN_RATE 100 |
1619 | #define DEF_MIN_RATE 100 | ||
1620 | /* resolution of the rate shaping timer - 100 usec */ | 1619 | /* resolution of the rate shaping timer - 100 usec */ |
1621 | #define RS_PERIODIC_TIMEOUT_USEC 100 | 1620 | #define RS_PERIODIC_TIMEOUT_USEC 100 |
1622 | /* resolution of fairness algorithm in usecs - | ||
1623 | coefficient for calculating the actual t fair */ | ||
1624 | #define T_FAIR_COEF 10000000 | ||
1625 | /* number of bytes in single QM arbitration cycle - | 1621 | /* number of bytes in single QM arbitration cycle - |
1626 | coefficient for calculating the fairness timer */ | 1622 | * coefficient for calculating the fairness timer */ |
1627 | #define QM_ARB_BYTES 40000 | 1623 | #define QM_ARB_BYTES 160000 |
1628 | #define FAIR_MEM 2 | 1624 | /* resolution of Min algorithm 1:100 */ |
1625 | #define MIN_RES 100 | ||
1626 | /* how many bytes above threshold for the minimal credit of Min algorithm*/ | ||
1627 | #define MIN_ABOVE_THRESH 32768 | ||
1628 | /* Fairness algorithm integration time coefficient - | ||
1629 | * for calculating the actual Tfair */ | ||
1630 | #define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES) | ||
1631 | /* Memory of fairness algorithm . 2 cycles */ | ||
1632 | #define FAIR_MEM 2 | ||
1629 | 1633 | ||
1630 | 1634 | ||
1631 | #define ATTN_NIG_FOR_FUNC (1L << 8) | 1635 | #define ATTN_NIG_FOR_FUNC (1L << 8) |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c index 710ce5d04c53..93798129061b 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.c +++ b/drivers/net/bnx2x/bnx2x_cmn.c | |||
@@ -259,10 +259,44 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, | |||
259 | #endif | 259 | #endif |
260 | } | 260 | } |
261 | 261 | ||
262 | /* Timestamp option length allowed for TPA aggregation: | ||
263 | * | ||
264 | * nop nop kind length echo val | ||
265 | */ | ||
266 | #define TPA_TSTAMP_OPT_LEN 12 | ||
267 | /** | ||
268 | * Calculate the approximate value of the MSS for this | ||
269 | * aggregation using the first packet of it. | ||
270 | * | ||
271 | * @param bp | ||
272 | * @param parsing_flags Parsing flags from the START CQE | ||
273 | * @param len_on_bd Total length of the first packet for the | ||
274 | * aggregation. | ||
275 | */ | ||
276 | static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags, | ||
277 | u16 len_on_bd) | ||
278 | { | ||
279 | /* TPA arrgregation won't have an IP options and TCP options | ||
280 | * other than timestamp. | ||
281 | */ | ||
282 | u16 hdrs_len = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct tcphdr); | ||
283 | |||
284 | |||
285 | /* Check if there was a TCP timestamp, if there is it's will | ||
286 | * always be 12 bytes length: nop nop kind length echo val. | ||
287 | * | ||
288 | * Otherwise FW would close the aggregation. | ||
289 | */ | ||
290 | if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG) | ||
291 | hdrs_len += TPA_TSTAMP_OPT_LEN; | ||
292 | |||
293 | return len_on_bd - hdrs_len; | ||
294 | } | ||
295 | |||
262 | static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, | 296 | static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, |
263 | struct sk_buff *skb, | 297 | struct sk_buff *skb, |
264 | struct eth_fast_path_rx_cqe *fp_cqe, | 298 | struct eth_fast_path_rx_cqe *fp_cqe, |
265 | u16 cqe_idx) | 299 | u16 cqe_idx, u16 parsing_flags) |
266 | { | 300 | { |
267 | struct sw_rx_page *rx_pg, old_rx_pg; | 301 | struct sw_rx_page *rx_pg, old_rx_pg; |
268 | u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); | 302 | u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); |
@@ -275,8 +309,8 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
275 | 309 | ||
276 | /* This is needed in order to enable forwarding support */ | 310 | /* This is needed in order to enable forwarding support */ |
277 | if (frag_size) | 311 | if (frag_size) |
278 | skb_shinfo(skb)->gso_size = min((u32)SGE_PAGE_SIZE, | 312 | skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, parsing_flags, |
279 | max(frag_size, (u32)len_on_bd)); | 313 | len_on_bd); |
280 | 314 | ||
281 | #ifdef BNX2X_STOP_ON_ERROR | 315 | #ifdef BNX2X_STOP_ON_ERROR |
282 | if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { | 316 | if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { |
@@ -344,6 +378,8 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
344 | if (likely(new_skb)) { | 378 | if (likely(new_skb)) { |
345 | /* fix ip xsum and give it to the stack */ | 379 | /* fix ip xsum and give it to the stack */ |
346 | /* (no need to map the new skb) */ | 380 | /* (no need to map the new skb) */ |
381 | u16 parsing_flags = | ||
382 | le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags); | ||
347 | 383 | ||
348 | prefetch(skb); | 384 | prefetch(skb); |
349 | prefetch(((char *)(skb)) + L1_CACHE_BYTES); | 385 | prefetch(((char *)(skb)) + L1_CACHE_BYTES); |
@@ -373,9 +409,9 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
373 | } | 409 | } |
374 | 410 | ||
375 | if (!bnx2x_fill_frag_skb(bp, fp, skb, | 411 | if (!bnx2x_fill_frag_skb(bp, fp, skb, |
376 | &cqe->fast_path_cqe, cqe_idx)) { | 412 | &cqe->fast_path_cqe, cqe_idx, |
377 | if ((le16_to_cpu(cqe->fast_path_cqe. | 413 | parsing_flags)) { |
378 | pars_flags.flags) & PARSING_FLAGS_VLAN)) | 414 | if (parsing_flags & PARSING_FLAGS_VLAN) |
379 | __vlan_hwaccel_put_tag(skb, | 415 | __vlan_hwaccel_put_tag(skb, |
380 | le16_to_cpu(cqe->fast_path_cqe. | 416 | le16_to_cpu(cqe->fast_path_cqe. |
381 | vlan_tag)); | 417 | vlan_tag)); |
@@ -703,19 +739,20 @@ u16 bnx2x_get_mf_speed(struct bnx2x *bp) | |||
703 | { | 739 | { |
704 | u16 line_speed = bp->link_vars.line_speed; | 740 | u16 line_speed = bp->link_vars.line_speed; |
705 | if (IS_MF(bp)) { | 741 | if (IS_MF(bp)) { |
706 | u16 maxCfg = (bp->mf_config[BP_VN(bp)] & | 742 | u16 maxCfg = bnx2x_extract_max_cfg(bp, |
707 | FUNC_MF_CFG_MAX_BW_MASK) >> | 743 | bp->mf_config[BP_VN(bp)]); |
708 | FUNC_MF_CFG_MAX_BW_SHIFT; | 744 | |
709 | /* Calculate the current MAX line speed limit for the DCC | 745 | /* Calculate the current MAX line speed limit for the MF |
710 | * capable devices | 746 | * devices |
711 | */ | 747 | */ |
712 | if (IS_MF_SD(bp)) { | 748 | if (IS_MF_SI(bp)) |
749 | line_speed = (line_speed * maxCfg) / 100; | ||
750 | else { /* SD mode */ | ||
713 | u16 vn_max_rate = maxCfg * 100; | 751 | u16 vn_max_rate = maxCfg * 100; |
714 | 752 | ||
715 | if (vn_max_rate < line_speed) | 753 | if (vn_max_rate < line_speed) |
716 | line_speed = vn_max_rate; | 754 | line_speed = vn_max_rate; |
717 | } else /* IS_MF_SI(bp)) */ | 755 | } |
718 | line_speed = (line_speed * maxCfg) / 100; | ||
719 | } | 756 | } |
720 | 757 | ||
721 | return line_speed; | 758 | return line_speed; |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.h b/drivers/net/bnx2x/bnx2x_cmn.h index 03eb4d68e6bb..326ba44b3ded 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.h +++ b/drivers/net/bnx2x/bnx2x_cmn.h | |||
@@ -1044,4 +1044,24 @@ static inline void storm_memset_cmng(struct bnx2x *bp, | |||
1044 | void bnx2x_acquire_phy_lock(struct bnx2x *bp); | 1044 | void bnx2x_acquire_phy_lock(struct bnx2x *bp); |
1045 | void bnx2x_release_phy_lock(struct bnx2x *bp); | 1045 | void bnx2x_release_phy_lock(struct bnx2x *bp); |
1046 | 1046 | ||
1047 | /** | ||
1048 | * Extracts MAX BW part from MF configuration. | ||
1049 | * | ||
1050 | * @param bp | ||
1051 | * @param mf_cfg | ||
1052 | * | ||
1053 | * @return u16 | ||
1054 | */ | ||
1055 | static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) | ||
1056 | { | ||
1057 | u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> | ||
1058 | FUNC_MF_CFG_MAX_BW_SHIFT; | ||
1059 | if (!max_cfg) { | ||
1060 | BNX2X_ERR("Illegal configuration detected for Max BW - " | ||
1061 | "using 100 instead\n"); | ||
1062 | max_cfg = 100; | ||
1063 | } | ||
1064 | return max_cfg; | ||
1065 | } | ||
1066 | |||
1047 | #endif /* BNX2X_CMN_H */ | 1067 | #endif /* BNX2X_CMN_H */ |
diff --git a/drivers/net/bnx2x/bnx2x_ethtool.c b/drivers/net/bnx2x/bnx2x_ethtool.c index 5b44a8b48509..ef2919987a10 100644 --- a/drivers/net/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/bnx2x/bnx2x_ethtool.c | |||
@@ -238,7 +238,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
238 | speed |= (cmd->speed_hi << 16); | 238 | speed |= (cmd->speed_hi << 16); |
239 | 239 | ||
240 | if (IS_MF_SI(bp)) { | 240 | if (IS_MF_SI(bp)) { |
241 | u32 param = 0; | 241 | u32 param = 0, part; |
242 | u32 line_speed = bp->link_vars.line_speed; | 242 | u32 line_speed = bp->link_vars.line_speed; |
243 | 243 | ||
244 | /* use 10G if no link detected */ | 244 | /* use 10G if no link detected */ |
@@ -251,9 +251,11 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
251 | REQ_BC_VER_4_SET_MF_BW); | 251 | REQ_BC_VER_4_SET_MF_BW); |
252 | return -EINVAL; | 252 | return -EINVAL; |
253 | } | 253 | } |
254 | if (line_speed < speed) { | 254 | part = (speed * 100) / line_speed; |
255 | BNX2X_DEV_INFO("New speed should be less or equal " | 255 | if (line_speed < speed || !part) { |
256 | "to actual line speed\n"); | 256 | BNX2X_DEV_INFO("Speed setting should be in a range " |
257 | "from 1%% to 100%% " | ||
258 | "of actual line speed\n"); | ||
257 | return -EINVAL; | 259 | return -EINVAL; |
258 | } | 260 | } |
259 | /* load old values */ | 261 | /* load old values */ |
@@ -263,8 +265,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
263 | param &= FUNC_MF_CFG_MIN_BW_MASK; | 265 | param &= FUNC_MF_CFG_MIN_BW_MASK; |
264 | 266 | ||
265 | /* set new MAX value */ | 267 | /* set new MAX value */ |
266 | param |= (((speed * 100) / line_speed) | 268 | param |= (part << FUNC_MF_CFG_MAX_BW_SHIFT) |
267 | << FUNC_MF_CFG_MAX_BW_SHIFT) | ||
268 | & FUNC_MF_CFG_MAX_BW_MASK; | 269 | & FUNC_MF_CFG_MAX_BW_MASK; |
269 | 270 | ||
270 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param); | 271 | bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param); |
@@ -1781,9 +1782,7 @@ static int bnx2x_test_nvram(struct bnx2x *bp) | |||
1781 | { 0x100, 0x350 }, /* manuf_info */ | 1782 | { 0x100, 0x350 }, /* manuf_info */ |
1782 | { 0x450, 0xf0 }, /* feature_info */ | 1783 | { 0x450, 0xf0 }, /* feature_info */ |
1783 | { 0x640, 0x64 }, /* upgrade_key_info */ | 1784 | { 0x640, 0x64 }, /* upgrade_key_info */ |
1784 | { 0x6a4, 0x64 }, | ||
1785 | { 0x708, 0x70 }, /* manuf_key_info */ | 1785 | { 0x708, 0x70 }, /* manuf_key_info */ |
1786 | { 0x778, 0x70 }, | ||
1787 | { 0, 0 } | 1786 | { 0, 0 } |
1788 | }; | 1787 | }; |
1789 | __be32 buf[0x350 / 4]; | 1788 | __be32 buf[0x350 / 4]; |
@@ -1933,11 +1932,11 @@ static void bnx2x_self_test(struct net_device *dev, | |||
1933 | buf[4] = 1; | 1932 | buf[4] = 1; |
1934 | etest->flags |= ETH_TEST_FL_FAILED; | 1933 | etest->flags |= ETH_TEST_FL_FAILED; |
1935 | } | 1934 | } |
1936 | if (bp->port.pmf) | 1935 | |
1937 | if (bnx2x_link_test(bp, is_serdes) != 0) { | 1936 | if (bnx2x_link_test(bp, is_serdes) != 0) { |
1938 | buf[5] = 1; | 1937 | buf[5] = 1; |
1939 | etest->flags |= ETH_TEST_FL_FAILED; | 1938 | etest->flags |= ETH_TEST_FL_FAILED; |
1940 | } | 1939 | } |
1941 | 1940 | ||
1942 | #ifdef BNX2X_EXTRA_DEBUG | 1941 | #ifdef BNX2X_EXTRA_DEBUG |
1943 | bnx2x_panic_dump(bp); | 1942 | bnx2x_panic_dump(bp); |
diff --git a/drivers/net/bnx2x/bnx2x_init.h b/drivers/net/bnx2x/bnx2x_init.h index 5a268e9a0895..fa6dbe3f2058 100644 --- a/drivers/net/bnx2x/bnx2x_init.h +++ b/drivers/net/bnx2x/bnx2x_init.h | |||
@@ -241,7 +241,7 @@ static const struct { | |||
241 | /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't | 241 | /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't |
242 | * want to handle "system kill" flow at the moment. | 242 | * want to handle "system kill" flow at the moment. |
243 | */ | 243 | */ |
244 | BLOCK_PRTY_INFO(PXP, 0x3ffffff, 0x3ffffff, 0x3ffffff, 0x3ffffff), | 244 | BLOCK_PRTY_INFO(PXP, 0x7ffffff, 0x3ffffff, 0x3ffffff, 0x7ffffff), |
245 | BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), | 245 | BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff), |
246 | BLOCK_PRTY_INFO_1(PXP2, 0x7ff, 0x7f, 0x7f, 0x7ff), | 246 | BLOCK_PRTY_INFO_1(PXP2, 0x7ff, 0x7f, 0x7f, 0x7ff), |
247 | BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0), | 247 | BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0), |
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c index 7160ec51093e..dd1210fddfff 100644 --- a/drivers/net/bnx2x/bnx2x_link.c +++ b/drivers/net/bnx2x/bnx2x_link.c | |||
@@ -3948,48 +3948,6 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, | |||
3948 | return rc; | 3948 | return rc; |
3949 | } | 3949 | } |
3950 | 3950 | ||
3951 | static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp, | ||
3952 | struct bnx2x_phy *phy) | ||
3953 | { | ||
3954 | u16 val; | ||
3955 | bnx2x_cl45_read(bp, phy, | ||
3956 | MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, &val); | ||
3957 | |||
3958 | if (val == 0) { | ||
3959 | /* Mustn't set low power mode in 8073 A0 */ | ||
3960 | return; | ||
3961 | } | ||
3962 | |||
3963 | /* Disable PLL sequencer (use read-modify-write to clear bit 13) */ | ||
3964 | bnx2x_cl45_read(bp, phy, | ||
3965 | MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); | ||
3966 | val &= ~(1<<13); | ||
3967 | bnx2x_cl45_write(bp, phy, | ||
3968 | MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); | ||
3969 | |||
3970 | /* PLL controls */ | ||
3971 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805E, 0x1077); | ||
3972 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805D, 0x0000); | ||
3973 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805C, 0x030B); | ||
3974 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805B, 0x1240); | ||
3975 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805A, 0x2490); | ||
3976 | |||
3977 | /* Tx Controls */ | ||
3978 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A7, 0x0C74); | ||
3979 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A6, 0x9041); | ||
3980 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A5, 0x4640); | ||
3981 | |||
3982 | /* Rx Controls */ | ||
3983 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FE, 0x01C4); | ||
3984 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FD, 0x9249); | ||
3985 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FC, 0x2015); | ||
3986 | |||
3987 | /* Enable PLL sequencer (use read-modify-write to set bit 13) */ | ||
3988 | bnx2x_cl45_read(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); | ||
3989 | val |= (1<<13); | ||
3990 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); | ||
3991 | } | ||
3992 | |||
3993 | /******************************************************************/ | 3951 | /******************************************************************/ |
3994 | /* BCM8073 PHY SECTION */ | 3952 | /* BCM8073 PHY SECTION */ |
3995 | /******************************************************************/ | 3953 | /******************************************************************/ |
@@ -4148,8 +4106,6 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, | |||
4148 | 4106 | ||
4149 | bnx2x_8073_set_pause_cl37(params, phy, vars); | 4107 | bnx2x_8073_set_pause_cl37(params, phy, vars); |
4150 | 4108 | ||
4151 | bnx2x_8073_set_xaui_low_power_mode(bp, phy); | ||
4152 | |||
4153 | bnx2x_cl45_read(bp, phy, | 4109 | bnx2x_cl45_read(bp, phy, |
4154 | MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); | 4110 | MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); |
4155 | 4111 | ||
@@ -6519,6 +6475,18 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, | |||
6519 | MDIO_PMA_DEVAD, | 6475 | MDIO_PMA_DEVAD, |
6520 | MDIO_PMA_REG_8481_LED1_MASK, | 6476 | MDIO_PMA_REG_8481_LED1_MASK, |
6521 | 0x80); | 6477 | 0x80); |
6478 | |||
6479 | /* Tell LED3 to blink on source */ | ||
6480 | bnx2x_cl45_read(bp, phy, | ||
6481 | MDIO_PMA_DEVAD, | ||
6482 | MDIO_PMA_REG_8481_LINK_SIGNAL, | ||
6483 | &val); | ||
6484 | val &= ~(7<<6); | ||
6485 | val |= (1<<6); /* A83B[8:6]= 1 */ | ||
6486 | bnx2x_cl45_write(bp, phy, | ||
6487 | MDIO_PMA_DEVAD, | ||
6488 | MDIO_PMA_REG_8481_LINK_SIGNAL, | ||
6489 | val); | ||
6522 | } | 6490 | } |
6523 | break; | 6491 | break; |
6524 | } | 6492 | } |
@@ -7720,10 +7688,13 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, | |||
7720 | struct bnx2x_phy phy[PORT_MAX]; | 7688 | struct bnx2x_phy phy[PORT_MAX]; |
7721 | struct bnx2x_phy *phy_blk[PORT_MAX]; | 7689 | struct bnx2x_phy *phy_blk[PORT_MAX]; |
7722 | u16 val; | 7690 | u16 val; |
7723 | s8 port; | 7691 | s8 port = 0; |
7724 | s8 port_of_path = 0; | 7692 | s8 port_of_path = 0; |
7725 | 7693 | u32 swap_val, swap_override; | |
7726 | bnx2x_ext_phy_hw_reset(bp, 0); | 7694 | swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); |
7695 | swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); | ||
7696 | port ^= (swap_val && swap_override); | ||
7697 | bnx2x_ext_phy_hw_reset(bp, port); | ||
7727 | /* PART1 - Reset both phys */ | 7698 | /* PART1 - Reset both phys */ |
7728 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { | 7699 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { |
7729 | u32 shmem_base, shmem2_base; | 7700 | u32 shmem_base, shmem2_base; |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index 8cdcf5b39d1e..032ae184b605 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -1974,13 +1974,22 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) | |||
1974 | vn_max_rate = 0; | 1974 | vn_max_rate = 0; |
1975 | 1975 | ||
1976 | } else { | 1976 | } else { |
1977 | u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg); | ||
1978 | |||
1977 | vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> | 1979 | vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> |
1978 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; | 1980 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; |
1979 | /* If min rate is zero - set it to 1 */ | 1981 | /* If fairness is enabled (not all min rates are zeroes) and |
1982 | if current min rate is zero - set it to 1. | ||
1983 | This is a requirement of the algorithm. */ | ||
1980 | if (bp->vn_weight_sum && (vn_min_rate == 0)) | 1984 | if (bp->vn_weight_sum && (vn_min_rate == 0)) |
1981 | vn_min_rate = DEF_MIN_RATE; | 1985 | vn_min_rate = DEF_MIN_RATE; |
1982 | vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> | 1986 | |
1983 | FUNC_MF_CFG_MAX_BW_SHIFT) * 100; | 1987 | if (IS_MF_SI(bp)) |
1988 | /* maxCfg in percents of linkspeed */ | ||
1989 | vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100; | ||
1990 | else | ||
1991 | /* maxCfg is absolute in 100Mb units */ | ||
1992 | vn_max_rate = maxCfg * 100; | ||
1984 | } | 1993 | } |
1985 | 1994 | ||
1986 | DP(NETIF_MSG_IFUP, | 1995 | DP(NETIF_MSG_IFUP, |
@@ -2006,7 +2015,8 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) | |||
2006 | m_fair_vn.vn_credit_delta = | 2015 | m_fair_vn.vn_credit_delta = |
2007 | max_t(u32, (vn_min_rate * (T_FAIR_COEF / | 2016 | max_t(u32, (vn_min_rate * (T_FAIR_COEF / |
2008 | (8 * bp->vn_weight_sum))), | 2017 | (8 * bp->vn_weight_sum))), |
2009 | (bp->cmng.fair_vars.fair_threshold * 2)); | 2018 | (bp->cmng.fair_vars.fair_threshold + |
2019 | MIN_ABOVE_THRESH)); | ||
2010 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", | 2020 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", |
2011 | m_fair_vn.vn_credit_delta); | 2021 | m_fair_vn.vn_credit_delta); |
2012 | } | 2022 | } |
@@ -2301,15 +2311,10 @@ static void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) | |||
2301 | /* accept matched ucast */ | 2311 | /* accept matched ucast */ |
2302 | drop_all_ucast = 0; | 2312 | drop_all_ucast = 0; |
2303 | } | 2313 | } |
2304 | if (filters & BNX2X_ACCEPT_MULTICAST) { | 2314 | if (filters & BNX2X_ACCEPT_MULTICAST) |
2305 | /* accept matched mcast */ | 2315 | /* accept matched mcast */ |
2306 | drop_all_mcast = 0; | 2316 | drop_all_mcast = 0; |
2307 | if (IS_MF_SI(bp)) | 2317 | |
2308 | /* since mcast addresses won't arrive with ovlan, | ||
2309 | * fw needs to accept all of them in | ||
2310 | * switch-independent mode */ | ||
2311 | accp_all_mcast = 1; | ||
2312 | } | ||
2313 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { | 2318 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { |
2314 | /* accept all mcast */ | 2319 | /* accept all mcast */ |
2315 | drop_all_ucast = 0; | 2320 | drop_all_ucast = 0; |
@@ -4281,9 +4286,12 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4281 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4286 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4282 | BNX2X_ACCEPT_MULTICAST; | 4287 | BNX2X_ACCEPT_MULTICAST; |
4283 | #ifdef BCM_CNIC | 4288 | #ifdef BCM_CNIC |
4284 | cl_id = bnx2x_fcoe(bp, cl_id); | 4289 | if (!NO_FCOE(bp)) { |
4285 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4290 | cl_id = bnx2x_fcoe(bp, cl_id); |
4286 | BNX2X_ACCEPT_MULTICAST); | 4291 | bnx2x_rxq_set_mac_filters(bp, cl_id, |
4292 | BNX2X_ACCEPT_UNICAST | | ||
4293 | BNX2X_ACCEPT_MULTICAST); | ||
4294 | } | ||
4287 | #endif | 4295 | #endif |
4288 | break; | 4296 | break; |
4289 | 4297 | ||
@@ -4291,18 +4299,29 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4291 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4299 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4292 | BNX2X_ACCEPT_ALL_MULTICAST; | 4300 | BNX2X_ACCEPT_ALL_MULTICAST; |
4293 | #ifdef BCM_CNIC | 4301 | #ifdef BCM_CNIC |
4294 | cl_id = bnx2x_fcoe(bp, cl_id); | 4302 | /* |
4295 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4303 | * Prevent duplication of multicast packets by configuring FCoE |
4296 | BNX2X_ACCEPT_MULTICAST); | 4304 | * L2 Client to receive only matched unicast frames. |
4305 | */ | ||
4306 | if (!NO_FCOE(bp)) { | ||
4307 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4308 | bnx2x_rxq_set_mac_filters(bp, cl_id, | ||
4309 | BNX2X_ACCEPT_UNICAST); | ||
4310 | } | ||
4297 | #endif | 4311 | #endif |
4298 | break; | 4312 | break; |
4299 | 4313 | ||
4300 | case BNX2X_RX_MODE_PROMISC: | 4314 | case BNX2X_RX_MODE_PROMISC: |
4301 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; | 4315 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; |
4302 | #ifdef BCM_CNIC | 4316 | #ifdef BCM_CNIC |
4303 | cl_id = bnx2x_fcoe(bp, cl_id); | 4317 | /* |
4304 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4318 | * Prevent packets duplication by configuring DROP_ALL for FCoE |
4305 | BNX2X_ACCEPT_MULTICAST); | 4319 | * L2 Client. |
4320 | */ | ||
4321 | if (!NO_FCOE(bp)) { | ||
4322 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4323 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_NONE); | ||
4324 | } | ||
4306 | #endif | 4325 | #endif |
4307 | /* pass management unicast packets as well */ | 4326 | /* pass management unicast packets as well */ |
4308 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; | 4327 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; |
@@ -5296,10 +5315,6 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) | |||
5296 | } | 5315 | } |
5297 | } | 5316 | } |
5298 | 5317 | ||
5299 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5300 | bp->common.shmem_base, | ||
5301 | bp->common.shmem2_base); | ||
5302 | |||
5303 | bnx2x_setup_fan_failure_detection(bp); | 5318 | bnx2x_setup_fan_failure_detection(bp); |
5304 | 5319 | ||
5305 | /* clear PXP2 attentions */ | 5320 | /* clear PXP2 attentions */ |
@@ -5503,9 +5518,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
5503 | 5518 | ||
5504 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); | 5519 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); |
5505 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); | 5520 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); |
5506 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5507 | bp->common.shmem_base, | ||
5508 | bp->common.shmem2_base); | ||
5509 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, | 5521 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, |
5510 | bp->common.shmem2_base, port)) { | 5522 | bp->common.shmem2_base, port)) { |
5511 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : | 5523 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : |
@@ -8379,6 +8391,17 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) | |||
8379 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) | 8391 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) |
8380 | bp->mdio.prtad = | 8392 | bp->mdio.prtad = |
8381 | XGXS_EXT_PHY_ADDR(ext_phy_config); | 8393 | XGXS_EXT_PHY_ADDR(ext_phy_config); |
8394 | |||
8395 | /* | ||
8396 | * Check if hw lock is required to access MDC/MDIO bus to the PHY(s) | ||
8397 | * In MF mode, it is set to cover self test cases | ||
8398 | */ | ||
8399 | if (IS_MF(bp)) | ||
8400 | bp->port.need_hw_lock = 1; | ||
8401 | else | ||
8402 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
8403 | bp->common.shmem_base, | ||
8404 | bp->common.shmem2_base); | ||
8382 | } | 8405 | } |
8383 | 8406 | ||
8384 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) | 8407 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) |
diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_stats.c index bda60d590fa8..3445ded6674f 100644 --- a/drivers/net/bnx2x/bnx2x_stats.c +++ b/drivers/net/bnx2x/bnx2x_stats.c | |||
@@ -1239,14 +1239,14 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) | |||
1239 | if (unlikely(bp->panic)) | 1239 | if (unlikely(bp->panic)) |
1240 | return; | 1240 | return; |
1241 | 1241 | ||
1242 | bnx2x_stats_stm[bp->stats_state][event].action(bp); | ||
1243 | |||
1242 | /* Protect a state change flow */ | 1244 | /* Protect a state change flow */ |
1243 | spin_lock_bh(&bp->stats_lock); | 1245 | spin_lock_bh(&bp->stats_lock); |
1244 | state = bp->stats_state; | 1246 | state = bp->stats_state; |
1245 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; | 1247 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; |
1246 | spin_unlock_bh(&bp->stats_lock); | 1248 | spin_unlock_bh(&bp->stats_lock); |
1247 | 1249 | ||
1248 | bnx2x_stats_stm[state][event].action(bp); | ||
1249 | |||
1250 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) | 1250 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) |
1251 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", | 1251 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", |
1252 | state, event, bp->stats_state); | 1252 | state, event, bp->stats_state); |