diff options
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_main.c')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_main.c | 59 |
1 files changed, 36 insertions, 23 deletions
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index 8cdcf5b39d1e..d584d32c747d 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -2301,15 +2301,10 @@ static void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) | |||
2301 | /* accept matched ucast */ | 2301 | /* accept matched ucast */ |
2302 | drop_all_ucast = 0; | 2302 | drop_all_ucast = 0; |
2303 | } | 2303 | } |
2304 | if (filters & BNX2X_ACCEPT_MULTICAST) { | 2304 | if (filters & BNX2X_ACCEPT_MULTICAST) |
2305 | /* accept matched mcast */ | 2305 | /* accept matched mcast */ |
2306 | drop_all_mcast = 0; | 2306 | drop_all_mcast = 0; |
2307 | if (IS_MF_SI(bp)) | 2307 | |
2308 | /* since mcast addresses won't arrive with ovlan, | ||
2309 | * fw needs to accept all of them in | ||
2310 | * switch-independent mode */ | ||
2311 | accp_all_mcast = 1; | ||
2312 | } | ||
2313 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { | 2308 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { |
2314 | /* accept all mcast */ | 2309 | /* accept all mcast */ |
2315 | drop_all_ucast = 0; | 2310 | drop_all_ucast = 0; |
@@ -4281,9 +4276,12 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4281 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4276 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4282 | BNX2X_ACCEPT_MULTICAST; | 4277 | BNX2X_ACCEPT_MULTICAST; |
4283 | #ifdef BCM_CNIC | 4278 | #ifdef BCM_CNIC |
4284 | cl_id = bnx2x_fcoe(bp, cl_id); | 4279 | if (!NO_FCOE(bp)) { |
4285 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4280 | cl_id = bnx2x_fcoe(bp, cl_id); |
4286 | BNX2X_ACCEPT_MULTICAST); | 4281 | bnx2x_rxq_set_mac_filters(bp, cl_id, |
4282 | BNX2X_ACCEPT_UNICAST | | ||
4283 | BNX2X_ACCEPT_MULTICAST); | ||
4284 | } | ||
4287 | #endif | 4285 | #endif |
4288 | break; | 4286 | break; |
4289 | 4287 | ||
@@ -4291,18 +4289,29 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4291 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4289 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4292 | BNX2X_ACCEPT_ALL_MULTICAST; | 4290 | BNX2X_ACCEPT_ALL_MULTICAST; |
4293 | #ifdef BCM_CNIC | 4291 | #ifdef BCM_CNIC |
4294 | cl_id = bnx2x_fcoe(bp, cl_id); | 4292 | /* |
4295 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4293 | * Prevent duplication of multicast packets by configuring FCoE |
4296 | BNX2X_ACCEPT_MULTICAST); | 4294 | * L2 Client to receive only matched unicast frames. |
4295 | */ | ||
4296 | if (!NO_FCOE(bp)) { | ||
4297 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4298 | bnx2x_rxq_set_mac_filters(bp, cl_id, | ||
4299 | BNX2X_ACCEPT_UNICAST); | ||
4300 | } | ||
4297 | #endif | 4301 | #endif |
4298 | break; | 4302 | break; |
4299 | 4303 | ||
4300 | case BNX2X_RX_MODE_PROMISC: | 4304 | case BNX2X_RX_MODE_PROMISC: |
4301 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; | 4305 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; |
4302 | #ifdef BCM_CNIC | 4306 | #ifdef BCM_CNIC |
4303 | cl_id = bnx2x_fcoe(bp, cl_id); | 4307 | /* |
4304 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4308 | * Prevent packets duplication by configuring DROP_ALL for FCoE |
4305 | BNX2X_ACCEPT_MULTICAST); | 4309 | * L2 Client. |
4310 | */ | ||
4311 | if (!NO_FCOE(bp)) { | ||
4312 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4313 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_NONE); | ||
4314 | } | ||
4306 | #endif | 4315 | #endif |
4307 | /* pass management unicast packets as well */ | 4316 | /* pass management unicast packets as well */ |
4308 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; | 4317 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; |
@@ -5296,10 +5305,6 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) | |||
5296 | } | 5305 | } |
5297 | } | 5306 | } |
5298 | 5307 | ||
5299 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5300 | bp->common.shmem_base, | ||
5301 | bp->common.shmem2_base); | ||
5302 | |||
5303 | bnx2x_setup_fan_failure_detection(bp); | 5308 | bnx2x_setup_fan_failure_detection(bp); |
5304 | 5309 | ||
5305 | /* clear PXP2 attentions */ | 5310 | /* clear PXP2 attentions */ |
@@ -5503,9 +5508,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
5503 | 5508 | ||
5504 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); | 5509 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); |
5505 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); | 5510 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); |
5506 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5507 | bp->common.shmem_base, | ||
5508 | bp->common.shmem2_base); | ||
5509 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, | 5511 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, |
5510 | bp->common.shmem2_base, port)) { | 5512 | bp->common.shmem2_base, port)) { |
5511 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : | 5513 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : |
@@ -8379,6 +8381,17 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) | |||
8379 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) | 8381 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) |
8380 | bp->mdio.prtad = | 8382 | bp->mdio.prtad = |
8381 | XGXS_EXT_PHY_ADDR(ext_phy_config); | 8383 | XGXS_EXT_PHY_ADDR(ext_phy_config); |
8384 | |||
8385 | /* | ||
8386 | * Check if hw lock is required to access MDC/MDIO bus to the PHY(s) | ||
8387 | * In MF mode, it is set to cover self test cases | ||
8388 | */ | ||
8389 | if (IS_MF(bp)) | ||
8390 | bp->port.need_hw_lock = 1; | ||
8391 | else | ||
8392 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
8393 | bp->common.shmem_base, | ||
8394 | bp->common.shmem2_base); | ||
8382 | } | 8395 | } |
8383 | 8396 | ||
8384 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) | 8397 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) |