diff options
Diffstat (limited to 'drivers/net/bnx2x/bnx2x.h')
-rw-r--r-- | drivers/net/bnx2x/bnx2x.h | 166 |
1 files changed, 151 insertions, 15 deletions
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index d255428122fc..a6cd335c9436 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -13,6 +13,8 @@ | |||
13 | 13 | ||
14 | #ifndef BNX2X_H | 14 | #ifndef BNX2X_H |
15 | #define BNX2X_H | 15 | #define BNX2X_H |
16 | #include <linux/netdevice.h> | ||
17 | #include <linux/types.h> | ||
16 | 18 | ||
17 | /* compilation time flags */ | 19 | /* compilation time flags */ |
18 | 20 | ||
@@ -20,15 +22,17 @@ | |||
20 | * (you will need to reboot afterwards) */ | 22 | * (you will need to reboot afterwards) */ |
21 | /* #define BNX2X_STOP_ON_ERROR */ | 23 | /* #define BNX2X_STOP_ON_ERROR */ |
22 | 24 | ||
23 | #define DRV_MODULE_VERSION "1.60.01-0" | 25 | #define DRV_MODULE_VERSION "1.62.00-3" |
24 | #define DRV_MODULE_RELDATE "2010/11/12" | 26 | #define DRV_MODULE_RELDATE "2010/12/21" |
25 | #define BNX2X_BC_VER 0x040200 | 27 | #define BNX2X_BC_VER 0x040200 |
26 | 28 | ||
27 | #define BNX2X_MULTI_QUEUE | 29 | #define BNX2X_MULTI_QUEUE |
28 | 30 | ||
29 | #define BNX2X_NEW_NAPI | 31 | #define BNX2X_NEW_NAPI |
30 | 32 | ||
31 | 33 | #if defined(CONFIG_DCB) | |
34 | #define BCM_DCB | ||
35 | #endif | ||
32 | #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) | 36 | #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) |
33 | #define BCM_CNIC 1 | 37 | #define BCM_CNIC 1 |
34 | #include "../cnic_if.h" | 38 | #include "../cnic_if.h" |
@@ -48,6 +52,7 @@ | |||
48 | #include "bnx2x_fw_defs.h" | 52 | #include "bnx2x_fw_defs.h" |
49 | #include "bnx2x_hsi.h" | 53 | #include "bnx2x_hsi.h" |
50 | #include "bnx2x_link.h" | 54 | #include "bnx2x_link.h" |
55 | #include "bnx2x_dcb.h" | ||
51 | #include "bnx2x_stats.h" | 56 | #include "bnx2x_stats.h" |
52 | 57 | ||
53 | /* error/debug prints */ | 58 | /* error/debug prints */ |
@@ -199,10 +204,25 @@ void bnx2x_panic_dump(struct bnx2x *bp); | |||
199 | /* EQ completions */ | 204 | /* EQ completions */ |
200 | #define HC_SP_INDEX_EQ_CONS 7 | 205 | #define HC_SP_INDEX_EQ_CONS 7 |
201 | 206 | ||
207 | /* FCoE L2 connection completions */ | ||
208 | #define HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS 6 | ||
209 | #define HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS 4 | ||
202 | /* iSCSI L2 */ | 210 | /* iSCSI L2 */ |
203 | #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5 | 211 | #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5 |
204 | #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1 | 212 | #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1 |
205 | 213 | ||
214 | /* Special clients parameters */ | ||
215 | |||
216 | /* SB indices */ | ||
217 | /* FCoE L2 */ | ||
218 | #define BNX2X_FCOE_L2_RX_INDEX \ | ||
219 | (&bp->def_status_blk->sp_sb.\ | ||
220 | index_values[HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS]) | ||
221 | |||
222 | #define BNX2X_FCOE_L2_TX_INDEX \ | ||
223 | (&bp->def_status_blk->sp_sb.\ | ||
224 | index_values[HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS]) | ||
225 | |||
206 | /** | 226 | /** |
207 | * CIDs and CLIDs: | 227 | * CIDs and CLIDs: |
208 | * CLIDs below is a CLID for func 0, then the CLID for other | 228 | * CLIDs below is a CLID for func 0, then the CLID for other |
@@ -215,12 +235,19 @@ void bnx2x_panic_dump(struct bnx2x *bp); | |||
215 | #define BNX2X_ISCSI_ETH_CL_ID 17 | 235 | #define BNX2X_ISCSI_ETH_CL_ID 17 |
216 | #define BNX2X_ISCSI_ETH_CID 17 | 236 | #define BNX2X_ISCSI_ETH_CID 17 |
217 | 237 | ||
238 | /* FCoE L2 */ | ||
239 | #define BNX2X_FCOE_ETH_CL_ID 18 | ||
240 | #define BNX2X_FCOE_ETH_CID 18 | ||
241 | |||
218 | /** Additional rings budgeting */ | 242 | /** Additional rings budgeting */ |
219 | #ifdef BCM_CNIC | 243 | #ifdef BCM_CNIC |
220 | #define CNIC_CONTEXT_USE 1 | 244 | #define CNIC_CONTEXT_USE 1 |
245 | #define FCOE_CONTEXT_USE 1 | ||
221 | #else | 246 | #else |
222 | #define CNIC_CONTEXT_USE 0 | 247 | #define CNIC_CONTEXT_USE 0 |
248 | #define FCOE_CONTEXT_USE 0 | ||
223 | #endif /* BCM_CNIC */ | 249 | #endif /* BCM_CNIC */ |
250 | #define NONE_ETH_CONTEXT_USE (FCOE_CONTEXT_USE) | ||
224 | 251 | ||
225 | #define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ | 252 | #define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ |
226 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR | 253 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR |
@@ -401,6 +428,17 @@ struct bnx2x_fastpath { | |||
401 | }; | 428 | }; |
402 | 429 | ||
403 | #define bnx2x_fp(bp, nr, var) (bp->fp[nr].var) | 430 | #define bnx2x_fp(bp, nr, var) (bp->fp[nr].var) |
431 | #ifdef BCM_CNIC | ||
432 | /* FCoE L2 `fastpath' is right after the eth entries */ | ||
433 | #define FCOE_IDX BNX2X_NUM_ETH_QUEUES(bp) | ||
434 | #define bnx2x_fcoe_fp(bp) (&bp->fp[FCOE_IDX]) | ||
435 | #define bnx2x_fcoe(bp, var) (bnx2x_fcoe_fp(bp)->var) | ||
436 | #define IS_FCOE_FP(fp) (fp->index == FCOE_IDX) | ||
437 | #define IS_FCOE_IDX(idx) ((idx) == FCOE_IDX) | ||
438 | #else | ||
439 | #define IS_FCOE_FP(fp) false | ||
440 | #define IS_FCOE_IDX(idx) false | ||
441 | #endif | ||
404 | 442 | ||
405 | 443 | ||
406 | /* MC hsi */ | 444 | /* MC hsi */ |
@@ -598,6 +636,7 @@ struct bnx2x_common { | |||
598 | 636 | ||
599 | #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) | 637 | #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) |
600 | #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) | 638 | #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) |
639 | #define CHIP_PARITY_ENABLED(bp) (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) | ||
601 | 640 | ||
602 | int flash_size; | 641 | int flash_size; |
603 | #define NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ | 642 | #define NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ |
@@ -669,8 +708,14 @@ struct bnx2x_port { | |||
669 | enum { | 708 | enum { |
670 | CAM_ETH_LINE = 0, | 709 | CAM_ETH_LINE = 0, |
671 | CAM_ISCSI_ETH_LINE, | 710 | CAM_ISCSI_ETH_LINE, |
672 | CAM_MAX_PF_LINE = CAM_ISCSI_ETH_LINE | 711 | CAM_FIP_ETH_LINE, |
712 | CAM_FIP_MCAST_LINE, | ||
713 | CAM_MAX_PF_LINE = CAM_FIP_MCAST_LINE | ||
673 | }; | 714 | }; |
715 | /* number of MACs per function in NIG memory - used for SI mode */ | ||
716 | #define NIG_LLH_FUNC_MEM_SIZE 16 | ||
717 | /* number of entries in NIG_REG_LLHX_FUNC_MEM */ | ||
718 | #define NIG_LLH_FUNC_MEM_MAX_OFFSET 8 | ||
674 | 719 | ||
675 | #define BNX2X_VF_ID_INVALID 0xFF | 720 | #define BNX2X_VF_ID_INVALID 0xFF |
676 | 721 | ||
@@ -710,6 +755,14 @@ enum { | |||
710 | */ | 755 | */ |
711 | #define L2_FP_COUNT(cid_cnt) ((cid_cnt) - CNIC_CONTEXT_USE) | 756 | #define L2_FP_COUNT(cid_cnt) ((cid_cnt) - CNIC_CONTEXT_USE) |
712 | 757 | ||
758 | /* | ||
759 | * The number of FP-SB allocated by the driver == max number of regular L2 | ||
760 | * queues + 1 for the CNIC which also consumes an FP-SB | ||
761 | */ | ||
762 | #define FP_SB_COUNT(cid_cnt) ((cid_cnt) - FCOE_CONTEXT_USE) | ||
763 | #define NUM_IGU_SB_REQUIRED(cid_cnt) \ | ||
764 | (FP_SB_COUNT(cid_cnt) - NONE_ETH_CONTEXT_USE) | ||
765 | |||
713 | union cdu_context { | 766 | union cdu_context { |
714 | struct eth_context eth; | 767 | struct eth_context eth; |
715 | char pad[1024]; | 768 | char pad[1024]; |
@@ -722,7 +775,8 @@ union cdu_context { | |||
722 | 775 | ||
723 | #ifdef BCM_CNIC | 776 | #ifdef BCM_CNIC |
724 | #define CNIC_ISCSI_CID_MAX 256 | 777 | #define CNIC_ISCSI_CID_MAX 256 |
725 | #define CNIC_CID_MAX (CNIC_ISCSI_CID_MAX) | 778 | #define CNIC_FCOE_CID_MAX 2048 |
779 | #define CNIC_CID_MAX (CNIC_ISCSI_CID_MAX + CNIC_FCOE_CID_MAX) | ||
726 | #define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS) | 780 | #define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS) |
727 | #endif | 781 | #endif |
728 | 782 | ||
@@ -770,6 +824,8 @@ struct bnx2x_slowpath { | |||
770 | 824 | ||
771 | u32 wb_comp; | 825 | u32 wb_comp; |
772 | u32 wb_data[4]; | 826 | u32 wb_data[4]; |
827 | /* pfc configuration for DCBX ramrod */ | ||
828 | struct flow_control_configuration pfc_config; | ||
773 | }; | 829 | }; |
774 | 830 | ||
775 | #define bnx2x_sp(bp, var) (&bp->slowpath->var) | 831 | #define bnx2x_sp(bp, var) (&bp->slowpath->var) |
@@ -918,6 +974,10 @@ struct bnx2x { | |||
918 | #define DISABLE_MSI_FLAG 0x200 | 974 | #define DISABLE_MSI_FLAG 0x200 |
919 | #define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG) | 975 | #define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG) |
920 | #define MF_FUNC_DIS 0x1000 | 976 | #define MF_FUNC_DIS 0x1000 |
977 | #define FCOE_MACS_SET 0x2000 | ||
978 | #define NO_FCOE_FLAG 0x4000 | ||
979 | |||
980 | #define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) | ||
921 | 981 | ||
922 | int pf_num; /* absolute PF number */ | 982 | int pf_num; /* absolute PF number */ |
923 | int pfid; /* per-path PF number */ | 983 | int pfid; /* per-path PF number */ |
@@ -967,6 +1027,8 @@ struct bnx2x { | |||
967 | u16 mf_ov; | 1027 | u16 mf_ov; |
968 | u8 mf_mode; | 1028 | u8 mf_mode; |
969 | #define IS_MF(bp) (bp->mf_mode != 0) | 1029 | #define IS_MF(bp) (bp->mf_mode != 0) |
1030 | #define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) | ||
1031 | #define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) | ||
970 | 1032 | ||
971 | u8 wol; | 1033 | u8 wol; |
972 | 1034 | ||
@@ -1010,6 +1072,7 @@ struct bnx2x { | |||
1010 | #define BNX2X_ACCEPT_ALL_UNICAST 0x0004 | 1072 | #define BNX2X_ACCEPT_ALL_UNICAST 0x0004 |
1011 | #define BNX2X_ACCEPT_ALL_MULTICAST 0x0008 | 1073 | #define BNX2X_ACCEPT_ALL_MULTICAST 0x0008 |
1012 | #define BNX2X_ACCEPT_BROADCAST 0x0010 | 1074 | #define BNX2X_ACCEPT_BROADCAST 0x0010 |
1075 | #define BNX2X_ACCEPT_UNMATCHED_UCAST 0x0020 | ||
1013 | #define BNX2X_PROMISCUOUS_MODE 0x10000 | 1076 | #define BNX2X_PROMISCUOUS_MODE 0x10000 |
1014 | 1077 | ||
1015 | u32 rx_mode; | 1078 | u32 rx_mode; |
@@ -1062,7 +1125,8 @@ struct bnx2x { | |||
1062 | u16 cnic_kwq_pending; | 1125 | u16 cnic_kwq_pending; |
1063 | u16 cnic_spq_pending; | 1126 | u16 cnic_spq_pending; |
1064 | struct mutex cnic_mutex; | 1127 | struct mutex cnic_mutex; |
1065 | u8 iscsi_mac[6]; | 1128 | u8 iscsi_mac[ETH_ALEN]; |
1129 | u8 fip_mac[ETH_ALEN]; | ||
1066 | #endif | 1130 | #endif |
1067 | 1131 | ||
1068 | int dmae_ready; | 1132 | int dmae_ready; |
@@ -1122,6 +1186,31 @@ struct bnx2x { | |||
1122 | 1186 | ||
1123 | char fw_ver[32]; | 1187 | char fw_ver[32]; |
1124 | const struct firmware *firmware; | 1188 | const struct firmware *firmware; |
1189 | /* LLDP params */ | ||
1190 | struct bnx2x_config_lldp_params lldp_config_params; | ||
1191 | |||
1192 | /* DCB support on/off */ | ||
1193 | u16 dcb_state; | ||
1194 | #define BNX2X_DCB_STATE_OFF 0 | ||
1195 | #define BNX2X_DCB_STATE_ON 1 | ||
1196 | |||
1197 | /* DCBX engine mode */ | ||
1198 | int dcbx_enabled; | ||
1199 | #define BNX2X_DCBX_ENABLED_OFF 0 | ||
1200 | #define BNX2X_DCBX_ENABLED_ON_NEG_OFF 1 | ||
1201 | #define BNX2X_DCBX_ENABLED_ON_NEG_ON 2 | ||
1202 | #define BNX2X_DCBX_ENABLED_INVALID (-1) | ||
1203 | |||
1204 | bool dcbx_mode_uset; | ||
1205 | |||
1206 | struct bnx2x_config_dcbx_params dcbx_config_params; | ||
1207 | |||
1208 | struct bnx2x_dcbx_port_params dcbx_port_params; | ||
1209 | int dcb_version; | ||
1210 | |||
1211 | /* DCBX Negotation results */ | ||
1212 | struct dcbx_features dcbx_local_feat; | ||
1213 | u32 dcbx_error; | ||
1125 | }; | 1214 | }; |
1126 | 1215 | ||
1127 | /** | 1216 | /** |
@@ -1152,10 +1241,17 @@ struct bnx2x { | |||
1152 | #define RSS_IPV6_TCP_CAP 0x0008 | 1241 | #define RSS_IPV6_TCP_CAP 0x0008 |
1153 | 1242 | ||
1154 | #define BNX2X_NUM_QUEUES(bp) (bp->num_queues) | 1243 | #define BNX2X_NUM_QUEUES(bp) (bp->num_queues) |
1244 | #define BNX2X_NUM_ETH_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - NONE_ETH_CONTEXT_USE) | ||
1245 | |||
1246 | /* ethtool statistics are displayed for all regular ethernet queues and the | ||
1247 | * fcoe L2 queue if not disabled | ||
1248 | */ | ||
1249 | #define BNX2X_NUM_STAT_QUEUES(bp) (NO_FCOE(bp) ? BNX2X_NUM_ETH_QUEUES(bp) : \ | ||
1250 | (BNX2X_NUM_ETH_QUEUES(bp) + FCOE_CONTEXT_USE)) | ||
1251 | |||
1155 | #define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) | 1252 | #define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) |
1156 | 1253 | ||
1157 | #define BNX2X_MAX_QUEUES(bp) (bp->igu_sb_cnt - CNIC_CONTEXT_USE) | 1254 | #define BNX2X_MAX_QUEUES(bp) (bp->igu_sb_cnt - CNIC_CONTEXT_USE) |
1158 | #define is_eth_multi(bp) (BNX2X_NUM_ETH_QUEUES(bp) > 1) | ||
1159 | 1255 | ||
1160 | #define RSS_IPV4_CAP_MASK \ | 1256 | #define RSS_IPV4_CAP_MASK \ |
1161 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | 1257 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY |
@@ -1248,6 +1344,7 @@ struct bnx2x_client_ramrod_params { | |||
1248 | u16 cl_id; | 1344 | u16 cl_id; |
1249 | u32 cid; | 1345 | u32 cid; |
1250 | u8 poll; | 1346 | u8 poll; |
1347 | #define CLIENT_IS_FCOE 0x01 | ||
1251 | #define CLIENT_IS_LEADING_RSS 0x02 | 1348 | #define CLIENT_IS_LEADING_RSS 0x02 |
1252 | u8 flags; | 1349 | u8 flags; |
1253 | }; | 1350 | }; |
@@ -1280,11 +1377,54 @@ struct bnx2x_func_init_params { | |||
1280 | u16 spq_prod; /* valid iff FUNC_FLG_SPQ */ | 1377 | u16 spq_prod; /* valid iff FUNC_FLG_SPQ */ |
1281 | }; | 1378 | }; |
1282 | 1379 | ||
1380 | #define for_each_eth_queue(bp, var) \ | ||
1381 | for (var = 0; var < BNX2X_NUM_ETH_QUEUES(bp); var++) | ||
1382 | |||
1383 | #define for_each_nondefault_eth_queue(bp, var) \ | ||
1384 | for (var = 1; var < BNX2X_NUM_ETH_QUEUES(bp); var++) | ||
1385 | |||
1386 | #define for_each_napi_queue(bp, var) \ | ||
1387 | for (var = 0; \ | ||
1388 | var < BNX2X_NUM_ETH_QUEUES(bp) + FCOE_CONTEXT_USE; var++) \ | ||
1389 | if (skip_queue(bp, var)) \ | ||
1390 | continue; \ | ||
1391 | else | ||
1392 | |||
1283 | #define for_each_queue(bp, var) \ | 1393 | #define for_each_queue(bp, var) \ |
1284 | for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) | 1394 | for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ |
1395 | if (skip_queue(bp, var)) \ | ||
1396 | continue; \ | ||
1397 | else | ||
1398 | |||
1399 | #define for_each_rx_queue(bp, var) \ | ||
1400 | for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ | ||
1401 | if (skip_rx_queue(bp, var)) \ | ||
1402 | continue; \ | ||
1403 | else | ||
1404 | |||
1405 | #define for_each_tx_queue(bp, var) \ | ||
1406 | for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ | ||
1407 | if (skip_tx_queue(bp, var)) \ | ||
1408 | continue; \ | ||
1409 | else | ||
1410 | |||
1285 | #define for_each_nondefault_queue(bp, var) \ | 1411 | #define for_each_nondefault_queue(bp, var) \ |
1286 | for (var = 1; var < BNX2X_NUM_QUEUES(bp); var++) | 1412 | for (var = 1; var < BNX2X_NUM_QUEUES(bp); var++) \ |
1413 | if (skip_queue(bp, var)) \ | ||
1414 | continue; \ | ||
1415 | else | ||
1416 | |||
1417 | /* skip rx queue | ||
1418 | * if FCOE l2 support is disabled and this is the fcoe L2 queue | ||
1419 | */ | ||
1420 | #define skip_rx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) | ||
1287 | 1421 | ||
1422 | /* skip tx queue | ||
1423 | * if FCOE l2 support is disabled and this is the fcoe L2 queue | ||
1424 | */ | ||
1425 | #define skip_tx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) | ||
1426 | |||
1427 | #define skip_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) | ||
1288 | 1428 | ||
1289 | #define WAIT_RAMROD_POLL 0x01 | 1429 | #define WAIT_RAMROD_POLL 0x01 |
1290 | #define WAIT_RAMROD_COMMON 0x02 | 1430 | #define WAIT_RAMROD_COMMON 0x02 |
@@ -1329,7 +1469,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1329 | 1469 | ||
1330 | #define BNX2X_ILT_ZALLOC(x, y, size) \ | 1470 | #define BNX2X_ILT_ZALLOC(x, y, size) \ |
1331 | do { \ | 1471 | do { \ |
1332 | x = pci_alloc_consistent(bp->pdev, size, y); \ | 1472 | x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ |
1333 | if (x) \ | 1473 | if (x) \ |
1334 | memset(x, 0, size); \ | 1474 | memset(x, 0, size); \ |
1335 | } while (0) | 1475 | } while (0) |
@@ -1337,7 +1477,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1337 | #define BNX2X_ILT_FREE(x, y, size) \ | 1477 | #define BNX2X_ILT_FREE(x, y, size) \ |
1338 | do { \ | 1478 | do { \ |
1339 | if (x) { \ | 1479 | if (x) { \ |
1340 | pci_free_consistent(bp->pdev, size, x, y); \ | 1480 | dma_free_coherent(&bp->pdev->dev, size, x, y); \ |
1341 | x = NULL; \ | 1481 | x = NULL; \ |
1342 | y = 0; \ | 1482 | y = 0; \ |
1343 | } \ | 1483 | } \ |
@@ -1608,10 +1748,6 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1608 | MAC_CONFIGURATION_ENTRY_ACTION_TYPE) == \ | 1748 | MAC_CONFIGURATION_ENTRY_ACTION_TYPE) == \ |
1609 | (T_ETH_MAC_COMMAND_INVALIDATE)) | 1749 | (T_ETH_MAC_COMMAND_INVALIDATE)) |
1610 | 1750 | ||
1611 | #define CAM_INVALIDATE(x) \ | ||
1612 | (x.target_table_entry.flags = TSTORM_CAM_TARGET_TABLE_ENTRY_ACTION_TYPE) | ||
1613 | |||
1614 | |||
1615 | /* Number of u32 elements in MC hash array */ | 1751 | /* Number of u32 elements in MC hash array */ |
1616 | #define MC_HASH_SIZE 8 | 1752 | #define MC_HASH_SIZE 8 |
1617 | #define MC_HASH_OFFSET(bp, i) (BAR_TSTRORM_INTMEM + \ | 1753 | #define MC_HASH_OFFSET(bp, i) (BAR_TSTRORM_INTMEM + \ |