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Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r--drivers/net/bnx2x.h34
1 files changed, 18 insertions, 16 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index ea9100855c5c..dc423e58dad8 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -24,6 +24,8 @@
24#define BNX2X_MSG_STATS 0x20000 /* was: NETIF_MSG_TIMER */ 24#define BNX2X_MSG_STATS 0x20000 /* was: NETIF_MSG_TIMER */
25#define NETIF_MSG_NVM 0x40000 /* was: NETIF_MSG_HW */ 25#define NETIF_MSG_NVM 0x40000 /* was: NETIF_MSG_HW */
26#define NETIF_MSG_DMAE 0x80000 /* was: NETIF_MSG_HW */ 26#define NETIF_MSG_DMAE 0x80000 /* was: NETIF_MSG_HW */
27#define BNX2X_MSG_SP 0x100000 /* was: NETIF_MSG_INTR */
28#define BNX2X_MSG_FP 0x200000 /* was: NETIF_MSG_INTR */
27 29
28#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */ 30#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */
29 31
@@ -40,6 +42,12 @@
40 __LINE__, bp->dev?(bp->dev->name):"?", ##__args); \ 42 __LINE__, bp->dev?(bp->dev->name):"?", ##__args); \
41 } while (0) 43 } while (0)
42 44
45/* for logging (never masked) */
46#define BNX2X_LOG(__fmt, __args...) do { \
47 printk(KERN_NOTICE "[%s:%d(%s)]" __fmt, __FUNCTION__, \
48 __LINE__, bp->dev?(bp->dev->name):"?", ##__args); \
49 } while (0)
50
43/* before we have a dev->name use dev_info() */ 51/* before we have a dev->name use dev_info() */
44#define BNX2X_DEV_INFO(__fmt, __args...) do { \ 52#define BNX2X_DEV_INFO(__fmt, __args...) do { \
45 if (bp->msglevel & NETIF_MSG_PROBE) \ 53 if (bp->msglevel & NETIF_MSG_PROBE) \
@@ -574,7 +582,8 @@ struct bnx2x {
574 u32 fw_mb; 582 u32 fw_mb;
575 583
576 u32 hw_config; 584 u32 hw_config;
577 u32 serdes_config; 585 u32 board;
586 u32 serdes_config;
578 u32 lane_config; 587 u32 lane_config;
579 u32 ext_phy_config; 588 u32 ext_phy_config;
580#define XGXS_EXT_PHY_TYPE(bp) (bp->ext_phy_config & \ 589#define XGXS_EXT_PHY_TYPE(bp) (bp->ext_phy_config & \
@@ -595,11 +604,11 @@ struct bnx2x {
595 u8 tx_lane_swap; 604 u8 tx_lane_swap;
596 605
597 u8 link_up; 606 u8 link_up;
607 u8 phy_link_up;
598 608
599 u32 supported; 609 u32 supported;
600/* link settings - missing defines */ 610/* link settings - missing defines */
601#define SUPPORTED_2500baseT_Full (1 << 15) 611#define SUPPORTED_2500baseT_Full (1 << 15)
602#define SUPPORTED_CX4 (1 << 16)
603 612
604 u32 phy_flags; 613 u32 phy_flags;
605/*#define PHY_SERDES_FLAG 0x1*/ 614/*#define PHY_SERDES_FLAG 0x1*/
@@ -644,16 +653,9 @@ struct bnx2x {
644#define FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH 653#define FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH
645#define FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE 654#define FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE
646 655
647 u32 pause_mode;
648#define PAUSE_NONE 0
649#define PAUSE_SYMMETRIC 1
650#define PAUSE_ASYMMETRIC 2
651#define PAUSE_BOTH 3
652
653 u32 advertising; 656 u32 advertising;
654/* link settings - missing defines */ 657/* link settings - missing defines */
655#define ADVERTISED_2500baseT_Full (1 << 15) 658#define ADVERTISED_2500baseT_Full (1 << 15)
656#define ADVERTISED_CX4 (1 << 16)
657 659
658 u32 link_status; 660 u32 link_status;
659 u32 line_speed; 661 u32 line_speed;
@@ -667,6 +669,8 @@ struct bnx2x {
667#define NVRAM_TIMEOUT_COUNT 30000 669#define NVRAM_TIMEOUT_COUNT 30000
668#define NVRAM_PAGE_SIZE 256 670#define NVRAM_PAGE_SIZE 256
669 671
672 u8 wol;
673
670 int rx_ring_size; 674 int rx_ring_size;
671 675
672 u16 tx_quick_cons_trip_int; 676 u16 tx_quick_cons_trip_int;
@@ -718,9 +722,6 @@ struct bnx2x {
718#endif 722#endif
719 723
720 char *name; 724 char *name;
721 u16 bus_speed_mhz;
722 u8 wol;
723 u8 pad;
724 725
725 /* used to synchronize stats collecting */ 726 /* used to synchronize stats collecting */
726 int stats_state; 727 int stats_state;
@@ -873,6 +874,7 @@ struct bnx2x {
873#define PCICFG_LINK_SPEED 0xf0000 874#define PCICFG_LINK_SPEED 0xf0000
874#define PCICFG_LINK_SPEED_SHIFT 16 875#define PCICFG_LINK_SPEED_SHIFT 16
875 876
877#define BMAC_CONTROL_RX_ENABLE 2
876/* stuff added to make the code fit 80Col */ 878/* stuff added to make the code fit 80Col */
877 879
878#define TPA_TYPE_START ETH_FAST_PATH_RX_CQE_START_FLG 880#define TPA_TYPE_START ETH_FAST_PATH_RX_CQE_START_FLG
@@ -944,13 +946,13 @@ struct bnx2x {
944#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD 946#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD
945#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD 947#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD
946 948
947#define NIG_STATUS_INTERRUPT_XGXS0_LINK10G \ 949#define NIG_STATUS_XGXS0_LINK10G \
948 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G 950 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G
949#define NIG_XGXS0_LINK_STATUS \ 951#define NIG_STATUS_XGXS0_LINK_STATUS \
950 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS 952 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS
951#define NIG_XGXS0_LINK_STATUS_SIZE \ 953#define NIG_STATUS_XGXS0_LINK_STATUS_SIZE \
952 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE 954 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE
953#define NIG_SERDES0_LINK_STATUS \ 955#define NIG_STATUS_SERDES0_LINK_STATUS \
954 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS 956 NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS
955#define NIG_MASK_MI_INT \ 957#define NIG_MASK_MI_INT \
956 NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT 958 NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT