diff options
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r-- | drivers/net/bnx2.h | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 76bb5f1a250b..9f691cbd666b 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* bnx2.h: Broadcom NX2 network driver. | 1 | /* bnx2.h: Broadcom NX2 network driver. |
2 | * | 2 | * |
3 | * Copyright (c) 2004, 2005 Broadcom Corporation | 3 | * Copyright (c) 2004, 2005, 2006 Broadcom Corporation |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify | 5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by | 6 | * it under the terms of the GNU General Public License as published by |
@@ -277,19 +277,7 @@ struct statistics_block { | |||
277 | * l2_fhdr definition | 277 | * l2_fhdr definition |
278 | */ | 278 | */ |
279 | struct l2_fhdr { | 279 | struct l2_fhdr { |
280 | #if defined(__BIG_ENDIAN) | 280 | u32 l2_fhdr_status; |
281 | u16 l2_fhdr_errors; | ||
282 | u16 l2_fhdr_status; | ||
283 | #elif defined(__LITTLE_ENDIAN) | ||
284 | u16 l2_fhdr_status; | ||
285 | u16 l2_fhdr_errors; | ||
286 | #endif | ||
287 | #define L2_FHDR_ERRORS_BAD_CRC (1<<1) | ||
288 | #define L2_FHDR_ERRORS_PHY_DECODE (1<<2) | ||
289 | #define L2_FHDR_ERRORS_ALIGNMENT (1<<3) | ||
290 | #define L2_FHDR_ERRORS_TOO_SHORT (1<<4) | ||
291 | #define L2_FHDR_ERRORS_GIANT_FRAME (1<<5) | ||
292 | |||
293 | #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0) | 281 | #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0) |
294 | #define L2_FHDR_STATUS_RULE_P2 (1<<3) | 282 | #define L2_FHDR_STATUS_RULE_P2 (1<<3) |
295 | #define L2_FHDR_STATUS_RULE_P3 (1<<4) | 283 | #define L2_FHDR_STATUS_RULE_P3 (1<<4) |
@@ -301,6 +289,14 @@ struct l2_fhdr { | |||
301 | #define L2_FHDR_STATUS_TCP_SEGMENT (1<<14) | 289 | #define L2_FHDR_STATUS_TCP_SEGMENT (1<<14) |
302 | #define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15) | 290 | #define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15) |
303 | 291 | ||
292 | #define L2_FHDR_ERRORS_BAD_CRC (1<<17) | ||
293 | #define L2_FHDR_ERRORS_PHY_DECODE (1<<18) | ||
294 | #define L2_FHDR_ERRORS_ALIGNMENT (1<<19) | ||
295 | #define L2_FHDR_ERRORS_TOO_SHORT (1<<20) | ||
296 | #define L2_FHDR_ERRORS_GIANT_FRAME (1<<21) | ||
297 | #define L2_FHDR_ERRORS_TCP_XSUM (1<<28) | ||
298 | #define L2_FHDR_ERRORS_UDP_XSUM (1<<31) | ||
299 | |||
304 | u32 l2_fhdr_hash; | 300 | u32 l2_fhdr_hash; |
305 | #if defined(__BIG_ENDIAN) | 301 | #if defined(__BIG_ENDIAN) |
306 | u16 l2_fhdr_pkt_len; | 302 | u16 l2_fhdr_pkt_len; |
@@ -3956,6 +3952,7 @@ struct bnx2 { | |||
3956 | #define NO_WOL_FLAG 8 | 3952 | #define NO_WOL_FLAG 8 |
3957 | #define USING_DAC_FLAG 0x10 | 3953 | #define USING_DAC_FLAG 0x10 |
3958 | #define USING_MSI_FLAG 0x20 | 3954 | #define USING_MSI_FLAG 0x20 |
3955 | #define ASF_ENABLE_FLAG 0x40 | ||
3959 | 3956 | ||
3960 | u32 phy_flags; | 3957 | u32 phy_flags; |
3961 | #define PHY_SERDES_FLAG 1 | 3958 | #define PHY_SERDES_FLAG 1 |
@@ -3986,6 +3983,7 @@ struct bnx2 { | |||
3986 | #define CHIP_ID_5706_A2 0x57060020 | 3983 | #define CHIP_ID_5706_A2 0x57060020 |
3987 | #define CHIP_ID_5708_A0 0x57080000 | 3984 | #define CHIP_ID_5708_A0 0x57080000 |
3988 | #define CHIP_ID_5708_B0 0x57081000 | 3985 | #define CHIP_ID_5708_B0 0x57081000 |
3986 | #define CHIP_ID_5708_B1 0x57081010 | ||
3989 | 3987 | ||
3990 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) | 3988 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) |
3991 | 3989 | ||
@@ -3998,7 +3996,7 @@ struct bnx2 { | |||
3998 | u16 bus_speed_mhz; | 3996 | u16 bus_speed_mhz; |
3999 | u8 wol; | 3997 | u8 wol; |
4000 | 3998 | ||
4001 | u8 fw_timed_out; | 3999 | u8 pad; |
4002 | 4000 | ||
4003 | u16 fw_wr_seq; | 4001 | u16 fw_wr_seq; |
4004 | u16 fw_drv_pulse_wr_seq; | 4002 | u16 fw_drv_pulse_wr_seq; |
@@ -4074,6 +4072,7 @@ struct bnx2 { | |||
4074 | struct net_device_stats net_stats; | 4072 | struct net_device_stats net_stats; |
4075 | 4073 | ||
4076 | struct flash_spec *flash_info; | 4074 | struct flash_spec *flash_info; |
4075 | u32 flash_size; | ||
4077 | }; | 4076 | }; |
4078 | 4077 | ||
4079 | static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); | 4078 | static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); |
@@ -4172,7 +4171,7 @@ struct fw_info { | |||
4172 | * the firmware has timed out, the driver will assume there is no firmware | 4171 | * the firmware has timed out, the driver will assume there is no firmware |
4173 | * running and there won't be any firmware-driver synchronization during a | 4172 | * running and there won't be any firmware-driver synchronization during a |
4174 | * driver reset. */ | 4173 | * driver reset. */ |
4175 | #define FW_ACK_TIME_OUT_MS 50 | 4174 | #define FW_ACK_TIME_OUT_MS 100 |
4176 | 4175 | ||
4177 | 4176 | ||
4178 | #define BNX2_DRV_RESET_SIGNATURE 0x00000000 | 4177 | #define BNX2_DRV_RESET_SIGNATURE 0x00000000 |
@@ -4275,6 +4274,9 @@ struct fw_info { | |||
4275 | #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100 | 4274 | #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100 |
4276 | #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200 | 4275 | #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200 |
4277 | 4276 | ||
4277 | #define BNX2_SHARED_HW_CFG_CONFIG2 0x00000040 | ||
4278 | #define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK 0x00fff000 | ||
4279 | |||
4278 | #define BNX2_DEV_INFO_BC_REV 0x0000004c | 4280 | #define BNX2_DEV_INFO_BC_REV 0x0000004c |
4279 | 4281 | ||
4280 | #define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 | 4282 | #define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 |