1 files changed, 21 insertions, 11 deletions

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index fa0d69ab908e..96cee4badd28 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -56,8 +56,8 @@
 
 #define DRV_MODULE_NAME         "bnx2"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "1.6.7"
-#define DRV_MODULE_RELDATE      "October 10, 2007"
+#define DRV_MODULE_VERSION      "1.6.8"
+#define DRV_MODULE_RELDATE      "October 17, 2007"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -3079,14 +3079,18 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
                         autoneg = bp->autoneg;
                         advertising = bp->advertising;
 
-                        bp->autoneg = AUTONEG_SPEED;
-                        bp->advertising = ADVERTISED_10baseT_Half |
-                                ADVERTISED_10baseT_Full |
-                                ADVERTISED_100baseT_Half |
-                                ADVERTISED_100baseT_Full |
-                                ADVERTISED_Autoneg;
+                        if (bp->phy_port == PORT_TP) {
+                                bp->autoneg = AUTONEG_SPEED;
+                                bp->advertising = ADVERTISED_10baseT_Half |
+                                        ADVERTISED_10baseT_Full |
+                                        ADVERTISED_100baseT_Half |
+                                        ADVERTISED_100baseT_Full |
+                                        ADVERTISED_Autoneg;
+                        }
 
-                        bnx2_setup_copper_phy(bp);
+                        spin_lock_bh(&bp->phy_lock);
+                        bnx2_setup_phy(bp, bp->phy_port);
+                        spin_unlock_bh(&bp->phy_lock);
 
                         bp->autoneg = autoneg;
                         bp->advertising = advertising;
@@ -3097,10 +3101,16 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
 
                         /* Enable port mode. */
                         val &= ~BNX2_EMAC_MODE_PORT;
-                        val |= BNX2_EMAC_MODE_PORT_MII |
-                               BNX2_EMAC_MODE_MPKT_RCVD |
+                        val |= BNX2_EMAC_MODE_MPKT_RCVD |
                                BNX2_EMAC_MODE_ACPI_RCVD |
                                BNX2_EMAC_MODE_MPKT;
+                        if (bp->phy_port == PORT_TP)
+                                val |= BNX2_EMAC_MODE_PORT_MII;
+                        else {
+                                val |= BNX2_EMAC_MODE_PORT_GMII;
+                                if (bp->line_speed == SPEED_2500)
+                                        val |= BNX2_EMAC_MODE_25G_MODE;
+                        }
 
                         REG_WR(bp, BNX2_EMAC_MODE, val);