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path: root/drivers/net/bnx2.c
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Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r--drivers/net/bnx2.c70
1 files changed, 46 insertions, 24 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 9f0a06722e23..6d05397420f3 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3763,10 +3763,11 @@ static int
3763bnx2_test_registers(struct bnx2 *bp) 3763bnx2_test_registers(struct bnx2 *bp)
3764{ 3764{
3765 int ret; 3765 int ret;
3766 int i; 3766 int i, is_5709;
3767 static const struct { 3767 static const struct {
3768 u16 offset; 3768 u16 offset;
3769 u16 flags; 3769 u16 flags;
3770#define BNX2_FL_NOT_5709 1
3770 u32 rw_mask; 3771 u32 rw_mask;
3771 u32 ro_mask; 3772 u32 ro_mask;
3772 } reg_tbl[] = { 3773 } reg_tbl[] = {
@@ -3774,26 +3775,26 @@ bnx2_test_registers(struct bnx2 *bp)
3774 { 0x0090, 0, 0xffffffff, 0x00000000 }, 3775 { 0x0090, 0, 0xffffffff, 0x00000000 },
3775 { 0x0094, 0, 0x00000000, 0x00000000 }, 3776 { 0x0094, 0, 0x00000000, 0x00000000 },
3776 3777
3777 { 0x0404, 0, 0x00003f00, 0x00000000 }, 3778 { 0x0404, BNX2_FL_NOT_5709, 0x00003f00, 0x00000000 },
3778 { 0x0418, 0, 0x00000000, 0xffffffff }, 3779 { 0x0418, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3779 { 0x041c, 0, 0x00000000, 0xffffffff }, 3780 { 0x041c, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3780 { 0x0420, 0, 0x00000000, 0x80ffffff }, 3781 { 0x0420, BNX2_FL_NOT_5709, 0x00000000, 0x80ffffff },
3781 { 0x0424, 0, 0x00000000, 0x00000000 }, 3782 { 0x0424, BNX2_FL_NOT_5709, 0x00000000, 0x00000000 },
3782 { 0x0428, 0, 0x00000000, 0x00000001 }, 3783 { 0x0428, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
3783 { 0x0450, 0, 0x00000000, 0x0000ffff }, 3784 { 0x0450, BNX2_FL_NOT_5709, 0x00000000, 0x0000ffff },
3784 { 0x0454, 0, 0x00000000, 0xffffffff }, 3785 { 0x0454, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3785 { 0x0458, 0, 0x00000000, 0xffffffff }, 3786 { 0x0458, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3786 3787
3787 { 0x0808, 0, 0x00000000, 0xffffffff }, 3788 { 0x0808, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3788 { 0x0854, 0, 0x00000000, 0xffffffff }, 3789 { 0x0854, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
3789 { 0x0868, 0, 0x00000000, 0x77777777 }, 3790 { 0x0868, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
3790 { 0x086c, 0, 0x00000000, 0x77777777 }, 3791 { 0x086c, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
3791 { 0x0870, 0, 0x00000000, 0x77777777 }, 3792 { 0x0870, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
3792 { 0x0874, 0, 0x00000000, 0x77777777 }, 3793 { 0x0874, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
3793 3794
3794 { 0x0c00, 0, 0x00000000, 0x00000001 }, 3795 { 0x0c00, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
3795 { 0x0c04, 0, 0x00000000, 0x03ff0001 }, 3796 { 0x0c04, BNX2_FL_NOT_5709, 0x00000000, 0x03ff0001 },
3796 { 0x0c08, 0, 0x0f0ff073, 0x00000000 }, 3797 { 0x0c08, BNX2_FL_NOT_5709, 0x0f0ff073, 0x00000000 },
3797 3798
3798 { 0x1000, 0, 0x00000000, 0x00000001 }, 3799 { 0x1000, 0, 0x00000000, 0x00000001 },
3799 { 0x1004, 0, 0x00000000, 0x000f0001 }, 3800 { 0x1004, 0, 0x00000000, 0x000f0001 },
@@ -3840,7 +3841,6 @@ bnx2_test_registers(struct bnx2 *bp)
3840 3841
3841 { 0x5004, 0, 0x00000000, 0x0000007f }, 3842 { 0x5004, 0, 0x00000000, 0x0000007f },
3842 { 0x5008, 0, 0x0f0007ff, 0x00000000 }, 3843 { 0x5008, 0, 0x0f0007ff, 0x00000000 },
3843 { 0x500c, 0, 0xf800f800, 0x07ff07ff },
3844 3844
3845 { 0x5c00, 0, 0x00000000, 0x00000001 }, 3845 { 0x5c00, 0, 0x00000000, 0x00000001 },
3846 { 0x5c04, 0, 0x00000000, 0x0003000f }, 3846 { 0x5c04, 0, 0x00000000, 0x0003000f },
@@ -3880,8 +3880,16 @@ bnx2_test_registers(struct bnx2 *bp)
3880 }; 3880 };
3881 3881
3882 ret = 0; 3882 ret = 0;
3883 is_5709 = 0;
3884 if (CHIP_NUM(bp) == CHIP_NUM_5709)
3885 is_5709 = 1;
3886
3883 for (i = 0; reg_tbl[i].offset != 0xffff; i++) { 3887 for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
3884 u32 offset, rw_mask, ro_mask, save_val, val; 3888 u32 offset, rw_mask, ro_mask, save_val, val;
3889 u16 flags = reg_tbl[i].flags;
3890
3891 if (is_5709 && (flags & BNX2_FL_NOT_5709))
3892 continue;
3885 3893
3886 offset = (u32) reg_tbl[i].offset; 3894 offset = (u32) reg_tbl[i].offset;
3887 rw_mask = reg_tbl[i].rw_mask; 3895 rw_mask = reg_tbl[i].rw_mask;
@@ -3950,10 +3958,10 @@ bnx2_test_memory(struct bnx2 *bp)
3950{ 3958{
3951 int ret = 0; 3959 int ret = 0;
3952 int i; 3960 int i;
3953 static const struct { 3961 static struct mem_entry {
3954 u32 offset; 3962 u32 offset;
3955 u32 len; 3963 u32 len;
3956 } mem_tbl[] = { 3964 } mem_tbl_5706[] = {
3957 { 0x60000, 0x4000 }, 3965 { 0x60000, 0x4000 },
3958 { 0xa0000, 0x3000 }, 3966 { 0xa0000, 0x3000 },
3959 { 0xe0000, 0x4000 }, 3967 { 0xe0000, 0x4000 },
@@ -3961,7 +3969,21 @@ bnx2_test_memory(struct bnx2 *bp)
3961 { 0x1a0000, 0x4000 }, 3969 { 0x1a0000, 0x4000 },
3962 { 0x160000, 0x4000 }, 3970 { 0x160000, 0x4000 },
3963 { 0xffffffff, 0 }, 3971 { 0xffffffff, 0 },
3972 },
3973 mem_tbl_5709[] = {
3974 { 0x60000, 0x4000 },
3975 { 0xa0000, 0x3000 },
3976 { 0xe0000, 0x4000 },
3977 { 0x120000, 0x4000 },
3978 { 0x1a0000, 0x4000 },
3979 { 0xffffffff, 0 },
3964 }; 3980 };
3981 struct mem_entry *mem_tbl;
3982
3983 if (CHIP_NUM(bp) == CHIP_NUM_5709)
3984 mem_tbl = mem_tbl_5709;
3985 else
3986 mem_tbl = mem_tbl_5706;
3965 3987
3966 for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) { 3988 for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
3967 if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset, 3989 if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset,