diff options
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r-- | drivers/net/bnx2.c | 43 |
1 files changed, 25 insertions, 18 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 15853be4680a..4b46e68183e0 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -56,8 +56,8 @@ | |||
56 | 56 | ||
57 | #define DRV_MODULE_NAME "bnx2" | 57 | #define DRV_MODULE_NAME "bnx2" |
58 | #define PFX DRV_MODULE_NAME ": " | 58 | #define PFX DRV_MODULE_NAME ": " |
59 | #define DRV_MODULE_VERSION "1.7.4" | 59 | #define DRV_MODULE_VERSION "1.7.5" |
60 | #define DRV_MODULE_RELDATE "February 18, 2008" | 60 | #define DRV_MODULE_RELDATE "April 29, 2008" |
61 | 61 | ||
62 | #define RUN_AT(x) (jiffies + (x)) | 62 | #define RUN_AT(x) (jiffies + (x)) |
63 | 63 | ||
@@ -1631,8 +1631,10 @@ bnx2_set_default_remote_link(struct bnx2 *bp) | |||
1631 | static void | 1631 | static void |
1632 | bnx2_set_default_link(struct bnx2 *bp) | 1632 | bnx2_set_default_link(struct bnx2 *bp) |
1633 | { | 1633 | { |
1634 | if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) | 1634 | if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) { |
1635 | return bnx2_set_default_remote_link(bp); | 1635 | bnx2_set_default_remote_link(bp); |
1636 | return; | ||
1637 | } | ||
1636 | 1638 | ||
1637 | bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL; | 1639 | bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL; |
1638 | bp->req_line_speed = 0; | 1640 | bp->req_line_speed = 0; |
@@ -1715,7 +1717,6 @@ bnx2_remote_phy_event(struct bnx2 *bp) | |||
1715 | break; | 1717 | break; |
1716 | } | 1718 | } |
1717 | 1719 | ||
1718 | spin_lock(&bp->phy_lock); | ||
1719 | bp->flow_ctrl = 0; | 1720 | bp->flow_ctrl = 0; |
1720 | if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) != | 1721 | if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) != |
1721 | (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) { | 1722 | (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) { |
@@ -1737,7 +1738,6 @@ bnx2_remote_phy_event(struct bnx2 *bp) | |||
1737 | if (old_port != bp->phy_port) | 1738 | if (old_port != bp->phy_port) |
1738 | bnx2_set_default_link(bp); | 1739 | bnx2_set_default_link(bp); |
1739 | 1740 | ||
1740 | spin_unlock(&bp->phy_lock); | ||
1741 | } | 1741 | } |
1742 | if (bp->link_up != link_up) | 1742 | if (bp->link_up != link_up) |
1743 | bnx2_report_link(bp); | 1743 | bnx2_report_link(bp); |
@@ -2222,6 +2222,11 @@ bnx2_init_5709_context(struct bnx2 *bp) | |||
2222 | for (i = 0; i < bp->ctx_pages; i++) { | 2222 | for (i = 0; i < bp->ctx_pages; i++) { |
2223 | int j; | 2223 | int j; |
2224 | 2224 | ||
2225 | if (bp->ctx_blk[i]) | ||
2226 | memset(bp->ctx_blk[i], 0, BCM_PAGE_SIZE); | ||
2227 | else | ||
2228 | return -ENOMEM; | ||
2229 | |||
2225 | REG_WR(bp, BNX2_CTX_HOST_PAGE_TBL_DATA0, | 2230 | REG_WR(bp, BNX2_CTX_HOST_PAGE_TBL_DATA0, |
2226 | (bp->ctx_blk_mapping[i] & 0xffffffff) | | 2231 | (bp->ctx_blk_mapping[i] & 0xffffffff) | |
2227 | BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID); | 2232 | BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID); |
@@ -2445,14 +2450,15 @@ bnx2_phy_event_is_set(struct bnx2 *bp, struct bnx2_napi *bnapi, u32 event) | |||
2445 | static void | 2450 | static void |
2446 | bnx2_phy_int(struct bnx2 *bp, struct bnx2_napi *bnapi) | 2451 | bnx2_phy_int(struct bnx2 *bp, struct bnx2_napi *bnapi) |
2447 | { | 2452 | { |
2448 | if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_LINK_STATE)) { | 2453 | spin_lock(&bp->phy_lock); |
2449 | spin_lock(&bp->phy_lock); | 2454 | |
2455 | if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_LINK_STATE)) | ||
2450 | bnx2_set_link(bp); | 2456 | bnx2_set_link(bp); |
2451 | spin_unlock(&bp->phy_lock); | ||
2452 | } | ||
2453 | if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_TIMER_ABORT)) | 2457 | if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_TIMER_ABORT)) |
2454 | bnx2_set_remote_link(bp); | 2458 | bnx2_set_remote_link(bp); |
2455 | 2459 | ||
2460 | spin_unlock(&bp->phy_lock); | ||
2461 | |||
2456 | } | 2462 | } |
2457 | 2463 | ||
2458 | static inline u16 | 2464 | static inline u16 |
@@ -3174,6 +3180,12 @@ load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len, | |||
3174 | int i; | 3180 | int i; |
3175 | u32 val; | 3181 | u32 val; |
3176 | 3182 | ||
3183 | if (rv2p_proc == RV2P_PROC2 && CHIP_NUM(bp) == CHIP_NUM_5709) { | ||
3184 | val = le32_to_cpu(rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC]); | ||
3185 | val &= ~XI_RV2P_PROC2_BD_PAGE_SIZE_MSK; | ||
3186 | val |= XI_RV2P_PROC2_BD_PAGE_SIZE; | ||
3187 | rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC] = cpu_to_le32(val); | ||
3188 | } | ||
3177 | 3189 | ||
3178 | for (i = 0; i < rv2p_code_len; i += 8) { | 3190 | for (i = 0; i < rv2p_code_len; i += 8) { |
3179 | REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code)); | 3191 | REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code)); |
@@ -4215,13 +4227,6 @@ bnx2_init_remote_phy(struct bnx2 *bp) | |||
4215 | if (netif_running(bp->dev)) { | 4227 | if (netif_running(bp->dev)) { |
4216 | u32 sig; | 4228 | u32 sig; |
4217 | 4229 | ||
4218 | if (val & BNX2_LINK_STATUS_LINK_UP) { | ||
4219 | bp->link_up = 1; | ||
4220 | netif_carrier_on(bp->dev); | ||
4221 | } else { | ||
4222 | bp->link_up = 0; | ||
4223 | netif_carrier_off(bp->dev); | ||
4224 | } | ||
4225 | sig = BNX2_DRV_ACK_CAP_SIGNATURE | | 4230 | sig = BNX2_DRV_ACK_CAP_SIGNATURE | |
4226 | BNX2_FW_CAP_REMOTE_PHY_CAPABLE; | 4231 | BNX2_FW_CAP_REMOTE_PHY_CAPABLE; |
4227 | bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig); | 4232 | bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig); |
@@ -4878,6 +4883,8 @@ bnx2_init_nic(struct bnx2 *bp) | |||
4878 | spin_lock_bh(&bp->phy_lock); | 4883 | spin_lock_bh(&bp->phy_lock); |
4879 | bnx2_init_phy(bp); | 4884 | bnx2_init_phy(bp); |
4880 | bnx2_set_link(bp); | 4885 | bnx2_set_link(bp); |
4886 | if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) | ||
4887 | bnx2_remote_phy_event(bp); | ||
4881 | spin_unlock_bh(&bp->phy_lock); | 4888 | spin_unlock_bh(&bp->phy_lock); |
4882 | return 0; | 4889 | return 0; |
4883 | } | 4890 | } |
@@ -4920,7 +4927,7 @@ bnx2_test_registers(struct bnx2 *bp) | |||
4920 | { 0x0c08, BNX2_FL_NOT_5709, 0x0f0ff073, 0x00000000 }, | 4927 | { 0x0c08, BNX2_FL_NOT_5709, 0x0f0ff073, 0x00000000 }, |
4921 | 4928 | ||
4922 | { 0x1000, 0, 0x00000000, 0x00000001 }, | 4929 | { 0x1000, 0, 0x00000000, 0x00000001 }, |
4923 | { 0x1004, 0, 0x00000000, 0x000f0001 }, | 4930 | { 0x1004, BNX2_FL_NOT_5709, 0x00000000, 0x000f0001 }, |
4924 | 4931 | ||
4925 | { 0x1408, 0, 0x01c00800, 0x00000000 }, | 4932 | { 0x1408, 0, 0x01c00800, 0x00000000 }, |
4926 | { 0x149c, 0, 0x8000ffff, 0x00000000 }, | 4933 | { 0x149c, 0, 0x8000ffff, 0x00000000 }, |