1 files changed, 105 insertions, 96 deletions
diff --git a/drivers/net/atlx/atl1.h b/drivers/net/atlx/atl1.h
index 30c5a8d72f3a..4d3d65b0cf57 100644
--- a/drivers/net/atlx/atl1.h
+++ b/drivers/net/atlx/atl1.h
@@ -452,106 +452,115 @@ struct rx_free_desc {
        /* __attribute__ ((packed)) is required */
 } __attribute__ ((packed));
-/* tsopu defines */
+/*
-#define TSO_PARAM_BUFLEN_MASK           0x3FFF
+ * The L1 transmit packet descriptor is comprised of four 32-bit words.
-#define TSO_PARAM_BUFLEN_SHIFT          0
+ *
-#define TSO_PARAM_DMAINT_MASK           0x0001
+ *      31                                      0
-#define TSO_PARAM_DMAINT_SHIFT          14
+ *      +---------------------------------------+
-#define TSO_PARAM_PKTNT_MASK            0x0001
+ *      |       Word 0: Buffer addr lo          |
-#define TSO_PARAM_PKTINT_SHIFT          15
+ *      +---------------------------------------+
-#define TSO_PARAM_VLANTAG_MASK          0xFFFF
+ *      |       Word 1: Buffer addr hi          |
-#define TSO_PARAM_VLAN_SHIFT            16
+ *      +---------------------------------------+
+ *      |               Word 2                  |
-/* tsopl defines */
+ *      +---------------------------------------+
-#define TSO_PARAM_EOP_MASK              0x0001
+ *      |               Word 3                  |
-#define TSO_PARAM_EOP_SHIFT             0
+ *      +---------------------------------------+
-#define TSO_PARAM_COALESCE_MASK         0x0001
+ *
-#define TSO_PARAM_COALESCE_SHIFT        1
+ * Words 0 and 1 combine to form a 64-bit buffer address.
-#define TSO_PARAM_INSVLAG_MASK          0x0001
+ *
-#define TSO_PARAM_INSVLAG_SHIFT         2
+ * Word 2 is self explanatory in the #define block below.
-#define TSO_PARAM_CUSTOMCKSUM_MASK      0x0001
+ *
-#define TSO_PARAM_CUSTOMCKSUM_SHIFT     3
+ * Word 3 has two forms, depending upon the state of bits 3 and 4.
-#define TSO_PARAM_SEGMENT_MASK          0x0001
+ * If bits 3 and 4 are both zero, then bits 14:31 are unused by the
-#define TSO_PARAM_SEGMENT_SHIFT         4
+ * hardware.  Otherwise, if either bit 3 or 4 is set, the definition
-#define TSO_PARAM_IPCKSUM_MASK          0x0001
+ * of bits 14:31 vary according to the following depiction.
-#define TSO_PARAM_IPCKSUM_SHIFT         5
+ *
-#define TSO_PARAM_TCPCKSUM_MASK         0x0001
+ *      0       End of packet                   0       End of packet
-#define TSO_PARAM_TCPCKSUM_SHIFT        6
+ *      1       Coalesce                        1       Coalesce
-#define TSO_PARAM_UDPCKSUM_MASK         0x0001
+ *      2       Insert VLAN tag                 2       Insert VLAN tag
-#define TSO_PARAM_UDPCKSUM_SHIFT        7
+ *      3       Custom csum enable = 0          3       Custom csum enable = 1
-#define TSO_PARAM_VLANTAGGED_MASK       0x0001
+ *      4       Segment enable = 1              4       Segment enable = 0
-#define TSO_PARAM_VLANTAGGED_SHIFT      8
+ *      5       Generate IP checksum            5       Generate IP checksum
-#define TSO_PARAM_ETHTYPE_MASK          0x0001
+ *      6       Generate TCP checksum           6       Generate TCP checksum
-#define TSO_PARAM_ETHTYPE_SHIFT         9
+ *      7       Generate UDP checksum           7       Generate UDP checksum
-#define TSO_PARAM_IPHL_MASK             0x000F
+ *      8       VLAN tagged                     8       VLAN tagged
-#define TSO_PARAM_IPHL_SHIFT            10
+ *      9       Ethernet frame type             9       Ethernet frame type
-#define TSO_PARAM_TCPHDRLEN_MASK        0x000F
+ *      10-+                                    10-+
-#define TSO_PARAM_TCPHDRLEN_SHIFT       14
+ *      11 |    IP hdr length (10:13)           11 |    IP hdr length (10:13)
-#define TSO_PARAM_HDRFLAG_MASK          0x0001
+ *      12 |    (num 32-bit words)              12 |    (num 32-bit words)
-#define TSO_PARAM_HDRFLAG_SHIFT         18
+ *      13-+                                    13-+
-#define TSO_PARAM_MSS_MASK              0x1FFF
+ *      14-+                                    14      Unused
-#define TSO_PARAM_MSS_SHIFT             19
+ *      15 |    TCP hdr length (14:17)          15      Unused
+ *      16 |    (num 32-bit words)              16-+
-/* csumpu defines */
+ *      17-+                                    17 |
-#define CSUM_PARAM_BUFLEN_MASK          0x3FFF
+ *      18      Header TPD flag                 18 |
-#define CSUM_PARAM_BUFLEN_SHIFT         0
+ *      19-+                                    19 |    Payload offset
-#define CSUM_PARAM_DMAINT_MASK          0x0001
+ *      20 |                                    20 |        (16:23)
-#define CSUM_PARAM_DMAINT_SHIFT         14
+ *      21 |                                    21 |
-#define CSUM_PARAM_PKTINT_MASK          0x0001
+ *      22 |                                    22 |
-#define CSUM_PARAM_PKTINT_SHIFT         15
+ *      23 |                                    23-+
-#define CSUM_PARAM_VALANTAG_MASK        0xFFFF
+ *      24 |                                    24-+
-#define CSUM_PARAM_VALAN_SHIFT          16
+ *      25 |    MSS (19:31)                     25 |
+ *      26 |                                    26 |
-/* csumpl defines*/
+ *      27 |                                    27 |    Custom csum offset
-#define CSUM_PARAM_EOP_MASK             0x0001
+ *      28 |                                    28 |         (24:31)
-#define CSUM_PARAM_EOP_SHIFT            0
+ *      29 |                                    29 |
-#define CSUM_PARAM_COALESCE_MASK        0x0001
+ *      30 |                                    30 |
-#define CSUM_PARAM_COALESCE_SHIFT       1
+ *      31-+                                    31-+
-#define CSUM_PARAM_INSVLAG_MASK         0x0001
+ */
-#define CSUM_PARAM_INSVLAG_SHIFT        2
-#define CSUM_PARAM_CUSTOMCKSUM_MASK     0x0001
-#define CSUM_PARAM_CUSTOMCKSUM_SHIFT    3
-#define CSUM_PARAM_SEGMENT_MASK         0x0001
-#define CSUM_PARAM_SEGMENT_SHIFT        4
-#define CSUM_PARAM_IPCKSUM_MASK         0x0001
-#define CSUM_PARAM_IPCKSUM_SHIFT        5
-#define CSUM_PARAM_TCPCKSUM_MASK        0x0001
-#define CSUM_PARAM_TCPCKSUM_SHIFT       6
-#define CSUM_PARAM_UDPCKSUM_MASK        0x0001
-#define CSUM_PARAM_UDPCKSUM_SHIFT       7
-#define CSUM_PARAM_VLANTAGGED_MASK      0x0001
-#define CSUM_PARAM_VLANTAGGED_SHIFT     8
-#define CSUM_PARAM_ETHTYPE_MASK         0x0001
-#define CSUM_PARAM_ETHTYPE_SHIFT        9
-#define CSUM_PARAM_IPHL_MASK            0x000F
-#define CSUM_PARAM_IPHL_SHIFT           10
-#define CSUM_PARAM_PLOADOFFSET_MASK     0x00FF
-#define CSUM_PARAM_PLOADOFFSET_SHIFT    16
-#define CSUM_PARAM_XSUMOFFSET_MASK      0x00FF
-#define CSUM_PARAM_XSUMOFFSET_SHIFT     24
-/* TPD descriptor */
-struct tso_param {
-        /* The order of these declarations is important -- don't change it */
-        u32 tsopu;      /* tso_param upper word */
-        u32 tsopl;      /* tso_param lower word */
-};
-struct csum_param {
-        /* The order of these declarations is important -- don't change it */
-        u32 csumpu;     /* csum_param upper word */
-        u32 csumpl;     /* csum_param lower word */
-};
-union tpd_descr {
+/* tpd word 2 */
-        u64 data;
+#define TPD_BUFLEN_MASK         0x3FFF
-        struct csum_param csum;
+#define TPD_BUFLEN_SHIFT        0
-        struct tso_param tso;
+#define TPD_DMAINT_MASK         0x0001
-};
+#define TPD_DMAINT_SHIFT        14
+#define TPD_PKTNT_MASK          0x0001
+#define TPD_PKTINT_SHIFT        15
+#define TPD_VLANTAG_MASK        0xFFFF
+#define TPD_VLAN_SHIFT          16
+/* tpd word 3 bits 0:13 */
+#define TPD_EOP_MASK            0x0001
+#define TPD_EOP_SHIFT           0
+#define TPD_COALESCE_MASK       0x0001
+#define TPD_COALESCE_SHIFT      1
+#define TPD_INS_VL_TAG_MASK     0x0001
+#define TPD_INS_VL_TAG_SHIFT    2
+#define TPD_CUST_CSUM_EN_MASK   0x0001
+#define TPD_CUST_CSUM_EN_SHIFT  3
+#define TPD_SEGMENT_EN_MASK     0x0001
+#define TPD_SEGMENT_EN_SHIFT    4
+#define TPD_IP_CSUM_MASK        0x0001
+#define TPD_IP_CSUM_SHIFT       5
+#define TPD_TCP_CSUM_MASK       0x0001
+#define TPD_TCP_CSUM_SHIFT      6
+#define TPD_UDP_CSUM_MASK       0x0001
+#define TPD_UDP_CSUM_SHIFT      7
+#define TPD_VL_TAGGED_MASK      0x0001
+#define TPD_VL_TAGGED_SHIFT     8
+#define TPD_ETHTYPE_MASK        0x0001
+#define TPD_ETHTYPE_SHIFT       9
+#define TPD_IPHL_MASK           0x000F
+#define TPD_IPHL_SHIFT          10
+/* tpd word 3 bits 14:31 if segment enabled */
+#define TPD_TCPHDRLEN_MASK      0x000F
+#define TPD_TCPHDRLEN_SHIFT     14
+#define TPD_HDRFLAG_MASK        0x0001
+#define TPD_HDRFLAG_SHIFT       18
+#define TPD_MSS_MASK            0x1FFF
+#define TPD_MSS_SHIFT           19
+/* tpd word 3 bits 16:31 if custom csum enabled */
+#define TPD_PLOADOFFSET_MASK    0x00FF
+#define TPD_PLOADOFFSET_SHIFT   16
+#define TPD_CCSUMOFFSET_MASK    0x00FF
+#define TPD_CCSUMOFFSET_SHIFT   24
 struct tx_packet_desc {
        __le64 buffer_addr;
-        union tpd_descr desc;
+        __le32 word2;
+        __le32 word3;
 };
 /* DMA Order Settings */

diff --git a/drivers/net/atlx/atl1.h b/drivers/net/atlx/atl1.h index 30c5a8d72f3a..4d3d65b0cf57 100644 --- a/drivers/net/atlx/atl1.h +++ b/drivers/net/atlx/atl1.h
@@ -452,106 +452,115 @@ struct rx_free_desc {
452	/* __attribute__ ((packed)) is required */	452	/* __attribute__ ((packed)) is required */
453	} __attribute__ ((packed));	453	} __attribute__ ((packed));
454		454
455	/* tsopu defines */	455	/*
456	#define TSO_PARAM_BUFLEN_MASK 0x3FFF	456	* The L1 transmit packet descriptor is comprised of four 32-bit words.
457	#define TSO_PARAM_BUFLEN_SHIFT 0	457	*
458	#define TSO_PARAM_DMAINT_MASK 0x0001	458	* 31 0
459	#define TSO_PARAM_DMAINT_SHIFT 14	459	* +---------------------------------------+
460	#define TSO_PARAM_PKTNT_MASK 0x0001	460	* \| Word 0: Buffer addr lo \|
461	#define TSO_PARAM_PKTINT_SHIFT 15	461	* +---------------------------------------+
462	#define TSO_PARAM_VLANTAG_MASK 0xFFFF	462	* \| Word 1: Buffer addr hi \|
463	#define TSO_PARAM_VLAN_SHIFT 16	463	* +---------------------------------------+
464		464	* \| Word 2 \|
465	/* tsopl defines */	465	* +---------------------------------------+
466	#define TSO_PARAM_EOP_MASK 0x0001	466	* \| Word 3 \|
467	#define TSO_PARAM_EOP_SHIFT 0	467	* +---------------------------------------+
468	#define TSO_PARAM_COALESCE_MASK 0x0001	468	*
469	#define TSO_PARAM_COALESCE_SHIFT 1	469	* Words 0 and 1 combine to form a 64-bit buffer address.
470	#define TSO_PARAM_INSVLAG_MASK 0x0001	470	*
471	#define TSO_PARAM_INSVLAG_SHIFT 2	471	* Word 2 is self explanatory in the #define block below.
472	#define TSO_PARAM_CUSTOMCKSUM_MASK 0x0001	472	*
473	#define TSO_PARAM_CUSTOMCKSUM_SHIFT 3	473	* Word 3 has two forms, depending upon the state of bits 3 and 4.
474	#define TSO_PARAM_SEGMENT_MASK 0x0001	474	* If bits 3 and 4 are both zero, then bits 14:31 are unused by the
475	#define TSO_PARAM_SEGMENT_SHIFT 4	475	* hardware. Otherwise, if either bit 3 or 4 is set, the definition
476	#define TSO_PARAM_IPCKSUM_MASK 0x0001	476	* of bits 14:31 vary according to the following depiction.
477	#define TSO_PARAM_IPCKSUM_SHIFT 5	477	*
478	#define TSO_PARAM_TCPCKSUM_MASK 0x0001	478	* 0 End of packet 0 End of packet
479	#define TSO_PARAM_TCPCKSUM_SHIFT 6	479	* 1 Coalesce 1 Coalesce
480	#define TSO_PARAM_UDPCKSUM_MASK 0x0001	480	* 2 Insert VLAN tag 2 Insert VLAN tag
481	#define TSO_PARAM_UDPCKSUM_SHIFT 7	481	* 3 Custom csum enable = 0 3 Custom csum enable = 1
482	#define TSO_PARAM_VLANTAGGED_MASK 0x0001	482	* 4 Segment enable = 1 4 Segment enable = 0
483	#define TSO_PARAM_VLANTAGGED_SHIFT 8	483	* 5 Generate IP checksum 5 Generate IP checksum
484	#define TSO_PARAM_ETHTYPE_MASK 0x0001	484	* 6 Generate TCP checksum 6 Generate TCP checksum
485	#define TSO_PARAM_ETHTYPE_SHIFT 9	485	* 7 Generate UDP checksum 7 Generate UDP checksum
486	#define TSO_PARAM_IPHL_MASK 0x000F	486	* 8 VLAN tagged 8 VLAN tagged
487	#define TSO_PARAM_IPHL_SHIFT 10	487	* 9 Ethernet frame type 9 Ethernet frame type
488	#define TSO_PARAM_TCPHDRLEN_MASK 0x000F	488	* 10-+ 10-+
489	#define TSO_PARAM_TCPHDRLEN_SHIFT 14	489	* 11 \| IP hdr length (10:13) 11 \| IP hdr length (10:13)
490	#define TSO_PARAM_HDRFLAG_MASK 0x0001	490	* 12 \| (num 32-bit words) 12 \| (num 32-bit words)
491	#define TSO_PARAM_HDRFLAG_SHIFT 18	491	* 13-+ 13-+
492	#define TSO_PARAM_MSS_MASK 0x1FFF	492	* 14-+ 14 Unused
493	#define TSO_PARAM_MSS_SHIFT 19	493	* 15 \| TCP hdr length (14:17) 15 Unused
494		494	* 16 \| (num 32-bit words) 16-+
495	/* csumpu defines */	495	* 17-+ 17 \|
496	#define CSUM_PARAM_BUFLEN_MASK 0x3FFF	496	* 18 Header TPD flag 18 \|
497	#define CSUM_PARAM_BUFLEN_SHIFT 0	497	* 19-+ 19 \| Payload offset
498	#define CSUM_PARAM_DMAINT_MASK 0x0001	498	* 20 \| 20 \| (16:23)
499	#define CSUM_PARAM_DMAINT_SHIFT 14	499	* 21 \| 21 \|
500	#define CSUM_PARAM_PKTINT_MASK 0x0001	500	* 22 \| 22 \|
501	#define CSUM_PARAM_PKTINT_SHIFT 15	501	* 23 \| 23-+
502	#define CSUM_PARAM_VALANTAG_MASK 0xFFFF	502	* 24 \| 24-+
503	#define CSUM_PARAM_VALAN_SHIFT 16	503	* 25 \| MSS (19:31) 25 \|
504		504	* 26 \| 26 \|
505	/* csumpl defines*/	505	* 27 \| 27 \| Custom csum offset
506	#define CSUM_PARAM_EOP_MASK 0x0001	506	* 28 \| 28 \| (24:31)
507	#define CSUM_PARAM_EOP_SHIFT 0	507	* 29 \| 29 \|
508	#define CSUM_PARAM_COALESCE_MASK 0x0001	508	* 30 \| 30 \|
509	#define CSUM_PARAM_COALESCE_SHIFT 1	509	* 31-+ 31-+
510	#define CSUM_PARAM_INSVLAG_MASK 0x0001	510	*/
511	#define CSUM_PARAM_INSVLAG_SHIFT 2
512	#define CSUM_PARAM_CUSTOMCKSUM_MASK 0x0001
513	#define CSUM_PARAM_CUSTOMCKSUM_SHIFT 3
514	#define CSUM_PARAM_SEGMENT_MASK 0x0001
515	#define CSUM_PARAM_SEGMENT_SHIFT 4
516	#define CSUM_PARAM_IPCKSUM_MASK 0x0001
517	#define CSUM_PARAM_IPCKSUM_SHIFT 5
518	#define CSUM_PARAM_TCPCKSUM_MASK 0x0001
519	#define CSUM_PARAM_TCPCKSUM_SHIFT 6
520	#define CSUM_PARAM_UDPCKSUM_MASK 0x0001
521	#define CSUM_PARAM_UDPCKSUM_SHIFT 7
522	#define CSUM_PARAM_VLANTAGGED_MASK 0x0001
523	#define CSUM_PARAM_VLANTAGGED_SHIFT 8
524	#define CSUM_PARAM_ETHTYPE_MASK 0x0001
525	#define CSUM_PARAM_ETHTYPE_SHIFT 9
526	#define CSUM_PARAM_IPHL_MASK 0x000F
527	#define CSUM_PARAM_IPHL_SHIFT 10
528	#define CSUM_PARAM_PLOADOFFSET_MASK 0x00FF
529	#define CSUM_PARAM_PLOADOFFSET_SHIFT 16
530	#define CSUM_PARAM_XSUMOFFSET_MASK 0x00FF
531	#define CSUM_PARAM_XSUMOFFSET_SHIFT 24
532
533	/* TPD descriptor */
534	struct tso_param {
535	/* The order of these declarations is important -- don't change it */
536	u32 tsopu; /* tso_param upper word */
537	u32 tsopl; /* tso_param lower word */
538	};
539
540	struct csum_param {
541	/* The order of these declarations is important -- don't change it */
542	u32 csumpu; /* csum_param upper word */
543	u32 csumpl; /* csum_param lower word */
544	};
545		511
546	union tpd_descr {	512	/* tpd word 2 */
547	u64 data;	513	#define TPD_BUFLEN_MASK 0x3FFF
548	struct csum_param csum;	514	#define TPD_BUFLEN_SHIFT 0
549	struct tso_param tso;	515	#define TPD_DMAINT_MASK 0x0001
550	};	516	#define TPD_DMAINT_SHIFT 14
		517	#define TPD_PKTNT_MASK 0x0001
		518	#define TPD_PKTINT_SHIFT 15
		519	#define TPD_VLANTAG_MASK 0xFFFF
		520	#define TPD_VLAN_SHIFT 16
		521
		522	/* tpd word 3 bits 0:13 */
		523	#define TPD_EOP_MASK 0x0001
		524	#define TPD_EOP_SHIFT 0
		525	#define TPD_COALESCE_MASK 0x0001
		526	#define TPD_COALESCE_SHIFT 1
		527	#define TPD_INS_VL_TAG_MASK 0x0001
		528	#define TPD_INS_VL_TAG_SHIFT 2
		529	#define TPD_CUST_CSUM_EN_MASK 0x0001
		530	#define TPD_CUST_CSUM_EN_SHIFT 3
		531	#define TPD_SEGMENT_EN_MASK 0x0001
		532	#define TPD_SEGMENT_EN_SHIFT 4
		533	#define TPD_IP_CSUM_MASK 0x0001
		534	#define TPD_IP_CSUM_SHIFT 5
		535	#define TPD_TCP_CSUM_MASK 0x0001
		536	#define TPD_TCP_CSUM_SHIFT 6
		537	#define TPD_UDP_CSUM_MASK 0x0001
		538	#define TPD_UDP_CSUM_SHIFT 7
		539	#define TPD_VL_TAGGED_MASK 0x0001
		540	#define TPD_VL_TAGGED_SHIFT 8
		541	#define TPD_ETHTYPE_MASK 0x0001
		542	#define TPD_ETHTYPE_SHIFT 9
		543	#define TPD_IPHL_MASK 0x000F
		544	#define TPD_IPHL_SHIFT 10
		545
		546	/* tpd word 3 bits 14:31 if segment enabled */
		547	#define TPD_TCPHDRLEN_MASK 0x000F
		548	#define TPD_TCPHDRLEN_SHIFT 14
		549	#define TPD_HDRFLAG_MASK 0x0001
		550	#define TPD_HDRFLAG_SHIFT 18
		551	#define TPD_MSS_MASK 0x1FFF
		552	#define TPD_MSS_SHIFT 19
		553
		554	/* tpd word 3 bits 16:31 if custom csum enabled */
		555	#define TPD_PLOADOFFSET_MASK 0x00FF
		556	#define TPD_PLOADOFFSET_SHIFT 16
		557	#define TPD_CCSUMOFFSET_MASK 0x00FF
		558	#define TPD_CCSUMOFFSET_SHIFT 24
551		559
552	struct tx_packet_desc {	560	struct tx_packet_desc {
553	__le64 buffer_addr;	561	__le64 buffer_addr;
554	union tpd_descr desc;	562	__le32 word2;
		563	__le32 word3;
555	};	564	};
556		565
557	/* DMA Order Settings */	566	/* DMA Order Settings */