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path: root/drivers/net/atl1c/atl1c_main.c
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Diffstat (limited to 'drivers/net/atl1c/atl1c_main.c')
-rw-r--r--drivers/net/atl1c/atl1c_main.c115
1 files changed, 105 insertions, 10 deletions
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c
index d98095df05be..3d4c0a5a77eb 100644
--- a/drivers/net/atl1c/atl1c_main.c
+++ b/drivers/net/atl1c/atl1c_main.c
@@ -21,11 +21,18 @@
21 21
22#include "atl1c.h" 22#include "atl1c.h"
23 23
24#define ATL1C_DRV_VERSION "1.0.0.1-NAPI" 24#define ATL1C_DRV_VERSION "1.0.0.2-NAPI"
25char atl1c_driver_name[] = "atl1c"; 25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION; 26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063 28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32
33#define L2CB_V10 0xc0
34#define L2CB_V11 0xc1
35
29/* 36/*
30 * atl1c_pci_tbl - PCI Device ID Table 37 * atl1c_pci_tbl - PCI Device ID Table
31 * 38 *
@@ -38,6 +45,9 @@ char atl1c_driver_version[] = ATL1C_DRV_VERSION;
38static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 45static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
41 /* required last entry */ 51 /* required last entry */
42 { 0 } 52 { 0 }
43}; 53};
@@ -593,11 +603,18 @@ static void atl1c_set_mac_type(struct atl1c_hw *hw)
593 case PCI_DEVICE_ID_ATTANSIC_L2C: 603 case PCI_DEVICE_ID_ATTANSIC_L2C:
594 hw->nic_type = athr_l2c; 604 hw->nic_type = athr_l2c;
595 break; 605 break;
596
597 case PCI_DEVICE_ID_ATTANSIC_L1C: 606 case PCI_DEVICE_ID_ATTANSIC_L1C:
598 hw->nic_type = athr_l1c; 607 hw->nic_type = athr_l1c;
599 break; 608 break;
600 609 case PCI_DEVICE_ID_ATHEROS_L2C_B:
610 hw->nic_type = athr_l2c_b;
611 break;
612 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
613 hw->nic_type = athr_l2c_b2;
614 break;
615 case PCI_DEVICE_ID_ATHEROS_L1D:
616 hw->nic_type = athr_l1d;
617 break;
601 default: 618 default:
602 break; 619 break;
603 } 620 }
@@ -620,10 +637,13 @@ static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
620 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; 637 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
621 if (link_ctrl_data & LINK_CTRL_L1_EN) 638 if (link_ctrl_data & LINK_CTRL_L1_EN)
622 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; 639 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
640 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
641 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
623 642
624 if (hw->nic_type == athr_l1c) { 643 if (hw->nic_type == athr_l1c ||
644 hw->nic_type == athr_l1d) {
625 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 645 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
626 hw->ctrl_flags |= ATL1C_LINK_CAP_1000M; 646 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
627 } 647 }
628 return 0; 648 return 0;
629} 649}
@@ -1234,21 +1254,92 @@ static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1234static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) 1254static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1235{ 1255{
1236 u32 pm_ctrl_data; 1256 u32 pm_ctrl_data;
1257 u32 link_ctrl_data;
1237 1258
1238 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1259 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1239 1260 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1240 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; 1261 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1262
1241 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1263 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1242 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1264 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1265 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1266 PM_CTRL_LCKDET_TIMER_SHIFT);
1243 1267
1244 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; 1268 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1269 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1270 pm_ctrl_data |= PM_CTRL_RBER_EN;
1271 pm_ctrl_data |= PM_CTRL_SDES_EN;
1272
1273 if (hw->nic_type == athr_l2c_b ||
1274 hw->nic_type == athr_l1d ||
1275 hw->nic_type == athr_l2c_b2) {
1276 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1277 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1278 if (hw->nic_type == athr_l2c_b &&
1279 hw->revision_id == L2CB_V10)
1280 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1281 }
1282
1283 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1284
1285 pm_ctrl_data |= PM_CTRL_PCIE_RECV;
1286 pm_ctrl_data |= AT_ASPM_L1_TIMER << PM_CTRL_PM_REQ_TIMER_SHIFT;
1287 pm_ctrl_data &= ~PM_CTRL_EN_BUFS_RX_L0S;
1288 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1289 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1290 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1291 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1292 }
1245 1293
1246 if (linkup) { 1294 if (linkup) {
1247 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1295 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1248 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1296 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1297 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1298 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1299 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1300 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1301
1302 if (hw->nic_type == athr_l2c_b ||
1303 hw->nic_type == athr_l1d ||
1304 hw->nic_type == athr_l2c_b2) {
1305 if (hw->nic_type == athr_l2c_b)
1306 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1307 pm_ctrl_data &= PM_CTRL_ASPM_L0S_EN;
1308 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1309 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1310 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1311 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1312 if (hw->adapter->link_speed == SPEED_100 ||
1313 hw->adapter->link_speed == SPEED_1000) {
1314 pm_ctrl_data &=
1315 ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1316 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1317 if (hw->nic_type == athr_l1d)
1318 pm_ctrl_data |= 0xF <<
1319 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1320 else
1321 pm_ctrl_data |= 7 <<
1322 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1323 }
1324 } else {
1325 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1326 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1327 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1328 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1329 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1330 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1331 }
1332 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29);
1333 if (hw->adapter->link_speed == SPEED_10)
1334 if (hw->nic_type == athr_l1d)
1335 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0xB69D);
1336 else
1337 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD);
1338 else if (hw->adapter->link_speed == SPEED_100)
1339 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB2DD);
1340 else
1341 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x96DD);
1249 1342
1250 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1251 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1252 } else { 1343 } else {
1253 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; 1344 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1254 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; 1345 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
@@ -1302,6 +1393,10 @@ static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1302 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 1393 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1303 1394
1304 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; 1395 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1396 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2) {
1397 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1398 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1399 }
1305 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 1400 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1306} 1401}
1307 1402