diff options
Diffstat (limited to 'drivers/net/amd8111e.c')
-rw-r--r-- | drivers/net/amd8111e.c | 480 |
1 files changed, 240 insertions, 240 deletions
diff --git a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c index f83df129d7b9..a77df854032c 100644 --- a/drivers/net/amd8111e.c +++ b/drivers/net/amd8111e.c | |||
@@ -1,8 +1,8 @@ | |||
1 | 1 | ||
2 | /* Advanced Micro Devices Inc. AMD8111E Linux Network Driver | 2 | /* Advanced Micro Devices Inc. AMD8111E Linux Network Driver |
3 | * Copyright (C) 2004 Advanced Micro Devices | 3 | * Copyright (C) 2004 Advanced Micro Devices |
4 | * | ||
4 | * | 5 | * |
5 | * | ||
6 | * Copyright 2001,2002 Jeff Garzik <jgarzik@mandrakesoft.com> [ 8139cp.c,tg3.c ] | 6 | * Copyright 2001,2002 Jeff Garzik <jgarzik@mandrakesoft.com> [ 8139cp.c,tg3.c ] |
7 | * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)[ tg3.c] | 7 | * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)[ tg3.c] |
8 | * Copyright 1996-1999 Thomas Bogendoerfer [ pcnet32.c ] | 8 | * Copyright 1996-1999 Thomas Bogendoerfer [ pcnet32.c ] |
@@ -12,7 +12,7 @@ | |||
12 | * Carsten Langgaard, carstenl@mips.com [ pcnet32.c ] | 12 | * Carsten Langgaard, carstenl@mips.com [ pcnet32.c ] |
13 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | 13 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
14 | * | 14 | * |
15 | * | 15 | * |
16 | * This program is free software; you can redistribute it and/or modify | 16 | * This program is free software; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | 17 | * it under the terms of the GNU General Public License as published by |
18 | * the Free Software Foundation; either version 2 of the License, or | 18 | * the Free Software Foundation; either version 2 of the License, or |
@@ -25,16 +25,16 @@ | |||
25 | * | 25 | * |
26 | * You should have received a copy of the GNU General Public License | 26 | * You should have received a copy of the GNU General Public License |
27 | * along with this program; if not, write to the Free Software | 27 | * along with this program; if not, write to the Free Software |
28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 |
29 | * USA | 29 | * USA |
30 | 30 | ||
31 | Module Name: | 31 | Module Name: |
32 | 32 | ||
33 | amd8111e.c | 33 | amd8111e.c |
34 | 34 | ||
35 | Abstract: | 35 | Abstract: |
36 | 36 | ||
37 | AMD8111 based 10/100 Ethernet Controller Driver. | 37 | AMD8111 based 10/100 Ethernet Controller Driver. |
38 | 38 | ||
39 | Environment: | 39 | Environment: |
40 | 40 | ||
@@ -58,13 +58,13 @@ Revision History: | |||
58 | 3.0.4 12/09/2003 | 58 | 3.0.4 12/09/2003 |
59 | 1. Added set_mac_address routine for bonding driver support. | 59 | 1. Added set_mac_address routine for bonding driver support. |
60 | 2. Tested the driver for bonding support | 60 | 2. Tested the driver for bonding support |
61 | 3. Bug fix: Fixed mismach in actual receive buffer lenth and lenth | 61 | 3. Bug fix: Fixed mismach in actual receive buffer lenth and lenth |
62 | indicated to the h/w. | 62 | indicated to the h/w. |
63 | 4. Modified amd8111e_rx() routine to receive all the received packets | 63 | 4. Modified amd8111e_rx() routine to receive all the received packets |
64 | in the first interrupt. | 64 | in the first interrupt. |
65 | 5. Bug fix: Corrected rx_errors reported in get_stats() function. | 65 | 5. Bug fix: Corrected rx_errors reported in get_stats() function. |
66 | 3.0.5 03/22/2004 | 66 | 3.0.5 03/22/2004 |
67 | 1. Added NAPI support | 67 | 1. Added NAPI support |
68 | 68 | ||
69 | */ | 69 | */ |
70 | 70 | ||
@@ -84,7 +84,7 @@ Revision History: | |||
84 | #include <linux/ethtool.h> | 84 | #include <linux/ethtool.h> |
85 | #include <linux/mii.h> | 85 | #include <linux/mii.h> |
86 | #include <linux/if_vlan.h> | 86 | #include <linux/if_vlan.h> |
87 | #include <linux/ctype.h> | 87 | #include <linux/ctype.h> |
88 | #include <linux/crc32.h> | 88 | #include <linux/crc32.h> |
89 | #include <linux/dma-mapping.h> | 89 | #include <linux/dma-mapping.h> |
90 | 90 | ||
@@ -114,13 +114,13 @@ module_param_array(dynamic_ipg, bool, NULL, 0); | |||
114 | MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: Disable"); | 114 | MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: Disable"); |
115 | 115 | ||
116 | static struct pci_device_id amd8111e_pci_tbl[] = { | 116 | static struct pci_device_id amd8111e_pci_tbl[] = { |
117 | 117 | ||
118 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462, | 118 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462, |
119 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 119 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
120 | { 0, } | 120 | { 0, } |
121 | 121 | ||
122 | }; | 122 | }; |
123 | /* | 123 | /* |
124 | This function will read the PHY registers. | 124 | This function will read the PHY registers. |
125 | */ | 125 | */ |
126 | static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32* val) | 126 | static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32* val) |
@@ -141,17 +141,17 @@ static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, u32* | |||
141 | } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); | 141 | } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); |
142 | if(reg_val & PHY_RD_ERR) | 142 | if(reg_val & PHY_RD_ERR) |
143 | goto err_phy_read; | 143 | goto err_phy_read; |
144 | 144 | ||
145 | *val = reg_val & 0xffff; | 145 | *val = reg_val & 0xffff; |
146 | return 0; | 146 | return 0; |
147 | err_phy_read: | 147 | err_phy_read: |
148 | *val = 0; | 148 | *val = 0; |
149 | return -EINVAL; | 149 | return -EINVAL; |
150 | 150 | ||
151 | } | 151 | } |
152 | 152 | ||
153 | /* | 153 | /* |
154 | This function will write into PHY registers. | 154 | This function will write into PHY registers. |
155 | */ | 155 | */ |
156 | static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32 val) | 156 | static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32 val) |
157 | { | 157 | { |
@@ -170,19 +170,19 @@ static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, u32 | |||
170 | reg_val = readl(mmio + PHY_ACCESS); | 170 | reg_val = readl(mmio + PHY_ACCESS); |
171 | udelay(30); /* It takes 30 us to read/write the data */ | 171 | udelay(30); /* It takes 30 us to read/write the data */ |
172 | } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); | 172 | } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); |
173 | 173 | ||
174 | if(reg_val & PHY_RD_ERR) | 174 | if(reg_val & PHY_RD_ERR) |
175 | goto err_phy_write; | 175 | goto err_phy_write; |
176 | 176 | ||
177 | return 0; | 177 | return 0; |
178 | 178 | ||
179 | err_phy_write: | 179 | err_phy_write: |
180 | return -EINVAL; | 180 | return -EINVAL; |
181 | 181 | ||
182 | } | 182 | } |
183 | /* | 183 | /* |
184 | This is the mii register read function provided to the mii interface. | 184 | This is the mii register read function provided to the mii interface. |
185 | */ | 185 | */ |
186 | static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num) | 186 | static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num) |
187 | { | 187 | { |
188 | struct amd8111e_priv* lp = netdev_priv(dev); | 188 | struct amd8111e_priv* lp = netdev_priv(dev); |
@@ -190,12 +190,12 @@ static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num) | |||
190 | 190 | ||
191 | amd8111e_read_phy(lp,phy_id,reg_num,®_val); | 191 | amd8111e_read_phy(lp,phy_id,reg_num,®_val); |
192 | return reg_val; | 192 | return reg_val; |
193 | 193 | ||
194 | } | 194 | } |
195 | 195 | ||
196 | /* | 196 | /* |
197 | This is the mii register write function provided to the mii interface. | 197 | This is the mii register write function provided to the mii interface. |
198 | */ | 198 | */ |
199 | static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int reg_num, int val) | 199 | static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int reg_num, int val) |
200 | { | 200 | { |
201 | struct amd8111e_priv* lp = netdev_priv(dev); | 201 | struct amd8111e_priv* lp = netdev_priv(dev); |
@@ -210,7 +210,7 @@ static void amd8111e_set_ext_phy(struct net_device *dev) | |||
210 | { | 210 | { |
211 | struct amd8111e_priv *lp = netdev_priv(dev); | 211 | struct amd8111e_priv *lp = netdev_priv(dev); |
212 | u32 bmcr,advert,tmp; | 212 | u32 bmcr,advert,tmp; |
213 | 213 | ||
214 | /* Determine mii register values to set the speed */ | 214 | /* Determine mii register values to set the speed */ |
215 | advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE); | 215 | advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE); |
216 | tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 216 | tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4); |
@@ -227,7 +227,7 @@ static void amd8111e_set_ext_phy(struct net_device *dev) | |||
227 | case SPEED10_FULL: | 227 | case SPEED10_FULL: |
228 | tmp |= ADVERTISE_10FULL; | 228 | tmp |= ADVERTISE_10FULL; |
229 | break; | 229 | break; |
230 | case SPEED100_HALF: | 230 | case SPEED100_HALF: |
231 | tmp |= ADVERTISE_100HALF; | 231 | tmp |= ADVERTISE_100HALF; |
232 | break; | 232 | break; |
233 | case SPEED100_FULL: | 233 | case SPEED100_FULL: |
@@ -244,8 +244,8 @@ static void amd8111e_set_ext_phy(struct net_device *dev) | |||
244 | 244 | ||
245 | } | 245 | } |
246 | 246 | ||
247 | /* | 247 | /* |
248 | This function will unmap skb->data space and will free | 248 | This function will unmap skb->data space and will free |
249 | all transmit and receive skbuffs. | 249 | all transmit and receive skbuffs. |
250 | */ | 250 | */ |
251 | static int amd8111e_free_skbs(struct net_device *dev) | 251 | static int amd8111e_free_skbs(struct net_device *dev) |
@@ -274,7 +274,7 @@ static int amd8111e_free_skbs(struct net_device *dev) | |||
274 | lp->rx_dma_addr[i] = 0; | 274 | lp->rx_dma_addr[i] = 0; |
275 | } | 275 | } |
276 | } | 276 | } |
277 | 277 | ||
278 | return 0; | 278 | return 0; |
279 | } | 279 | } |
280 | 280 | ||
@@ -285,7 +285,7 @@ static inline void amd8111e_set_rx_buff_len(struct net_device* dev) | |||
285 | { | 285 | { |
286 | struct amd8111e_priv* lp = netdev_priv(dev); | 286 | struct amd8111e_priv* lp = netdev_priv(dev); |
287 | unsigned int mtu = dev->mtu; | 287 | unsigned int mtu = dev->mtu; |
288 | 288 | ||
289 | if (mtu > ETH_DATA_LEN){ | 289 | if (mtu > ETH_DATA_LEN){ |
290 | /* MTU + ethernet header + FCS | 290 | /* MTU + ethernet header + FCS |
291 | + optional VLAN tag + skb reserve space 2 */ | 291 | + optional VLAN tag + skb reserve space 2 */ |
@@ -298,7 +298,7 @@ static inline void amd8111e_set_rx_buff_len(struct net_device* dev) | |||
298 | } | 298 | } |
299 | } | 299 | } |
300 | 300 | ||
301 | /* | 301 | /* |
302 | This function will free all the previously allocated buffers, determine new receive buffer length and will allocate new receive buffers. This function also allocates and initializes both the transmitter and receive hardware descriptors. | 302 | This function will free all the previously allocated buffers, determine new receive buffer length and will allocate new receive buffers. This function also allocates and initializes both the transmitter and receive hardware descriptors. |
303 | */ | 303 | */ |
304 | static int amd8111e_init_ring(struct net_device *dev) | 304 | static int amd8111e_init_ring(struct net_device *dev) |
@@ -309,24 +309,24 @@ static int amd8111e_init_ring(struct net_device *dev) | |||
309 | lp->rx_idx = lp->tx_idx = 0; | 309 | lp->rx_idx = lp->tx_idx = 0; |
310 | lp->tx_complete_idx = 0; | 310 | lp->tx_complete_idx = 0; |
311 | lp->tx_ring_idx = 0; | 311 | lp->tx_ring_idx = 0; |
312 | 312 | ||
313 | 313 | ||
314 | if(lp->opened) | 314 | if(lp->opened) |
315 | /* Free previously allocated transmit and receive skbs */ | 315 | /* Free previously allocated transmit and receive skbs */ |
316 | amd8111e_free_skbs(dev); | 316 | amd8111e_free_skbs(dev); |
317 | 317 | ||
318 | else{ | 318 | else{ |
319 | /* allocate the tx and rx descriptors */ | 319 | /* allocate the tx and rx descriptors */ |
320 | if((lp->tx_ring = pci_alloc_consistent(lp->pci_dev, | 320 | if((lp->tx_ring = pci_alloc_consistent(lp->pci_dev, |
321 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, | 321 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, |
322 | &lp->tx_ring_dma_addr)) == NULL) | 322 | &lp->tx_ring_dma_addr)) == NULL) |
323 | 323 | ||
324 | goto err_no_mem; | 324 | goto err_no_mem; |
325 | 325 | ||
326 | if((lp->rx_ring = pci_alloc_consistent(lp->pci_dev, | 326 | if((lp->rx_ring = pci_alloc_consistent(lp->pci_dev, |
327 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, | 327 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, |
328 | &lp->rx_ring_dma_addr)) == NULL) | 328 | &lp->rx_ring_dma_addr)) == NULL) |
329 | 329 | ||
330 | goto err_free_tx_ring; | 330 | goto err_free_tx_ring; |
331 | 331 | ||
332 | } | 332 | } |
@@ -346,7 +346,7 @@ static int amd8111e_init_ring(struct net_device *dev) | |||
346 | } | 346 | } |
347 | /* Initilaizing receive descriptors */ | 347 | /* Initilaizing receive descriptors */ |
348 | for (i = 0; i < NUM_RX_BUFFERS; i++) { | 348 | for (i = 0; i < NUM_RX_BUFFERS; i++) { |
349 | lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, | 349 | lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, |
350 | lp->rx_skbuff[i]->data,lp->rx_buff_len-2, PCI_DMA_FROMDEVICE); | 350 | lp->rx_skbuff[i]->data,lp->rx_buff_len-2, PCI_DMA_FROMDEVICE); |
351 | 351 | ||
352 | lp->rx_ring[i].buff_phy_addr = cpu_to_le32(lp->rx_dma_addr[i]); | 352 | lp->rx_ring[i].buff_phy_addr = cpu_to_le32(lp->rx_dma_addr[i]); |
@@ -365,15 +365,15 @@ static int amd8111e_init_ring(struct net_device *dev) | |||
365 | return 0; | 365 | return 0; |
366 | 366 | ||
367 | err_free_rx_ring: | 367 | err_free_rx_ring: |
368 | 368 | ||
369 | pci_free_consistent(lp->pci_dev, | 369 | pci_free_consistent(lp->pci_dev, |
370 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,lp->rx_ring, | 370 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,lp->rx_ring, |
371 | lp->rx_ring_dma_addr); | 371 | lp->rx_ring_dma_addr); |
372 | 372 | ||
373 | err_free_tx_ring: | 373 | err_free_tx_ring: |
374 | 374 | ||
375 | pci_free_consistent(lp->pci_dev, | 375 | pci_free_consistent(lp->pci_dev, |
376 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,lp->tx_ring, | 376 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,lp->tx_ring, |
377 | lp->tx_ring_dma_addr); | 377 | lp->tx_ring_dma_addr); |
378 | 378 | ||
379 | err_no_mem: | 379 | err_no_mem: |
@@ -395,11 +395,11 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod) | |||
395 | case RX_INTR_COAL : | 395 | case RX_INTR_COAL : |
396 | timeout = coal_conf->rx_timeout; | 396 | timeout = coal_conf->rx_timeout; |
397 | event_count = coal_conf->rx_event_count; | 397 | event_count = coal_conf->rx_event_count; |
398 | if( timeout > MAX_TIMEOUT || | 398 | if( timeout > MAX_TIMEOUT || |
399 | event_count > MAX_EVENT_COUNT ) | 399 | event_count > MAX_EVENT_COUNT ) |
400 | return -EINVAL; | 400 | return -EINVAL; |
401 | 401 | ||
402 | timeout = timeout * DELAY_TIMER_CONV; | 402 | timeout = timeout * DELAY_TIMER_CONV; |
403 | writel(VAL0|STINTEN, mmio+INTEN0); | 403 | writel(VAL0|STINTEN, mmio+INTEN0); |
404 | writel((u32)DLY_INT_A_R0|( event_count<< 16 )|timeout, | 404 | writel((u32)DLY_INT_A_R0|( event_count<< 16 )|timeout, |
405 | mmio+DLY_INT_A); | 405 | mmio+DLY_INT_A); |
@@ -408,12 +408,12 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod) | |||
408 | case TX_INTR_COAL : | 408 | case TX_INTR_COAL : |
409 | timeout = coal_conf->tx_timeout; | 409 | timeout = coal_conf->tx_timeout; |
410 | event_count = coal_conf->tx_event_count; | 410 | event_count = coal_conf->tx_event_count; |
411 | if( timeout > MAX_TIMEOUT || | 411 | if( timeout > MAX_TIMEOUT || |
412 | event_count > MAX_EVENT_COUNT ) | 412 | event_count > MAX_EVENT_COUNT ) |
413 | return -EINVAL; | 413 | return -EINVAL; |
414 | 414 | ||
415 | 415 | ||
416 | timeout = timeout * DELAY_TIMER_CONV; | 416 | timeout = timeout * DELAY_TIMER_CONV; |
417 | writel(VAL0|STINTEN,mmio+INTEN0); | 417 | writel(VAL0|STINTEN,mmio+INTEN0); |
418 | writel((u32)DLY_INT_B_T0|( event_count<< 16 )|timeout, | 418 | writel((u32)DLY_INT_B_T0|( event_count<< 16 )|timeout, |
419 | mmio+DLY_INT_B); | 419 | mmio+DLY_INT_B); |
@@ -425,7 +425,7 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod) | |||
425 | writel(0, mmio +DLY_INT_B); | 425 | writel(0, mmio +DLY_INT_B); |
426 | writel(0, mmio+DLY_INT_A); | 426 | writel(0, mmio+DLY_INT_A); |
427 | break; | 427 | break; |
428 | case ENABLE_COAL: | 428 | case ENABLE_COAL: |
429 | /* Start the timer */ | 429 | /* Start the timer */ |
430 | writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /* 0.5 sec */ | 430 | writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /* 0.5 sec */ |
431 | writel(VAL0|STINTEN, mmio+INTEN0); | 431 | writel(VAL0|STINTEN, mmio+INTEN0); |
@@ -438,8 +438,8 @@ static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod) | |||
438 | 438 | ||
439 | } | 439 | } |
440 | 440 | ||
441 | /* | 441 | /* |
442 | This function initializes the device registers and starts the device. | 442 | This function initializes the device registers and starts the device. |
443 | */ | 443 | */ |
444 | static int amd8111e_restart(struct net_device *dev) | 444 | static int amd8111e_restart(struct net_device *dev) |
445 | { | 445 | { |
@@ -455,8 +455,8 @@ static int amd8111e_restart(struct net_device *dev) | |||
455 | 455 | ||
456 | /* enable the port manager and set auto negotiation always */ | 456 | /* enable the port manager and set auto negotiation always */ |
457 | writel((u32) VAL1|EN_PMGR, mmio + CMD3 ); | 457 | writel((u32) VAL1|EN_PMGR, mmio + CMD3 ); |
458 | writel((u32)XPHYANE|XPHYRST , mmio + CTRL2); | 458 | writel((u32)XPHYANE|XPHYRST , mmio + CTRL2); |
459 | 459 | ||
460 | amd8111e_set_ext_phy(dev); | 460 | amd8111e_set_ext_phy(dev); |
461 | 461 | ||
462 | /* set control registers */ | 462 | /* set control registers */ |
@@ -465,7 +465,7 @@ static int amd8111e_restart(struct net_device *dev) | |||
465 | writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); | 465 | writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); |
466 | 466 | ||
467 | /* enable interrupt */ | 467 | /* enable interrupt */ |
468 | writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN | | 468 | writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN | |
469 | APINT0EN | MIIPDTINTEN | MCCIINTEN | MCCINTEN | MREINTEN | | 469 | APINT0EN | MIIPDTINTEN | MCCIINTEN | MCCINTEN | MREINTEN | |
470 | SPNDINTEN | MPINTEN | SINTEN | STINTEN, mmio + INTEN0); | 470 | SPNDINTEN | MPINTEN | SINTEN | STINTEN, mmio + INTEN0); |
471 | 471 | ||
@@ -477,10 +477,10 @@ static int amd8111e_restart(struct net_device *dev) | |||
477 | 477 | ||
478 | writew((u32)NUM_TX_RING_DR, mmio + XMT_RING_LEN0); | 478 | writew((u32)NUM_TX_RING_DR, mmio + XMT_RING_LEN0); |
479 | writew((u16)NUM_RX_RING_DR, mmio + RCV_RING_LEN0); | 479 | writew((u16)NUM_RX_RING_DR, mmio + RCV_RING_LEN0); |
480 | 480 | ||
481 | /* set default IPG to 96 */ | 481 | /* set default IPG to 96 */ |
482 | writew((u32)DEFAULT_IPG,mmio+IPG); | 482 | writew((u32)DEFAULT_IPG,mmio+IPG); |
483 | writew((u32)(DEFAULT_IPG-IFS1_DELTA), mmio + IFS1); | 483 | writew((u32)(DEFAULT_IPG-IFS1_DELTA), mmio + IFS1); |
484 | 484 | ||
485 | if(lp->options & OPTION_JUMBO_ENABLE){ | 485 | if(lp->options & OPTION_JUMBO_ENABLE){ |
486 | writel((u32)VAL2|JUMBO, mmio + CMD3); | 486 | writel((u32)VAL2|JUMBO, mmio + CMD3); |
@@ -497,10 +497,10 @@ static int amd8111e_restart(struct net_device *dev) | |||
497 | writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3); | 497 | writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3); |
498 | #endif | 498 | #endif |
499 | writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 ); | 499 | writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 ); |
500 | 500 | ||
501 | /* Setting the MAC address to the device */ | 501 | /* Setting the MAC address to the device */ |
502 | for(i = 0; i < ETH_ADDR_LEN; i++) | 502 | for(i = 0; i < ETH_ADDR_LEN; i++) |
503 | writeb( dev->dev_addr[i], mmio + PADR + i ); | 503 | writeb( dev->dev_addr[i], mmio + PADR + i ); |
504 | 504 | ||
505 | /* Enable interrupt coalesce */ | 505 | /* Enable interrupt coalesce */ |
506 | if(lp->options & OPTION_INTR_COAL_ENABLE){ | 506 | if(lp->options & OPTION_INTR_COAL_ENABLE){ |
@@ -508,18 +508,18 @@ static int amd8111e_restart(struct net_device *dev) | |||
508 | dev->name); | 508 | dev->name); |
509 | amd8111e_set_coalesce(dev,ENABLE_COAL); | 509 | amd8111e_set_coalesce(dev,ENABLE_COAL); |
510 | } | 510 | } |
511 | 511 | ||
512 | /* set RUN bit to start the chip */ | 512 | /* set RUN bit to start the chip */ |
513 | writel(VAL2 | RDMD0, mmio + CMD0); | 513 | writel(VAL2 | RDMD0, mmio + CMD0); |
514 | writel(VAL0 | INTREN | RUN, mmio + CMD0); | 514 | writel(VAL0 | INTREN | RUN, mmio + CMD0); |
515 | 515 | ||
516 | /* To avoid PCI posting bug */ | 516 | /* To avoid PCI posting bug */ |
517 | readl(mmio+CMD0); | 517 | readl(mmio+CMD0); |
518 | return 0; | 518 | return 0; |
519 | } | 519 | } |
520 | /* | 520 | /* |
521 | This function clears necessary the device registers. | 521 | This function clears necessary the device registers. |
522 | */ | 522 | */ |
523 | static void amd8111e_init_hw_default( struct amd8111e_priv* lp) | 523 | static void amd8111e_init_hw_default( struct amd8111e_priv* lp) |
524 | { | 524 | { |
525 | unsigned int reg_val; | 525 | unsigned int reg_val; |
@@ -544,7 +544,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp) | |||
544 | 544 | ||
545 | /* Clear CMD0 */ | 545 | /* Clear CMD0 */ |
546 | writel(CMD0_CLEAR,mmio + CMD0); | 546 | writel(CMD0_CLEAR,mmio + CMD0); |
547 | 547 | ||
548 | /* Clear CMD2 */ | 548 | /* Clear CMD2 */ |
549 | writel(CMD2_CLEAR, mmio +CMD2); | 549 | writel(CMD2_CLEAR, mmio +CMD2); |
550 | 550 | ||
@@ -594,7 +594,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp) | |||
594 | 594 | ||
595 | /* SRAM_SIZE register */ | 595 | /* SRAM_SIZE register */ |
596 | reg_val = readl(mmio + SRAM_SIZE); | 596 | reg_val = readl(mmio + SRAM_SIZE); |
597 | 597 | ||
598 | if(lp->options & OPTION_JUMBO_ENABLE) | 598 | if(lp->options & OPTION_JUMBO_ENABLE) |
599 | writel( VAL2|JUMBO, mmio + CMD3); | 599 | writel( VAL2|JUMBO, mmio + CMD3); |
600 | #if AMD8111E_VLAN_TAG_USED | 600 | #if AMD8111E_VLAN_TAG_USED |
@@ -608,56 +608,56 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* lp) | |||
608 | 608 | ||
609 | } | 609 | } |
610 | 610 | ||
611 | /* | 611 | /* |
612 | This function disables the interrupt and clears all the pending | 612 | This function disables the interrupt and clears all the pending |
613 | interrupts in INT0 | 613 | interrupts in INT0 |
614 | */ | 614 | */ |
615 | static void amd8111e_disable_interrupt(struct amd8111e_priv* lp) | 615 | static void amd8111e_disable_interrupt(struct amd8111e_priv* lp) |
616 | { | 616 | { |
617 | u32 intr0; | 617 | u32 intr0; |
618 | 618 | ||
619 | /* Disable interrupt */ | 619 | /* Disable interrupt */ |
620 | writel(INTREN, lp->mmio + CMD0); | 620 | writel(INTREN, lp->mmio + CMD0); |
621 | 621 | ||
622 | /* Clear INT0 */ | 622 | /* Clear INT0 */ |
623 | intr0 = readl(lp->mmio + INT0); | 623 | intr0 = readl(lp->mmio + INT0); |
624 | writel(intr0, lp->mmio + INT0); | 624 | writel(intr0, lp->mmio + INT0); |
625 | 625 | ||
626 | /* To avoid PCI posting bug */ | 626 | /* To avoid PCI posting bug */ |
627 | readl(lp->mmio + INT0); | 627 | readl(lp->mmio + INT0); |
628 | 628 | ||
629 | } | 629 | } |
630 | 630 | ||
631 | /* | 631 | /* |
632 | This function stops the chip. | 632 | This function stops the chip. |
633 | */ | 633 | */ |
634 | static void amd8111e_stop_chip(struct amd8111e_priv* lp) | 634 | static void amd8111e_stop_chip(struct amd8111e_priv* lp) |
635 | { | 635 | { |
636 | writel(RUN, lp->mmio + CMD0); | 636 | writel(RUN, lp->mmio + CMD0); |
637 | 637 | ||
638 | /* To avoid PCI posting bug */ | 638 | /* To avoid PCI posting bug */ |
639 | readl(lp->mmio + CMD0); | 639 | readl(lp->mmio + CMD0); |
640 | } | 640 | } |
641 | 641 | ||
642 | /* | 642 | /* |
643 | This function frees the transmiter and receiver descriptor rings. | 643 | This function frees the transmiter and receiver descriptor rings. |
644 | */ | 644 | */ |
645 | static void amd8111e_free_ring(struct amd8111e_priv* lp) | 645 | static void amd8111e_free_ring(struct amd8111e_priv* lp) |
646 | { | 646 | { |
647 | 647 | ||
648 | /* Free transmit and receive skbs */ | 648 | /* Free transmit and receive skbs */ |
649 | amd8111e_free_skbs(lp->amd8111e_net_dev); | 649 | amd8111e_free_skbs(lp->amd8111e_net_dev); |
650 | 650 | ||
651 | /* Free transmit and receive descriptor rings */ | 651 | /* Free transmit and receive descriptor rings */ |
652 | if(lp->rx_ring){ | 652 | if(lp->rx_ring){ |
653 | pci_free_consistent(lp->pci_dev, | 653 | pci_free_consistent(lp->pci_dev, |
654 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, | 654 | sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR, |
655 | lp->rx_ring, lp->rx_ring_dma_addr); | 655 | lp->rx_ring, lp->rx_ring_dma_addr); |
656 | lp->rx_ring = NULL; | 656 | lp->rx_ring = NULL; |
657 | } | 657 | } |
658 | 658 | ||
659 | if(lp->tx_ring){ | 659 | if(lp->tx_ring){ |
660 | pci_free_consistent(lp->pci_dev, | 660 | pci_free_consistent(lp->pci_dev, |
661 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, | 661 | sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR, |
662 | lp->tx_ring, lp->tx_ring_dma_addr); | 662 | lp->tx_ring, lp->tx_ring_dma_addr); |
663 | 663 | ||
@@ -665,10 +665,10 @@ static void amd8111e_free_ring(struct amd8111e_priv* lp) | |||
665 | } | 665 | } |
666 | 666 | ||
667 | } | 667 | } |
668 | #if AMD8111E_VLAN_TAG_USED | 668 | #if AMD8111E_VLAN_TAG_USED |
669 | /* | 669 | /* |
670 | This is the receive indication function for packets with vlan tag. | 670 | This is the receive indication function for packets with vlan tag. |
671 | */ | 671 | */ |
672 | static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 vlan_tag) | 672 | static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 vlan_tag) |
673 | { | 673 | { |
674 | #ifdef CONFIG_AMD8111E_NAPI | 674 | #ifdef CONFIG_AMD8111E_NAPI |
@@ -680,7 +680,7 @@ static int amd8111e_vlan_rx(struct amd8111e_priv *lp, struct sk_buff *skb, u16 v | |||
680 | #endif | 680 | #endif |
681 | 681 | ||
682 | /* | 682 | /* |
683 | This function will free all the transmit skbs that are actually transmitted by the device. It will check the ownership of the skb before freeing the skb. | 683 | This function will free all the transmit skbs that are actually transmitted by the device. It will check the ownership of the skb before freeing the skb. |
684 | */ | 684 | */ |
685 | static int amd8111e_tx(struct net_device *dev) | 685 | static int amd8111e_tx(struct net_device *dev) |
686 | { | 686 | { |
@@ -709,7 +709,7 @@ static int amd8111e_tx(struct net_device *dev) | |||
709 | lp->tx_complete_idx++; | 709 | lp->tx_complete_idx++; |
710 | /*COAL update tx coalescing parameters */ | 710 | /*COAL update tx coalescing parameters */ |
711 | lp->coal_conf.tx_packets++; | 711 | lp->coal_conf.tx_packets++; |
712 | lp->coal_conf.tx_bytes += lp->tx_ring[tx_index].buff_count; | 712 | lp->coal_conf.tx_bytes += lp->tx_ring[tx_index].buff_count; |
713 | 713 | ||
714 | if (netif_queue_stopped(dev) && | 714 | if (netif_queue_stopped(dev) && |
715 | lp->tx_complete_idx > lp->tx_idx - NUM_TX_BUFFERS +2){ | 715 | lp->tx_complete_idx > lp->tx_idx - NUM_TX_BUFFERS +2){ |
@@ -734,13 +734,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
734 | int num_rx_pkt = 0; | 734 | int num_rx_pkt = 0; |
735 | /*int max_rx_pkt = NUM_RX_BUFFERS;*/ | 735 | /*int max_rx_pkt = NUM_RX_BUFFERS;*/ |
736 | short pkt_len; | 736 | short pkt_len; |
737 | #if AMD8111E_VLAN_TAG_USED | 737 | #if AMD8111E_VLAN_TAG_USED |
738 | short vtag; | 738 | short vtag; |
739 | #endif | 739 | #endif |
740 | int rx_pkt_limit = dev->quota; | 740 | int rx_pkt_limit = dev->quota; |
741 | unsigned long flags; | 741 | unsigned long flags; |
742 | 742 | ||
743 | do{ | 743 | do{ |
744 | /* process receive packets until we use the quota*/ | 744 | /* process receive packets until we use the quota*/ |
745 | /* If we own the next entry, it's a new packet. Send it up. */ | 745 | /* If we own the next entry, it's a new packet. Send it up. */ |
746 | while(1) { | 746 | while(1) { |
@@ -748,11 +748,11 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
748 | if (status & OWN_BIT) | 748 | if (status & OWN_BIT) |
749 | break; | 749 | break; |
750 | 750 | ||
751 | /* | 751 | /* |
752 | * There is a tricky error noted by John Murphy, | 752 | * There is a tricky error noted by John Murphy, |
753 | * <murf@perftech.com> to Russ Nelson: Even with | 753 | * <murf@perftech.com> to Russ Nelson: Even with |
754 | * full-sized * buffers it's possible for a | 754 | * full-sized * buffers it's possible for a |
755 | * jabber packet to use two buffers, with only | 755 | * jabber packet to use two buffers, with only |
756 | * the last correctly noting the error. | 756 | * the last correctly noting the error. |
757 | */ | 757 | */ |
758 | 758 | ||
@@ -769,9 +769,9 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
769 | } | 769 | } |
770 | pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; | 770 | pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; |
771 | 771 | ||
772 | #if AMD8111E_VLAN_TAG_USED | 772 | #if AMD8111E_VLAN_TAG_USED |
773 | vtag = status & TT_MASK; | 773 | vtag = status & TT_MASK; |
774 | /*MAC will strip vlan tag*/ | 774 | /*MAC will strip vlan tag*/ |
775 | if(lp->vlgrp != NULL && vtag !=0) | 775 | if(lp->vlgrp != NULL && vtag !=0) |
776 | min_pkt_len =MIN_PKT_LEN - 4; | 776 | min_pkt_len =MIN_PKT_LEN - 4; |
777 | else | 777 | else |
@@ -786,13 +786,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
786 | if(--rx_pkt_limit < 0) | 786 | if(--rx_pkt_limit < 0) |
787 | goto rx_not_empty; | 787 | goto rx_not_empty; |
788 | if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ | 788 | if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ |
789 | /* if allocation fail, | 789 | /* if allocation fail, |
790 | ignore that pkt and go to next one */ | 790 | ignore that pkt and go to next one */ |
791 | lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; | 791 | lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; |
792 | lp->drv_rx_errors++; | 792 | lp->drv_rx_errors++; |
793 | goto err_next_pkt; | 793 | goto err_next_pkt; |
794 | } | 794 | } |
795 | 795 | ||
796 | skb_reserve(new_skb, 2); | 796 | skb_reserve(new_skb, 2); |
797 | skb = lp->rx_skbuff[rx_index]; | 797 | skb = lp->rx_skbuff[rx_index]; |
798 | pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], | 798 | pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], |
@@ -805,10 +805,10 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
805 | new_skb->data, | 805 | new_skb->data, |
806 | lp->rx_buff_len-2, | 806 | lp->rx_buff_len-2, |
807 | PCI_DMA_FROMDEVICE); | 807 | PCI_DMA_FROMDEVICE); |
808 | 808 | ||
809 | skb->protocol = eth_type_trans(skb, dev); | 809 | skb->protocol = eth_type_trans(skb, dev); |
810 | 810 | ||
811 | #if AMD8111E_VLAN_TAG_USED | 811 | #if AMD8111E_VLAN_TAG_USED |
812 | if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ | 812 | if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ |
813 | amd8111e_vlan_rx(lp, skb, | 813 | amd8111e_vlan_rx(lp, skb, |
814 | le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); | 814 | le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); |
@@ -817,20 +817,20 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
817 | netif_receive_skb(skb); | 817 | netif_receive_skb(skb); |
818 | /*COAL update rx coalescing parameters*/ | 818 | /*COAL update rx coalescing parameters*/ |
819 | lp->coal_conf.rx_packets++; | 819 | lp->coal_conf.rx_packets++; |
820 | lp->coal_conf.rx_bytes += pkt_len; | 820 | lp->coal_conf.rx_bytes += pkt_len; |
821 | num_rx_pkt++; | 821 | num_rx_pkt++; |
822 | dev->last_rx = jiffies; | 822 | dev->last_rx = jiffies; |
823 | 823 | ||
824 | err_next_pkt: | 824 | err_next_pkt: |
825 | lp->rx_ring[rx_index].buff_phy_addr | 825 | lp->rx_ring[rx_index].buff_phy_addr |
826 | = cpu_to_le32(lp->rx_dma_addr[rx_index]); | 826 | = cpu_to_le32(lp->rx_dma_addr[rx_index]); |
827 | lp->rx_ring[rx_index].buff_count = | 827 | lp->rx_ring[rx_index].buff_count = |
828 | cpu_to_le16(lp->rx_buff_len-2); | 828 | cpu_to_le16(lp->rx_buff_len-2); |
829 | wmb(); | 829 | wmb(); |
830 | lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); | 830 | lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); |
831 | rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK; | 831 | rx_index = (++lp->rx_idx) & RX_RING_DR_MOD_MASK; |
832 | } | 832 | } |
833 | /* Check the interrupt status register for more packets in the | 833 | /* Check the interrupt status register for more packets in the |
834 | mean time. Process them since we have not used up our quota.*/ | 834 | mean time. Process them since we have not used up our quota.*/ |
835 | 835 | ||
836 | intr0 = readl(mmio + INT0); | 836 | intr0 = readl(mmio + INT0); |
@@ -852,13 +852,13 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) | |||
852 | 852 | ||
853 | rx_not_empty: | 853 | rx_not_empty: |
854 | /* Do not call a netif_rx_complete */ | 854 | /* Do not call a netif_rx_complete */ |
855 | dev->quota -= num_rx_pkt; | 855 | dev->quota -= num_rx_pkt; |
856 | *budget -= num_rx_pkt; | 856 | *budget -= num_rx_pkt; |
857 | return 1; | 857 | return 1; |
858 | } | 858 | } |
859 | 859 | ||
860 | #else | 860 | #else |
861 | /* | 861 | /* |
862 | This function will check the ownership of receive buffers and descriptors. It will indicate to kernel up to half the number of maximum receive buffers in the descriptor ring, in a single receive interrupt. It will also replenish the descriptors with new skbs. | 862 | This function will check the ownership of receive buffers and descriptors. It will indicate to kernel up to half the number of maximum receive buffers in the descriptor ring, in a single receive interrupt. It will also replenish the descriptors with new skbs. |
863 | */ | 863 | */ |
864 | static int amd8111e_rx(struct net_device *dev) | 864 | static int amd8111e_rx(struct net_device *dev) |
@@ -870,19 +870,19 @@ static int amd8111e_rx(struct net_device *dev) | |||
870 | int num_rx_pkt = 0; | 870 | int num_rx_pkt = 0; |
871 | int max_rx_pkt = NUM_RX_BUFFERS; | 871 | int max_rx_pkt = NUM_RX_BUFFERS; |
872 | short pkt_len; | 872 | short pkt_len; |
873 | #if AMD8111E_VLAN_TAG_USED | 873 | #if AMD8111E_VLAN_TAG_USED |
874 | short vtag; | 874 | short vtag; |
875 | #endif | 875 | #endif |
876 | 876 | ||
877 | /* If we own the next entry, it's a new packet. Send it up. */ | 877 | /* If we own the next entry, it's a new packet. Send it up. */ |
878 | while(++num_rx_pkt <= max_rx_pkt){ | 878 | while(++num_rx_pkt <= max_rx_pkt){ |
879 | status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags); | 879 | status = le16_to_cpu(lp->rx_ring[rx_index].rx_flags); |
880 | if(status & OWN_BIT) | 880 | if(status & OWN_BIT) |
881 | return 0; | 881 | return 0; |
882 | 882 | ||
883 | /* check if err summary bit is set */ | 883 | /* check if err summary bit is set */ |
884 | if(status & ERR_BIT){ | 884 | if(status & ERR_BIT){ |
885 | /* | 885 | /* |
886 | * There is a tricky error noted by John Murphy, | 886 | * There is a tricky error noted by John Murphy, |
887 | * <murf@perftech.com> to Russ Nelson: Even with full-sized | 887 | * <murf@perftech.com> to Russ Nelson: Even with full-sized |
888 | * buffers it's possible for a jabber packet to use two | 888 | * buffers it's possible for a jabber packet to use two |
@@ -899,9 +899,9 @@ static int amd8111e_rx(struct net_device *dev) | |||
899 | } | 899 | } |
900 | pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; | 900 | pkt_len = le16_to_cpu(lp->rx_ring[rx_index].msg_count) - 4; |
901 | 901 | ||
902 | #if AMD8111E_VLAN_TAG_USED | 902 | #if AMD8111E_VLAN_TAG_USED |
903 | vtag = status & TT_MASK; | 903 | vtag = status & TT_MASK; |
904 | /*MAC will strip vlan tag*/ | 904 | /*MAC will strip vlan tag*/ |
905 | if(lp->vlgrp != NULL && vtag !=0) | 905 | if(lp->vlgrp != NULL && vtag !=0) |
906 | min_pkt_len =MIN_PKT_LEN - 4; | 906 | min_pkt_len =MIN_PKT_LEN - 4; |
907 | else | 907 | else |
@@ -914,13 +914,13 @@ static int amd8111e_rx(struct net_device *dev) | |||
914 | goto err_next_pkt; | 914 | goto err_next_pkt; |
915 | } | 915 | } |
916 | if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ | 916 | if(!(new_skb = dev_alloc_skb(lp->rx_buff_len))){ |
917 | /* if allocation fail, | 917 | /* if allocation fail, |
918 | ignore that pkt and go to next one */ | 918 | ignore that pkt and go to next one */ |
919 | lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; | 919 | lp->rx_ring[rx_index].rx_flags &= RESET_RX_FLAGS; |
920 | lp->drv_rx_errors++; | 920 | lp->drv_rx_errors++; |
921 | goto err_next_pkt; | 921 | goto err_next_pkt; |
922 | } | 922 | } |
923 | 923 | ||
924 | skb_reserve(new_skb, 2); | 924 | skb_reserve(new_skb, 2); |
925 | skb = lp->rx_skbuff[rx_index]; | 925 | skb = lp->rx_skbuff[rx_index]; |
926 | pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], | 926 | pci_unmap_single(lp->pci_dev,lp->rx_dma_addr[rx_index], |
@@ -931,27 +931,27 @@ static int amd8111e_rx(struct net_device *dev) | |||
931 | new_skb->dev = dev; | 931 | new_skb->dev = dev; |
932 | lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev, | 932 | lp->rx_dma_addr[rx_index] = pci_map_single(lp->pci_dev, |
933 | new_skb->data, lp->rx_buff_len-2,PCI_DMA_FROMDEVICE); | 933 | new_skb->data, lp->rx_buff_len-2,PCI_DMA_FROMDEVICE); |
934 | 934 | ||
935 | skb->protocol = eth_type_trans(skb, dev); | 935 | skb->protocol = eth_type_trans(skb, dev); |
936 | 936 | ||
937 | #if AMD8111E_VLAN_TAG_USED | 937 | #if AMD8111E_VLAN_TAG_USED |
938 | if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ | 938 | if(lp->vlgrp != NULL && (vtag == TT_VLAN_TAGGED)){ |
939 | amd8111e_vlan_rx(lp, skb, | 939 | amd8111e_vlan_rx(lp, skb, |
940 | le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); | 940 | le16_to_cpu(lp->rx_ring[rx_index].tag_ctrl_info)); |
941 | } else | 941 | } else |
942 | #endif | 942 | #endif |
943 | 943 | ||
944 | netif_rx (skb); | 944 | netif_rx (skb); |
945 | /*COAL update rx coalescing parameters*/ | 945 | /*COAL update rx coalescing parameters*/ |
946 | lp->coal_conf.rx_packets++; | 946 | lp->coal_conf.rx_packets++; |
947 | lp->coal_conf.rx_bytes += pkt_len; | 947 | lp->coal_conf.rx_bytes += pkt_len; |
948 | 948 | ||
949 | dev->last_rx = jiffies; | 949 | dev->last_rx = jiffies; |
950 | 950 | ||
951 | err_next_pkt: | 951 | err_next_pkt: |
952 | lp->rx_ring[rx_index].buff_phy_addr | 952 | lp->rx_ring[rx_index].buff_phy_addr |
953 | = cpu_to_le32(lp->rx_dma_addr[rx_index]); | 953 | = cpu_to_le32(lp->rx_dma_addr[rx_index]); |
954 | lp->rx_ring[rx_index].buff_count = | 954 | lp->rx_ring[rx_index].buff_count = |
955 | cpu_to_le16(lp->rx_buff_len-2); | 955 | cpu_to_le16(lp->rx_buff_len-2); |
956 | wmb(); | 956 | wmb(); |
957 | lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); | 957 | lp->rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT); |
@@ -961,26 +961,26 @@ err_next_pkt: | |||
961 | return 0; | 961 | return 0; |
962 | } | 962 | } |
963 | #endif /* CONFIG_AMD8111E_NAPI */ | 963 | #endif /* CONFIG_AMD8111E_NAPI */ |
964 | /* | 964 | /* |
965 | This function will indicate the link status to the kernel. | 965 | This function will indicate the link status to the kernel. |
966 | */ | 966 | */ |
967 | static int amd8111e_link_change(struct net_device* dev) | 967 | static int amd8111e_link_change(struct net_device* dev) |
968 | { | 968 | { |
969 | struct amd8111e_priv *lp = netdev_priv(dev); | 969 | struct amd8111e_priv *lp = netdev_priv(dev); |
970 | int status0,speed; | 970 | int status0,speed; |
971 | 971 | ||
972 | /* read the link change */ | 972 | /* read the link change */ |
973 | status0 = readl(lp->mmio + STAT0); | 973 | status0 = readl(lp->mmio + STAT0); |
974 | 974 | ||
975 | if(status0 & LINK_STATS){ | 975 | if(status0 & LINK_STATS){ |
976 | if(status0 & AUTONEG_COMPLETE) | 976 | if(status0 & AUTONEG_COMPLETE) |
977 | lp->link_config.autoneg = AUTONEG_ENABLE; | 977 | lp->link_config.autoneg = AUTONEG_ENABLE; |
978 | else | 978 | else |
979 | lp->link_config.autoneg = AUTONEG_DISABLE; | 979 | lp->link_config.autoneg = AUTONEG_DISABLE; |
980 | 980 | ||
981 | if(status0 & FULL_DPLX) | 981 | if(status0 & FULL_DPLX) |
982 | lp->link_config.duplex = DUPLEX_FULL; | 982 | lp->link_config.duplex = DUPLEX_FULL; |
983 | else | 983 | else |
984 | lp->link_config.duplex = DUPLEX_HALF; | 984 | lp->link_config.duplex = DUPLEX_HALF; |
985 | speed = (status0 & SPEED_MASK) >> 7; | 985 | speed = (status0 & SPEED_MASK) >> 7; |
986 | if(speed == PHY_SPEED_10) | 986 | if(speed == PHY_SPEED_10) |
@@ -989,22 +989,22 @@ static int amd8111e_link_change(struct net_device* dev) | |||
989 | lp->link_config.speed = SPEED_100; | 989 | lp->link_config.speed = SPEED_100; |
990 | 990 | ||
991 | printk(KERN_INFO "%s: Link is Up. Speed is %s Mbps %s Duplex\n", dev->name, | 991 | printk(KERN_INFO "%s: Link is Up. Speed is %s Mbps %s Duplex\n", dev->name, |
992 | (lp->link_config.speed == SPEED_100) ? "100": "10", | 992 | (lp->link_config.speed == SPEED_100) ? "100": "10", |
993 | (lp->link_config.duplex == DUPLEX_FULL)? "Full": "Half"); | 993 | (lp->link_config.duplex == DUPLEX_FULL)? "Full": "Half"); |
994 | netif_carrier_on(dev); | 994 | netif_carrier_on(dev); |
995 | } | 995 | } |
996 | else{ | 996 | else{ |
997 | lp->link_config.speed = SPEED_INVALID; | 997 | lp->link_config.speed = SPEED_INVALID; |
998 | lp->link_config.duplex = DUPLEX_INVALID; | 998 | lp->link_config.duplex = DUPLEX_INVALID; |
999 | lp->link_config.autoneg = AUTONEG_INVALID; | 999 | lp->link_config.autoneg = AUTONEG_INVALID; |
1000 | printk(KERN_INFO "%s: Link is Down.\n",dev->name); | 1000 | printk(KERN_INFO "%s: Link is Down.\n",dev->name); |
1001 | netif_carrier_off(dev); | 1001 | netif_carrier_off(dev); |
1002 | } | 1002 | } |
1003 | 1003 | ||
1004 | return 0; | 1004 | return 0; |
1005 | } | 1005 | } |
1006 | /* | 1006 | /* |
1007 | This function reads the mib counters. | 1007 | This function reads the mib counters. |
1008 | */ | 1008 | */ |
1009 | static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER) | 1009 | static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER) |
1010 | { | 1010 | { |
@@ -1025,7 +1025,7 @@ static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER) | |||
1025 | 1025 | ||
1026 | /* | 1026 | /* |
1027 | This function reads the mib registers and returns the hardware statistics. It updates previous internal driver statistics with new values. | 1027 | This function reads the mib registers and returns the hardware statistics. It updates previous internal driver statistics with new values. |
1028 | */ | 1028 | */ |
1029 | static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) | 1029 | static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) |
1030 | { | 1030 | { |
1031 | struct amd8111e_priv *lp = netdev_priv(dev); | 1031 | struct amd8111e_priv *lp = netdev_priv(dev); |
@@ -1033,9 +1033,9 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) | |||
1033 | unsigned long flags; | 1033 | unsigned long flags; |
1034 | /* struct net_device_stats *prev_stats = &lp->prev_stats; */ | 1034 | /* struct net_device_stats *prev_stats = &lp->prev_stats; */ |
1035 | struct net_device_stats* new_stats = &lp->stats; | 1035 | struct net_device_stats* new_stats = &lp->stats; |
1036 | 1036 | ||
1037 | if(!lp->opened) | 1037 | if(!lp->opened) |
1038 | return &lp->stats; | 1038 | return &lp->stats; |
1039 | spin_lock_irqsave (&lp->lock, flags); | 1039 | spin_lock_irqsave (&lp->lock, flags); |
1040 | 1040 | ||
1041 | /* stats.rx_packets */ | 1041 | /* stats.rx_packets */ |
@@ -1078,7 +1078,7 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) | |||
1078 | new_stats->collisions = amd8111e_read_mib(mmio, xmt_collisions); | 1078 | new_stats->collisions = amd8111e_read_mib(mmio, xmt_collisions); |
1079 | 1079 | ||
1080 | /* stats.rx_length_errors*/ | 1080 | /* stats.rx_length_errors*/ |
1081 | new_stats->rx_length_errors = | 1081 | new_stats->rx_length_errors = |
1082 | amd8111e_read_mib(mmio, rcv_undersize_pkts)+ | 1082 | amd8111e_read_mib(mmio, rcv_undersize_pkts)+ |
1083 | amd8111e_read_mib(mmio, rcv_oversize_pkts); | 1083 | amd8111e_read_mib(mmio, rcv_oversize_pkts); |
1084 | 1084 | ||
@@ -1099,11 +1099,11 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) | |||
1099 | new_stats->rx_missed_errors = amd8111e_read_mib(mmio, rcv_miss_pkts); | 1099 | new_stats->rx_missed_errors = amd8111e_read_mib(mmio, rcv_miss_pkts); |
1100 | 1100 | ||
1101 | /* stats.tx_aborted_errors*/ | 1101 | /* stats.tx_aborted_errors*/ |
1102 | new_stats->tx_aborted_errors = | 1102 | new_stats->tx_aborted_errors = |
1103 | amd8111e_read_mib(mmio, xmt_excessive_collision); | 1103 | amd8111e_read_mib(mmio, xmt_excessive_collision); |
1104 | 1104 | ||
1105 | /* stats.tx_carrier_errors*/ | 1105 | /* stats.tx_carrier_errors*/ |
1106 | new_stats->tx_carrier_errors = | 1106 | new_stats->tx_carrier_errors = |
1107 | amd8111e_read_mib(mmio, xmt_loss_carrier); | 1107 | amd8111e_read_mib(mmio, xmt_loss_carrier); |
1108 | 1108 | ||
1109 | /* stats.tx_fifo_errors*/ | 1109 | /* stats.tx_fifo_errors*/ |
@@ -1115,12 +1115,12 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device * dev) | |||
1115 | 1115 | ||
1116 | /* Reset the mibs for collecting new statistics */ | 1116 | /* Reset the mibs for collecting new statistics */ |
1117 | /* writew(MIB_CLEAR, mmio + MIB_ADDR);*/ | 1117 | /* writew(MIB_CLEAR, mmio + MIB_ADDR);*/ |
1118 | 1118 | ||
1119 | spin_unlock_irqrestore (&lp->lock, flags); | 1119 | spin_unlock_irqrestore (&lp->lock, flags); |
1120 | 1120 | ||
1121 | return new_stats; | 1121 | return new_stats; |
1122 | } | 1122 | } |
1123 | /* This function recalculate the interupt coalescing mode on every interrupt | 1123 | /* This function recalculate the interupt coalescing mode on every interrupt |
1124 | according to the datarate and the packet rate. | 1124 | according to the datarate and the packet rate. |
1125 | */ | 1125 | */ |
1126 | static int amd8111e_calc_coalesce(struct net_device *dev) | 1126 | static int amd8111e_calc_coalesce(struct net_device *dev) |
@@ -1136,19 +1136,19 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1136 | 1136 | ||
1137 | tx_pkt_rate = coal_conf->tx_packets - coal_conf->tx_prev_packets; | 1137 | tx_pkt_rate = coal_conf->tx_packets - coal_conf->tx_prev_packets; |
1138 | coal_conf->tx_prev_packets = coal_conf->tx_packets; | 1138 | coal_conf->tx_prev_packets = coal_conf->tx_packets; |
1139 | 1139 | ||
1140 | tx_data_rate = coal_conf->tx_bytes - coal_conf->tx_prev_bytes; | 1140 | tx_data_rate = coal_conf->tx_bytes - coal_conf->tx_prev_bytes; |
1141 | coal_conf->tx_prev_bytes = coal_conf->tx_bytes; | 1141 | coal_conf->tx_prev_bytes = coal_conf->tx_bytes; |
1142 | 1142 | ||
1143 | rx_pkt_rate = coal_conf->rx_packets - coal_conf->rx_prev_packets; | 1143 | rx_pkt_rate = coal_conf->rx_packets - coal_conf->rx_prev_packets; |
1144 | coal_conf->rx_prev_packets = coal_conf->rx_packets; | 1144 | coal_conf->rx_prev_packets = coal_conf->rx_packets; |
1145 | 1145 | ||
1146 | rx_data_rate = coal_conf->rx_bytes - coal_conf->rx_prev_bytes; | 1146 | rx_data_rate = coal_conf->rx_bytes - coal_conf->rx_prev_bytes; |
1147 | coal_conf->rx_prev_bytes = coal_conf->rx_bytes; | 1147 | coal_conf->rx_prev_bytes = coal_conf->rx_bytes; |
1148 | 1148 | ||
1149 | if(rx_pkt_rate < 800){ | 1149 | if(rx_pkt_rate < 800){ |
1150 | if(coal_conf->rx_coal_type != NO_COALESCE){ | 1150 | if(coal_conf->rx_coal_type != NO_COALESCE){ |
1151 | 1151 | ||
1152 | coal_conf->rx_timeout = 0x0; | 1152 | coal_conf->rx_timeout = 0x0; |
1153 | coal_conf->rx_event_count = 0; | 1153 | coal_conf->rx_event_count = 0; |
1154 | amd8111e_set_coalesce(dev,RX_INTR_COAL); | 1154 | amd8111e_set_coalesce(dev,RX_INTR_COAL); |
@@ -1156,11 +1156,11 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1156 | } | 1156 | } |
1157 | } | 1157 | } |
1158 | else{ | 1158 | else{ |
1159 | 1159 | ||
1160 | rx_pkt_size = rx_data_rate/rx_pkt_rate; | 1160 | rx_pkt_size = rx_data_rate/rx_pkt_rate; |
1161 | if (rx_pkt_size < 128){ | 1161 | if (rx_pkt_size < 128){ |
1162 | if(coal_conf->rx_coal_type != NO_COALESCE){ | 1162 | if(coal_conf->rx_coal_type != NO_COALESCE){ |
1163 | 1163 | ||
1164 | coal_conf->rx_timeout = 0; | 1164 | coal_conf->rx_timeout = 0; |
1165 | coal_conf->rx_event_count = 0; | 1165 | coal_conf->rx_event_count = 0; |
1166 | amd8111e_set_coalesce(dev,RX_INTR_COAL); | 1166 | amd8111e_set_coalesce(dev,RX_INTR_COAL); |
@@ -1169,7 +1169,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1169 | 1169 | ||
1170 | } | 1170 | } |
1171 | else if ( (rx_pkt_size >= 128) && (rx_pkt_size < 512) ){ | 1171 | else if ( (rx_pkt_size >= 128) && (rx_pkt_size < 512) ){ |
1172 | 1172 | ||
1173 | if(coal_conf->rx_coal_type != LOW_COALESCE){ | 1173 | if(coal_conf->rx_coal_type != LOW_COALESCE){ |
1174 | coal_conf->rx_timeout = 1; | 1174 | coal_conf->rx_timeout = 1; |
1175 | coal_conf->rx_event_count = 4; | 1175 | coal_conf->rx_event_count = 4; |
@@ -1178,14 +1178,14 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1178 | } | 1178 | } |
1179 | } | 1179 | } |
1180 | else if ((rx_pkt_size >= 512) && (rx_pkt_size < 1024)){ | 1180 | else if ((rx_pkt_size >= 512) && (rx_pkt_size < 1024)){ |
1181 | 1181 | ||
1182 | if(coal_conf->rx_coal_type != MEDIUM_COALESCE){ | 1182 | if(coal_conf->rx_coal_type != MEDIUM_COALESCE){ |
1183 | coal_conf->rx_timeout = 1; | 1183 | coal_conf->rx_timeout = 1; |
1184 | coal_conf->rx_event_count = 4; | 1184 | coal_conf->rx_event_count = 4; |
1185 | amd8111e_set_coalesce(dev,RX_INTR_COAL); | 1185 | amd8111e_set_coalesce(dev,RX_INTR_COAL); |
1186 | coal_conf->rx_coal_type = MEDIUM_COALESCE; | 1186 | coal_conf->rx_coal_type = MEDIUM_COALESCE; |
1187 | } | 1187 | } |
1188 | 1188 | ||
1189 | } | 1189 | } |
1190 | else if(rx_pkt_size >= 1024){ | 1190 | else if(rx_pkt_size >= 1024){ |
1191 | if(coal_conf->rx_coal_type != HIGH_COALESCE){ | 1191 | if(coal_conf->rx_coal_type != HIGH_COALESCE){ |
@@ -1193,13 +1193,13 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1193 | coal_conf->rx_event_count = 3; | 1193 | coal_conf->rx_event_count = 3; |
1194 | amd8111e_set_coalesce(dev,RX_INTR_COAL); | 1194 | amd8111e_set_coalesce(dev,RX_INTR_COAL); |
1195 | coal_conf->rx_coal_type = HIGH_COALESCE; | 1195 | coal_conf->rx_coal_type = HIGH_COALESCE; |
1196 | } | 1196 | } |
1197 | } | 1197 | } |
1198 | } | 1198 | } |
1199 | /* NOW FOR TX INTR COALESC */ | 1199 | /* NOW FOR TX INTR COALESC */ |
1200 | if(tx_pkt_rate < 800){ | 1200 | if(tx_pkt_rate < 800){ |
1201 | if(coal_conf->tx_coal_type != NO_COALESCE){ | 1201 | if(coal_conf->tx_coal_type != NO_COALESCE){ |
1202 | 1202 | ||
1203 | coal_conf->tx_timeout = 0x0; | 1203 | coal_conf->tx_timeout = 0x0; |
1204 | coal_conf->tx_event_count = 0; | 1204 | coal_conf->tx_event_count = 0; |
1205 | amd8111e_set_coalesce(dev,TX_INTR_COAL); | 1205 | amd8111e_set_coalesce(dev,TX_INTR_COAL); |
@@ -1207,12 +1207,12 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1207 | } | 1207 | } |
1208 | } | 1208 | } |
1209 | else{ | 1209 | else{ |
1210 | 1210 | ||
1211 | tx_pkt_size = tx_data_rate/tx_pkt_rate; | 1211 | tx_pkt_size = tx_data_rate/tx_pkt_rate; |
1212 | if (tx_pkt_size < 128){ | 1212 | if (tx_pkt_size < 128){ |
1213 | 1213 | ||
1214 | if(coal_conf->tx_coal_type != NO_COALESCE){ | 1214 | if(coal_conf->tx_coal_type != NO_COALESCE){ |
1215 | 1215 | ||
1216 | coal_conf->tx_timeout = 0; | 1216 | coal_conf->tx_timeout = 0; |
1217 | coal_conf->tx_event_count = 0; | 1217 | coal_conf->tx_event_count = 0; |
1218 | amd8111e_set_coalesce(dev,TX_INTR_COAL); | 1218 | amd8111e_set_coalesce(dev,TX_INTR_COAL); |
@@ -1221,7 +1221,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1221 | 1221 | ||
1222 | } | 1222 | } |
1223 | else if ( (tx_pkt_size >= 128) && (tx_pkt_size < 512) ){ | 1223 | else if ( (tx_pkt_size >= 128) && (tx_pkt_size < 512) ){ |
1224 | 1224 | ||
1225 | if(coal_conf->tx_coal_type != LOW_COALESCE){ | 1225 | if(coal_conf->tx_coal_type != LOW_COALESCE){ |
1226 | coal_conf->tx_timeout = 1; | 1226 | coal_conf->tx_timeout = 1; |
1227 | coal_conf->tx_event_count = 2; | 1227 | coal_conf->tx_event_count = 2; |
@@ -1231,14 +1231,14 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1231 | } | 1231 | } |
1232 | } | 1232 | } |
1233 | else if ((tx_pkt_size >= 512) && (tx_pkt_size < 1024)){ | 1233 | else if ((tx_pkt_size >= 512) && (tx_pkt_size < 1024)){ |
1234 | 1234 | ||
1235 | if(coal_conf->tx_coal_type != MEDIUM_COALESCE){ | 1235 | if(coal_conf->tx_coal_type != MEDIUM_COALESCE){ |
1236 | coal_conf->tx_timeout = 2; | 1236 | coal_conf->tx_timeout = 2; |
1237 | coal_conf->tx_event_count = 5; | 1237 | coal_conf->tx_event_count = 5; |
1238 | amd8111e_set_coalesce(dev,TX_INTR_COAL); | 1238 | amd8111e_set_coalesce(dev,TX_INTR_COAL); |
1239 | coal_conf->tx_coal_type = MEDIUM_COALESCE; | 1239 | coal_conf->tx_coal_type = MEDIUM_COALESCE; |
1240 | } | 1240 | } |
1241 | 1241 | ||
1242 | } | 1242 | } |
1243 | else if(tx_pkt_size >= 1024){ | 1243 | else if(tx_pkt_size >= 1024){ |
1244 | if (tx_pkt_size >= 1024){ | 1244 | if (tx_pkt_size >= 1024){ |
@@ -1247,7 +1247,7 @@ static int amd8111e_calc_coalesce(struct net_device *dev) | |||
1247 | coal_conf->tx_event_count = 8; | 1247 | coal_conf->tx_event_count = 8; |
1248 | amd8111e_set_coalesce(dev,TX_INTR_COAL); | 1248 | amd8111e_set_coalesce(dev,TX_INTR_COAL); |
1249 | coal_conf->tx_coal_type = HIGH_COALESCE; | 1249 | coal_conf->tx_coal_type = HIGH_COALESCE; |
1250 | } | 1250 | } |
1251 | } | 1251 | } |
1252 | } | 1252 | } |
1253 | } | 1253 | } |
@@ -1284,7 +1284,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg | |||
1284 | handled = 0; | 1284 | handled = 0; |
1285 | goto err_no_interrupt; | 1285 | goto err_no_interrupt; |
1286 | } | 1286 | } |
1287 | 1287 | ||
1288 | /* Current driver processes 4 interrupts : RINT,TINT,LCINT,STINT */ | 1288 | /* Current driver processes 4 interrupts : RINT,TINT,LCINT,STINT */ |
1289 | writel(intr0, mmio + INT0); | 1289 | writel(intr0, mmio + INT0); |
1290 | 1290 | ||
@@ -1313,7 +1313,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg | |||
1313 | /* Check if Transmit Interrupt has occurred. */ | 1313 | /* Check if Transmit Interrupt has occurred. */ |
1314 | if(intr0 & TINT0) | 1314 | if(intr0 & TINT0) |
1315 | amd8111e_tx(dev); | 1315 | amd8111e_tx(dev); |
1316 | 1316 | ||
1317 | /* Check if Link Change Interrupt has occurred. */ | 1317 | /* Check if Link Change Interrupt has occurred. */ |
1318 | if (intr0 & LCINT) | 1318 | if (intr0 & LCINT) |
1319 | amd8111e_link_change(dev); | 1319 | amd8111e_link_change(dev); |
@@ -1324,21 +1324,21 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg | |||
1324 | 1324 | ||
1325 | err_no_interrupt: | 1325 | err_no_interrupt: |
1326 | writel( VAL0 | INTREN,mmio + CMD0); | 1326 | writel( VAL0 | INTREN,mmio + CMD0); |
1327 | 1327 | ||
1328 | spin_unlock(&lp->lock); | 1328 | spin_unlock(&lp->lock); |
1329 | 1329 | ||
1330 | return IRQ_RETVAL(handled); | 1330 | return IRQ_RETVAL(handled); |
1331 | } | 1331 | } |
1332 | 1332 | ||
1333 | #ifdef CONFIG_NET_POLL_CONTROLLER | 1333 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1334 | static void amd8111e_poll(struct net_device *dev) | 1334 | static void amd8111e_poll(struct net_device *dev) |
1335 | { | 1335 | { |
1336 | unsigned long flags; | 1336 | unsigned long flags; |
1337 | local_save_flags(flags); | 1337 | local_save_flags(flags); |
1338 | local_irq_disable(); | 1338 | local_irq_disable(); |
1339 | amd8111e_interrupt(0, dev, NULL); | 1339 | amd8111e_interrupt(0, dev, NULL); |
1340 | local_irq_restore(flags); | 1340 | local_irq_restore(flags); |
1341 | } | 1341 | } |
1342 | #endif | 1342 | #endif |
1343 | 1343 | ||
1344 | 1344 | ||
@@ -1349,35 +1349,35 @@ static int amd8111e_close(struct net_device * dev) | |||
1349 | { | 1349 | { |
1350 | struct amd8111e_priv *lp = netdev_priv(dev); | 1350 | struct amd8111e_priv *lp = netdev_priv(dev); |
1351 | netif_stop_queue(dev); | 1351 | netif_stop_queue(dev); |
1352 | 1352 | ||
1353 | spin_lock_irq(&lp->lock); | 1353 | spin_lock_irq(&lp->lock); |
1354 | 1354 | ||
1355 | amd8111e_disable_interrupt(lp); | 1355 | amd8111e_disable_interrupt(lp); |
1356 | amd8111e_stop_chip(lp); | 1356 | amd8111e_stop_chip(lp); |
1357 | amd8111e_free_ring(lp); | 1357 | amd8111e_free_ring(lp); |
1358 | 1358 | ||
1359 | netif_carrier_off(lp->amd8111e_net_dev); | 1359 | netif_carrier_off(lp->amd8111e_net_dev); |
1360 | 1360 | ||
1361 | /* Delete ipg timer */ | 1361 | /* Delete ipg timer */ |
1362 | if(lp->options & OPTION_DYN_IPG_ENABLE) | 1362 | if(lp->options & OPTION_DYN_IPG_ENABLE) |
1363 | del_timer_sync(&lp->ipg_data.ipg_timer); | 1363 | del_timer_sync(&lp->ipg_data.ipg_timer); |
1364 | 1364 | ||
1365 | spin_unlock_irq(&lp->lock); | 1365 | spin_unlock_irq(&lp->lock); |
1366 | free_irq(dev->irq, dev); | 1366 | free_irq(dev->irq, dev); |
1367 | 1367 | ||
1368 | /* Update the statistics before closing */ | 1368 | /* Update the statistics before closing */ |
1369 | amd8111e_get_stats(dev); | 1369 | amd8111e_get_stats(dev); |
1370 | lp->opened = 0; | 1370 | lp->opened = 0; |
1371 | return 0; | 1371 | return 0; |
1372 | } | 1372 | } |
1373 | /* This function opens new interface.It requests irq for the device, initializes the device,buffers and descriptors, and starts the device. | 1373 | /* This function opens new interface.It requests irq for the device, initializes the device,buffers and descriptors, and starts the device. |
1374 | */ | 1374 | */ |
1375 | static int amd8111e_open(struct net_device * dev ) | 1375 | static int amd8111e_open(struct net_device * dev ) |
1376 | { | 1376 | { |
1377 | struct amd8111e_priv *lp = netdev_priv(dev); | 1377 | struct amd8111e_priv *lp = netdev_priv(dev); |
1378 | 1378 | ||
1379 | if(dev->irq ==0 || request_irq(dev->irq, amd8111e_interrupt, IRQF_SHARED, | 1379 | if(dev->irq ==0 || request_irq(dev->irq, amd8111e_interrupt, IRQF_SHARED, |
1380 | dev->name, dev)) | 1380 | dev->name, dev)) |
1381 | return -EAGAIN; | 1381 | return -EAGAIN; |
1382 | 1382 | ||
1383 | spin_lock_irq(&lp->lock); | 1383 | spin_lock_irq(&lp->lock); |
@@ -1391,7 +1391,7 @@ static int amd8111e_open(struct net_device * dev ) | |||
1391 | return -ENOMEM; | 1391 | return -ENOMEM; |
1392 | } | 1392 | } |
1393 | /* Start ipg timer */ | 1393 | /* Start ipg timer */ |
1394 | if(lp->options & OPTION_DYN_IPG_ENABLE){ | 1394 | if(lp->options & OPTION_DYN_IPG_ENABLE){ |
1395 | add_timer(&lp->ipg_data.ipg_timer); | 1395 | add_timer(&lp->ipg_data.ipg_timer); |
1396 | printk(KERN_INFO "%s: Dynamic IPG Enabled.\n",dev->name); | 1396 | printk(KERN_INFO "%s: Dynamic IPG Enabled.\n",dev->name); |
1397 | } | 1397 | } |
@@ -1402,21 +1402,21 @@ static int amd8111e_open(struct net_device * dev ) | |||
1402 | 1402 | ||
1403 | netif_start_queue(dev); | 1403 | netif_start_queue(dev); |
1404 | 1404 | ||
1405 | return 0; | 1405 | return 0; |
1406 | } | 1406 | } |
1407 | /* | 1407 | /* |
1408 | This function checks if there is any transmit descriptors available to queue more packet. | 1408 | This function checks if there is any transmit descriptors available to queue more packet. |
1409 | */ | 1409 | */ |
1410 | static int amd8111e_tx_queue_avail(struct amd8111e_priv* lp ) | 1410 | static int amd8111e_tx_queue_avail(struct amd8111e_priv* lp ) |
1411 | { | 1411 | { |
1412 | int tx_index = lp->tx_idx & TX_BUFF_MOD_MASK; | 1412 | int tx_index = lp->tx_idx & TX_BUFF_MOD_MASK; |
1413 | if(lp->tx_skbuff[tx_index] != 0) | 1413 | if(lp->tx_skbuff[tx_index] != 0) |
1414 | return -1; | 1414 | return -1; |
1415 | else | 1415 | else |
1416 | return 0; | 1416 | return 0; |
1417 | 1417 | ||
1418 | } | 1418 | } |
1419 | /* | 1419 | /* |
1420 | This function will queue the transmit packets to the descriptors and will trigger the send operation. It also initializes the transmit descriptors with buffer physical address, byte count, ownership to hardware etc. | 1420 | This function will queue the transmit packets to the descriptors and will trigger the send operation. It also initializes the transmit descriptors with buffer physical address, byte count, ownership to hardware etc. |
1421 | */ | 1421 | */ |
1422 | 1422 | ||
@@ -1437,9 +1437,9 @@ static int amd8111e_start_xmit(struct sk_buff *skb, struct net_device * dev) | |||
1437 | 1437 | ||
1438 | #if AMD8111E_VLAN_TAG_USED | 1438 | #if AMD8111E_VLAN_TAG_USED |
1439 | if((lp->vlgrp != NULL) && vlan_tx_tag_present(skb)){ | 1439 | if((lp->vlgrp != NULL) && vlan_tx_tag_present(skb)){ |
1440 | lp->tx_ring[tx_index].tag_ctrl_cmd |= | 1440 | lp->tx_ring[tx_index].tag_ctrl_cmd |= |
1441 | cpu_to_le16(TCC_VLAN_INSERT); | 1441 | cpu_to_le16(TCC_VLAN_INSERT); |
1442 | lp->tx_ring[tx_index].tag_ctrl_info = | 1442 | lp->tx_ring[tx_index].tag_ctrl_info = |
1443 | cpu_to_le16(vlan_tx_tag_get(skb)); | 1443 | cpu_to_le16(vlan_tx_tag_get(skb)); |
1444 | 1444 | ||
1445 | } | 1445 | } |
@@ -1510,14 +1510,14 @@ static int amd8111e_ether_crc(int len, char* mac_addr) | |||
1510 | } | 1510 | } |
1511 | else | 1511 | else |
1512 | crc >>= 1; | 1512 | crc >>= 1; |
1513 | 1513 | ||
1514 | octet >>= 1; | 1514 | octet >>= 1; |
1515 | } | 1515 | } |
1516 | } | 1516 | } |
1517 | return crc; | 1517 | return crc; |
1518 | } | 1518 | } |
1519 | /* | 1519 | /* |
1520 | This function sets promiscuos mode, all-multi mode or the multicast address | 1520 | This function sets promiscuos mode, all-multi mode or the multicast address |
1521 | list to the device. | 1521 | list to the device. |
1522 | */ | 1522 | */ |
1523 | static void amd8111e_set_multicast_list(struct net_device *dev) | 1523 | static void amd8111e_set_multicast_list(struct net_device *dev) |
@@ -1558,7 +1558,7 @@ static void amd8111e_set_multicast_list(struct net_device *dev) | |||
1558 | i++, mc_ptr = mc_ptr->next) { | 1558 | i++, mc_ptr = mc_ptr->next) { |
1559 | bit_num = ( amd8111e_ether_crc(ETH_ALEN,mc_ptr->dmi_addr) >> 26 ) & 0x3f; | 1559 | bit_num = ( amd8111e_ether_crc(ETH_ALEN,mc_ptr->dmi_addr) >> 26 ) & 0x3f; |
1560 | mc_filter[bit_num >> 5] |= 1 << (bit_num & 31); | 1560 | mc_filter[bit_num >> 5] |= 1 << (bit_num & 31); |
1561 | } | 1561 | } |
1562 | amd8111e_writeq(*(u64*)mc_filter,lp->mmio+ LADRF); | 1562 | amd8111e_writeq(*(u64*)mc_filter,lp->mmio+ LADRF); |
1563 | 1563 | ||
1564 | /* To eliminate PCI posting bug */ | 1564 | /* To eliminate PCI posting bug */ |
@@ -1634,13 +1634,13 @@ static int amd8111e_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol_ | |||
1634 | return -EINVAL; | 1634 | return -EINVAL; |
1635 | spin_lock_irq(&lp->lock); | 1635 | spin_lock_irq(&lp->lock); |
1636 | if (wol_info->wolopts & WAKE_MAGIC) | 1636 | if (wol_info->wolopts & WAKE_MAGIC) |
1637 | lp->options |= | 1637 | lp->options |= |
1638 | (OPTION_WOL_ENABLE | OPTION_WAKE_MAGIC_ENABLE); | 1638 | (OPTION_WOL_ENABLE | OPTION_WAKE_MAGIC_ENABLE); |
1639 | else if(wol_info->wolopts & WAKE_PHY) | 1639 | else if(wol_info->wolopts & WAKE_PHY) |
1640 | lp->options |= | 1640 | lp->options |= |
1641 | (OPTION_WOL_ENABLE | OPTION_WAKE_PHY_ENABLE); | 1641 | (OPTION_WOL_ENABLE | OPTION_WAKE_PHY_ENABLE); |
1642 | else | 1642 | else |
1643 | lp->options &= ~OPTION_WOL_ENABLE; | 1643 | lp->options &= ~OPTION_WOL_ENABLE; |
1644 | spin_unlock_irq(&lp->lock); | 1644 | spin_unlock_irq(&lp->lock); |
1645 | return 0; | 1645 | return 0; |
1646 | } | 1646 | } |
@@ -1658,9 +1658,9 @@ static struct ethtool_ops ops = { | |||
1658 | }; | 1658 | }; |
1659 | 1659 | ||
1660 | /* | 1660 | /* |
1661 | This function handles all the ethtool ioctls. It gives driver info, gets/sets driver speed, gets memory mapped register values, forces auto negotiation, sets/gets WOL options for ethtool application. | 1661 | This function handles all the ethtool ioctls. It gives driver info, gets/sets driver speed, gets memory mapped register values, forces auto negotiation, sets/gets WOL options for ethtool application. |
1662 | */ | 1662 | */ |
1663 | 1663 | ||
1664 | static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd) | 1664 | static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd) |
1665 | { | 1665 | { |
1666 | struct mii_ioctl_data *data = if_mii(ifr); | 1666 | struct mii_ioctl_data *data = if_mii(ifr); |
@@ -1676,7 +1676,7 @@ static int amd8111e_ioctl(struct net_device * dev , struct ifreq *ifr, int cmd) | |||
1676 | data->phy_id = lp->ext_phy_addr; | 1676 | data->phy_id = lp->ext_phy_addr; |
1677 | 1677 | ||
1678 | /* fallthru */ | 1678 | /* fallthru */ |
1679 | case SIOCGMIIREG: | 1679 | case SIOCGMIIREG: |
1680 | 1680 | ||
1681 | spin_lock_irq(&lp->lock); | 1681 | spin_lock_irq(&lp->lock); |
1682 | err = amd8111e_read_phy(lp, data->phy_id, | 1682 | err = amd8111e_read_phy(lp, data->phy_id, |
@@ -1711,16 +1711,16 @@ static int amd8111e_set_mac_address(struct net_device *dev, void *p) | |||
1711 | spin_lock_irq(&lp->lock); | 1711 | spin_lock_irq(&lp->lock); |
1712 | /* Setting the MAC address to the device */ | 1712 | /* Setting the MAC address to the device */ |
1713 | for(i = 0; i < ETH_ADDR_LEN; i++) | 1713 | for(i = 0; i < ETH_ADDR_LEN; i++) |
1714 | writeb( dev->dev_addr[i], lp->mmio + PADR + i ); | 1714 | writeb( dev->dev_addr[i], lp->mmio + PADR + i ); |
1715 | 1715 | ||
1716 | spin_unlock_irq(&lp->lock); | 1716 | spin_unlock_irq(&lp->lock); |
1717 | 1717 | ||
1718 | return 0; | 1718 | return 0; |
1719 | } | 1719 | } |
1720 | 1720 | ||
1721 | /* | 1721 | /* |
1722 | This function changes the mtu of the device. It restarts the device to initialize the descriptor with new receive buffers. | 1722 | This function changes the mtu of the device. It restarts the device to initialize the descriptor with new receive buffers. |
1723 | */ | 1723 | */ |
1724 | static int amd8111e_change_mtu(struct net_device *dev, int new_mtu) | 1724 | static int amd8111e_change_mtu(struct net_device *dev, int new_mtu) |
1725 | { | 1725 | { |
1726 | struct amd8111e_priv *lp = netdev_priv(dev); | 1726 | struct amd8111e_priv *lp = netdev_priv(dev); |
@@ -1731,7 +1731,7 @@ static int amd8111e_change_mtu(struct net_device *dev, int new_mtu) | |||
1731 | 1731 | ||
1732 | if (!netif_running(dev)) { | 1732 | if (!netif_running(dev)) { |
1733 | /* new_mtu will be used | 1733 | /* new_mtu will be used |
1734 | when device starts netxt time */ | 1734 | when device starts netxt time */ |
1735 | dev->mtu = new_mtu; | 1735 | dev->mtu = new_mtu; |
1736 | return 0; | 1736 | return 0; |
1737 | } | 1737 | } |
@@ -1758,7 +1758,7 @@ static void amd8111e_vlan_rx_register(struct net_device *dev, struct vlan_group | |||
1758 | lp->vlgrp = grp; | 1758 | lp->vlgrp = grp; |
1759 | spin_unlock_irq(&lp->lock); | 1759 | spin_unlock_irq(&lp->lock); |
1760 | } | 1760 | } |
1761 | 1761 | ||
1762 | static void amd8111e_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | 1762 | static void amd8111e_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) |
1763 | { | 1763 | { |
1764 | struct amd8111e_priv *lp = netdev_priv(dev); | 1764 | struct amd8111e_priv *lp = netdev_priv(dev); |
@@ -1783,11 +1783,11 @@ static int amd8111e_enable_link_change(struct amd8111e_priv* lp) | |||
1783 | 1783 | ||
1784 | /* Adapter is already stoped/suspended/interrupt-disabled */ | 1784 | /* Adapter is already stoped/suspended/interrupt-disabled */ |
1785 | writel(VAL0|LCMODE_SW,lp->mmio + CMD7); | 1785 | writel(VAL0|LCMODE_SW,lp->mmio + CMD7); |
1786 | 1786 | ||
1787 | /* To eliminate PCI posting bug */ | 1787 | /* To eliminate PCI posting bug */ |
1788 | readl(lp->mmio + CMD7); | 1788 | readl(lp->mmio + CMD7); |
1789 | return 0; | 1789 | return 0; |
1790 | } | 1790 | } |
1791 | /* This function is called when a packet transmission fails to complete within a resonable period, on the assumption that an interrupts have been failed or the interface is locked up. This function will reinitialize the hardware */ | 1791 | /* This function is called when a packet transmission fails to complete within a resonable period, on the assumption that an interrupts have been failed or the interface is locked up. This function will reinitialize the hardware */ |
1792 | 1792 | ||
1793 | static void amd8111e_tx_timeout(struct net_device *dev) | 1793 | static void amd8111e_tx_timeout(struct net_device *dev) |
@@ -1804,10 +1804,10 @@ static void amd8111e_tx_timeout(struct net_device *dev) | |||
1804 | netif_wake_queue(dev); | 1804 | netif_wake_queue(dev); |
1805 | } | 1805 | } |
1806 | static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state) | 1806 | static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state) |
1807 | { | 1807 | { |
1808 | struct net_device *dev = pci_get_drvdata(pci_dev); | 1808 | struct net_device *dev = pci_get_drvdata(pci_dev); |
1809 | struct amd8111e_priv *lp = netdev_priv(dev); | 1809 | struct amd8111e_priv *lp = netdev_priv(dev); |
1810 | 1810 | ||
1811 | if (!netif_running(dev)) | 1811 | if (!netif_running(dev)) |
1812 | return 0; | 1812 | return 0; |
1813 | 1813 | ||
@@ -1817,10 +1817,10 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state) | |||
1817 | spin_unlock_irq(&lp->lock); | 1817 | spin_unlock_irq(&lp->lock); |
1818 | 1818 | ||
1819 | netif_device_detach(dev); | 1819 | netif_device_detach(dev); |
1820 | 1820 | ||
1821 | /* stop chip */ | 1821 | /* stop chip */ |
1822 | spin_lock_irq(&lp->lock); | 1822 | spin_lock_irq(&lp->lock); |
1823 | if(lp->options & OPTION_DYN_IPG_ENABLE) | 1823 | if(lp->options & OPTION_DYN_IPG_ENABLE) |
1824 | del_timer_sync(&lp->ipg_data.ipg_timer); | 1824 | del_timer_sync(&lp->ipg_data.ipg_timer); |
1825 | amd8111e_stop_chip(lp); | 1825 | amd8111e_stop_chip(lp); |
1826 | spin_unlock_irq(&lp->lock); | 1826 | spin_unlock_irq(&lp->lock); |
@@ -1828,19 +1828,19 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state) | |||
1828 | if(lp->options & OPTION_WOL_ENABLE){ | 1828 | if(lp->options & OPTION_WOL_ENABLE){ |
1829 | /* enable wol */ | 1829 | /* enable wol */ |
1830 | if(lp->options & OPTION_WAKE_MAGIC_ENABLE) | 1830 | if(lp->options & OPTION_WAKE_MAGIC_ENABLE) |
1831 | amd8111e_enable_magicpkt(lp); | 1831 | amd8111e_enable_magicpkt(lp); |
1832 | if(lp->options & OPTION_WAKE_PHY_ENABLE) | 1832 | if(lp->options & OPTION_WAKE_PHY_ENABLE) |
1833 | amd8111e_enable_link_change(lp); | 1833 | amd8111e_enable_link_change(lp); |
1834 | 1834 | ||
1835 | pci_enable_wake(pci_dev, PCI_D3hot, 1); | 1835 | pci_enable_wake(pci_dev, PCI_D3hot, 1); |
1836 | pci_enable_wake(pci_dev, PCI_D3cold, 1); | 1836 | pci_enable_wake(pci_dev, PCI_D3cold, 1); |
1837 | 1837 | ||
1838 | } | 1838 | } |
1839 | else{ | 1839 | else{ |
1840 | pci_enable_wake(pci_dev, PCI_D3hot, 0); | 1840 | pci_enable_wake(pci_dev, PCI_D3hot, 0); |
1841 | pci_enable_wake(pci_dev, PCI_D3cold, 0); | 1841 | pci_enable_wake(pci_dev, PCI_D3cold, 0); |
1842 | } | 1842 | } |
1843 | 1843 | ||
1844 | pci_save_state(pci_dev); | 1844 | pci_save_state(pci_dev); |
1845 | pci_set_power_state(pci_dev, PCI_D3hot); | 1845 | pci_set_power_state(pci_dev, PCI_D3hot); |
1846 | 1846 | ||
@@ -1850,7 +1850,7 @@ static int amd8111e_resume(struct pci_dev *pci_dev) | |||
1850 | { | 1850 | { |
1851 | struct net_device *dev = pci_get_drvdata(pci_dev); | 1851 | struct net_device *dev = pci_get_drvdata(pci_dev); |
1852 | struct amd8111e_priv *lp = netdev_priv(dev); | 1852 | struct amd8111e_priv *lp = netdev_priv(dev); |
1853 | 1853 | ||
1854 | if (!netif_running(dev)) | 1854 | if (!netif_running(dev)) |
1855 | return 0; | 1855 | return 0; |
1856 | 1856 | ||
@@ -1865,8 +1865,8 @@ static int amd8111e_resume(struct pci_dev *pci_dev) | |||
1865 | spin_lock_irq(&lp->lock); | 1865 | spin_lock_irq(&lp->lock); |
1866 | amd8111e_restart(dev); | 1866 | amd8111e_restart(dev); |
1867 | /* Restart ipg timer */ | 1867 | /* Restart ipg timer */ |
1868 | if(lp->options & OPTION_DYN_IPG_ENABLE) | 1868 | if(lp->options & OPTION_DYN_IPG_ENABLE) |
1869 | mod_timer(&lp->ipg_data.ipg_timer, | 1869 | mod_timer(&lp->ipg_data.ipg_timer, |
1870 | jiffies + IPG_CONVERGE_JIFFIES); | 1870 | jiffies + IPG_CONVERGE_JIFFIES); |
1871 | spin_unlock_irq(&lp->lock); | 1871 | spin_unlock_irq(&lp->lock); |
1872 | 1872 | ||
@@ -1894,16 +1894,16 @@ static void amd8111e_config_ipg(struct net_device* dev) | |||
1894 | unsigned int prev_col_cnt = ipg_data->col_cnt; | 1894 | unsigned int prev_col_cnt = ipg_data->col_cnt; |
1895 | unsigned int total_col_cnt; | 1895 | unsigned int total_col_cnt; |
1896 | unsigned int tmp_ipg; | 1896 | unsigned int tmp_ipg; |
1897 | 1897 | ||
1898 | if(lp->link_config.duplex == DUPLEX_FULL){ | 1898 | if(lp->link_config.duplex == DUPLEX_FULL){ |
1899 | ipg_data->ipg = DEFAULT_IPG; | 1899 | ipg_data->ipg = DEFAULT_IPG; |
1900 | return; | 1900 | return; |
1901 | } | 1901 | } |
1902 | 1902 | ||
1903 | if(ipg_data->ipg_state == SSTATE){ | 1903 | if(ipg_data->ipg_state == SSTATE){ |
1904 | 1904 | ||
1905 | if(ipg_data->timer_tick == IPG_STABLE_TIME){ | 1905 | if(ipg_data->timer_tick == IPG_STABLE_TIME){ |
1906 | 1906 | ||
1907 | ipg_data->timer_tick = 0; | 1907 | ipg_data->timer_tick = 0; |
1908 | ipg_data->ipg = MIN_IPG - IPG_STEP; | 1908 | ipg_data->ipg = MIN_IPG - IPG_STEP; |
1909 | ipg_data->current_ipg = MIN_IPG; | 1909 | ipg_data->current_ipg = MIN_IPG; |
@@ -1915,15 +1915,15 @@ static void amd8111e_config_ipg(struct net_device* dev) | |||
1915 | } | 1915 | } |
1916 | 1916 | ||
1917 | if(ipg_data->ipg_state == CSTATE){ | 1917 | if(ipg_data->ipg_state == CSTATE){ |
1918 | 1918 | ||
1919 | /* Get the current collision count */ | 1919 | /* Get the current collision count */ |
1920 | 1920 | ||
1921 | total_col_cnt = ipg_data->col_cnt = | 1921 | total_col_cnt = ipg_data->col_cnt = |
1922 | amd8111e_read_mib(mmio, xmt_collisions); | 1922 | amd8111e_read_mib(mmio, xmt_collisions); |
1923 | 1923 | ||
1924 | if ((total_col_cnt - prev_col_cnt) < | 1924 | if ((total_col_cnt - prev_col_cnt) < |
1925 | (ipg_data->diff_col_cnt)){ | 1925 | (ipg_data->diff_col_cnt)){ |
1926 | 1926 | ||
1927 | ipg_data->diff_col_cnt = | 1927 | ipg_data->diff_col_cnt = |
1928 | total_col_cnt - prev_col_cnt ; | 1928 | total_col_cnt - prev_col_cnt ; |
1929 | 1929 | ||
@@ -1938,8 +1938,8 @@ static void amd8111e_config_ipg(struct net_device* dev) | |||
1938 | tmp_ipg = ipg_data->ipg; | 1938 | tmp_ipg = ipg_data->ipg; |
1939 | ipg_data->ipg_state = SSTATE; | 1939 | ipg_data->ipg_state = SSTATE; |
1940 | } | 1940 | } |
1941 | writew((u32)tmp_ipg, mmio + IPG); | 1941 | writew((u32)tmp_ipg, mmio + IPG); |
1942 | writew((u32)(tmp_ipg - IFS1_DELTA), mmio + IFS1); | 1942 | writew((u32)(tmp_ipg - IFS1_DELTA), mmio + IFS1); |
1943 | } | 1943 | } |
1944 | mod_timer(&lp->ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES); | 1944 | mod_timer(&lp->ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES); |
1945 | return; | 1945 | return; |
@@ -2010,7 +2010,7 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2010 | "exiting.\n"); | 2010 | "exiting.\n"); |
2011 | goto err_free_reg; | 2011 | goto err_free_reg; |
2012 | } | 2012 | } |
2013 | 2013 | ||
2014 | reg_addr = pci_resource_start(pdev, 0); | 2014 | reg_addr = pci_resource_start(pdev, 0); |
2015 | reg_len = pci_resource_len(pdev, 0); | 2015 | reg_len = pci_resource_len(pdev, 0); |
2016 | 2016 | ||
@@ -2028,8 +2028,8 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2028 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX ; | 2028 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX ; |
2029 | dev->vlan_rx_register =amd8111e_vlan_rx_register; | 2029 | dev->vlan_rx_register =amd8111e_vlan_rx_register; |
2030 | dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; | 2030 | dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; |
2031 | #endif | 2031 | #endif |
2032 | 2032 | ||
2033 | lp = netdev_priv(dev); | 2033 | lp = netdev_priv(dev); |
2034 | lp->pci_dev = pdev; | 2034 | lp->pci_dev = pdev; |
2035 | lp->amd8111e_net_dev = dev; | 2035 | lp->amd8111e_net_dev = dev; |
@@ -2044,17 +2044,17 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2044 | err = -ENOMEM; | 2044 | err = -ENOMEM; |
2045 | goto err_free_dev; | 2045 | goto err_free_dev; |
2046 | } | 2046 | } |
2047 | 2047 | ||
2048 | /* Initializing MAC address */ | 2048 | /* Initializing MAC address */ |
2049 | for(i = 0; i < ETH_ADDR_LEN; i++) | 2049 | for(i = 0; i < ETH_ADDR_LEN; i++) |
2050 | dev->dev_addr[i] =readb(lp->mmio + PADR + i); | 2050 | dev->dev_addr[i] =readb(lp->mmio + PADR + i); |
2051 | 2051 | ||
2052 | /* Setting user defined parametrs */ | 2052 | /* Setting user defined parametrs */ |
2053 | lp->ext_phy_option = speed_duplex[card_idx]; | 2053 | lp->ext_phy_option = speed_duplex[card_idx]; |
2054 | if(coalesce[card_idx]) | 2054 | if(coalesce[card_idx]) |
2055 | lp->options |= OPTION_INTR_COAL_ENABLE; | 2055 | lp->options |= OPTION_INTR_COAL_ENABLE; |
2056 | if(dynamic_ipg[card_idx++]) | 2056 | if(dynamic_ipg[card_idx++]) |
2057 | lp->options |= OPTION_DYN_IPG_ENABLE; | 2057 | lp->options |= OPTION_DYN_IPG_ENABLE; |
2058 | 2058 | ||
2059 | /* Initialize driver entry points */ | 2059 | /* Initialize driver entry points */ |
2060 | dev->open = amd8111e_open; | 2060 | dev->open = amd8111e_open; |
@@ -2067,21 +2067,21 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2067 | dev->change_mtu = amd8111e_change_mtu; | 2067 | dev->change_mtu = amd8111e_change_mtu; |
2068 | SET_ETHTOOL_OPS(dev, &ops); | 2068 | SET_ETHTOOL_OPS(dev, &ops); |
2069 | dev->irq =pdev->irq; | 2069 | dev->irq =pdev->irq; |
2070 | dev->tx_timeout = amd8111e_tx_timeout; | 2070 | dev->tx_timeout = amd8111e_tx_timeout; |
2071 | dev->watchdog_timeo = AMD8111E_TX_TIMEOUT; | 2071 | dev->watchdog_timeo = AMD8111E_TX_TIMEOUT; |
2072 | #ifdef CONFIG_AMD8111E_NAPI | 2072 | #ifdef CONFIG_AMD8111E_NAPI |
2073 | dev->poll = amd8111e_rx_poll; | 2073 | dev->poll = amd8111e_rx_poll; |
2074 | dev->weight = 32; | 2074 | dev->weight = 32; |
2075 | #endif | 2075 | #endif |
2076 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2076 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2077 | dev->poll_controller = amd8111e_poll; | 2077 | dev->poll_controller = amd8111e_poll; |
2078 | #endif | 2078 | #endif |
2079 | 2079 | ||
2080 | #if AMD8111E_VLAN_TAG_USED | 2080 | #if AMD8111E_VLAN_TAG_USED |
2081 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; | 2081 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
2082 | dev->vlan_rx_register =amd8111e_vlan_rx_register; | 2082 | dev->vlan_rx_register =amd8111e_vlan_rx_register; |
2083 | dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; | 2083 | dev->vlan_rx_kill_vid = amd8111e_vlan_rx_kill_vid; |
2084 | #endif | 2084 | #endif |
2085 | /* Probe the external PHY */ | 2085 | /* Probe the external PHY */ |
2086 | amd8111e_probe_ext_phy(dev); | 2086 | amd8111e_probe_ext_phy(dev); |
2087 | 2087 | ||
@@ -2103,13 +2103,13 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2103 | } | 2103 | } |
2104 | 2104 | ||
2105 | pci_set_drvdata(pdev, dev); | 2105 | pci_set_drvdata(pdev, dev); |
2106 | 2106 | ||
2107 | /* Initialize software ipg timer */ | 2107 | /* Initialize software ipg timer */ |
2108 | if(lp->options & OPTION_DYN_IPG_ENABLE){ | 2108 | if(lp->options & OPTION_DYN_IPG_ENABLE){ |
2109 | init_timer(&lp->ipg_data.ipg_timer); | 2109 | init_timer(&lp->ipg_data.ipg_timer); |
2110 | lp->ipg_data.ipg_timer.data = (unsigned long) dev; | 2110 | lp->ipg_data.ipg_timer.data = (unsigned long) dev; |
2111 | lp->ipg_data.ipg_timer.function = (void *)&amd8111e_config_ipg; | 2111 | lp->ipg_data.ipg_timer.function = (void *)&amd8111e_config_ipg; |
2112 | lp->ipg_data.ipg_timer.expires = jiffies + | 2112 | lp->ipg_data.ipg_timer.expires = jiffies + |
2113 | IPG_CONVERGE_JIFFIES; | 2113 | IPG_CONVERGE_JIFFIES; |
2114 | lp->ipg_data.ipg = DEFAULT_IPG; | 2114 | lp->ipg_data.ipg = DEFAULT_IPG; |
2115 | lp->ipg_data.ipg_state = CSTATE; | 2115 | lp->ipg_data.ipg_state = CSTATE; |
@@ -2122,7 +2122,7 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2122 | printk(KERN_INFO "%s: [ Rev %x ] PCI 10/100BaseT Ethernet ", dev->name, chip_version); | 2122 | printk(KERN_INFO "%s: [ Rev %x ] PCI 10/100BaseT Ethernet ", dev->name, chip_version); |
2123 | for (i = 0; i < 6; i++) | 2123 | for (i = 0; i < 6; i++) |
2124 | printk("%2.2x%c",dev->dev_addr[i],i == 5 ? ' ' : ':'); | 2124 | printk("%2.2x%c",dev->dev_addr[i],i == 5 ? ' ' : ':'); |
2125 | printk( "\n"); | 2125 | printk( "\n"); |
2126 | if (lp->ext_phy_id) | 2126 | if (lp->ext_phy_id) |
2127 | printk(KERN_INFO "%s: Found MII PHY ID 0x%08x at address 0x%02x\n", | 2127 | printk(KERN_INFO "%s: Found MII PHY ID 0x%08x at address 0x%02x\n", |
2128 | dev->name, lp->ext_phy_id, lp->ext_phy_addr); | 2128 | dev->name, lp->ext_phy_id, lp->ext_phy_addr); |