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-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c35
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0002.c16
-rwxr-xr-xdrivers/mtd/chips/cfi_util.c7
-rw-r--r--drivers/mtd/chips/jedec_probe.c8
-rw-r--r--drivers/mtd/devices/m25p80.c326
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/ixp4xx.c6
-rw-r--r--drivers/mtd/maps/physmap.c2
-rw-r--r--drivers/mtd/maps/vmu-flash.c9
-rw-r--r--drivers/mtd/mtd_blkdevs.c3
-rw-r--r--drivers/mtd/mtdcore.c2
-rw-r--r--drivers/mtd/mtdoops.c389
-rw-r--r--drivers/mtd/nand/alauda.c11
-rw-r--r--drivers/mtd/nand/atmel_nand.c4
-rw-r--r--drivers/mtd/nand/davinci_nand.c2
-rw-r--r--drivers/mtd/nand/excite_nandflash.c2
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c86
-rw-r--r--drivers/mtd/nand/fsl_upm.c2
-rw-r--r--drivers/mtd/nand/mxc_nand.c2
-rw-r--r--drivers/mtd/nand/nand_base.c141
-rw-r--r--drivers/mtd/nand/nand_ecc.c25
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c4
-rw-r--r--drivers/mtd/nand/s3c2410.c2
-rw-r--r--drivers/mtd/nand/txx9ndfmc.c3
-rw-r--r--drivers/mtd/onenand/omap2.c22
-rw-r--r--drivers/mtd/onenand/onenand_base.c581
-rw-r--r--drivers/mtd/tests/Makefile1
-rw-r--r--drivers/mtd/tests/mtd_nandecctest.c87
-rw-r--r--drivers/mtd/tests/mtd_pagetest.c1
29 files changed, 1251 insertions, 529 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index e7563a9872d0..5fbf29e1e64f 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -43,15 +43,17 @@
43// debugging, turns off buffer write mode if set to 1 43// debugging, turns off buffer write mode if set to 1
44#define FORCE_WORD_WRITE 0 44#define FORCE_WORD_WRITE 0
45 45
46#define MANUFACTURER_INTEL 0x0089 46/* Intel chips */
47#define I82802AB 0x00ad 47#define I82802AB 0x00ad
48#define I82802AC 0x00ac 48#define I82802AC 0x00ac
49#define PF38F4476 0x881c 49#define PF38F4476 0x881c
50#define MANUFACTURER_ST 0x0020 50/* STMicroelectronics chips */
51#define M50LPW080 0x002F 51#define M50LPW080 0x002F
52#define M50FLW080A 0x0080 52#define M50FLW080A 0x0080
53#define M50FLW080B 0x0081 53#define M50FLW080B 0x0081
54/* Atmel chips */
54#define AT49BV640D 0x02de 55#define AT49BV640D 0x02de
56#define AT49BV640DT 0x02db
55 57
56static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); 58static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
57static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); 59static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
@@ -199,6 +201,16 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
199 cfi->cfiq->BufWriteTimeoutMax = 0; 201 cfi->cfiq->BufWriteTimeoutMax = 0;
200} 202}
201 203
204static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param)
205{
206 struct map_info *map = mtd->priv;
207 struct cfi_private *cfi = map->fldrv_priv;
208 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
209
210 cfip->FeatureSupport |= (1 << 5);
211 mtd->flags |= MTD_POWERUP_LOCK;
212}
213
202#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE 214#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
203/* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ 215/* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
204static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) 216static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
@@ -283,6 +295,8 @@ static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param)
283 295
284static struct cfi_fixup cfi_fixup_table[] = { 296static struct cfi_fixup cfi_fixup_table[] = {
285 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, 297 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
298 { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock, NULL },
299 { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock, NULL },
286#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE 300#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
287 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, 301 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
288#endif 302#endif
@@ -294,16 +308,16 @@ static struct cfi_fixup cfi_fixup_table[] = {
294#endif 308#endif
295 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL }, 309 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL },
296 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL }, 310 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL },
297 { MANUFACTURER_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, }, 311 { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, },
298 { 0, 0, NULL, NULL } 312 { 0, 0, NULL, NULL }
299}; 313};
300 314
301static struct cfi_fixup jedec_fixup_table[] = { 315static struct cfi_fixup jedec_fixup_table[] = {
302 { MANUFACTURER_INTEL, I82802AB, fixup_use_fwh_lock, NULL, }, 316 { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock, NULL, },
303 { MANUFACTURER_INTEL, I82802AC, fixup_use_fwh_lock, NULL, }, 317 { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock, NULL, },
304 { MANUFACTURER_ST, M50LPW080, fixup_use_fwh_lock, NULL, }, 318 { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock, NULL, },
305 { MANUFACTURER_ST, M50FLW080A, fixup_use_fwh_lock, NULL, }, 319 { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock, NULL, },
306 { MANUFACTURER_ST, M50FLW080B, fixup_use_fwh_lock, NULL, }, 320 { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock, NULL, },
307 { 0, 0, NULL, NULL } 321 { 0, 0, NULL, NULL }
308}; 322};
309static struct cfi_fixup fixup_table[] = { 323static struct cfi_fixup fixup_table[] = {
@@ -319,7 +333,7 @@ static struct cfi_fixup fixup_table[] = {
319static void cfi_fixup_major_minor(struct cfi_private *cfi, 333static void cfi_fixup_major_minor(struct cfi_private *cfi,
320 struct cfi_pri_intelext *extp) 334 struct cfi_pri_intelext *extp)
321{ 335{
322 if (cfi->mfr == MANUFACTURER_INTEL && 336 if (cfi->mfr == CFI_MFR_INTEL &&
323 cfi->id == PF38F4476 && extp->MinorVersion == '3') 337 cfi->id == PF38F4476 && extp->MinorVersion == '3')
324 extp->MinorVersion = '1'; 338 extp->MinorVersion = '1';
325} 339}
@@ -2235,7 +2249,7 @@ static int cfi_intelext_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2235 2249
2236 /* Some chips have OTP located in the _top_ partition only. 2250 /* Some chips have OTP located in the _top_ partition only.
2237 For example: Intel 28F256L18T (T means top-parameter device) */ 2251 For example: Intel 28F256L18T (T means top-parameter device) */
2238 if (cfi->mfr == MANUFACTURER_INTEL) { 2252 if (cfi->mfr == CFI_MFR_INTEL) {
2239 switch (cfi->id) { 2253 switch (cfi->id) {
2240 case 0x880b: 2254 case 0x880b:
2241 case 0x880c: 2255 case 0x880c:
@@ -2564,6 +2578,7 @@ static int cfi_intelext_reset(struct mtd_info *mtd)
2564 if (!ret) { 2578 if (!ret) {
2565 map_write(map, CMD(0xff), chip->start); 2579 map_write(map, CMD(0xff), chip->start);
2566 chip->state = FL_SHUTDOWN; 2580 chip->state = FL_SHUTDOWN;
2581 put_chip(map, chip, chip->start);
2567 } 2582 }
2568 spin_unlock(chip->mutex); 2583 spin_unlock(chip->mutex);
2569 } 2584 }
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 94bb61e19047..1d49e18adbf6 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -490,10 +490,6 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
490 } 490 }
491#endif 491#endif
492 492
493 /* FIXME: erase-suspend-program is broken. See
494 http://lists.infradead.org/pipermail/linux-mtd/2003-December/009001.html */
495 printk(KERN_NOTICE "cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.\n");
496
497 __module_get(THIS_MODULE); 493 __module_get(THIS_MODULE);
498 return mtd; 494 return mtd;
499 495
@@ -589,15 +585,9 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
589 return 0; 585 return 0;
590 586
591 case FL_ERASING: 587 case FL_ERASING:
592 if (mode == FL_WRITING) /* FIXME: Erase-suspend-program appears broken. */ 588 if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
593 goto sleep; 589 !(mode == FL_READY || mode == FL_POINT ||
594 590 (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))))
595 if (!( mode == FL_READY
596 || mode == FL_POINT
597 || !cfip
598 || (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))
599 || (mode == FL_WRITING && (cfip->EraseSuspend & 0x1)
600 )))
601 goto sleep; 591 goto sleep;
602 592
603 /* We could check to see if we're trying to access the sector 593 /* We could check to see if we're trying to access the sector
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index c5a84fda5410..ca584d0380b4 100755
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
@@ -71,6 +71,13 @@ int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map,
71 cfi_send_gen_cmd(0x98, 0x555, base, map, cfi, cfi->device_type, NULL); 71 cfi_send_gen_cmd(0x98, 0x555, base, map, cfi, cfi->device_type, NULL);
72 if (cfi_qry_present(map, base, cfi)) 72 if (cfi_qry_present(map, base, cfi))
73 return 1; 73 return 1;
74 /* some old SST chips, e.g. 39VF160x/39VF320x */
75 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
76 cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
77 cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
78 cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
79 if (cfi_qry_present(map, base, cfi))
80 return 1;
74 /* QRY not found */ 81 /* QRY not found */
75 return 0; 82 return 0;
76} 83}
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 736a3be265f2..1bec5e1ce6ac 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -142,8 +142,8 @@
142 142
143/* ST - www.st.com */ 143/* ST - www.st.com */
144#define M29F800AB 0x0058 144#define M29F800AB 0x0058
145#define M29W800DT 0x00D7 145#define M29W800DT 0x22D7
146#define M29W800DB 0x005B 146#define M29W800DB 0x225B
147#define M29W400DT 0x00EE 147#define M29W400DT 0x00EE
148#define M29W400DB 0x00EF 148#define M29W400DB 0x00EF
149#define M29W160DT 0x22C4 149#define M29W160DT 0x22C4
@@ -1575,7 +1575,7 @@ static const struct amd_flash_info jedec_table[] = {
1575 .dev_id = M29W800DT, 1575 .dev_id = M29W800DT,
1576 .name = "ST M29W800DT", 1576 .name = "ST M29W800DT",
1577 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1577 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1578 .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ 1578 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1579 .dev_size = SIZE_1MiB, 1579 .dev_size = SIZE_1MiB,
1580 .cmd_set = P_ID_AMD_STD, 1580 .cmd_set = P_ID_AMD_STD,
1581 .nr_regions = 4, 1581 .nr_regions = 4,
@@ -1590,7 +1590,7 @@ static const struct amd_flash_info jedec_table[] = {
1590 .dev_id = M29W800DB, 1590 .dev_id = M29W800DB,
1591 .name = "ST M29W800DB", 1591 .name = "ST M29W800DB",
1592 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1592 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1593 .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ 1593 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1594 .dev_size = SIZE_1MiB, 1594 .dev_size = SIZE_1MiB,
1595 .cmd_set = P_ID_AMD_STD, 1595 .cmd_set = P_ID_AMD_STD,
1596 .nr_regions = 4, 1596 .nr_regions = 4,
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 933267a7a2a6..8f8c249d7c46 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/math64.h> 23#include <linux/math64.h>
24#include <linux/mod_devicetable.h>
24 25
25#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
26#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
@@ -28,9 +29,6 @@
28#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
29#include <linux/spi/flash.h> 30#include <linux/spi/flash.h>
30 31
31
32#define FLASH_PAGESIZE 256
33
34/* Flash opcodes. */ 32/* Flash opcodes. */
35#define OPCODE_WREN 0x06 /* Write enable */ 33#define OPCODE_WREN 0x06 /* Write enable */
36#define OPCODE_RDSR 0x05 /* Read status register */ 34#define OPCODE_RDSR 0x05 /* Read status register */
@@ -60,7 +58,7 @@
60 58
61/* Define max times to check status register before we give up. */ 59/* Define max times to check status register before we give up. */
62#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */ 60#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
63#define CMD_SIZE 4 61#define MAX_CMD_SIZE 4
64 62
65#ifdef CONFIG_M25PXX_USE_FAST_READ 63#ifdef CONFIG_M25PXX_USE_FAST_READ
66#define OPCODE_READ OPCODE_FAST_READ 64#define OPCODE_READ OPCODE_FAST_READ
@@ -77,8 +75,10 @@ struct m25p {
77 struct mutex lock; 75 struct mutex lock;
78 struct mtd_info mtd; 76 struct mtd_info mtd;
79 unsigned partitioned:1; 77 unsigned partitioned:1;
78 u16 page_size;
79 u16 addr_width;
80 u8 erase_opcode; 80 u8 erase_opcode;
81 u8 command[CMD_SIZE + FAST_READ_DUMMY_BYTE]; 81 u8 *command;
82}; 82};
83 83
84static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) 84static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
@@ -197,6 +197,19 @@ static int erase_chip(struct m25p *flash)
197 return 0; 197 return 0;
198} 198}
199 199
200static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
201{
202 /* opcode is in cmd[0] */
203 cmd[1] = addr >> (flash->addr_width * 8 - 8);
204 cmd[2] = addr >> (flash->addr_width * 8 - 16);
205 cmd[3] = addr >> (flash->addr_width * 8 - 24);
206}
207
208static int m25p_cmdsz(struct m25p *flash)
209{
210 return 1 + flash->addr_width;
211}
212
200/* 213/*
201 * Erase one sector of flash memory at offset ``offset'' which is any 214 * Erase one sector of flash memory at offset ``offset'' which is any
202 * address within the sector which should be erased. 215 * address within the sector which should be erased.
@@ -218,11 +231,9 @@ static int erase_sector(struct m25p *flash, u32 offset)
218 231
219 /* Set up command buffer. */ 232 /* Set up command buffer. */
220 flash->command[0] = flash->erase_opcode; 233 flash->command[0] = flash->erase_opcode;
221 flash->command[1] = offset >> 16; 234 m25p_addr2cmd(flash, offset, flash->command);
222 flash->command[2] = offset >> 8;
223 flash->command[3] = offset;
224 235
225 spi_write(flash->spi, flash->command, CMD_SIZE); 236 spi_write(flash->spi, flash->command, m25p_cmdsz(flash));
226 237
227 return 0; 238 return 0;
228} 239}
@@ -324,7 +335,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
324 * Should add 1 byte DUMMY_BYTE. 335 * Should add 1 byte DUMMY_BYTE.
325 */ 336 */
326 t[0].tx_buf = flash->command; 337 t[0].tx_buf = flash->command;
327 t[0].len = CMD_SIZE + FAST_READ_DUMMY_BYTE; 338 t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
328 spi_message_add_tail(&t[0], &m); 339 spi_message_add_tail(&t[0], &m);
329 340
330 t[1].rx_buf = buf; 341 t[1].rx_buf = buf;
@@ -351,13 +362,11 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
351 362
352 /* Set up the write data buffer. */ 363 /* Set up the write data buffer. */
353 flash->command[0] = OPCODE_READ; 364 flash->command[0] = OPCODE_READ;
354 flash->command[1] = from >> 16; 365 m25p_addr2cmd(flash, from, flash->command);
355 flash->command[2] = from >> 8;
356 flash->command[3] = from;
357 366
358 spi_sync(flash->spi, &m); 367 spi_sync(flash->spi, &m);
359 368
360 *retlen = m.actual_length - CMD_SIZE - FAST_READ_DUMMY_BYTE; 369 *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
361 370
362 mutex_unlock(&flash->lock); 371 mutex_unlock(&flash->lock);
363 372
@@ -395,7 +404,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
395 memset(t, 0, (sizeof t)); 404 memset(t, 0, (sizeof t));
396 405
397 t[0].tx_buf = flash->command; 406 t[0].tx_buf = flash->command;
398 t[0].len = CMD_SIZE; 407 t[0].len = m25p_cmdsz(flash);
399 spi_message_add_tail(&t[0], &m); 408 spi_message_add_tail(&t[0], &m);
400 409
401 t[1].tx_buf = buf; 410 t[1].tx_buf = buf;
@@ -413,41 +422,36 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
413 422
414 /* Set up the opcode in the write buffer. */ 423 /* Set up the opcode in the write buffer. */
415 flash->command[0] = OPCODE_PP; 424 flash->command[0] = OPCODE_PP;
416 flash->command[1] = to >> 16; 425 m25p_addr2cmd(flash, to, flash->command);
417 flash->command[2] = to >> 8;
418 flash->command[3] = to;
419 426
420 /* what page do we start with? */ 427 page_offset = to & (flash->page_size - 1);
421 page_offset = to % FLASH_PAGESIZE;
422 428
423 /* do all the bytes fit onto one page? */ 429 /* do all the bytes fit onto one page? */
424 if (page_offset + len <= FLASH_PAGESIZE) { 430 if (page_offset + len <= flash->page_size) {
425 t[1].len = len; 431 t[1].len = len;
426 432
427 spi_sync(flash->spi, &m); 433 spi_sync(flash->spi, &m);
428 434
429 *retlen = m.actual_length - CMD_SIZE; 435 *retlen = m.actual_length - m25p_cmdsz(flash);
430 } else { 436 } else {
431 u32 i; 437 u32 i;
432 438
433 /* the size of data remaining on the first page */ 439 /* the size of data remaining on the first page */
434 page_size = FLASH_PAGESIZE - page_offset; 440 page_size = flash->page_size - page_offset;
435 441
436 t[1].len = page_size; 442 t[1].len = page_size;
437 spi_sync(flash->spi, &m); 443 spi_sync(flash->spi, &m);
438 444
439 *retlen = m.actual_length - CMD_SIZE; 445 *retlen = m.actual_length - m25p_cmdsz(flash);
440 446
441 /* write everything in PAGESIZE chunks */ 447 /* write everything in flash->page_size chunks */
442 for (i = page_size; i < len; i += page_size) { 448 for (i = page_size; i < len; i += page_size) {
443 page_size = len - i; 449 page_size = len - i;
444 if (page_size > FLASH_PAGESIZE) 450 if (page_size > flash->page_size)
445 page_size = FLASH_PAGESIZE; 451 page_size = flash->page_size;
446 452
447 /* write the next page to flash */ 453 /* write the next page to flash */
448 flash->command[1] = (to + i) >> 16; 454 m25p_addr2cmd(flash, to + i, flash->command);
449 flash->command[2] = (to + i) >> 8;
450 flash->command[3] = (to + i);
451 455
452 t[1].tx_buf = buf + i; 456 t[1].tx_buf = buf + i;
453 t[1].len = page_size; 457 t[1].len = page_size;
@@ -459,7 +463,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
459 spi_sync(flash->spi, &m); 463 spi_sync(flash->spi, &m);
460 464
461 if (retlen) 465 if (retlen)
462 *retlen += m.actual_length - CMD_SIZE; 466 *retlen += m.actual_length - m25p_cmdsz(flash);
463 } 467 }
464 } 468 }
465 469
@@ -491,7 +495,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
491 memset(t, 0, (sizeof t)); 495 memset(t, 0, (sizeof t));
492 496
493 t[0].tx_buf = flash->command; 497 t[0].tx_buf = flash->command;
494 t[0].len = CMD_SIZE; 498 t[0].len = m25p_cmdsz(flash);
495 spi_message_add_tail(&t[0], &m); 499 spi_message_add_tail(&t[0], &m);
496 500
497 t[1].tx_buf = buf; 501 t[1].tx_buf = buf;
@@ -510,9 +514,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
510 /* Start write from odd address. */ 514 /* Start write from odd address. */
511 if (actual) { 515 if (actual) {
512 flash->command[0] = OPCODE_BP; 516 flash->command[0] = OPCODE_BP;
513 flash->command[1] = to >> 16; 517 m25p_addr2cmd(flash, to, flash->command);
514 flash->command[2] = to >> 8;
515 flash->command[3] = to;
516 518
517 /* write one byte. */ 519 /* write one byte. */
518 t[1].len = 1; 520 t[1].len = 1;
@@ -520,17 +522,15 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
520 ret = wait_till_ready(flash); 522 ret = wait_till_ready(flash);
521 if (ret) 523 if (ret)
522 goto time_out; 524 goto time_out;
523 *retlen += m.actual_length - CMD_SIZE; 525 *retlen += m.actual_length - m25p_cmdsz(flash);
524 } 526 }
525 to += actual; 527 to += actual;
526 528
527 flash->command[0] = OPCODE_AAI_WP; 529 flash->command[0] = OPCODE_AAI_WP;
528 flash->command[1] = to >> 16; 530 m25p_addr2cmd(flash, to, flash->command);
529 flash->command[2] = to >> 8;
530 flash->command[3] = to;
531 531
532 /* Write out most of the data here. */ 532 /* Write out most of the data here. */
533 cmd_sz = CMD_SIZE; 533 cmd_sz = m25p_cmdsz(flash);
534 for (; actual < len - 1; actual += 2) { 534 for (; actual < len - 1; actual += 2) {
535 t[0].len = cmd_sz; 535 t[0].len = cmd_sz;
536 /* write two bytes. */ 536 /* write two bytes. */
@@ -554,10 +554,8 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
554 if (actual != len) { 554 if (actual != len) {
555 write_enable(flash); 555 write_enable(flash);
556 flash->command[0] = OPCODE_BP; 556 flash->command[0] = OPCODE_BP;
557 flash->command[1] = to >> 16; 557 m25p_addr2cmd(flash, to, flash->command);
558 flash->command[2] = to >> 8; 558 t[0].len = m25p_cmdsz(flash);
559 flash->command[3] = to;
560 t[0].len = CMD_SIZE;
561 t[1].len = 1; 559 t[1].len = 1;
562 t[1].tx_buf = buf + actual; 560 t[1].tx_buf = buf + actual;
563 561
@@ -565,7 +563,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
565 ret = wait_till_ready(flash); 563 ret = wait_till_ready(flash);
566 if (ret) 564 if (ret)
567 goto time_out; 565 goto time_out;
568 *retlen += m.actual_length - CMD_SIZE; 566 *retlen += m.actual_length - m25p_cmdsz(flash);
569 write_disable(flash); 567 write_disable(flash);
570 } 568 }
571 569
@@ -581,8 +579,6 @@ time_out:
581 */ 579 */
582 580
583struct flash_info { 581struct flash_info {
584 char *name;
585
586 /* JEDEC id zero means "no ID" (most older chips); otherwise it has 582 /* JEDEC id zero means "no ID" (most older chips); otherwise it has
587 * a high byte of zero plus three data bytes: the manufacturer id, 583 * a high byte of zero plus three data bytes: the manufacturer id,
588 * then a two byte device id. 584 * then a two byte device id.
@@ -596,87 +592,118 @@ struct flash_info {
596 unsigned sector_size; 592 unsigned sector_size;
597 u16 n_sectors; 593 u16 n_sectors;
598 594
595 u16 page_size;
596 u16 addr_width;
597
599 u16 flags; 598 u16 flags;
600#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ 599#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
600#define M25P_NO_ERASE 0x02 /* No erase command needed */
601}; 601};
602 602
603#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
604 ((kernel_ulong_t)&(struct flash_info) { \
605 .jedec_id = (_jedec_id), \
606 .ext_id = (_ext_id), \
607 .sector_size = (_sector_size), \
608 .n_sectors = (_n_sectors), \
609 .page_size = 256, \
610 .addr_width = 3, \
611 .flags = (_flags), \
612 })
613
614#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \
615 ((kernel_ulong_t)&(struct flash_info) { \
616 .sector_size = (_sector_size), \
617 .n_sectors = (_n_sectors), \
618 .page_size = (_page_size), \
619 .addr_width = (_addr_width), \
620 .flags = M25P_NO_ERASE, \
621 })
603 622
604/* NOTE: double check command sets and memory organization when you add 623/* NOTE: double check command sets and memory organization when you add
605 * more flash chips. This current list focusses on newer chips, which 624 * more flash chips. This current list focusses on newer chips, which
606 * have been converging on command sets which including JEDEC ID. 625 * have been converging on command sets which including JEDEC ID.
607 */ 626 */
608static struct flash_info __devinitdata m25p_data [] = { 627static const struct spi_device_id m25p_ids[] = {
609
610 /* Atmel -- some are (confusingly) marketed as "DataFlash" */ 628 /* Atmel -- some are (confusingly) marketed as "DataFlash" */
611 { "at25fs010", 0x1f6601, 0, 32 * 1024, 4, SECT_4K, }, 629 { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K) },
612 { "at25fs040", 0x1f6604, 0, 64 * 1024, 8, SECT_4K, }, 630 { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) },
613 631
614 { "at25df041a", 0x1f4401, 0, 64 * 1024, 8, SECT_4K, }, 632 { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) },
615 { "at25df641", 0x1f4800, 0, 64 * 1024, 128, SECT_4K, }, 633 { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
616 634
617 { "at26f004", 0x1f0400, 0, 64 * 1024, 8, SECT_4K, }, 635 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
618 { "at26df081a", 0x1f4501, 0, 64 * 1024, 16, SECT_4K, }, 636 { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
619 { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, }, 637 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
620 { "at26df321", 0x1f4701, 0, 64 * 1024, 64, SECT_4K, }, 638 { "at26df321", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
621 639
622 /* Macronix */ 640 /* Macronix */
623 { "mx25l3205d", 0xc22016, 0, 64 * 1024, 64, }, 641 { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
624 { "mx25l6405d", 0xc22017, 0, 64 * 1024, 128, }, 642 { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
625 { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, }, 643 { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
626 { "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, }, 644 { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
627 645
628 /* Spansion -- single (large) sector size only, at least 646 /* Spansion -- single (large) sector size only, at least
629 * for the chips listed here (without boot sectors). 647 * for the chips listed here (without boot sectors).
630 */ 648 */
631 { "s25sl004a", 0x010212, 0, 64 * 1024, 8, }, 649 { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
632 { "s25sl008a", 0x010213, 0, 64 * 1024, 16, }, 650 { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
633 { "s25sl016a", 0x010214, 0, 64 * 1024, 32, }, 651 { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) },
634 { "s25sl032a", 0x010215, 0, 64 * 1024, 64, }, 652 { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) },
635 { "s25sl064a", 0x010216, 0, 64 * 1024, 128, }, 653 { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) },
636 { "s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, }, 654 { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
637 { "s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, }, 655 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
638 { "s25fl129p0", 0x012018, 0x4d00, 256 * 1024, 64, }, 656 { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
639 { "s25fl129p1", 0x012018, 0x4d01, 64 * 1024, 256, }, 657 { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) },
640 658
641 /* SST -- large erase sizes are "overlays", "sectors" are 4K */ 659 /* SST -- large erase sizes are "overlays", "sectors" are 4K */
642 { "sst25vf040b", 0xbf258d, 0, 64 * 1024, 8, SECT_4K, }, 660 { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K) },
643 { "sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K, }, 661 { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) },
644 { "sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K, }, 662 { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) },
645 { "sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K, }, 663 { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) },
646 { "sst25wf512", 0xbf2501, 0, 64 * 1024, 1, SECT_4K, }, 664 { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) },
647 { "sst25wf010", 0xbf2502, 0, 64 * 1024, 2, SECT_4K, }, 665 { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) },
648 { "sst25wf020", 0xbf2503, 0, 64 * 1024, 4, SECT_4K, }, 666 { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) },
649 { "sst25wf040", 0xbf2504, 0, 64 * 1024, 8, SECT_4K, }, 667 { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) },
650 668
651 /* ST Microelectronics -- newer production may have feature updates */ 669 /* ST Microelectronics -- newer production may have feature updates */
652 { "m25p05", 0x202010, 0, 32 * 1024, 2, }, 670 { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) },
653 { "m25p10", 0x202011, 0, 32 * 1024, 4, }, 671 { "m25p10", INFO(0x202011, 0, 32 * 1024, 4, 0) },
654 { "m25p20", 0x202012, 0, 64 * 1024, 4, }, 672 { "m25p20", INFO(0x202012, 0, 64 * 1024, 4, 0) },
655 { "m25p40", 0x202013, 0, 64 * 1024, 8, }, 673 { "m25p40", INFO(0x202013, 0, 64 * 1024, 8, 0) },
656 { "m25p80", 0, 0, 64 * 1024, 16, }, 674 { "m25p80", INFO(0x202014, 0, 64 * 1024, 16, 0) },
657 { "m25p16", 0x202015, 0, 64 * 1024, 32, }, 675 { "m25p16", INFO(0x202015, 0, 64 * 1024, 32, 0) },
658 { "m25p32", 0x202016, 0, 64 * 1024, 64, }, 676 { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, 0) },
659 { "m25p64", 0x202017, 0, 64 * 1024, 128, }, 677 { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) },
660 { "m25p128", 0x202018, 0, 256 * 1024, 64, }, 678 { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) },
661 679
662 { "m45pe10", 0x204011, 0, 64 * 1024, 2, }, 680 { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2, 0) },
663 { "m45pe80", 0x204014, 0, 64 * 1024, 16, }, 681 { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) },
664 { "m45pe16", 0x204015, 0, 64 * 1024, 32, }, 682 { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) },
665 683
666 { "m25pe80", 0x208014, 0, 64 * 1024, 16, }, 684 { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) },
667 { "m25pe16", 0x208015, 0, 64 * 1024, 32, SECT_4K, }, 685 { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) },
668 686
669 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 687 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
670 { "w25x10", 0xef3011, 0, 64 * 1024, 2, SECT_4K, }, 688 { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
671 { "w25x20", 0xef3012, 0, 64 * 1024, 4, SECT_4K, }, 689 { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4, SECT_4K) },
672 { "w25x40", 0xef3013, 0, 64 * 1024, 8, SECT_4K, }, 690 { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SECT_4K) },
673 { "w25x80", 0xef3014, 0, 64 * 1024, 16, SECT_4K, }, 691 { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) },
674 { "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K, }, 692 { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) },
675 { "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K, }, 693 { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) },
676 { "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K, }, 694 { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
695
696 /* Catalyst / On Semiconductor -- non-JEDEC */
697 { "cat25c11", CAT25_INFO( 16, 8, 16, 1) },
698 { "cat25c03", CAT25_INFO( 32, 8, 16, 2) },
699 { "cat25c09", CAT25_INFO( 128, 8, 32, 2) },
700 { "cat25c17", CAT25_INFO( 256, 8, 32, 2) },
701 { "cat25128", CAT25_INFO(2048, 8, 64, 2) },
702 { },
677}; 703};
704MODULE_DEVICE_TABLE(spi, m25p_ids);
678 705
679static struct flash_info *__devinit jedec_probe(struct spi_device *spi) 706static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi)
680{ 707{
681 int tmp; 708 int tmp;
682 u8 code = OPCODE_RDID; 709 u8 code = OPCODE_RDID;
@@ -701,18 +728,24 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
701 jedec = jedec << 8; 728 jedec = jedec << 8;
702 jedec |= id[2]; 729 jedec |= id[2];
703 730
731 /*
732 * Some chips (like Numonyx M25P80) have JEDEC and non-JEDEC variants,
733 * which depend on technology process. Officially RDID command doesn't
734 * exist for non-JEDEC chips, but for compatibility they return ID 0.
735 */
736 if (jedec == 0)
737 return NULL;
738
704 ext_jedec = id[3] << 8 | id[4]; 739 ext_jedec = id[3] << 8 | id[4];
705 740
706 for (tmp = 0, info = m25p_data; 741 for (tmp = 0; tmp < ARRAY_SIZE(m25p_ids) - 1; tmp++) {
707 tmp < ARRAY_SIZE(m25p_data); 742 info = (void *)m25p_ids[tmp].driver_data;
708 tmp++, info++) {
709 if (info->jedec_id == jedec) { 743 if (info->jedec_id == jedec) {
710 if (info->ext_id != 0 && info->ext_id != ext_jedec) 744 if (info->ext_id != 0 && info->ext_id != ext_jedec)
711 continue; 745 continue;
712 return info; 746 return &m25p_ids[tmp];
713 } 747 }
714 } 748 }
715 dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
716 return NULL; 749 return NULL;
717} 750}
718 751
@@ -724,6 +757,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
724 */ 757 */
725static int __devinit m25p_probe(struct spi_device *spi) 758static int __devinit m25p_probe(struct spi_device *spi)
726{ 759{
760 const struct spi_device_id *id = spi_get_device_id(spi);
727 struct flash_platform_data *data; 761 struct flash_platform_data *data;
728 struct m25p *flash; 762 struct m25p *flash;
729 struct flash_info *info; 763 struct flash_info *info;
@@ -736,39 +770,53 @@ static int __devinit m25p_probe(struct spi_device *spi)
736 */ 770 */
737 data = spi->dev.platform_data; 771 data = spi->dev.platform_data;
738 if (data && data->type) { 772 if (data && data->type) {
739 for (i = 0, info = m25p_data; 773 const struct spi_device_id *plat_id;
740 i < ARRAY_SIZE(m25p_data);
741 i++, info++) {
742 if (strcmp(data->type, info->name) == 0)
743 break;
744 }
745 774
746 /* unrecognized chip? */ 775 for (i = 0; i < ARRAY_SIZE(m25p_ids) - 1; i++) {
747 if (i == ARRAY_SIZE(m25p_data)) { 776 plat_id = &m25p_ids[i];
748 DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n", 777 if (strcmp(data->type, plat_id->name))
749 dev_name(&spi->dev), data->type); 778 continue;
750 info = NULL; 779 break;
751
752 /* recognized; is that chip really what's there? */
753 } else if (info->jedec_id) {
754 struct flash_info *chip = jedec_probe(spi);
755
756 if (!chip || chip != info) {
757 dev_warn(&spi->dev, "found %s, expected %s\n",
758 chip ? chip->name : "UNKNOWN",
759 info->name);
760 info = NULL;
761 }
762 } 780 }
763 } else
764 info = jedec_probe(spi);
765 781
766 if (!info) 782 if (plat_id)
767 return -ENODEV; 783 id = plat_id;
784 else
785 dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
786 }
787
788 info = (void *)id->driver_data;
789
790 if (info->jedec_id) {
791 const struct spi_device_id *jid;
792
793 jid = jedec_probe(spi);
794 if (!jid) {
795 dev_info(&spi->dev, "non-JEDEC variant of %s\n",
796 id->name);
797 } else if (jid != id) {
798 /*
799 * JEDEC knows better, so overwrite platform ID. We
800 * can't trust partitions any longer, but we'll let
801 * mtd apply them anyway, since some partitions may be
802 * marked read-only, and we don't want to lose that
803 * information, even if it's not 100% accurate.
804 */
805 dev_warn(&spi->dev, "found %s, expected %s\n",
806 jid->name, id->name);
807 id = jid;
808 info = (void *)jid->driver_data;
809 }
810 }
768 811
769 flash = kzalloc(sizeof *flash, GFP_KERNEL); 812 flash = kzalloc(sizeof *flash, GFP_KERNEL);
770 if (!flash) 813 if (!flash)
771 return -ENOMEM; 814 return -ENOMEM;
815 flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL);
816 if (!flash->command) {
817 kfree(flash);
818 return -ENOMEM;
819 }
772 820
773 flash->spi = spi; 821 flash->spi = spi;
774 mutex_init(&flash->lock); 822 mutex_init(&flash->lock);
@@ -812,9 +860,14 @@ static int __devinit m25p_probe(struct spi_device *spi)
812 flash->mtd.erasesize = info->sector_size; 860 flash->mtd.erasesize = info->sector_size;
813 } 861 }
814 862
863 if (info->flags & M25P_NO_ERASE)
864 flash->mtd.flags |= MTD_NO_ERASE;
865
815 flash->mtd.dev.parent = &spi->dev; 866 flash->mtd.dev.parent = &spi->dev;
867 flash->page_size = info->page_size;
868 flash->addr_width = info->addr_width;
816 869
817 dev_info(&spi->dev, "%s (%lld Kbytes)\n", info->name, 870 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name,
818 (long long)flash->mtd.size >> 10); 871 (long long)flash->mtd.size >> 10);
819 872
820 DEBUG(MTD_DEBUG_LEVEL2, 873 DEBUG(MTD_DEBUG_LEVEL2,
@@ -888,8 +941,10 @@ static int __devexit m25p_remove(struct spi_device *spi)
888 status = del_mtd_partitions(&flash->mtd); 941 status = del_mtd_partitions(&flash->mtd);
889 else 942 else
890 status = del_mtd_device(&flash->mtd); 943 status = del_mtd_device(&flash->mtd);
891 if (status == 0) 944 if (status == 0) {
945 kfree(flash->command);
892 kfree(flash); 946 kfree(flash);
947 }
893 return 0; 948 return 0;
894} 949}
895 950
@@ -900,6 +955,7 @@ static struct spi_driver m25p80_driver = {
900 .bus = &spi_bus_type, 955 .bus = &spi_bus_type,
901 .owner = THIS_MODULE, 956 .owner = THIS_MODULE,
902 }, 957 },
958 .id_table = m25p_ids,
903 .probe = m25p_probe, 959 .probe = m25p_probe,
904 .remove = __devexit_p(m25p_remove), 960 .remove = __devexit_p(m25p_remove),
905 961
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 34f3cddb384b..3078d6d0112f 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_MTD_CEIVA) += ceiva.o
24obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o 24obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o
25obj-$(CONFIG_MTD_PHYSMAP) += physmap.o 25obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
26obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o 26obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o
27obj-$(CONFIG_MTD_PISMO) += pismo.o
27obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o 28obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o
28obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o 29obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
29obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o 30obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c
index 7214b876feba..7b0515297411 100644
--- a/drivers/mtd/maps/ixp4xx.c
+++ b/drivers/mtd/maps/ixp4xx.c
@@ -210,7 +210,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
210 * not attempt to do a direct access on us. 210 * not attempt to do a direct access on us.
211 */ 211 */
212 info->map.phys = NO_XIP; 212 info->map.phys = NO_XIP;
213 info->map.size = dev->resource->end - dev->resource->start + 1; 213 info->map.size = resource_size(dev->resource);
214 214
215 /* 215 /*
216 * We only support 16-bit accesses for now. If and when 216 * We only support 16-bit accesses for now. If and when
@@ -224,7 +224,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
224 info->map.copy_from = ixp4xx_copy_from, 224 info->map.copy_from = ixp4xx_copy_from,
225 225
226 info->res = request_mem_region(dev->resource->start, 226 info->res = request_mem_region(dev->resource->start,
227 dev->resource->end - dev->resource->start + 1, 227 resource_size(dev->resource),
228 "IXP4XXFlash"); 228 "IXP4XXFlash");
229 if (!info->res) { 229 if (!info->res) {
230 printk(KERN_ERR "IXP4XXFlash: Could not reserve memory region\n"); 230 printk(KERN_ERR "IXP4XXFlash: Could not reserve memory region\n");
@@ -233,7 +233,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
233 } 233 }
234 234
235 info->map.virt = ioremap(dev->resource->start, 235 info->map.virt = ioremap(dev->resource->start,
236 dev->resource->end - dev->resource->start + 1); 236 resource_size(dev->resource));
237 if (!info->map.virt) { 237 if (!info->map.virt) {
238 printk(KERN_ERR "IXP4XXFlash: Failed to ioremap region\n"); 238 printk(KERN_ERR "IXP4XXFlash: Failed to ioremap region\n");
239 err = -EIO; 239 err = -EIO;
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 3f13a9673e7f..d9603f7f9652 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -129,7 +129,7 @@ static int physmap_flash_probe(struct platform_device *dev)
129 info->map[i].size); 129 info->map[i].size);
130 if (info->map[i].virt == NULL) { 130 if (info->map[i].virt == NULL) {
131 dev_err(&dev->dev, "Failed to ioremap flash region\n"); 131 dev_err(&dev->dev, "Failed to ioremap flash region\n");
132 err = EIO; 132 err = -EIO;
133 goto err_out; 133 goto err_out;
134 } 134 }
135 135
diff --git a/drivers/mtd/maps/vmu-flash.c b/drivers/mtd/maps/vmu-flash.c
index 1f73297e7776..82afad0ddd72 100644
--- a/drivers/mtd/maps/vmu-flash.c
+++ b/drivers/mtd/maps/vmu-flash.c
@@ -612,16 +612,15 @@ static int __devinit vmu_connect(struct maple_device *mdev)
612 612
613 test_flash_data = be32_to_cpu(mdev->devinfo.function); 613 test_flash_data = be32_to_cpu(mdev->devinfo.function);
614 /* Need to count how many bits are set - to find out which 614 /* Need to count how many bits are set - to find out which
615 * function_data element has details of the memory card: 615 * function_data element has details of the memory card
616 * using Brian Kernighan's/Peter Wegner's method */ 616 */
617 for (c = 0; test_flash_data; c++) 617 c = hweight_long(test_flash_data);
618 test_flash_data &= test_flash_data - 1;
619 618
620 basic_flash_data = be32_to_cpu(mdev->devinfo.function_data[c - 1]); 619 basic_flash_data = be32_to_cpu(mdev->devinfo.function_data[c - 1]);
621 620
622 card = kmalloc(sizeof(struct memcard), GFP_KERNEL); 621 card = kmalloc(sizeof(struct memcard), GFP_KERNEL);
623 if (!card) { 622 if (!card) {
624 error = ENOMEM; 623 error = -ENOMEM;
625 goto fail_nomem; 624 goto fail_nomem;
626 } 625 }
627 626
diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c
index 955226d74808..fa83757e7c96 100644
--- a/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@ -91,9 +91,6 @@ static int mtd_blktrans_thread(void *arg)
91 struct request_queue *rq = tr->blkcore_priv->rq; 91 struct request_queue *rq = tr->blkcore_priv->rq;
92 struct request *req = NULL; 92 struct request *req = NULL;
93 93
94 /* we might get involved when memory gets low, so use PF_MEMALLOC */
95 current->flags |= PF_MEMALLOC;
96
97 spin_lock_irq(rq->queue_lock); 94 spin_lock_irq(rq->queue_lock);
98 95
99 while (!kthread_should_stop()) { 96 while (!kthread_should_stop()) {
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 467a4f177bfb..c356c0a30c3e 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -447,7 +447,7 @@ struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num)
447 for (i=0; i< MAX_MTD_DEVICES; i++) 447 for (i=0; i< MAX_MTD_DEVICES; i++)
448 if (mtd_table[i] == mtd) 448 if (mtd_table[i] == mtd)
449 ret = mtd_table[i]; 449 ret = mtd_table[i];
450 } else if (num < MAX_MTD_DEVICES) { 450 } else if (num >= 0 && num < MAX_MTD_DEVICES) {
451 ret = mtd_table[num]; 451 ret = mtd_table[num];
452 if (mtd && mtd != ret) 452 if (mtd && mtd != ret)
453 ret = NULL; 453 ret = NULL;
diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c
index 1060337c06df..a714ec482761 100644
--- a/drivers/mtd/mtdoops.c
+++ b/drivers/mtd/mtdoops.c
@@ -29,14 +29,34 @@
29#include <linux/sched.h> 29#include <linux/sched.h>
30#include <linux/wait.h> 30#include <linux/wait.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/spinlock.h>
33#include <linux/interrupt.h> 32#include <linux/interrupt.h>
34#include <linux/mtd/mtd.h> 33#include <linux/mtd/mtd.h>
34#include <linux/kmsg_dump.h>
35
36/* Maximum MTD partition size */
37#define MTDOOPS_MAX_MTD_SIZE (8 * 1024 * 1024)
35 38
36#define MTDOOPS_KERNMSG_MAGIC 0x5d005d00 39#define MTDOOPS_KERNMSG_MAGIC 0x5d005d00
37#define OOPS_PAGE_SIZE 4096 40#define MTDOOPS_HEADER_SIZE 8
41
42static unsigned long record_size = 4096;
43module_param(record_size, ulong, 0400);
44MODULE_PARM_DESC(record_size,
45 "record size for MTD OOPS pages in bytes (default 4096)");
46
47static char mtddev[80];
48module_param_string(mtddev, mtddev, 80, 0400);
49MODULE_PARM_DESC(mtddev,
50 "name or index number of the MTD device to use");
51
52static int dump_oops = 1;
53module_param(dump_oops, int, 0600);
54MODULE_PARM_DESC(dump_oops,
55 "set to 1 to dump oopses, 0 to only dump panics (default 1)");
38 56
39static struct mtdoops_context { 57static struct mtdoops_context {
58 struct kmsg_dumper dump;
59
40 int mtd_index; 60 int mtd_index;
41 struct work_struct work_erase; 61 struct work_struct work_erase;
42 struct work_struct work_write; 62 struct work_struct work_write;
@@ -44,28 +64,43 @@ static struct mtdoops_context {
44 int oops_pages; 64 int oops_pages;
45 int nextpage; 65 int nextpage;
46 int nextcount; 66 int nextcount;
47 char *name; 67 unsigned long *oops_page_used;
48 68
49 void *oops_buf; 69 void *oops_buf;
50
51 /* writecount and disabling ready are spin lock protected */
52 spinlock_t writecount_lock;
53 int ready;
54 int writecount;
55} oops_cxt; 70} oops_cxt;
56 71
72static void mark_page_used(struct mtdoops_context *cxt, int page)
73{
74 set_bit(page, cxt->oops_page_used);
75}
76
77static void mark_page_unused(struct mtdoops_context *cxt, int page)
78{
79 clear_bit(page, cxt->oops_page_used);
80}
81
82static int page_is_used(struct mtdoops_context *cxt, int page)
83{
84 return test_bit(page, cxt->oops_page_used);
85}
86
57static void mtdoops_erase_callback(struct erase_info *done) 87static void mtdoops_erase_callback(struct erase_info *done)
58{ 88{
59 wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv; 89 wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
60 wake_up(wait_q); 90 wake_up(wait_q);
61} 91}
62 92
63static int mtdoops_erase_block(struct mtd_info *mtd, int offset) 93static int mtdoops_erase_block(struct mtdoops_context *cxt, int offset)
64{ 94{
95 struct mtd_info *mtd = cxt->mtd;
96 u32 start_page_offset = mtd_div_by_eb(offset, mtd) * mtd->erasesize;
97 u32 start_page = start_page_offset / record_size;
98 u32 erase_pages = mtd->erasesize / record_size;
65 struct erase_info erase; 99 struct erase_info erase;
66 DECLARE_WAITQUEUE(wait, current); 100 DECLARE_WAITQUEUE(wait, current);
67 wait_queue_head_t wait_q; 101 wait_queue_head_t wait_q;
68 int ret; 102 int ret;
103 int page;
69 104
70 init_waitqueue_head(&wait_q); 105 init_waitqueue_head(&wait_q);
71 erase.mtd = mtd; 106 erase.mtd = mtd;
@@ -81,25 +116,24 @@ static int mtdoops_erase_block(struct mtd_info *mtd, int offset)
81 if (ret) { 116 if (ret) {
82 set_current_state(TASK_RUNNING); 117 set_current_state(TASK_RUNNING);
83 remove_wait_queue(&wait_q, &wait); 118 remove_wait_queue(&wait_q, &wait);
84 printk (KERN_WARNING "mtdoops: erase of region [0x%llx, 0x%llx] " 119 printk(KERN_WARNING "mtdoops: erase of region [0x%llx, 0x%llx] on \"%s\" failed\n",
85 "on \"%s\" failed\n", 120 (unsigned long long)erase.addr,
86 (unsigned long long)erase.addr, (unsigned long long)erase.len, mtd->name); 121 (unsigned long long)erase.len, mtddev);
87 return ret; 122 return ret;
88 } 123 }
89 124
90 schedule(); /* Wait for erase to finish. */ 125 schedule(); /* Wait for erase to finish. */
91 remove_wait_queue(&wait_q, &wait); 126 remove_wait_queue(&wait_q, &wait);
92 127
128 /* Mark pages as unused */
129 for (page = start_page; page < start_page + erase_pages; page++)
130 mark_page_unused(cxt, page);
131
93 return 0; 132 return 0;
94} 133}
95 134
96static void mtdoops_inc_counter(struct mtdoops_context *cxt) 135static void mtdoops_inc_counter(struct mtdoops_context *cxt)
97{ 136{
98 struct mtd_info *mtd = cxt->mtd;
99 size_t retlen;
100 u32 count;
101 int ret;
102
103 cxt->nextpage++; 137 cxt->nextpage++;
104 if (cxt->nextpage >= cxt->oops_pages) 138 if (cxt->nextpage >= cxt->oops_pages)
105 cxt->nextpage = 0; 139 cxt->nextpage = 0;
@@ -107,25 +141,13 @@ static void mtdoops_inc_counter(struct mtdoops_context *cxt)
107 if (cxt->nextcount == 0xffffffff) 141 if (cxt->nextcount == 0xffffffff)
108 cxt->nextcount = 0; 142 cxt->nextcount = 0;
109 143
110 ret = mtd->read(mtd, cxt->nextpage * OOPS_PAGE_SIZE, 4, 144 if (page_is_used(cxt, cxt->nextpage)) {
111 &retlen, (u_char *) &count);
112 if ((retlen != 4) || ((ret < 0) && (ret != -EUCLEAN))) {
113 printk(KERN_ERR "mtdoops: Read failure at %d (%td of 4 read)"
114 ", err %d.\n", cxt->nextpage * OOPS_PAGE_SIZE,
115 retlen, ret);
116 schedule_work(&cxt->work_erase); 145 schedule_work(&cxt->work_erase);
117 return; 146 return;
118 } 147 }
119 148
120 /* See if we need to erase the next block */ 149 printk(KERN_DEBUG "mtdoops: ready %d, %d (no erase)\n",
121 if (count != 0xffffffff) { 150 cxt->nextpage, cxt->nextcount);
122 schedule_work(&cxt->work_erase);
123 return;
124 }
125
126 printk(KERN_DEBUG "mtdoops: Ready %d, %d (no erase)\n",
127 cxt->nextpage, cxt->nextcount);
128 cxt->ready = 1;
129} 151}
130 152
131/* Scheduled work - when we can't proceed without erasing a block */ 153/* Scheduled work - when we can't proceed without erasing a block */
@@ -140,47 +162,47 @@ static void mtdoops_workfunc_erase(struct work_struct *work)
140 if (!mtd) 162 if (!mtd)
141 return; 163 return;
142 164
143 mod = (cxt->nextpage * OOPS_PAGE_SIZE) % mtd->erasesize; 165 mod = (cxt->nextpage * record_size) % mtd->erasesize;
144 if (mod != 0) { 166 if (mod != 0) {
145 cxt->nextpage = cxt->nextpage + ((mtd->erasesize - mod) / OOPS_PAGE_SIZE); 167 cxt->nextpage = cxt->nextpage + ((mtd->erasesize - mod) / record_size);
146 if (cxt->nextpage >= cxt->oops_pages) 168 if (cxt->nextpage >= cxt->oops_pages)
147 cxt->nextpage = 0; 169 cxt->nextpage = 0;
148 } 170 }
149 171
150 while (mtd->block_isbad) { 172 while (mtd->block_isbad) {
151 ret = mtd->block_isbad(mtd, cxt->nextpage * OOPS_PAGE_SIZE); 173 ret = mtd->block_isbad(mtd, cxt->nextpage * record_size);
152 if (!ret) 174 if (!ret)
153 break; 175 break;
154 if (ret < 0) { 176 if (ret < 0) {
155 printk(KERN_ERR "mtdoops: block_isbad failed, aborting.\n"); 177 printk(KERN_ERR "mtdoops: block_isbad failed, aborting\n");
156 return; 178 return;
157 } 179 }
158badblock: 180badblock:
159 printk(KERN_WARNING "mtdoops: Bad block at %08x\n", 181 printk(KERN_WARNING "mtdoops: bad block at %08lx\n",
160 cxt->nextpage * OOPS_PAGE_SIZE); 182 cxt->nextpage * record_size);
161 i++; 183 i++;
162 cxt->nextpage = cxt->nextpage + (mtd->erasesize / OOPS_PAGE_SIZE); 184 cxt->nextpage = cxt->nextpage + (mtd->erasesize / record_size);
163 if (cxt->nextpage >= cxt->oops_pages) 185 if (cxt->nextpage >= cxt->oops_pages)
164 cxt->nextpage = 0; 186 cxt->nextpage = 0;
165 if (i == (cxt->oops_pages / (mtd->erasesize / OOPS_PAGE_SIZE))) { 187 if (i == cxt->oops_pages / (mtd->erasesize / record_size)) {
166 printk(KERN_ERR "mtdoops: All blocks bad!\n"); 188 printk(KERN_ERR "mtdoops: all blocks bad!\n");
167 return; 189 return;
168 } 190 }
169 } 191 }
170 192
171 for (j = 0, ret = -1; (j < 3) && (ret < 0); j++) 193 for (j = 0, ret = -1; (j < 3) && (ret < 0); j++)
172 ret = mtdoops_erase_block(mtd, cxt->nextpage * OOPS_PAGE_SIZE); 194 ret = mtdoops_erase_block(cxt, cxt->nextpage * record_size);
173 195
174 if (ret >= 0) { 196 if (ret >= 0) {
175 printk(KERN_DEBUG "mtdoops: Ready %d, %d \n", cxt->nextpage, cxt->nextcount); 197 printk(KERN_DEBUG "mtdoops: ready %d, %d\n",
176 cxt->ready = 1; 198 cxt->nextpage, cxt->nextcount);
177 return; 199 return;
178 } 200 }
179 201
180 if (mtd->block_markbad && (ret == -EIO)) { 202 if (mtd->block_markbad && ret == -EIO) {
181 ret = mtd->block_markbad(mtd, cxt->nextpage * OOPS_PAGE_SIZE); 203 ret = mtd->block_markbad(mtd, cxt->nextpage * record_size);
182 if (ret < 0) { 204 if (ret < 0) {
183 printk(KERN_ERR "mtdoops: block_markbad failed, aborting.\n"); 205 printk(KERN_ERR "mtdoops: block_markbad failed, aborting\n");
184 return; 206 return;
185 } 207 }
186 } 208 }
@@ -191,36 +213,37 @@ static void mtdoops_write(struct mtdoops_context *cxt, int panic)
191{ 213{
192 struct mtd_info *mtd = cxt->mtd; 214 struct mtd_info *mtd = cxt->mtd;
193 size_t retlen; 215 size_t retlen;
216 u32 *hdr;
194 int ret; 217 int ret;
195 218
196 if (cxt->writecount < OOPS_PAGE_SIZE) 219 /* Add mtdoops header to the buffer */
197 memset(cxt->oops_buf + cxt->writecount, 0xff, 220 hdr = cxt->oops_buf;
198 OOPS_PAGE_SIZE - cxt->writecount); 221 hdr[0] = cxt->nextcount;
222 hdr[1] = MTDOOPS_KERNMSG_MAGIC;
199 223
200 if (panic) 224 if (panic)
201 ret = mtd->panic_write(mtd, cxt->nextpage * OOPS_PAGE_SIZE, 225 ret = mtd->panic_write(mtd, cxt->nextpage * record_size,
202 OOPS_PAGE_SIZE, &retlen, cxt->oops_buf); 226 record_size, &retlen, cxt->oops_buf);
203 else 227 else
204 ret = mtd->write(mtd, cxt->nextpage * OOPS_PAGE_SIZE, 228 ret = mtd->write(mtd, cxt->nextpage * record_size,
205 OOPS_PAGE_SIZE, &retlen, cxt->oops_buf); 229 record_size, &retlen, cxt->oops_buf);
206
207 cxt->writecount = 0;
208 230
209 if ((retlen != OOPS_PAGE_SIZE) || (ret < 0)) 231 if (retlen != record_size || ret < 0)
210 printk(KERN_ERR "mtdoops: Write failure at %d (%td of %d written), err %d.\n", 232 printk(KERN_ERR "mtdoops: write failure at %ld (%td of %ld written), error %d\n",
211 cxt->nextpage * OOPS_PAGE_SIZE, retlen, OOPS_PAGE_SIZE, ret); 233 cxt->nextpage * record_size, retlen, record_size, ret);
234 mark_page_used(cxt, cxt->nextpage);
235 memset(cxt->oops_buf, 0xff, record_size);
212 236
213 mtdoops_inc_counter(cxt); 237 mtdoops_inc_counter(cxt);
214} 238}
215 239
216
217static void mtdoops_workfunc_write(struct work_struct *work) 240static void mtdoops_workfunc_write(struct work_struct *work)
218{ 241{
219 struct mtdoops_context *cxt = 242 struct mtdoops_context *cxt =
220 container_of(work, struct mtdoops_context, work_write); 243 container_of(work, struct mtdoops_context, work_write);
221 244
222 mtdoops_write(cxt, 0); 245 mtdoops_write(cxt, 0);
223} 246}
224 247
225static void find_next_position(struct mtdoops_context *cxt) 248static void find_next_position(struct mtdoops_context *cxt)
226{ 249{
@@ -230,28 +253,33 @@ static void find_next_position(struct mtdoops_context *cxt)
230 size_t retlen; 253 size_t retlen;
231 254
232 for (page = 0; page < cxt->oops_pages; page++) { 255 for (page = 0; page < cxt->oops_pages; page++) {
233 ret = mtd->read(mtd, page * OOPS_PAGE_SIZE, 8, &retlen, (u_char *) &count[0]); 256 /* Assume the page is used */
234 if ((retlen != 8) || ((ret < 0) && (ret != -EUCLEAN))) { 257 mark_page_used(cxt, page);
235 printk(KERN_ERR "mtdoops: Read failure at %d (%td of 8 read)" 258 ret = mtd->read(mtd, page * record_size, MTDOOPS_HEADER_SIZE,
236 ", err %d.\n", page * OOPS_PAGE_SIZE, retlen, ret); 259 &retlen, (u_char *) &count[0]);
260 if (retlen != MTDOOPS_HEADER_SIZE ||
261 (ret < 0 && ret != -EUCLEAN)) {
262 printk(KERN_ERR "mtdoops: read failure at %ld (%td of %d read), err %d\n",
263 page * record_size, retlen,
264 MTDOOPS_HEADER_SIZE, ret);
237 continue; 265 continue;
238 } 266 }
239 267
240 if (count[1] != MTDOOPS_KERNMSG_MAGIC) 268 if (count[0] == 0xffffffff && count[1] == 0xffffffff)
241 continue; 269 mark_page_unused(cxt, page);
242 if (count[0] == 0xffffffff) 270 if (count[0] == 0xffffffff)
243 continue; 271 continue;
244 if (maxcount == 0xffffffff) { 272 if (maxcount == 0xffffffff) {
245 maxcount = count[0]; 273 maxcount = count[0];
246 maxpos = page; 274 maxpos = page;
247 } else if ((count[0] < 0x40000000) && (maxcount > 0xc0000000)) { 275 } else if (count[0] < 0x40000000 && maxcount > 0xc0000000) {
248 maxcount = count[0]; 276 maxcount = count[0];
249 maxpos = page; 277 maxpos = page;
250 } else if ((count[0] > maxcount) && (count[0] < 0xc0000000)) { 278 } else if (count[0] > maxcount && count[0] < 0xc0000000) {
251 maxcount = count[0]; 279 maxcount = count[0];
252 maxpos = page; 280 maxpos = page;
253 } else if ((count[0] > maxcount) && (count[0] > 0xc0000000) 281 } else if (count[0] > maxcount && count[0] > 0xc0000000
254 && (maxcount > 0x80000000)) { 282 && maxcount > 0x80000000) {
255 maxcount = count[0]; 283 maxcount = count[0];
256 maxpos = page; 284 maxpos = page;
257 } 285 }
@@ -269,187 +297,170 @@ static void find_next_position(struct mtdoops_context *cxt)
269 mtdoops_inc_counter(cxt); 297 mtdoops_inc_counter(cxt);
270} 298}
271 299
272 300static void mtdoops_do_dump(struct kmsg_dumper *dumper,
273static void mtdoops_notify_add(struct mtd_info *mtd) 301 enum kmsg_dump_reason reason, const char *s1, unsigned long l1,
302 const char *s2, unsigned long l2)
274{ 303{
275 struct mtdoops_context *cxt = &oops_cxt; 304 struct mtdoops_context *cxt = container_of(dumper,
305 struct mtdoops_context, dump);
306 unsigned long s1_start, s2_start;
307 unsigned long l1_cpy, l2_cpy;
308 char *dst;
309
310 /* Only dump oopses if dump_oops is set */
311 if (reason == KMSG_DUMP_OOPS && !dump_oops)
312 return;
276 313
277 if (cxt->name && !strcmp(mtd->name, cxt->name)) 314 dst = cxt->oops_buf + MTDOOPS_HEADER_SIZE; /* Skip the header */
278 cxt->mtd_index = mtd->index; 315 l2_cpy = min(l2, record_size - MTDOOPS_HEADER_SIZE);
316 l1_cpy = min(l1, record_size - MTDOOPS_HEADER_SIZE - l2_cpy);
279 317
280 if ((mtd->index != cxt->mtd_index) || cxt->mtd_index < 0) 318 s2_start = l2 - l2_cpy;
281 return; 319 s1_start = l1 - l1_cpy;
282 320
283 if (mtd->size < (mtd->erasesize * 2)) { 321 memcpy(dst, s1 + s1_start, l1_cpy);
284 printk(KERN_ERR "MTD partition %d not big enough for mtdoops\n", 322 memcpy(dst + l1_cpy, s2 + s2_start, l2_cpy);
285 mtd->index);
286 return;
287 }
288 323
289 if (mtd->erasesize < OOPS_PAGE_SIZE) { 324 /* Panics must be written immediately */
290 printk(KERN_ERR "Eraseblock size of MTD partition %d too small\n", 325 if (reason == KMSG_DUMP_PANIC) {
291 mtd->index); 326 if (!cxt->mtd->panic_write)
327 printk(KERN_ERR "mtdoops: Cannot write from panic without panic_write\n");
328 else
329 mtdoops_write(cxt, 1);
292 return; 330 return;
293 } 331 }
294 332
295 cxt->mtd = mtd; 333 /* For other cases, schedule work to write it "nicely" */
296 if (mtd->size > INT_MAX) 334 schedule_work(&cxt->work_write);
297 cxt->oops_pages = INT_MAX / OOPS_PAGE_SIZE;
298 else
299 cxt->oops_pages = (int)mtd->size / OOPS_PAGE_SIZE;
300
301 find_next_position(cxt);
302
303 printk(KERN_INFO "mtdoops: Attached to MTD device %d\n", mtd->index);
304} 335}
305 336
306static void mtdoops_notify_remove(struct mtd_info *mtd) 337static void mtdoops_notify_add(struct mtd_info *mtd)
307{ 338{
308 struct mtdoops_context *cxt = &oops_cxt; 339 struct mtdoops_context *cxt = &oops_cxt;
340 u64 mtdoops_pages = div_u64(mtd->size, record_size);
341 int err;
309 342
310 if ((mtd->index != cxt->mtd_index) || cxt->mtd_index < 0) 343 if (!strcmp(mtd->name, mtddev))
311 return; 344 cxt->mtd_index = mtd->index;
312
313 cxt->mtd = NULL;
314 flush_scheduled_work();
315}
316
317static void mtdoops_console_sync(void)
318{
319 struct mtdoops_context *cxt = &oops_cxt;
320 struct mtd_info *mtd = cxt->mtd;
321 unsigned long flags;
322 345
323 if (!cxt->ready || !mtd || cxt->writecount == 0) 346 if (mtd->index != cxt->mtd_index || cxt->mtd_index < 0)
324 return; 347 return;
325 348
326 /* 349 if (mtd->size < mtd->erasesize * 2) {
327 * Once ready is 0 and we've held the lock no further writes to the 350 printk(KERN_ERR "mtdoops: MTD partition %d not big enough for mtdoops\n",
328 * buffer will happen 351 mtd->index);
329 */
330 spin_lock_irqsave(&cxt->writecount_lock, flags);
331 if (!cxt->ready) {
332 spin_unlock_irqrestore(&cxt->writecount_lock, flags);
333 return; 352 return;
334 } 353 }
335 cxt->ready = 0; 354 if (mtd->erasesize < record_size) {
336 spin_unlock_irqrestore(&cxt->writecount_lock, flags); 355 printk(KERN_ERR "mtdoops: eraseblock size of MTD partition %d too small\n",
337 356 mtd->index);
338 if (mtd->panic_write && in_interrupt())
339 /* Interrupt context, we're going to panic so try and log */
340 mtdoops_write(cxt, 1);
341 else
342 schedule_work(&cxt->work_write);
343}
344
345static void
346mtdoops_console_write(struct console *co, const char *s, unsigned int count)
347{
348 struct mtdoops_context *cxt = co->data;
349 struct mtd_info *mtd = cxt->mtd;
350 unsigned long flags;
351
352 if (!oops_in_progress) {
353 mtdoops_console_sync();
354 return; 357 return;
355 } 358 }
356 359 if (mtd->size > MTDOOPS_MAX_MTD_SIZE) {
357 if (!cxt->ready || !mtd) 360 printk(KERN_ERR "mtdoops: mtd%d is too large (limit is %d MiB)\n",
361 mtd->index, MTDOOPS_MAX_MTD_SIZE / 1024 / 1024);
358 return; 362 return;
363 }
359 364
360 /* Locking on writecount ensures sequential writes to the buffer */ 365 /* oops_page_used is a bit field */
361 spin_lock_irqsave(&cxt->writecount_lock, flags); 366 cxt->oops_page_used = vmalloc(DIV_ROUND_UP(mtdoops_pages,
362 367 BITS_PER_LONG));
363 /* Check ready status didn't change whilst waiting for the lock */ 368 if (!cxt->oops_page_used) {
364 if (!cxt->ready) { 369 printk(KERN_ERR "mtdoops: could not allocate page array\n");
365 spin_unlock_irqrestore(&cxt->writecount_lock, flags);
366 return; 370 return;
367 } 371 }
368 372
369 if (cxt->writecount == 0) { 373 cxt->dump.dump = mtdoops_do_dump;
370 u32 *stamp = cxt->oops_buf; 374 err = kmsg_dump_register(&cxt->dump);
371 *stamp++ = cxt->nextcount; 375 if (err) {
372 *stamp = MTDOOPS_KERNMSG_MAGIC; 376 printk(KERN_ERR "mtdoops: registering kmsg dumper failed, error %d\n", err);
373 cxt->writecount = 8; 377 vfree(cxt->oops_page_used);
378 cxt->oops_page_used = NULL;
379 return;
374 } 380 }
375 381
376 if ((count + cxt->writecount) > OOPS_PAGE_SIZE) 382 cxt->mtd = mtd;
377 count = OOPS_PAGE_SIZE - cxt->writecount; 383 cxt->oops_pages = (int)mtd->size / record_size;
378 384 find_next_position(cxt);
379 memcpy(cxt->oops_buf + cxt->writecount, s, count); 385 printk(KERN_INFO "mtdoops: Attached to MTD device %d\n", mtd->index);
380 cxt->writecount += count;
381
382 spin_unlock_irqrestore(&cxt->writecount_lock, flags);
383
384 if (cxt->writecount == OOPS_PAGE_SIZE)
385 mtdoops_console_sync();
386} 386}
387 387
388static int __init mtdoops_console_setup(struct console *co, char *options) 388static void mtdoops_notify_remove(struct mtd_info *mtd)
389{ 389{
390 struct mtdoops_context *cxt = co->data; 390 struct mtdoops_context *cxt = &oops_cxt;
391 391
392 if (cxt->mtd_index != -1 || cxt->name) 392 if (mtd->index != cxt->mtd_index || cxt->mtd_index < 0)
393 return -EBUSY; 393 return;
394 if (options) {
395 cxt->name = kstrdup(options, GFP_KERNEL);
396 return 0;
397 }
398 if (co->index == -1)
399 return -EINVAL;
400 394
401 cxt->mtd_index = co->index; 395 if (kmsg_dump_unregister(&cxt->dump) < 0)
402 return 0; 396 printk(KERN_WARNING "mtdoops: could not unregister kmsg_dumper\n");
397
398 cxt->mtd = NULL;
399 flush_scheduled_work();
403} 400}
404 401
402
405static struct mtd_notifier mtdoops_notifier = { 403static struct mtd_notifier mtdoops_notifier = {
406 .add = mtdoops_notify_add, 404 .add = mtdoops_notify_add,
407 .remove = mtdoops_notify_remove, 405 .remove = mtdoops_notify_remove,
408}; 406};
409 407
410static struct console mtdoops_console = { 408static int __init mtdoops_init(void)
411 .name = "ttyMTD",
412 .write = mtdoops_console_write,
413 .setup = mtdoops_console_setup,
414 .unblank = mtdoops_console_sync,
415 .index = -1,
416 .data = &oops_cxt,
417};
418
419static int __init mtdoops_console_init(void)
420{ 409{
421 struct mtdoops_context *cxt = &oops_cxt; 410 struct mtdoops_context *cxt = &oops_cxt;
411 int mtd_index;
412 char *endp;
422 413
414 if (strlen(mtddev) == 0) {
415 printk(KERN_ERR "mtdoops: mtd device (mtddev=name/number) must be supplied\n");
416 return -EINVAL;
417 }
418 if ((record_size & 4095) != 0) {
419 printk(KERN_ERR "mtdoops: record_size must be a multiple of 4096\n");
420 return -EINVAL;
421 }
422 if (record_size < 4096) {
423 printk(KERN_ERR "mtdoops: record_size must be over 4096 bytes\n");
424 return -EINVAL;
425 }
426
427 /* Setup the MTD device to use */
423 cxt->mtd_index = -1; 428 cxt->mtd_index = -1;
424 cxt->oops_buf = vmalloc(OOPS_PAGE_SIZE); 429 mtd_index = simple_strtoul(mtddev, &endp, 0);
425 spin_lock_init(&cxt->writecount_lock); 430 if (*endp == '\0')
431 cxt->mtd_index = mtd_index;
432 if (cxt->mtd_index > MAX_MTD_DEVICES) {
433 printk(KERN_ERR "mtdoops: invalid mtd device number (%u) given\n",
434 mtd_index);
435 return -EINVAL;
436 }
426 437
438 cxt->oops_buf = vmalloc(record_size);
427 if (!cxt->oops_buf) { 439 if (!cxt->oops_buf) {
428 printk(KERN_ERR "Failed to allocate mtdoops buffer workspace\n"); 440 printk(KERN_ERR "mtdoops: failed to allocate buffer workspace\n");
429 return -ENOMEM; 441 return -ENOMEM;
430 } 442 }
443 memset(cxt->oops_buf, 0xff, record_size);
431 444
432 INIT_WORK(&cxt->work_erase, mtdoops_workfunc_erase); 445 INIT_WORK(&cxt->work_erase, mtdoops_workfunc_erase);
433 INIT_WORK(&cxt->work_write, mtdoops_workfunc_write); 446 INIT_WORK(&cxt->work_write, mtdoops_workfunc_write);
434 447
435 register_console(&mtdoops_console);
436 register_mtd_user(&mtdoops_notifier); 448 register_mtd_user(&mtdoops_notifier);
437 return 0; 449 return 0;
438} 450}
439 451
440static void __exit mtdoops_console_exit(void) 452static void __exit mtdoops_exit(void)
441{ 453{
442 struct mtdoops_context *cxt = &oops_cxt; 454 struct mtdoops_context *cxt = &oops_cxt;
443 455
444 unregister_mtd_user(&mtdoops_notifier); 456 unregister_mtd_user(&mtdoops_notifier);
445 unregister_console(&mtdoops_console);
446 kfree(cxt->name);
447 vfree(cxt->oops_buf); 457 vfree(cxt->oops_buf);
458 vfree(cxt->oops_page_used);
448} 459}
449 460
450 461
451subsys_initcall(mtdoops_console_init); 462module_init(mtdoops_init);
452module_exit(mtdoops_console_exit); 463module_exit(mtdoops_exit);
453 464
454MODULE_LICENSE("GPL"); 465MODULE_LICENSE("GPL");
455MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>"); 466MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
diff --git a/drivers/mtd/nand/alauda.c b/drivers/mtd/nand/alauda.c
index 6d9649159a18..2d6773281fd9 100644
--- a/drivers/mtd/nand/alauda.c
+++ b/drivers/mtd/nand/alauda.c
@@ -372,15 +372,6 @@ static int alauda_read_oob(struct mtd_info *mtd, loff_t from, void *oob)
372 return __alauda_read_page(mtd, from, ignore_buf, oob); 372 return __alauda_read_page(mtd, from, ignore_buf, oob);
373} 373}
374 374
375static int popcount8(u8 c)
376{
377 int ret = 0;
378
379 for ( ; c; c>>=1)
380 ret += c & 1;
381 return ret;
382}
383
384static int alauda_isbad(struct mtd_info *mtd, loff_t ofs) 375static int alauda_isbad(struct mtd_info *mtd, loff_t ofs)
385{ 376{
386 u8 oob[16]; 377 u8 oob[16];
@@ -391,7 +382,7 @@ static int alauda_isbad(struct mtd_info *mtd, loff_t ofs)
391 return err; 382 return err;
392 383
393 /* A block is marked bad if two or more bits are zero */ 384 /* A block is marked bad if two or more bits are zero */
394 return popcount8(oob[5]) >= 7 ? 0 : 1; 385 return hweight8(oob[5]) >= 7 ? 0 : 1;
395} 386}
396 387
397static int alauda_bounce_read(struct mtd_info *mtd, loff_t from, size_t len, 388static int alauda_bounce_read(struct mtd_info *mtd, loff_t from, size_t len,
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 4f62d207b87b..524e6c9e0672 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -463,7 +463,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
463 if (host->board->det_pin) { 463 if (host->board->det_pin) {
464 if (gpio_get_value(host->board->det_pin)) { 464 if (gpio_get_value(host->board->det_pin)) {
465 printk(KERN_INFO "No SmartMedia card inserted.\n"); 465 printk(KERN_INFO "No SmartMedia card inserted.\n");
466 res = ENXIO; 466 res = -ENXIO;
467 goto err_no_card; 467 goto err_no_card;
468 } 468 }
469 } 469 }
@@ -534,7 +534,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
534 534
535 if ((!partitions) || (num_partitions == 0)) { 535 if ((!partitions) || (num_partitions == 0)) {
536 printk(KERN_ERR "atmel_nand: No partitions defined, or unsupported device.\n"); 536 printk(KERN_ERR "atmel_nand: No partitions defined, or unsupported device.\n");
537 res = ENXIO; 537 res = -ENXIO;
538 goto err_no_partitions; 538 goto err_no_partitions;
539 } 539 }
540 540
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 68cc9247fdb0..fe3eba87de40 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -591,6 +591,8 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
591 591
592 /* options such as NAND_USE_FLASH_BBT or 16-bit widths */ 592 /* options such as NAND_USE_FLASH_BBT or 16-bit widths */
593 info->chip.options = pdata->options; 593 info->chip.options = pdata->options;
594 info->chip.bbt_td = pdata->bbt_td;
595 info->chip.bbt_md = pdata->bbt_md;
594 596
595 info->ioaddr = (uint32_t __force) vaddr; 597 info->ioaddr = (uint32_t __force) vaddr;
596 598
diff --git a/drivers/mtd/nand/excite_nandflash.c b/drivers/mtd/nand/excite_nandflash.c
index 72446fb48d4b..af6a6a5399e1 100644
--- a/drivers/mtd/nand/excite_nandflash.c
+++ b/drivers/mtd/nand/excite_nandflash.c
@@ -128,7 +128,7 @@ static int excite_nand_devready(struct mtd_info *mtd)
128 * The binding to the mtd and all allocated 128 * The binding to the mtd and all allocated
129 * resources are released. 129 * resources are released.
130 */ 130 */
131static int __exit excite_nand_remove(struct platform_device *dev) 131static int __devexit excite_nand_remove(struct platform_device *dev)
132{ 132{
133 struct excite_nand_drvdata * const this = platform_get_drvdata(dev); 133 struct excite_nand_drvdata * const this = platform_get_drvdata(dev);
134 134
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index ddd37d2554ed..ae30fb6eed97 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -237,12 +237,15 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
237 237
238 ctrl->use_mdr = 0; 238 ctrl->use_mdr = 0;
239 239
240 dev_vdbg(ctrl->dev, 240 if (ctrl->status != LTESR_CC) {
241 "fsl_elbc_run_command: stat=%08x mdr=%08x fmr=%08x\n", 241 dev_info(ctrl->dev,
242 ctrl->status, ctrl->mdr, in_be32(&lbc->fmr)); 242 "command failed: fir %x fcr %x status %x mdr %x\n",
243 in_be32(&lbc->fir), in_be32(&lbc->fcr),
244 ctrl->status, ctrl->mdr);
245 return -EIO;
246 }
243 247
244 /* returns 0 on success otherwise non-zero) */ 248 return 0;
245 return ctrl->status == LTESR_CC ? 0 : -EIO;
246} 249}
247 250
248static void fsl_elbc_do_read(struct nand_chip *chip, int oob) 251static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
@@ -253,17 +256,17 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
253 256
254 if (priv->page_size) { 257 if (priv->page_size) {
255 out_be32(&lbc->fir, 258 out_be32(&lbc->fir,
256 (FIR_OP_CW0 << FIR_OP0_SHIFT) | 259 (FIR_OP_CM0 << FIR_OP0_SHIFT) |
257 (FIR_OP_CA << FIR_OP1_SHIFT) | 260 (FIR_OP_CA << FIR_OP1_SHIFT) |
258 (FIR_OP_PA << FIR_OP2_SHIFT) | 261 (FIR_OP_PA << FIR_OP2_SHIFT) |
259 (FIR_OP_CW1 << FIR_OP3_SHIFT) | 262 (FIR_OP_CM1 << FIR_OP3_SHIFT) |
260 (FIR_OP_RBW << FIR_OP4_SHIFT)); 263 (FIR_OP_RBW << FIR_OP4_SHIFT));
261 264
262 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | 265 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
263 (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); 266 (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
264 } else { 267 } else {
265 out_be32(&lbc->fir, 268 out_be32(&lbc->fir,
266 (FIR_OP_CW0 << FIR_OP0_SHIFT) | 269 (FIR_OP_CM0 << FIR_OP0_SHIFT) |
267 (FIR_OP_CA << FIR_OP1_SHIFT) | 270 (FIR_OP_CA << FIR_OP1_SHIFT) |
268 (FIR_OP_PA << FIR_OP2_SHIFT) | 271 (FIR_OP_PA << FIR_OP2_SHIFT) |
269 (FIR_OP_RBW << FIR_OP3_SHIFT)); 272 (FIR_OP_RBW << FIR_OP3_SHIFT));
@@ -332,7 +335,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
332 case NAND_CMD_READID: 335 case NAND_CMD_READID:
333 dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_READID.\n"); 336 dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_READID.\n");
334 337
335 out_be32(&lbc->fir, (FIR_OP_CW0 << FIR_OP0_SHIFT) | 338 out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
336 (FIR_OP_UA << FIR_OP1_SHIFT) | 339 (FIR_OP_UA << FIR_OP1_SHIFT) |
337 (FIR_OP_RBW << FIR_OP2_SHIFT)); 340 (FIR_OP_RBW << FIR_OP2_SHIFT));
338 out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT); 341 out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT);
@@ -359,16 +362,20 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
359 dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n"); 362 dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n");
360 363
361 out_be32(&lbc->fir, 364 out_be32(&lbc->fir,
362 (FIR_OP_CW0 << FIR_OP0_SHIFT) | 365 (FIR_OP_CM0 << FIR_OP0_SHIFT) |
363 (FIR_OP_PA << FIR_OP1_SHIFT) | 366 (FIR_OP_PA << FIR_OP1_SHIFT) |
364 (FIR_OP_CM1 << FIR_OP2_SHIFT)); 367 (FIR_OP_CM2 << FIR_OP2_SHIFT) |
368 (FIR_OP_CW1 << FIR_OP3_SHIFT) |
369 (FIR_OP_RS << FIR_OP4_SHIFT));
365 370
366 out_be32(&lbc->fcr, 371 out_be32(&lbc->fcr,
367 (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) | 372 (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) |
368 (NAND_CMD_ERASE2 << FCR_CMD1_SHIFT)); 373 (NAND_CMD_STATUS << FCR_CMD1_SHIFT) |
374 (NAND_CMD_ERASE2 << FCR_CMD2_SHIFT));
369 375
370 out_be32(&lbc->fbcr, 0); 376 out_be32(&lbc->fbcr, 0);
371 ctrl->read_bytes = 0; 377 ctrl->read_bytes = 0;
378 ctrl->use_mdr = 1;
372 379
373 fsl_elbc_run_command(mtd); 380 fsl_elbc_run_command(mtd);
374 return; 381 return;
@@ -383,40 +390,41 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
383 390
384 ctrl->column = column; 391 ctrl->column = column;
385 ctrl->oob = 0; 392 ctrl->oob = 0;
393 ctrl->use_mdr = 1;
386 394
387 if (priv->page_size) { 395 fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) |
388 fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) | 396 (NAND_CMD_SEQIN << FCR_CMD2_SHIFT) |
389 (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT); 397 (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT);
390 398
399 if (priv->page_size) {
391 out_be32(&lbc->fir, 400 out_be32(&lbc->fir,
392 (FIR_OP_CW0 << FIR_OP0_SHIFT) | 401 (FIR_OP_CM2 << FIR_OP0_SHIFT) |
393 (FIR_OP_CA << FIR_OP1_SHIFT) | 402 (FIR_OP_CA << FIR_OP1_SHIFT) |
394 (FIR_OP_PA << FIR_OP2_SHIFT) | 403 (FIR_OP_PA << FIR_OP2_SHIFT) |
395 (FIR_OP_WB << FIR_OP3_SHIFT) | 404 (FIR_OP_WB << FIR_OP3_SHIFT) |
396 (FIR_OP_CW1 << FIR_OP4_SHIFT)); 405 (FIR_OP_CM3 << FIR_OP4_SHIFT) |
406 (FIR_OP_CW1 << FIR_OP5_SHIFT) |
407 (FIR_OP_RS << FIR_OP6_SHIFT));
397 } else { 408 } else {
398 fcr = (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT) |
399 (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
400
401 out_be32(&lbc->fir, 409 out_be32(&lbc->fir,
402 (FIR_OP_CW0 << FIR_OP0_SHIFT) | 410 (FIR_OP_CM0 << FIR_OP0_SHIFT) |
403 (FIR_OP_CM2 << FIR_OP1_SHIFT) | 411 (FIR_OP_CM2 << FIR_OP1_SHIFT) |
404 (FIR_OP_CA << FIR_OP2_SHIFT) | 412 (FIR_OP_CA << FIR_OP2_SHIFT) |
405 (FIR_OP_PA << FIR_OP3_SHIFT) | 413 (FIR_OP_PA << FIR_OP3_SHIFT) |
406 (FIR_OP_WB << FIR_OP4_SHIFT) | 414 (FIR_OP_WB << FIR_OP4_SHIFT) |
407 (FIR_OP_CW1 << FIR_OP5_SHIFT)); 415 (FIR_OP_CM3 << FIR_OP5_SHIFT) |
416 (FIR_OP_CW1 << FIR_OP6_SHIFT) |
417 (FIR_OP_RS << FIR_OP7_SHIFT));
408 418
409 if (column >= mtd->writesize) { 419 if (column >= mtd->writesize) {
410 /* OOB area --> READOOB */ 420 /* OOB area --> READOOB */
411 column -= mtd->writesize; 421 column -= mtd->writesize;
412 fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; 422 fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;
413 ctrl->oob = 1; 423 ctrl->oob = 1;
414 } else if (column < 256) { 424 } else {
425 WARN_ON(column != 0);
415 /* First 256 bytes --> READ0 */ 426 /* First 256 bytes --> READ0 */
416 fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT; 427 fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
417 } else {
418 /* Second 256 bytes --> READ1 */
419 fcr |= NAND_CMD_READ1 << FCR_CMD0_SHIFT;
420 } 428 }
421 } 429 }
422 430
@@ -628,22 +636,6 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
628{ 636{
629 struct fsl_elbc_mtd *priv = chip->priv; 637 struct fsl_elbc_mtd *priv = chip->priv;
630 struct fsl_elbc_ctrl *ctrl = priv->ctrl; 638 struct fsl_elbc_ctrl *ctrl = priv->ctrl;
631 struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
632
633 if (ctrl->status != LTESR_CC)
634 return NAND_STATUS_FAIL;
635
636 /* Use READ_STATUS command, but wait for the device to be ready */
637 ctrl->use_mdr = 0;
638 out_be32(&lbc->fir,
639 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
640 (FIR_OP_RBW << FIR_OP1_SHIFT));
641 out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
642 out_be32(&lbc->fbcr, 1);
643 set_addr(mtd, 0, 0, 0);
644 ctrl->read_bytes = 1;
645
646 fsl_elbc_run_command(mtd);
647 639
648 if (ctrl->status != LTESR_CC) 640 if (ctrl->status != LTESR_CC)
649 return NAND_STATUS_FAIL; 641 return NAND_STATUS_FAIL;
@@ -651,8 +643,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
651 /* The chip always seems to report that it is 643 /* The chip always seems to report that it is
652 * write-protected, even when it is not. 644 * write-protected, even when it is not.
653 */ 645 */
654 setbits8(ctrl->addr, NAND_STATUS_WP); 646 return (ctrl->mdr & 0xff) | NAND_STATUS_WP;
655 return fsl_elbc_read_byte(mtd);
656} 647}
657 648
658static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) 649static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
@@ -946,6 +937,13 @@ static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl)
946{ 937{
947 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; 938 struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
948 939
940 /*
941 * NAND transactions can tie up the bus for a long time, so set the
942 * bus timeout to max by clearing LBCR[BMT] (highest base counter
943 * value) and setting LBCR[BMTPS] to the highest prescaler value.
944 */
945 clrsetbits_be32(&lbc->lbcr, LBCR_BMT, 15);
946
949 /* clear event registers */ 947 /* clear event registers */
950 setbits32(&lbc->ltesr, LTESR_NAND_MASK); 948 setbits32(&lbc->ltesr, LTESR_NAND_MASK);
951 out_be32(&lbc->lteatr, 0); 949 out_be32(&lbc->lteatr, 0);
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index d120cd8d7267..071a60cb4204 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -112,7 +112,7 @@ static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
112 112
113 if (mchip_nr == -1) { 113 if (mchip_nr == -1) {
114 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); 114 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
115 } else if (mchip_nr >= 0) { 115 } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
116 fun->mchip_number = mchip_nr; 116 fun->mchip_number = mchip_nr;
117 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr]; 117 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
118 chip->IO_ADDR_W = chip->IO_ADDR_R; 118 chip->IO_ADDR_W = chip->IO_ADDR_R;
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 53e94121c26f..f7366e99fe1e 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -922,7 +922,7 @@ static struct platform_driver mxcnd_driver = {
922 .driver = { 922 .driver = {
923 .name = DRIVER_NAME, 923 .name = DRIVER_NAME,
924 }, 924 },
925 .remove = __exit_p(mxcnd_remove), 925 .remove = __devexit_p(mxcnd_remove),
926 .suspend = mxcnd_suspend, 926 .suspend = mxcnd_suspend,
927 .resume = mxcnd_resume, 927 .resume = mxcnd_resume,
928}; 928};
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2957cc70da3d..8f2958fe2148 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -428,6 +428,28 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
428 return nand_isbad_bbt(mtd, ofs, allowbbt); 428 return nand_isbad_bbt(mtd, ofs, allowbbt);
429} 429}
430 430
431/**
432 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
433 * @mtd: MTD device structure
434 * @timeo: Timeout
435 *
436 * Helper function for nand_wait_ready used when needing to wait in interrupt
437 * context.
438 */
439static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
440{
441 struct nand_chip *chip = mtd->priv;
442 int i;
443
444 /* Wait for the device to get ready */
445 for (i = 0; i < timeo; i++) {
446 if (chip->dev_ready(mtd))
447 break;
448 touch_softlockup_watchdog();
449 mdelay(1);
450 }
451}
452
431/* 453/*
432 * Wait for the ready pin, after a command 454 * Wait for the ready pin, after a command
433 * The timeout is catched later. 455 * The timeout is catched later.
@@ -437,6 +459,10 @@ void nand_wait_ready(struct mtd_info *mtd)
437 struct nand_chip *chip = mtd->priv; 459 struct nand_chip *chip = mtd->priv;
438 unsigned long timeo = jiffies + 2; 460 unsigned long timeo = jiffies + 2;
439 461
462 /* 400ms timeout */
463 if (in_interrupt() || oops_in_progress)
464 return panic_nand_wait_ready(mtd, 400);
465
440 led_trigger_event(nand_led_trigger, LED_FULL); 466 led_trigger_event(nand_led_trigger, LED_FULL);
441 /* wait until command is processed or timeout occures */ 467 /* wait until command is processed or timeout occures */
442 do { 468 do {
@@ -672,6 +698,22 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
672} 698}
673 699
674/** 700/**
701 * panic_nand_get_device - [GENERIC] Get chip for selected access
702 * @chip: the nand chip descriptor
703 * @mtd: MTD device structure
704 * @new_state: the state which is requested
705 *
706 * Used when in panic, no locks are taken.
707 */
708static void panic_nand_get_device(struct nand_chip *chip,
709 struct mtd_info *mtd, int new_state)
710{
711 /* Hardware controller shared among independend devices */
712 chip->controller->active = chip;
713 chip->state = new_state;
714}
715
716/**
675 * nand_get_device - [GENERIC] Get chip for selected access 717 * nand_get_device - [GENERIC] Get chip for selected access
676 * @chip: the nand chip descriptor 718 * @chip: the nand chip descriptor
677 * @mtd: MTD device structure 719 * @mtd: MTD device structure
@@ -698,8 +740,14 @@ nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
698 return 0; 740 return 0;
699 } 741 }
700 if (new_state == FL_PM_SUSPENDED) { 742 if (new_state == FL_PM_SUSPENDED) {
701 spin_unlock(lock); 743 if (chip->controller->active->state == FL_PM_SUSPENDED) {
702 return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 744 chip->state = FL_PM_SUSPENDED;
745 spin_unlock(lock);
746 return 0;
747 } else {
748 spin_unlock(lock);
749 return -EAGAIN;
750 }
703 } 751 }
704 set_current_state(TASK_UNINTERRUPTIBLE); 752 set_current_state(TASK_UNINTERRUPTIBLE);
705 add_wait_queue(wq, &wait); 753 add_wait_queue(wq, &wait);
@@ -710,6 +758,32 @@ nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
710} 758}
711 759
712/** 760/**
761 * panic_nand_wait - [GENERIC] wait until the command is done
762 * @mtd: MTD device structure
763 * @chip: NAND chip structure
764 * @timeo: Timeout
765 *
766 * Wait for command done. This is a helper function for nand_wait used when
767 * we are in interrupt context. May happen when in panic and trying to write
768 * an oops trough mtdoops.
769 */
770static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
771 unsigned long timeo)
772{
773 int i;
774 for (i = 0; i < timeo; i++) {
775 if (chip->dev_ready) {
776 if (chip->dev_ready(mtd))
777 break;
778 } else {
779 if (chip->read_byte(mtd) & NAND_STATUS_READY)
780 break;
781 }
782 mdelay(1);
783 }
784}
785
786/**
713 * nand_wait - [DEFAULT] wait until the command is done 787 * nand_wait - [DEFAULT] wait until the command is done
714 * @mtd: MTD device structure 788 * @mtd: MTD device structure
715 * @chip: NAND chip structure 789 * @chip: NAND chip structure
@@ -740,15 +814,19 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
740 else 814 else
741 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); 815 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
742 816
743 while (time_before(jiffies, timeo)) { 817 if (in_interrupt() || oops_in_progress)
744 if (chip->dev_ready) { 818 panic_nand_wait(mtd, chip, timeo);
745 if (chip->dev_ready(mtd)) 819 else {
746 break; 820 while (time_before(jiffies, timeo)) {
747 } else { 821 if (chip->dev_ready) {
748 if (chip->read_byte(mtd) & NAND_STATUS_READY) 822 if (chip->dev_ready(mtd))
749 break; 823 break;
824 } else {
825 if (chip->read_byte(mtd) & NAND_STATUS_READY)
826 break;
827 }
828 cond_resched();
750 } 829 }
751 cond_resched();
752 } 830 }
753 led_trigger_event(nand_led_trigger, LED_OFF); 831 led_trigger_event(nand_led_trigger, LED_OFF);
754 832
@@ -1949,6 +2027,45 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
1949} 2027}
1950 2028
1951/** 2029/**
2030 * panic_nand_write - [MTD Interface] NAND write with ECC
2031 * @mtd: MTD device structure
2032 * @to: offset to write to
2033 * @len: number of bytes to write
2034 * @retlen: pointer to variable to store the number of written bytes
2035 * @buf: the data to write
2036 *
2037 * NAND write with ECC. Used when performing writes in interrupt context, this
2038 * may for example be called by mtdoops when writing an oops while in panic.
2039 */
2040static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2041 size_t *retlen, const uint8_t *buf)
2042{
2043 struct nand_chip *chip = mtd->priv;
2044 int ret;
2045
2046 /* Do not allow reads past end of device */
2047 if ((to + len) > mtd->size)
2048 return -EINVAL;
2049 if (!len)
2050 return 0;
2051
2052 /* Wait for the device to get ready. */
2053 panic_nand_wait(mtd, chip, 400);
2054
2055 /* Grab the device. */
2056 panic_nand_get_device(chip, mtd, FL_WRITING);
2057
2058 chip->ops.len = len;
2059 chip->ops.datbuf = (uint8_t *)buf;
2060 chip->ops.oobbuf = NULL;
2061
2062 ret = nand_do_write_ops(mtd, to, &chip->ops);
2063
2064 *retlen = chip->ops.retlen;
2065 return ret;
2066}
2067
2068/**
1952 * nand_write - [MTD Interface] NAND write with ECC 2069 * nand_write - [MTD Interface] NAND write with ECC
1953 * @mtd: MTD device structure 2070 * @mtd: MTD device structure
1954 * @to: offset to write to 2071 * @to: offset to write to
@@ -2645,7 +2762,8 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
2645 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); 2762 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id);
2646 2763
2647 if (IS_ERR(type)) { 2764 if (IS_ERR(type)) {
2648 printk(KERN_WARNING "No NAND device found!!!\n"); 2765 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
2766 printk(KERN_WARNING "No NAND device found.\n");
2649 chip->select_chip(mtd, -1); 2767 chip->select_chip(mtd, -1);
2650 return PTR_ERR(type); 2768 return PTR_ERR(type);
2651 } 2769 }
@@ -2877,6 +2995,7 @@ int nand_scan_tail(struct mtd_info *mtd)
2877 mtd->unpoint = NULL; 2995 mtd->unpoint = NULL;
2878 mtd->read = nand_read; 2996 mtd->read = nand_read;
2879 mtd->write = nand_write; 2997 mtd->write = nand_write;
2998 mtd->panic_write = panic_nand_write;
2880 mtd->read_oob = nand_read_oob; 2999 mtd->read_oob = nand_read_oob;
2881 mtd->write_oob = nand_write_oob; 3000 mtd->write_oob = nand_write_oob;
2882 mtd->sync = nand_sync; 3001 mtd->sync = nand_sync;
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index db7ae9d6a296..809fb53304ae 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -150,20 +150,19 @@ static const char addressbits[256] = {
150}; 150};
151 151
152/** 152/**
153 * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte 153 * __nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
154 * block 154 * block
155 * @mtd: MTD block structure
156 * @buf: input buffer with raw data 155 * @buf: input buffer with raw data
156 * @eccsize: data bytes per ecc step (256 or 512)
157 * @code: output buffer with ECC 157 * @code: output buffer with ECC
158 */ 158 */
159int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf, 159void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
160 unsigned char *code) 160 unsigned char *code)
161{ 161{
162 int i; 162 int i;
163 const uint32_t *bp = (uint32_t *)buf; 163 const uint32_t *bp = (uint32_t *)buf;
164 /* 256 or 512 bytes/ecc */ 164 /* 256 or 512 bytes/ecc */
165 const uint32_t eccsize_mult = 165 const uint32_t eccsize_mult = eccsize >> 8;
166 (((struct nand_chip *)mtd->priv)->ecc.size) >> 8;
167 uint32_t cur; /* current value in buffer */ 166 uint32_t cur; /* current value in buffer */
168 /* rp0..rp15..rp17 are the various accumulated parities (per byte) */ 167 /* rp0..rp15..rp17 are the various accumulated parities (per byte) */
169 uint32_t rp0, rp1, rp2, rp3, rp4, rp5, rp6, rp7; 168 uint32_t rp0, rp1, rp2, rp3, rp4, rp5, rp6, rp7;
@@ -412,6 +411,22 @@ int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,
412 (invparity[par & 0x55] << 2) | 411 (invparity[par & 0x55] << 2) |
413 (invparity[rp17] << 1) | 412 (invparity[rp17] << 1) |
414 (invparity[rp16] << 0); 413 (invparity[rp16] << 0);
414}
415EXPORT_SYMBOL(__nand_calculate_ecc);
416
417/**
418 * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
419 * block
420 * @mtd: MTD block structure
421 * @buf: input buffer with raw data
422 * @code: output buffer with ECC
423 */
424int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,
425 unsigned char *code)
426{
427 __nand_calculate_ecc(buf,
428 ((struct nand_chip *)mtd->priv)->ecc.size, code);
429
415 return 0; 430 return 0;
416} 431}
417EXPORT_SYMBOL(nand_calculate_ecc); 432EXPORT_SYMBOL(nand_calculate_ecc);
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 6ea520ae2410..75aa8713abd1 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -489,7 +489,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
489 switch (info->state) { 489 switch (info->state) {
490 case STATE_PIO_WRITING: 490 case STATE_PIO_WRITING:
491 __raw_writesl(info->mmio_base + NDDB, info->data_buff, 491 __raw_writesl(info->mmio_base + NDDB, info->data_buff,
492 info->data_size << 2); 492 info->data_size >> 2);
493 493
494 enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD); 494 enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
495 495
@@ -501,7 +501,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info)
501 break; 501 break;
502 case STATE_PIO_READING: 502 case STATE_PIO_READING:
503 __raw_readsl(info->mmio_base + NDDB, info->data_buff, 503 __raw_readsl(info->mmio_base + NDDB, info->data_buff,
504 info->data_size << 2); 504 info->data_size >> 2);
505 break; 505 break;
506 default: 506 default:
507 printk(KERN_ERR "%s: invalid state %d\n", __func__, 507 printk(KERN_ERR "%s: invalid state %d\n", __func__,
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 11dc7e69c4fb..6e88bd3c02f5 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -774,7 +774,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
774 chip->select_chip = s3c2410_nand_select_chip; 774 chip->select_chip = s3c2410_nand_select_chip;
775 chip->chip_delay = 50; 775 chip->chip_delay = 50;
776 chip->priv = nmtd; 776 chip->priv = nmtd;
777 chip->options = 0; 777 chip->options = set->options;
778 chip->controller = &info->controller; 778 chip->controller = &info->controller;
779 779
780 switch (info->cpu_type) { 780 switch (info->cpu_type) {
diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c
index 73af8324d0d0..863513c3b69a 100644
--- a/drivers/mtd/nand/txx9ndfmc.c
+++ b/drivers/mtd/nand/txx9ndfmc.c
@@ -429,11 +429,10 @@ static int __exit txx9ndfmc_remove(struct platform_device *dev)
429 chip = mtd->priv; 429 chip = mtd->priv;
430 txx9_priv = chip->priv; 430 txx9_priv = chip->priv;
431 431
432 nand_release(mtd);
432#ifdef CONFIG_MTD_PARTITIONS 433#ifdef CONFIG_MTD_PARTITIONS
433 del_mtd_partitions(mtd);
434 kfree(drvdata->parts[i]); 434 kfree(drvdata->parts[i]);
435#endif 435#endif
436 del_mtd_device(mtd);
437 kfree(txx9_priv->mtdname); 436 kfree(txx9_priv->mtdname);
438 kfree(txx9_priv); 437 kfree(txx9_priv);
439 } 438 }
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 0108ed42e877..2dafd0949be5 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -112,10 +112,24 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
112 unsigned long timeout; 112 unsigned long timeout;
113 u32 syscfg; 113 u32 syscfg;
114 114
115 if (state == FL_RESETING) { 115 if (state == FL_RESETING || state == FL_PREPARING_ERASE ||
116 int i; 116 state == FL_VERIFYING_ERASE) {
117 int i = 21;
118 unsigned int intr_flags = ONENAND_INT_MASTER;
119
120 switch (state) {
121 case FL_RESETING:
122 intr_flags |= ONENAND_INT_RESET;
123 break;
124 case FL_PREPARING_ERASE:
125 intr_flags |= ONENAND_INT_ERASE;
126 break;
127 case FL_VERIFYING_ERASE:
128 i = 101;
129 break;
130 }
117 131
118 for (i = 0; i < 20; i++) { 132 while (--i) {
119 udelay(1); 133 udelay(1);
120 intr = read_reg(c, ONENAND_REG_INTERRUPT); 134 intr = read_reg(c, ONENAND_REG_INTERRUPT);
121 if (intr & ONENAND_INT_MASTER) 135 if (intr & ONENAND_INT_MASTER)
@@ -126,7 +140,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
126 wait_err("controller error", state, ctrl, intr); 140 wait_err("controller error", state, ctrl, intr);
127 return -EIO; 141 return -EIO;
128 } 142 }
129 if (!(intr & ONENAND_INT_RESET)) { 143 if ((intr & intr_flags) != intr_flags) {
130 wait_err("timeout", state, ctrl, intr); 144 wait_err("timeout", state, ctrl, intr);
131 return -EIO; 145 return -EIO;
132 } 146 }
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 6e250f3a4a16..3330ea06917c 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -1,17 +1,19 @@
1/* 1/*
2 * linux/drivers/mtd/onenand/onenand_base.c 2 * linux/drivers/mtd/onenand/onenand_base.c
3 * 3 *
4 * Copyright (C) 2005-2007 Samsung Electronics 4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
5 * Kyungmin Park <kyungmin.park@samsung.com> 7 * Kyungmin Park <kyungmin.park@samsung.com>
6 * 8 *
7 * Credits: 9 * Credits:
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes 11 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
11 * 12 *
12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
13 * Flex-OneNAND support 14 * Flex-OneNAND support
14 * Copyright (C) Samsung Electronics, 2008 15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
15 * 17 *
16 * This program is free software; you can redistribute it and/or modify 18 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as 19 * it under the terms of the GNU General Public License version 2 as
@@ -32,6 +34,13 @@
32 34
33#include <asm/io.h> 35#include <asm/io.h>
34 36
37/*
38 * Multiblock erase if number of blocks to erase is 2 or more.
39 * Maximum number of blocks for simultaneous erase is 64.
40 */
41#define MB_ERASE_MIN_BLK_COUNT 2
42#define MB_ERASE_MAX_BLK_COUNT 64
43
35/* Default Flex-OneNAND boundary and lock respectively */ 44/* Default Flex-OneNAND boundary and lock respectively */
36static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 45static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
37 46
@@ -43,6 +52,18 @@ MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
43 " : 0->Set boundary in unlocked status" 52 " : 0->Set boundary in unlocked status"
44 " : 1->Set boundary in locked status"); 53 " : 1->Set boundary in locked status");
45 54
55/* Default OneNAND/Flex-OneNAND OTP options*/
56static int otp;
57
58module_param(otp, int, 0400);
59MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
60 "Syntax : otp=LOCK_TYPE"
61 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
62 " : 0 -> Default (No Blocks Locked)"
63 " : 1 -> OTP Block lock"
64 " : 2 -> 1st Block lock"
65 " : 3 -> BOTH OTP Block and 1st Block lock");
66
46/** 67/**
47 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 68 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
48 * For now, we expose only 64 out of 80 ecc bytes 69 * For now, we expose only 64 out of 80 ecc bytes
@@ -339,6 +360,8 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le
339 break; 360 break;
340 361
341 case ONENAND_CMD_ERASE: 362 case ONENAND_CMD_ERASE:
363 case ONENAND_CMD_MULTIBLOCK_ERASE:
364 case ONENAND_CMD_ERASE_VERIFY:
342 case ONENAND_CMD_BUFFERRAM: 365 case ONENAND_CMD_BUFFERRAM:
343 case ONENAND_CMD_OTP_ACCESS: 366 case ONENAND_CMD_OTP_ACCESS:
344 block = onenand_block(this, addr); 367 block = onenand_block(this, addr);
@@ -483,7 +506,7 @@ static int onenand_wait(struct mtd_info *mtd, int state)
483 if (interrupt & flags) 506 if (interrupt & flags)
484 break; 507 break;
485 508
486 if (state != FL_READING) 509 if (state != FL_READING && state != FL_PREPARING_ERASE)
487 cond_resched(); 510 cond_resched();
488 } 511 }
489 /* To get correct interrupt status in timeout case */ 512 /* To get correct interrupt status in timeout case */
@@ -516,6 +539,18 @@ static int onenand_wait(struct mtd_info *mtd, int state)
516 return -EIO; 539 return -EIO;
517 } 540 }
518 541
542 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
543 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
544 __func__, ctrl, interrupt);
545 return -EIO;
546 }
547
548 if (!(interrupt & ONENAND_INT_MASTER)) {
549 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
550 __func__, ctrl, interrupt);
551 return -EIO;
552 }
553
519 /* If there's controller error, it's a real error */ 554 /* If there's controller error, it's a real error */
520 if (ctrl & ONENAND_CTRL_ERROR) { 555 if (ctrl & ONENAND_CTRL_ERROR) {
521 printk(KERN_ERR "%s: controller error = 0x%04x\n", 556 printk(KERN_ERR "%s: controller error = 0x%04x\n",
@@ -2168,70 +2203,176 @@ static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allo
2168 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2203 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2169} 2204}
2170 2205
2206
2207static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2208 struct erase_info *instr)
2209{
2210 struct onenand_chip *this = mtd->priv;
2211 loff_t addr = instr->addr;
2212 int len = instr->len;
2213 unsigned int block_size = (1 << this->erase_shift);
2214 int ret = 0;
2215
2216 while (len) {
2217 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2218 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2219 if (ret) {
2220 printk(KERN_ERR "%s: Failed verify, block %d\n",
2221 __func__, onenand_block(this, addr));
2222 instr->state = MTD_ERASE_FAILED;
2223 instr->fail_addr = addr;
2224 return -1;
2225 }
2226 len -= block_size;
2227 addr += block_size;
2228 }
2229 return 0;
2230}
2231
2171/** 2232/**
2172 * onenand_erase - [MTD Interface] erase block(s) 2233 * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
2173 * @param mtd MTD device structure 2234 * @param mtd MTD device structure
2174 * @param instr erase instruction 2235 * @param instr erase instruction
2236 * @param region erase region
2175 * 2237 *
2176 * Erase one ore more blocks 2238 * Erase one or more blocks up to 64 block at a time
2177 */ 2239 */
2178static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2240static int onenand_multiblock_erase(struct mtd_info *mtd,
2241 struct erase_info *instr,
2242 unsigned int block_size)
2179{ 2243{
2180 struct onenand_chip *this = mtd->priv; 2244 struct onenand_chip *this = mtd->priv;
2181 unsigned int block_size;
2182 loff_t addr = instr->addr; 2245 loff_t addr = instr->addr;
2183 loff_t len = instr->len; 2246 int len = instr->len;
2184 int ret = 0, i; 2247 int eb_count = 0;
2185 struct mtd_erase_region_info *region = NULL; 2248 int ret = 0;
2186 loff_t region_end = 0; 2249 int bdry_block = 0;
2187 2250
2188 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len); 2251 instr->state = MTD_ERASING;
2189 2252
2190 /* Do not allow erase past end of device */ 2253 if (ONENAND_IS_DDP(this)) {
2191 if (unlikely((len + addr) > mtd->size)) { 2254 loff_t bdry_addr = this->chipsize >> 1;
2192 printk(KERN_ERR "%s: Erase past end of device\n", __func__); 2255 if (addr < bdry_addr && (addr + len) > bdry_addr)
2193 return -EINVAL; 2256 bdry_block = bdry_addr >> this->erase_shift;
2194 } 2257 }
2195 2258
2196 if (FLEXONENAND(this)) { 2259 /* Pre-check bbs */
2197 /* Find the eraseregion of this address */ 2260 while (len) {
2198 i = flexonenand_region(mtd, addr); 2261 /* Check if we have a bad block, we do not erase bad blocks */
2199 region = &mtd->eraseregions[i]; 2262 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2263 printk(KERN_WARNING "%s: attempt to erase a bad block "
2264 "at addr 0x%012llx\n",
2265 __func__, (unsigned long long) addr);
2266 instr->state = MTD_ERASE_FAILED;
2267 return -EIO;
2268 }
2269 len -= block_size;
2270 addr += block_size;
2271 }
2200 2272
2201 block_size = region->erasesize; 2273 len = instr->len;
2202 region_end = region->offset + region->erasesize * region->numblocks; 2274 addr = instr->addr;
2203 2275
2204 /* Start address within region must align on block boundary. 2276 /* loop over 64 eb batches */
2205 * Erase region's start offset is always block start address. 2277 while (len) {
2206 */ 2278 struct erase_info verify_instr = *instr;
2207 if (unlikely((addr - region->offset) & (block_size - 1))) { 2279 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2208 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2280
2209 return -EINVAL; 2281 verify_instr.addr = addr;
2282 verify_instr.len = 0;
2283
2284 /* do not cross chip boundary */
2285 if (bdry_block) {
2286 int this_block = (addr >> this->erase_shift);
2287
2288 if (this_block < bdry_block) {
2289 max_eb_count = min(max_eb_count,
2290 (bdry_block - this_block));
2291 }
2210 } 2292 }
2211 } else {
2212 block_size = 1 << this->erase_shift;
2213 2293
2214 /* Start address must align on block boundary */ 2294 eb_count = 0;
2215 if (unlikely(addr & (block_size - 1))) { 2295
2216 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2296 while (len > block_size && eb_count < (max_eb_count - 1)) {
2217 return -EINVAL; 2297 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2298 addr, block_size);
2299 onenand_invalidate_bufferram(mtd, addr, block_size);
2300
2301 ret = this->wait(mtd, FL_PREPARING_ERASE);
2302 if (ret) {
2303 printk(KERN_ERR "%s: Failed multiblock erase, "
2304 "block %d\n", __func__,
2305 onenand_block(this, addr));
2306 instr->state = MTD_ERASE_FAILED;
2307 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2308 return -EIO;
2309 }
2310
2311 len -= block_size;
2312 addr += block_size;
2313 eb_count++;
2314 }
2315
2316 /* last block of 64-eb series */
2317 cond_resched();
2318 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2319 onenand_invalidate_bufferram(mtd, addr, block_size);
2320
2321 ret = this->wait(mtd, FL_ERASING);
2322 /* Check if it is write protected */
2323 if (ret) {
2324 printk(KERN_ERR "%s: Failed erase, block %d\n",
2325 __func__, onenand_block(this, addr));
2326 instr->state = MTD_ERASE_FAILED;
2327 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2328 return -EIO;
2329 }
2330
2331 len -= block_size;
2332 addr += block_size;
2333 eb_count++;
2334
2335 /* verify */
2336 verify_instr.len = eb_count * block_size;
2337 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2338 instr->state = verify_instr.state;
2339 instr->fail_addr = verify_instr.fail_addr;
2340 return -EIO;
2218 } 2341 }
2219 }
2220 2342
2221 /* Length must align on block boundary */
2222 if (unlikely(len & (block_size - 1))) {
2223 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2224 return -EINVAL;
2225 } 2343 }
2344 return 0;
2345}
2226 2346
2227 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2228 2347
2229 /* Grab the lock and see if the device is available */ 2348/**
2230 onenand_get_device(mtd, FL_ERASING); 2349 * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
2350 * @param mtd MTD device structure
2351 * @param instr erase instruction
2352 * @param region erase region
2353 * @param block_size erase block size
2354 *
2355 * Erase one or more blocks one block at a time
2356 */
2357static int onenand_block_by_block_erase(struct mtd_info *mtd,
2358 struct erase_info *instr,
2359 struct mtd_erase_region_info *region,
2360 unsigned int block_size)
2361{
2362 struct onenand_chip *this = mtd->priv;
2363 loff_t addr = instr->addr;
2364 int len = instr->len;
2365 loff_t region_end = 0;
2366 int ret = 0;
2367
2368 if (region) {
2369 /* region is set for Flex-OneNAND */
2370 region_end = region->offset + region->erasesize * region->numblocks;
2371 }
2231 2372
2232 /* Loop through the blocks */
2233 instr->state = MTD_ERASING; 2373 instr->state = MTD_ERASING;
2234 2374
2375 /* Loop through the blocks */
2235 while (len) { 2376 while (len) {
2236 cond_resched(); 2377 cond_resched();
2237 2378
@@ -2241,7 +2382,7 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2241 "at addr 0x%012llx\n", 2382 "at addr 0x%012llx\n",
2242 __func__, (unsigned long long) addr); 2383 __func__, (unsigned long long) addr);
2243 instr->state = MTD_ERASE_FAILED; 2384 instr->state = MTD_ERASE_FAILED;
2244 goto erase_exit; 2385 return -EIO;
2245 } 2386 }
2246 2387
2247 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2388 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
@@ -2255,7 +2396,7 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2255 __func__, onenand_block(this, addr)); 2396 __func__, onenand_block(this, addr));
2256 instr->state = MTD_ERASE_FAILED; 2397 instr->state = MTD_ERASE_FAILED;
2257 instr->fail_addr = addr; 2398 instr->fail_addr = addr;
2258 goto erase_exit; 2399 return -EIO;
2259 } 2400 }
2260 2401
2261 len -= block_size; 2402 len -= block_size;
@@ -2273,24 +2414,86 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2273 /* FIXME: This should be handled at MTD partitioning level. */ 2414 /* FIXME: This should be handled at MTD partitioning level. */
2274 printk(KERN_ERR "%s: Unaligned address\n", 2415 printk(KERN_ERR "%s: Unaligned address\n",
2275 __func__); 2416 __func__);
2276 goto erase_exit; 2417 return -EIO;
2277 } 2418 }
2278 } 2419 }
2420 }
2421 return 0;
2422}
2423
2424/**
2425 * onenand_erase - [MTD Interface] erase block(s)
2426 * @param mtd MTD device structure
2427 * @param instr erase instruction
2428 *
2429 * Erase one or more blocks
2430 */
2431static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2432{
2433 struct onenand_chip *this = mtd->priv;
2434 unsigned int block_size;
2435 loff_t addr = instr->addr;
2436 loff_t len = instr->len;
2437 int ret = 0;
2438 struct mtd_erase_region_info *region = NULL;
2439 loff_t region_offset = 0;
2279 2440
2441 DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
2442 (unsigned long long) instr->addr, (unsigned long long) instr->len);
2443
2444 /* Do not allow erase past end of device */
2445 if (unlikely((len + addr) > mtd->size)) {
2446 printk(KERN_ERR "%s: Erase past end of device\n", __func__);
2447 return -EINVAL;
2280 } 2448 }
2281 2449
2282 instr->state = MTD_ERASE_DONE; 2450 if (FLEXONENAND(this)) {
2451 /* Find the eraseregion of this address */
2452 int i = flexonenand_region(mtd, addr);
2283 2453
2284erase_exit: 2454 region = &mtd->eraseregions[i];
2455 block_size = region->erasesize;
2456
2457 /* Start address within region must align on block boundary.
2458 * Erase region's start offset is always block start address.
2459 */
2460 region_offset = region->offset;
2461 } else
2462 block_size = 1 << this->erase_shift;
2285 2463
2286 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 2464 /* Start address must align on block boundary */
2465 if (unlikely((addr - region_offset) & (block_size - 1))) {
2466 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2467 return -EINVAL;
2468 }
2469
2470 /* Length must align on block boundary */
2471 if (unlikely(len & (block_size - 1))) {
2472 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2473 return -EINVAL;
2474 }
2475
2476 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2477
2478 /* Grab the lock and see if the device is available */
2479 onenand_get_device(mtd, FL_ERASING);
2480
2481 if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2482 /* region is set for Flex-OneNAND (no mb erase) */
2483 ret = onenand_block_by_block_erase(mtd, instr,
2484 region, block_size);
2485 } else {
2486 ret = onenand_multiblock_erase(mtd, instr, block_size);
2487 }
2287 2488
2288 /* Deselect and wake up anyone waiting on the device */ 2489 /* Deselect and wake up anyone waiting on the device */
2289 onenand_release_device(mtd); 2490 onenand_release_device(mtd);
2290 2491
2291 /* Do call back function */ 2492 /* Do call back function */
2292 if (!ret) 2493 if (!ret) {
2494 instr->state = MTD_ERASE_DONE;
2293 mtd_erase_callback(instr); 2495 mtd_erase_callback(instr);
2496 }
2294 2497
2295 return ret; 2498 return ret;
2296} 2499}
@@ -2591,6 +2794,208 @@ static void onenand_unlock_all(struct mtd_info *mtd)
2591 2794
2592#ifdef CONFIG_MTD_ONENAND_OTP 2795#ifdef CONFIG_MTD_ONENAND_OTP
2593 2796
2797/**
2798 * onenand_otp_command - Send OTP specific command to OneNAND device
2799 * @param mtd MTD device structure
2800 * @param cmd the command to be sent
2801 * @param addr offset to read from or write to
2802 * @param len number of bytes to read or write
2803 */
2804static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2805 size_t len)
2806{
2807 struct onenand_chip *this = mtd->priv;
2808 int value, block, page;
2809
2810 /* Address translation */
2811 switch (cmd) {
2812 case ONENAND_CMD_OTP_ACCESS:
2813 block = (int) (addr >> this->erase_shift);
2814 page = -1;
2815 break;
2816
2817 default:
2818 block = (int) (addr >> this->erase_shift);
2819 page = (int) (addr >> this->page_shift);
2820
2821 if (ONENAND_IS_2PLANE(this)) {
2822 /* Make the even block number */
2823 block &= ~1;
2824 /* Is it the odd plane? */
2825 if (addr & this->writesize)
2826 block++;
2827 page >>= 1;
2828 }
2829 page &= this->page_mask;
2830 break;
2831 }
2832
2833 if (block != -1) {
2834 /* Write 'DFS, FBA' of Flash */
2835 value = onenand_block_address(this, block);
2836 this->write_word(value, this->base +
2837 ONENAND_REG_START_ADDRESS1);
2838 }
2839
2840 if (page != -1) {
2841 /* Now we use page size operation */
2842 int sectors = 4, count = 4;
2843 int dataram;
2844
2845 switch (cmd) {
2846 default:
2847 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2848 cmd = ONENAND_CMD_2X_PROG;
2849 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2850 break;
2851 }
2852
2853 /* Write 'FPA, FSA' of Flash */
2854 value = onenand_page_address(page, sectors);
2855 this->write_word(value, this->base +
2856 ONENAND_REG_START_ADDRESS8);
2857
2858 /* Write 'BSA, BSC' of DataRAM */
2859 value = onenand_buffer_address(dataram, sectors, count);
2860 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2861 }
2862
2863 /* Interrupt clear */
2864 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2865
2866 /* Write command */
2867 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2868
2869 return 0;
2870}
2871
2872/**
2873 * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
2874 * @param mtd MTD device structure
2875 * @param to offset to write to
2876 * @param len number of bytes to write
2877 * @param retlen pointer to variable to store the number of written bytes
2878 * @param buf the data to write
2879 *
2880 * OneNAND write out-of-band only for OTP
2881 */
2882static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2883 struct mtd_oob_ops *ops)
2884{
2885 struct onenand_chip *this = mtd->priv;
2886 int column, ret = 0, oobsize;
2887 int written = 0;
2888 u_char *oobbuf;
2889 size_t len = ops->ooblen;
2890 const u_char *buf = ops->oobbuf;
2891 int block, value, status;
2892
2893 to += ops->ooboffs;
2894
2895 /* Initialize retlen, in case of early exit */
2896 ops->oobretlen = 0;
2897
2898 oobsize = mtd->oobsize;
2899
2900 column = to & (mtd->oobsize - 1);
2901
2902 oobbuf = this->oob_buf;
2903
2904 /* Loop until all data write */
2905 while (written < len) {
2906 int thislen = min_t(int, oobsize, len - written);
2907
2908 cond_resched();
2909
2910 block = (int) (to >> this->erase_shift);
2911 /*
2912 * Write 'DFS, FBA' of Flash
2913 * Add: F100h DQ=DFS, FBA
2914 */
2915
2916 value = onenand_block_address(this, block);
2917 this->write_word(value, this->base +
2918 ONENAND_REG_START_ADDRESS1);
2919
2920 /*
2921 * Select DataRAM for DDP
2922 * Add: F101h DQ=DBS
2923 */
2924
2925 value = onenand_bufferram_address(this, block);
2926 this->write_word(value, this->base +
2927 ONENAND_REG_START_ADDRESS2);
2928 ONENAND_SET_NEXT_BUFFERRAM(this);
2929
2930 /*
2931 * Enter OTP access mode
2932 */
2933 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2934 this->wait(mtd, FL_OTPING);
2935
2936 /* We send data to spare ram with oobsize
2937 * to prevent byte access */
2938 memcpy(oobbuf + column, buf, thislen);
2939
2940 /*
2941 * Write Data into DataRAM
2942 * Add: 8th Word
2943 * in sector0/spare/page0
2944 * DQ=XXFCh
2945 */
2946 this->write_bufferram(mtd, ONENAND_SPARERAM,
2947 oobbuf, 0, mtd->oobsize);
2948
2949 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2950 onenand_update_bufferram(mtd, to, 0);
2951 if (ONENAND_IS_2PLANE(this)) {
2952 ONENAND_SET_BUFFERRAM1(this);
2953 onenand_update_bufferram(mtd, to + this->writesize, 0);
2954 }
2955
2956 ret = this->wait(mtd, FL_WRITING);
2957 if (ret) {
2958 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2959 break;
2960 }
2961
2962 /* Exit OTP access mode */
2963 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2964 this->wait(mtd, FL_RESETING);
2965
2966 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2967 status &= 0x60;
2968
2969 if (status == 0x60) {
2970 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2971 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2972 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2973 } else if (status == 0x20) {
2974 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2975 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2976 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2977 } else if (status == 0x40) {
2978 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2979 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2980 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2981 } else {
2982 printk(KERN_DEBUG "Reboot to check\n");
2983 }
2984
2985 written += thislen;
2986 if (written == len)
2987 break;
2988
2989 to += mtd->writesize;
2990 buf += thislen;
2991 column = 0;
2992 }
2993
2994 ops->oobretlen = written;
2995
2996 return ret;
2997}
2998
2594/* Internal OTP operation */ 2999/* Internal OTP operation */
2595typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 3000typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2596 size_t *retlen, u_char *buf); 3001 size_t *retlen, u_char *buf);
@@ -2693,11 +3098,11 @@ static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2693 struct mtd_oob_ops ops; 3098 struct mtd_oob_ops ops;
2694 int ret; 3099 int ret;
2695 3100
2696 /* Enter OTP access mode */
2697 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2698 this->wait(mtd, FL_OTPING);
2699
2700 if (FLEXONENAND(this)) { 3101 if (FLEXONENAND(this)) {
3102
3103 /* Enter OTP access mode */
3104 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3105 this->wait(mtd, FL_OTPING);
2701 /* 3106 /*
2702 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3107 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
2703 * main area of page 49. 3108 * main area of page 49.
@@ -2708,19 +3113,19 @@ static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2708 ops.oobbuf = NULL; 3113 ops.oobbuf = NULL;
2709 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 3114 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
2710 *retlen = ops.retlen; 3115 *retlen = ops.retlen;
3116
3117 /* Exit OTP access mode */
3118 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3119 this->wait(mtd, FL_RESETING);
2711 } else { 3120 } else {
2712 ops.mode = MTD_OOB_PLACE; 3121 ops.mode = MTD_OOB_PLACE;
2713 ops.ooblen = len; 3122 ops.ooblen = len;
2714 ops.oobbuf = buf; 3123 ops.oobbuf = buf;
2715 ops.ooboffs = 0; 3124 ops.ooboffs = 0;
2716 ret = onenand_write_oob_nolock(mtd, from, &ops); 3125 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
2717 *retlen = ops.oobretlen; 3126 *retlen = ops.oobretlen;
2718 } 3127 }
2719 3128
2720 /* Exit OTP access mode */
2721 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2722 this->wait(mtd, FL_RESETING);
2723
2724 return ret; 3129 return ret;
2725} 3130}
2726 3131
@@ -2751,16 +3156,21 @@ static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2751 if (density < ONENAND_DEVICE_DENSITY_512Mb) 3156 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2752 otp_pages = 20; 3157 otp_pages = 20;
2753 else 3158 else
2754 otp_pages = 10; 3159 otp_pages = 50;
2755 3160
2756 if (mode == MTD_OTP_FACTORY) { 3161 if (mode == MTD_OTP_FACTORY) {
2757 from += mtd->writesize * otp_pages; 3162 from += mtd->writesize * otp_pages;
2758 otp_pages = 64 - otp_pages; 3163 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
2759 } 3164 }
2760 3165
2761 /* Check User/Factory boundary */ 3166 /* Check User/Factory boundary */
2762 if (((mtd->writesize * otp_pages) - (from + len)) < 0) 3167 if (mode == MTD_OTP_USER) {
2763 return 0; 3168 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
3169 return 0;
3170 } else {
3171 if (((mtd->writesize * otp_pages) - len) < 0)
3172 return 0;
3173 }
2764 3174
2765 onenand_get_device(mtd, FL_OTPING); 3175 onenand_get_device(mtd, FL_OTPING);
2766 while (len > 0 && otp_pages > 0) { 3176 while (len > 0 && otp_pages > 0) {
@@ -2783,13 +3193,12 @@ static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2783 *retlen += sizeof(struct otp_info); 3193 *retlen += sizeof(struct otp_info);
2784 } else { 3194 } else {
2785 size_t tmp_retlen; 3195 size_t tmp_retlen;
2786 int size = len;
2787 3196
2788 ret = action(mtd, from, len, &tmp_retlen, buf); 3197 ret = action(mtd, from, len, &tmp_retlen, buf);
2789 3198
2790 buf += size; 3199 buf += tmp_retlen;
2791 len -= size; 3200 len -= tmp_retlen;
2792 *retlen += size; 3201 *retlen += tmp_retlen;
2793 3202
2794 if (ret) 3203 if (ret)
2795 break; 3204 break;
@@ -2902,21 +3311,11 @@ static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2902 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 3311 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
2903 size_t retlen; 3312 size_t retlen;
2904 int ret; 3313 int ret;
3314 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
2905 3315
2906 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 3316 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
2907 : mtd->oobsize); 3317 : mtd->oobsize);
2908 /* 3318 /*
2909 * Note: OTP lock operation
2910 * OTP block : 0xXXFC
2911 * 1st block : 0xXXF3 (If chip support)
2912 * Both : 0xXXF0 (If chip support)
2913 */
2914 if (FLEXONENAND(this))
2915 buf[FLEXONENAND_OTP_LOCK_OFFSET] = 0xFC;
2916 else
2917 buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2918
2919 /*
2920 * Write lock mark to 8th word of sector0 of page0 of the spare0. 3319 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2921 * We write 16 bytes spare area instead of 2 bytes. 3320 * We write 16 bytes spare area instead of 2 bytes.
2922 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3321 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
@@ -2926,10 +3325,30 @@ static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2926 from = 0; 3325 from = 0;
2927 len = FLEXONENAND(this) ? mtd->writesize : 16; 3326 len = FLEXONENAND(this) ? mtd->writesize : 16;
2928 3327
3328 /*
3329 * Note: OTP lock operation
3330 * OTP block : 0xXXFC XX 1111 1100
3331 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3332 * Both : 0xXXF0 (If chip support) XX 1111 0000
3333 */
3334 if (FLEXONENAND(this))
3335 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3336
3337 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3338 if (otp == 1)
3339 buf[otp_lock_offset] = 0xFC;
3340 else if (otp == 2)
3341 buf[otp_lock_offset] = 0xF3;
3342 else if (otp == 3)
3343 buf[otp_lock_offset] = 0xF0;
3344 else if (otp != 0)
3345 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3346
2929 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 3347 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
2930 3348
2931 return ret ? : retlen; 3349 return ret ? : retlen;
2932} 3350}
3351
2933#endif /* CONFIG_MTD_ONENAND_OTP */ 3352#endif /* CONFIG_MTD_ONENAND_OTP */
2934 3353
2935/** 3354/**
@@ -3279,8 +3698,8 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3279 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3698 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3280 ret = this->wait(mtd, FL_ERASING); 3699 ret = this->wait(mtd, FL_ERASING);
3281 if (ret) { 3700 if (ret) {
3282 printk(KERN_ERR "%s: flexonenand_set_boundary: " 3701 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3283 "Failed PI erase for Die %d\n", __func__, die); 3702 __func__, die);
3284 goto out; 3703 goto out;
3285 } 3704 }
3286 3705
diff --git a/drivers/mtd/tests/Makefile b/drivers/mtd/tests/Makefile
index c1d501335006..b44dcab940d8 100644
--- a/drivers/mtd/tests/Makefile
+++ b/drivers/mtd/tests/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MTD_TESTS) += mtd_speedtest.o
5obj-$(CONFIG_MTD_TESTS) += mtd_stresstest.o 5obj-$(CONFIG_MTD_TESTS) += mtd_stresstest.o
6obj-$(CONFIG_MTD_TESTS) += mtd_subpagetest.o 6obj-$(CONFIG_MTD_TESTS) += mtd_subpagetest.o
7obj-$(CONFIG_MTD_TESTS) += mtd_torturetest.o 7obj-$(CONFIG_MTD_TESTS) += mtd_torturetest.o
8obj-$(CONFIG_MTD_TESTS) += mtd_nandecctest.o
diff --git a/drivers/mtd/tests/mtd_nandecctest.c b/drivers/mtd/tests/mtd_nandecctest.c
new file mode 100644
index 000000000000..c1f31051784c
--- /dev/null
+++ b/drivers/mtd/tests/mtd_nandecctest.c
@@ -0,0 +1,87 @@
1#include <linux/kernel.h>
2#include <linux/module.h>
3#include <linux/list.h>
4#include <linux/slab.h>
5#include <linux/random.h>
6#include <linux/string.h>
7#include <linux/bitops.h>
8#include <linux/jiffies.h>
9#include <linux/mtd/nand_ecc.h>
10
11#if defined(CONFIG_MTD_NAND) || defined(CONFIG_MTD_NAND_MODULE)
12
13static void inject_single_bit_error(void *data, size_t size)
14{
15 unsigned long offset = random32() % (size * BITS_PER_BYTE);
16
17 __change_bit(offset, data);
18}
19
20static unsigned char data[512];
21static unsigned char error_data[512];
22
23static int nand_ecc_test(const size_t size)
24{
25 unsigned char code[3];
26 unsigned char error_code[3];
27 char testname[30];
28
29 BUG_ON(sizeof(data) < size);
30
31 sprintf(testname, "nand-ecc-%zu", size);
32
33 get_random_bytes(data, size);
34
35 memcpy(error_data, data, size);
36 inject_single_bit_error(error_data, size);
37
38 __nand_calculate_ecc(data, size, code);
39 __nand_calculate_ecc(error_data, size, error_code);
40 __nand_correct_data(error_data, code, error_code, size);
41
42 if (!memcmp(data, error_data, size)) {
43 printk(KERN_INFO "mtd_nandecctest: ok - %s\n", testname);
44 return 0;
45 }
46
47 printk(KERN_ERR "mtd_nandecctest: not ok - %s\n", testname);
48
49 printk(KERN_DEBUG "hexdump of data:\n");
50 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 4,
51 data, size, false);
52 printk(KERN_DEBUG "hexdump of error data:\n");
53 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 4,
54 error_data, size, false);
55
56 return -1;
57}
58
59#else
60
61static int nand_ecc_test(const size_t size)
62{
63 return 0;
64}
65
66#endif
67
68static int __init ecc_test_init(void)
69{
70 srandom32(jiffies);
71
72 nand_ecc_test(256);
73 nand_ecc_test(512);
74
75 return 0;
76}
77
78static void __exit ecc_test_exit(void)
79{
80}
81
82module_init(ecc_test_init);
83module_exit(ecc_test_exit);
84
85MODULE_DESCRIPTION("NAND ECC function test module");
86MODULE_AUTHOR("Akinobu Mita");
87MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/tests/mtd_pagetest.c b/drivers/mtd/tests/mtd_pagetest.c
index 103cac480fee..ce17cbe918c5 100644
--- a/drivers/mtd/tests/mtd_pagetest.c
+++ b/drivers/mtd/tests/mtd_pagetest.c
@@ -523,6 +523,7 @@ static int __init mtd_pagetest_init(void)
523 do_div(tmp, mtd->erasesize); 523 do_div(tmp, mtd->erasesize);
524 ebcnt = tmp; 524 ebcnt = tmp;
525 pgcnt = mtd->erasesize / mtd->writesize; 525 pgcnt = mtd->erasesize / mtd->writesize;
526 pgsize = mtd->writesize;
526 527
527 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, " 528 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, "
528 "page size %u, count of eraseblocks %u, pages per " 529 "page size %u, count of eraseblocks %u, pages per "