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-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c432
-rw-r--r--drivers/mtd/chips/cfi_probe.c8
-rw-r--r--drivers/mtd/chips/gen_probe.c16
-rw-r--r--drivers/mtd/devices/Kconfig5
-rw-r--r--drivers/mtd/devices/block2mtd.c11
-rw-r--r--drivers/mtd/devices/docprobe.c6
-rw-r--r--drivers/mtd/devices/phram.c14
-rw-r--r--drivers/mtd/maps/Kconfig4
-rw-r--r--drivers/mtd/maps/cfi_flagadm.c4
-rw-r--r--drivers/mtd/maps/dbox2-flash.c2
-rw-r--r--drivers/mtd/maps/mtx-1_flash.c2
-rw-r--r--drivers/mtd/maps/pcmciamtd.c1
-rw-r--r--drivers/mtd/maps/physmap.c1
-rw-r--r--drivers/mtd/mtdconcat.c169
-rw-r--r--drivers/mtd/mtdpart.c1
-rw-r--r--drivers/mtd/nand/Kconfig13
-rw-r--r--drivers/mtd/nand/au1550nd.c287
-rw-r--r--drivers/mtd/nand/autcpu12.c56
-rw-r--r--drivers/mtd/nand/cs553x_nand.c130
-rw-r--r--drivers/mtd/nand/diskonchip.c415
-rw-r--r--drivers/mtd/nand/edb7312.c56
-rw-r--r--drivers/mtd/nand/h1910.c60
-rw-r--r--drivers/mtd/nand/nand_base.c713
-rw-r--r--drivers/mtd/nand/nand_bbt.c271
-rw-r--r--drivers/mtd/nand/nand_ecc.c29
-rw-r--r--drivers/mtd/nand/nand_ids.c12
-rw-r--r--drivers/mtd/nand/nandsim.c2
-rw-r--r--drivers/mtd/nand/ppchameleonevb.c182
-rw-r--r--drivers/mtd/nand/rtc_from4.c259
-rw-r--r--drivers/mtd/nand/s3c2410.c80
-rw-r--r--drivers/mtd/nand/sharpsl.c96
-rw-r--r--drivers/mtd/nand/spia.c78
-rw-r--r--drivers/mtd/nand/toto.c66
-rw-r--r--drivers/mtd/nand/ts7250.c14
-rw-r--r--drivers/mtd/redboot.c18
-rw-r--r--drivers/mtd/rfd_ftl.c48
36 files changed, 1892 insertions, 1669 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index fe00af3f9195..d0d5e521b564 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -399,7 +399,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
399 for (i=0; i< cfi->numchips; i++) { 399 for (i=0; i< cfi->numchips; i++) {
400 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp; 400 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
401 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp; 401 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
402 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp; 402 cfi->chips[i].erase_time = 1000<<cfi->cfiq->BlockEraseTimeoutTyp;
403 cfi->chips[i].ref_point_counter = 0; 403 cfi->chips[i].ref_point_counter = 0;
404 init_waitqueue_head(&(cfi->chips[i].wq)); 404 init_waitqueue_head(&(cfi->chips[i].wq));
405 } 405 }
@@ -894,26 +894,33 @@ static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
894 894
895/* 895/*
896 * When a delay is required for the flash operation to complete, the 896 * When a delay is required for the flash operation to complete, the
897 * xip_udelay() function is polling for both the given timeout and pending 897 * xip_wait_for_operation() function is polling for both the given timeout
898 * (but still masked) hardware interrupts. Whenever there is an interrupt 898 * and pending (but still masked) hardware interrupts. Whenever there is an
899 * pending then the flash erase or write operation is suspended, array mode 899 * interrupt pending then the flash erase or write operation is suspended,
900 * restored and interrupts unmasked. Task scheduling might also happen at that 900 * array mode restored and interrupts unmasked. Task scheduling might also
901 * point. The CPU eventually returns from the interrupt or the call to 901 * happen at that point. The CPU eventually returns from the interrupt or
902 * schedule() and the suspended flash operation is resumed for the remaining 902 * the call to schedule() and the suspended flash operation is resumed for
903 * of the delay period. 903 * the remaining of the delay period.
904 * 904 *
905 * Warning: this function _will_ fool interrupt latency tracing tools. 905 * Warning: this function _will_ fool interrupt latency tracing tools.
906 */ 906 */
907 907
908static void __xipram xip_udelay(struct map_info *map, struct flchip *chip, 908static int __xipram xip_wait_for_operation(
909 unsigned long adr, int usec) 909 struct map_info *map, struct flchip *chip,
910 unsigned long adr, int *chip_op_time )
910{ 911{
911 struct cfi_private *cfi = map->fldrv_priv; 912 struct cfi_private *cfi = map->fldrv_priv;
912 struct cfi_pri_intelext *cfip = cfi->cmdset_priv; 913 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
913 map_word status, OK = CMD(0x80); 914 map_word status, OK = CMD(0x80);
914 unsigned long suspended, start = xip_currtime(); 915 unsigned long usec, suspended, start, done;
915 flstate_t oldstate, newstate; 916 flstate_t oldstate, newstate;
916 917
918 start = xip_currtime();
919 usec = *chip_op_time * 8;
920 if (usec == 0)
921 usec = 500000;
922 done = 0;
923
917 do { 924 do {
918 cpu_relax(); 925 cpu_relax();
919 if (xip_irqpending() && cfip && 926 if (xip_irqpending() && cfip &&
@@ -930,9 +937,9 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
930 * we resume the whole thing at once). Yes, it 937 * we resume the whole thing at once). Yes, it
931 * can happen! 938 * can happen!
932 */ 939 */
940 usec -= done;
933 map_write(map, CMD(0xb0), adr); 941 map_write(map, CMD(0xb0), adr);
934 map_write(map, CMD(0x70), adr); 942 map_write(map, CMD(0x70), adr);
935 usec -= xip_elapsed_since(start);
936 suspended = xip_currtime(); 943 suspended = xip_currtime();
937 do { 944 do {
938 if (xip_elapsed_since(suspended) > 100000) { 945 if (xip_elapsed_since(suspended) > 100000) {
@@ -942,7 +949,7 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
942 * This is a critical error but there 949 * This is a critical error but there
943 * is not much we can do here. 950 * is not much we can do here.
944 */ 951 */
945 return; 952 return -EIO;
946 } 953 }
947 status = map_read(map, adr); 954 status = map_read(map, adr);
948 } while (!map_word_andequal(map, status, OK, OK)); 955 } while (!map_word_andequal(map, status, OK, OK));
@@ -1002,65 +1009,107 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
1002 xip_cpu_idle(); 1009 xip_cpu_idle();
1003 } 1010 }
1004 status = map_read(map, adr); 1011 status = map_read(map, adr);
1012 done = xip_elapsed_since(start);
1005 } while (!map_word_andequal(map, status, OK, OK) 1013 } while (!map_word_andequal(map, status, OK, OK)
1006 && xip_elapsed_since(start) < usec); 1014 && done < usec);
1007}
1008 1015
1009#define UDELAY(map, chip, adr, usec) xip_udelay(map, chip, adr, usec) 1016 return (done >= usec) ? -ETIME : 0;
1017}
1010 1018
1011/* 1019/*
1012 * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while 1020 * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
1013 * the flash is actively programming or erasing since we have to poll for 1021 * the flash is actively programming or erasing since we have to poll for
1014 * the operation to complete anyway. We can't do that in a generic way with 1022 * the operation to complete anyway. We can't do that in a generic way with
1015 * a XIP setup so do it before the actual flash operation in this case 1023 * a XIP setup so do it before the actual flash operation in this case
1016 * and stub it out from INVALIDATE_CACHE_UDELAY. 1024 * and stub it out from INVAL_CACHE_AND_WAIT.
1017 */ 1025 */
1018#define XIP_INVAL_CACHED_RANGE(map, from, size) \ 1026#define XIP_INVAL_CACHED_RANGE(map, from, size) \
1019 INVALIDATE_CACHED_RANGE(map, from, size) 1027 INVALIDATE_CACHED_RANGE(map, from, size)
1020 1028
1021#define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \ 1029#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
1022 UDELAY(map, chip, cmd_adr, usec) 1030 xip_wait_for_operation(map, chip, cmd_adr, p_usec)
1023
1024/*
1025 * Extra notes:
1026 *
1027 * Activating this XIP support changes the way the code works a bit. For
1028 * example the code to suspend the current process when concurrent access
1029 * happens is never executed because xip_udelay() will always return with the
1030 * same chip state as it was entered with. This is why there is no care for
1031 * the presence of add_wait_queue() or schedule() calls from within a couple
1032 * xip_disable()'d areas of code, like in do_erase_oneblock for example.
1033 * The queueing and scheduling are always happening within xip_udelay().
1034 *
1035 * Similarly, get_chip() and put_chip() just happen to always be executed
1036 * with chip->state set to FL_READY (or FL_XIP_WHILE_*) where flash state
1037 * is in array mode, therefore never executing many cases therein and not
1038 * causing any problem with XIP.
1039 */
1040 1031
1041#else 1032#else
1042 1033
1043#define xip_disable(map, chip, adr) 1034#define xip_disable(map, chip, adr)
1044#define xip_enable(map, chip, adr) 1035#define xip_enable(map, chip, adr)
1045#define XIP_INVAL_CACHED_RANGE(x...) 1036#define XIP_INVAL_CACHED_RANGE(x...)
1037#define INVAL_CACHE_AND_WAIT inval_cache_and_wait_for_operation
1038
1039static int inval_cache_and_wait_for_operation(
1040 struct map_info *map, struct flchip *chip,
1041 unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
1042 int *chip_op_time )
1043{
1044 struct cfi_private *cfi = map->fldrv_priv;
1045 map_word status, status_OK = CMD(0x80);
1046 int z, chip_state = chip->state;
1047 unsigned long timeo;
1048
1049 spin_unlock(chip->mutex);
1050 if (inval_len)
1051 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
1052 if (*chip_op_time)
1053 cfi_udelay(*chip_op_time);
1054 spin_lock(chip->mutex);
1046 1055
1047#define UDELAY(map, chip, adr, usec) \ 1056 timeo = *chip_op_time * 8 * HZ / 1000000;
1048do { \ 1057 if (timeo < HZ/2)
1049 spin_unlock(chip->mutex); \ 1058 timeo = HZ/2;
1050 cfi_udelay(usec); \ 1059 timeo += jiffies;
1051 spin_lock(chip->mutex); \ 1060
1052} while (0) 1061 z = 0;
1053 1062 for (;;) {
1054#define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \ 1063 if (chip->state != chip_state) {
1055do { \ 1064 /* Someone's suspended the operation: sleep */
1056 spin_unlock(chip->mutex); \ 1065 DECLARE_WAITQUEUE(wait, current);
1057 INVALIDATE_CACHED_RANGE(map, adr, len); \ 1066
1058 cfi_udelay(usec); \ 1067 set_current_state(TASK_UNINTERRUPTIBLE);
1059 spin_lock(chip->mutex); \ 1068 add_wait_queue(&chip->wq, &wait);
1060} while (0) 1069 spin_unlock(chip->mutex);
1070 schedule();
1071 remove_wait_queue(&chip->wq, &wait);
1072 timeo = jiffies + (HZ / 2); /* FIXME */
1073 spin_lock(chip->mutex);
1074 continue;
1075 }
1076
1077 status = map_read(map, cmd_adr);
1078 if (map_word_andequal(map, status, status_OK, status_OK))
1079 break;
1080
1081 /* OK Still waiting */
1082 if (time_after(jiffies, timeo)) {
1083 map_write(map, CMD(0x70), cmd_adr);
1084 chip->state = FL_STATUS;
1085 return -ETIME;
1086 }
1087
1088 /* Latency issues. Drop the lock, wait a while and retry */
1089 z++;
1090 spin_unlock(chip->mutex);
1091 cfi_udelay(1);
1092 spin_lock(chip->mutex);
1093 }
1094
1095 if (!z) {
1096 if (!--(*chip_op_time))
1097 *chip_op_time = 1;
1098 } else if (z > 1)
1099 ++(*chip_op_time);
1100
1101 /* Done and happy. */
1102 chip->state = FL_STATUS;
1103 return 0;
1104}
1061 1105
1062#endif 1106#endif
1063 1107
1108#define WAIT_TIMEOUT(map, chip, adr, udelay) \
1109 ({ int __udelay = (udelay); \
1110 INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
1111
1112
1064static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len) 1113static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
1065{ 1114{
1066 unsigned long cmd_addr; 1115 unsigned long cmd_addr;
@@ -1250,14 +1299,11 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1250 unsigned long adr, map_word datum, int mode) 1299 unsigned long adr, map_word datum, int mode)
1251{ 1300{
1252 struct cfi_private *cfi = map->fldrv_priv; 1301 struct cfi_private *cfi = map->fldrv_priv;
1253 map_word status, status_OK, write_cmd; 1302 map_word status, write_cmd;
1254 unsigned long timeo; 1303 int ret=0;
1255 int z, ret=0;
1256 1304
1257 adr += chip->start; 1305 adr += chip->start;
1258 1306
1259 /* Let's determine those according to the interleave only once */
1260 status_OK = CMD(0x80);
1261 switch (mode) { 1307 switch (mode) {
1262 case FL_WRITING: 1308 case FL_WRITING:
1263 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0x40) : CMD(0x41); 1309 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0x40) : CMD(0x41);
@@ -1283,57 +1329,17 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1283 map_write(map, datum, adr); 1329 map_write(map, datum, adr);
1284 chip->state = mode; 1330 chip->state = mode;
1285 1331
1286 INVALIDATE_CACHE_UDELAY(map, chip, adr, 1332 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1287 adr, map_bankwidth(map), 1333 adr, map_bankwidth(map),
1288 chip->word_write_time); 1334 &chip->word_write_time);
1289 1335 if (ret) {
1290 timeo = jiffies + (HZ/2); 1336 xip_enable(map, chip, adr);
1291 z = 0; 1337 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
1292 for (;;) { 1338 goto out;
1293 if (chip->state != mode) {
1294 /* Someone's suspended the write. Sleep */
1295 DECLARE_WAITQUEUE(wait, current);
1296
1297 set_current_state(TASK_UNINTERRUPTIBLE);
1298 add_wait_queue(&chip->wq, &wait);
1299 spin_unlock(chip->mutex);
1300 schedule();
1301 remove_wait_queue(&chip->wq, &wait);
1302 timeo = jiffies + (HZ / 2); /* FIXME */
1303 spin_lock(chip->mutex);
1304 continue;
1305 }
1306
1307 status = map_read(map, adr);
1308 if (map_word_andequal(map, status, status_OK, status_OK))
1309 break;
1310
1311 /* OK Still waiting */
1312 if (time_after(jiffies, timeo)) {
1313 map_write(map, CMD(0x70), adr);
1314 chip->state = FL_STATUS;
1315 xip_enable(map, chip, adr);
1316 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
1317 ret = -EIO;
1318 goto out;
1319 }
1320
1321 /* Latency issues. Drop the lock, wait a while and retry */
1322 z++;
1323 UDELAY(map, chip, adr, 1);
1324 }
1325 if (!z) {
1326 chip->word_write_time--;
1327 if (!chip->word_write_time)
1328 chip->word_write_time = 1;
1329 } 1339 }
1330 if (z > 1)
1331 chip->word_write_time++;
1332
1333 /* Done and happy. */
1334 chip->state = FL_STATUS;
1335 1340
1336 /* check for errors */ 1341 /* check for errors */
1342 status = map_read(map, adr);
1337 if (map_word_bitsset(map, status, CMD(0x1a))) { 1343 if (map_word_bitsset(map, status, CMD(0x1a))) {
1338 unsigned long chipstatus = MERGESTATUS(status); 1344 unsigned long chipstatus = MERGESTATUS(status);
1339 1345
@@ -1450,9 +1456,9 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1450 unsigned long *pvec_seek, int len) 1456 unsigned long *pvec_seek, int len)
1451{ 1457{
1452 struct cfi_private *cfi = map->fldrv_priv; 1458 struct cfi_private *cfi = map->fldrv_priv;
1453 map_word status, status_OK, write_cmd, datum; 1459 map_word status, write_cmd, datum;
1454 unsigned long cmd_adr, timeo; 1460 unsigned long cmd_adr;
1455 int wbufsize, z, ret=0, word_gap, words; 1461 int ret, wbufsize, word_gap, words;
1456 const struct kvec *vec; 1462 const struct kvec *vec;
1457 unsigned long vec_seek; 1463 unsigned long vec_seek;
1458 1464
@@ -1461,7 +1467,6 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1461 cmd_adr = adr & ~(wbufsize-1); 1467 cmd_adr = adr & ~(wbufsize-1);
1462 1468
1463 /* Let's determine this according to the interleave only once */ 1469 /* Let's determine this according to the interleave only once */
1464 status_OK = CMD(0x80);
1465 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9); 1470 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9);
1466 1471
1467 spin_lock(chip->mutex); 1472 spin_lock(chip->mutex);
@@ -1475,12 +1480,14 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1475 ENABLE_VPP(map); 1480 ENABLE_VPP(map);
1476 xip_disable(map, chip, cmd_adr); 1481 xip_disable(map, chip, cmd_adr);
1477 1482
1478 /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set 1483 /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
1479 [...], the device will not accept any more Write to Buffer commands". 1484 [...], the device will not accept any more Write to Buffer commands".
1480 So we must check here and reset those bits if they're set. Otherwise 1485 So we must check here and reset those bits if they're set. Otherwise
1481 we're just pissing in the wind */ 1486 we're just pissing in the wind */
1482 if (chip->state != FL_STATUS) 1487 if (chip->state != FL_STATUS) {
1483 map_write(map, CMD(0x70), cmd_adr); 1488 map_write(map, CMD(0x70), cmd_adr);
1489 chip->state = FL_STATUS;
1490 }
1484 status = map_read(map, cmd_adr); 1491 status = map_read(map, cmd_adr);
1485 if (map_word_bitsset(map, status, CMD(0x30))) { 1492 if (map_word_bitsset(map, status, CMD(0x30))) {
1486 xip_enable(map, chip, cmd_adr); 1493 xip_enable(map, chip, cmd_adr);
@@ -1491,32 +1498,20 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1491 } 1498 }
1492 1499
1493 chip->state = FL_WRITING_TO_BUFFER; 1500 chip->state = FL_WRITING_TO_BUFFER;
1494 1501 map_write(map, write_cmd, cmd_adr);
1495 z = 0; 1502 ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0);
1496 for (;;) { 1503 if (ret) {
1497 map_write(map, write_cmd, cmd_adr); 1504 /* Argh. Not ready for write to buffer */
1498 1505 map_word Xstatus = map_read(map, cmd_adr);
1506 map_write(map, CMD(0x70), cmd_adr);
1507 chip->state = FL_STATUS;
1499 status = map_read(map, cmd_adr); 1508 status = map_read(map, cmd_adr);
1500 if (map_word_andequal(map, status, status_OK, status_OK)) 1509 map_write(map, CMD(0x50), cmd_adr);
1501 break; 1510 map_write(map, CMD(0x70), cmd_adr);
1502 1511 xip_enable(map, chip, cmd_adr);
1503 UDELAY(map, chip, cmd_adr, 1); 1512 printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n",
1504 1513 map->name, Xstatus.x[0], status.x[0]);
1505 if (++z > 20) { 1514 goto out;
1506 /* Argh. Not ready for write to buffer */
1507 map_word Xstatus;
1508 map_write(map, CMD(0x70), cmd_adr);
1509 chip->state = FL_STATUS;
1510 Xstatus = map_read(map, cmd_adr);
1511 /* Odd. Clear status bits */
1512 map_write(map, CMD(0x50), cmd_adr);
1513 map_write(map, CMD(0x70), cmd_adr);
1514 xip_enable(map, chip, cmd_adr);
1515 printk(KERN_ERR "%s: Chip not ready for buffer write. status = %lx, Xstatus = %lx\n",
1516 map->name, status.x[0], Xstatus.x[0]);
1517 ret = -EIO;
1518 goto out;
1519 }
1520 } 1515 }
1521 1516
1522 /* Figure out the number of words to write */ 1517 /* Figure out the number of words to write */
@@ -1571,56 +1566,19 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1571 map_write(map, CMD(0xd0), cmd_adr); 1566 map_write(map, CMD(0xd0), cmd_adr);
1572 chip->state = FL_WRITING; 1567 chip->state = FL_WRITING;
1573 1568
1574 INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, 1569 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
1575 adr, len, 1570 adr, len,
1576 chip->buffer_write_time); 1571 &chip->buffer_write_time);
1577 1572 if (ret) {
1578 timeo = jiffies + (HZ/2); 1573 map_write(map, CMD(0x70), cmd_adr);
1579 z = 0; 1574 chip->state = FL_STATUS;
1580 for (;;) { 1575 xip_enable(map, chip, cmd_adr);
1581 if (chip->state != FL_WRITING) { 1576 printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
1582 /* Someone's suspended the write. Sleep */ 1577 goto out;
1583 DECLARE_WAITQUEUE(wait, current);
1584 set_current_state(TASK_UNINTERRUPTIBLE);
1585 add_wait_queue(&chip->wq, &wait);
1586 spin_unlock(chip->mutex);
1587 schedule();
1588 remove_wait_queue(&chip->wq, &wait);
1589 timeo = jiffies + (HZ / 2); /* FIXME */
1590 spin_lock(chip->mutex);
1591 continue;
1592 }
1593
1594 status = map_read(map, cmd_adr);
1595 if (map_word_andequal(map, status, status_OK, status_OK))
1596 break;
1597
1598 /* OK Still waiting */
1599 if (time_after(jiffies, timeo)) {
1600 map_write(map, CMD(0x70), cmd_adr);
1601 chip->state = FL_STATUS;
1602 xip_enable(map, chip, cmd_adr);
1603 printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
1604 ret = -EIO;
1605 goto out;
1606 }
1607
1608 /* Latency issues. Drop the lock, wait a while and retry */
1609 z++;
1610 UDELAY(map, chip, cmd_adr, 1);
1611 }
1612 if (!z) {
1613 chip->buffer_write_time--;
1614 if (!chip->buffer_write_time)
1615 chip->buffer_write_time = 1;
1616 } 1578 }
1617 if (z > 1)
1618 chip->buffer_write_time++;
1619
1620 /* Done and happy. */
1621 chip->state = FL_STATUS;
1622 1579
1623 /* check for errors */ 1580 /* check for errors */
1581 status = map_read(map, cmd_adr);
1624 if (map_word_bitsset(map, status, CMD(0x1a))) { 1582 if (map_word_bitsset(map, status, CMD(0x1a))) {
1625 unsigned long chipstatus = MERGESTATUS(status); 1583 unsigned long chipstatus = MERGESTATUS(status);
1626 1584
@@ -1691,6 +1649,11 @@ static int cfi_intelext_writev (struct mtd_info *mtd, const struct kvec *vecs,
1691 if (chipnum == cfi->numchips) 1649 if (chipnum == cfi->numchips)
1692 return 0; 1650 return 0;
1693 } 1651 }
1652
1653 /* Be nice and reschedule with the chip in a usable state for other
1654 processes. */
1655 cond_resched();
1656
1694 } while (len); 1657 } while (len);
1695 1658
1696 return 0; 1659 return 0;
@@ -1711,17 +1674,12 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1711 unsigned long adr, int len, void *thunk) 1674 unsigned long adr, int len, void *thunk)
1712{ 1675{
1713 struct cfi_private *cfi = map->fldrv_priv; 1676 struct cfi_private *cfi = map->fldrv_priv;
1714 map_word status, status_OK; 1677 map_word status;
1715 unsigned long timeo;
1716 int retries = 3; 1678 int retries = 3;
1717 DECLARE_WAITQUEUE(wait, current); 1679 int ret;
1718 int ret = 0;
1719 1680
1720 adr += chip->start; 1681 adr += chip->start;
1721 1682
1722 /* Let's determine this according to the interleave only once */
1723 status_OK = CMD(0x80);
1724
1725 retry: 1683 retry:
1726 spin_lock(chip->mutex); 1684 spin_lock(chip->mutex);
1727 ret = get_chip(map, chip, adr, FL_ERASING); 1685 ret = get_chip(map, chip, adr, FL_ERASING);
@@ -1743,48 +1701,15 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1743 chip->state = FL_ERASING; 1701 chip->state = FL_ERASING;
1744 chip->erase_suspended = 0; 1702 chip->erase_suspended = 0;
1745 1703
1746 INVALIDATE_CACHE_UDELAY(map, chip, adr, 1704 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1747 adr, len, 1705 adr, len,
1748 chip->erase_time*1000/2); 1706 &chip->erase_time);
1749 1707 if (ret) {
1750 /* FIXME. Use a timer to check this, and return immediately. */ 1708 map_write(map, CMD(0x70), adr);
1751 /* Once the state machine's known to be working I'll do that */ 1709 chip->state = FL_STATUS;
1752 1710 xip_enable(map, chip, adr);
1753 timeo = jiffies + (HZ*20); 1711 printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
1754 for (;;) { 1712 goto out;
1755 if (chip->state != FL_ERASING) {
1756 /* Someone's suspended the erase. Sleep */
1757 set_current_state(TASK_UNINTERRUPTIBLE);
1758 add_wait_queue(&chip->wq, &wait);
1759 spin_unlock(chip->mutex);
1760 schedule();
1761 remove_wait_queue(&chip->wq, &wait);
1762 spin_lock(chip->mutex);
1763 continue;
1764 }
1765 if (chip->erase_suspended) {
1766 /* This erase was suspended and resumed.
1767 Adjust the timeout */
1768 timeo = jiffies + (HZ*20); /* FIXME */
1769 chip->erase_suspended = 0;
1770 }
1771
1772 status = map_read(map, adr);
1773 if (map_word_andequal(map, status, status_OK, status_OK))
1774 break;
1775
1776 /* OK Still waiting */
1777 if (time_after(jiffies, timeo)) {
1778 map_write(map, CMD(0x70), adr);
1779 chip->state = FL_STATUS;
1780 xip_enable(map, chip, adr);
1781 printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
1782 ret = -EIO;
1783 goto out;
1784 }
1785
1786 /* Latency issues. Drop the lock, wait a while and retry */
1787 UDELAY(map, chip, adr, 1000000/HZ);
1788 } 1713 }
1789 1714
1790 /* We've broken this before. It doesn't hurt to be safe */ 1715 /* We've broken this before. It doesn't hurt to be safe */
@@ -1813,7 +1738,6 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1813 ret = -EIO; 1738 ret = -EIO;
1814 } else if (chipstatus & 0x20 && retries--) { 1739 } else if (chipstatus & 0x20 && retries--) {
1815 printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus); 1740 printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
1816 timeo = jiffies + HZ;
1817 put_chip(map, chip, adr); 1741 put_chip(map, chip, adr);
1818 spin_unlock(chip->mutex); 1742 spin_unlock(chip->mutex);
1819 goto retry; 1743 goto retry;
@@ -1919,15 +1843,11 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
1919{ 1843{
1920 struct cfi_private *cfi = map->fldrv_priv; 1844 struct cfi_private *cfi = map->fldrv_priv;
1921 struct cfi_pri_intelext *extp = cfi->cmdset_priv; 1845 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
1922 map_word status, status_OK; 1846 int udelay;
1923 unsigned long timeo = jiffies + HZ;
1924 int ret; 1847 int ret;
1925 1848
1926 adr += chip->start; 1849 adr += chip->start;
1927 1850
1928 /* Let's determine this according to the interleave only once */
1929 status_OK = CMD(0x80);
1930
1931 spin_lock(chip->mutex); 1851 spin_lock(chip->mutex);
1932 ret = get_chip(map, chip, adr, FL_LOCKING); 1852 ret = get_chip(map, chip, adr, FL_LOCKING);
1933 if (ret) { 1853 if (ret) {
@@ -1952,41 +1872,21 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
1952 * If Instant Individual Block Locking supported then no need 1872 * If Instant Individual Block Locking supported then no need
1953 * to delay. 1873 * to delay.
1954 */ 1874 */
1875 udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;
1955 1876
1956 if (!extp || !(extp->FeatureSupport & (1 << 5))) 1877 ret = WAIT_TIMEOUT(map, chip, adr, udelay);
1957 UDELAY(map, chip, adr, 1000000/HZ); 1878 if (ret) {
1958 1879 map_write(map, CMD(0x70), adr);
1959 /* FIXME. Use a timer to check this, and return immediately. */ 1880 chip->state = FL_STATUS;
1960 /* Once the state machine's known to be working I'll do that */ 1881 xip_enable(map, chip, adr);
1961 1882 printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
1962 timeo = jiffies + (HZ*20); 1883 goto out;
1963 for (;;) {
1964
1965 status = map_read(map, adr);
1966 if (map_word_andequal(map, status, status_OK, status_OK))
1967 break;
1968
1969 /* OK Still waiting */
1970 if (time_after(jiffies, timeo)) {
1971 map_write(map, CMD(0x70), adr);
1972 chip->state = FL_STATUS;
1973 xip_enable(map, chip, adr);
1974 printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
1975 put_chip(map, chip, adr);
1976 spin_unlock(chip->mutex);
1977 return -EIO;
1978 }
1979
1980 /* Latency issues. Drop the lock, wait a while and retry */
1981 UDELAY(map, chip, adr, 1);
1982 } 1884 }
1983 1885
1984 /* Done and happy. */
1985 chip->state = FL_STATUS;
1986 xip_enable(map, chip, adr); 1886 xip_enable(map, chip, adr);
1987 put_chip(map, chip, adr); 1887out: put_chip(map, chip, adr);
1988 spin_unlock(chip->mutex); 1888 spin_unlock(chip->mutex);
1989 return 0; 1889 return ret;
1990} 1890}
1991 1891
1992static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len) 1892static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c
index e636aa86bc24..4bf9f8cac0dd 100644
--- a/drivers/mtd/chips/cfi_probe.c
+++ b/drivers/mtd/chips/cfi_probe.c
@@ -349,12 +349,12 @@ static void print_cfi_ident(struct cfi_ident *cfip)
349 else 349 else
350 printk("No Vpp line\n"); 350 printk("No Vpp line\n");
351 351
352 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp); 352 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
353 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp)); 353 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
354 354
355 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) { 355 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
356 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp); 356 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
357 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp)); 357 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
358 } 358 }
359 else 359 else
360 printk("Full buffer write not supported\n"); 360 printk("Full buffer write not supported\n");
diff --git a/drivers/mtd/chips/gen_probe.c b/drivers/mtd/chips/gen_probe.c
index 9b252d2e4a70..52d59d35091d 100644
--- a/drivers/mtd/chips/gen_probe.c
+++ b/drivers/mtd/chips/gen_probe.c
@@ -37,8 +37,15 @@ struct mtd_info *mtd_do_chip_probe(struct map_info *map, struct chip_probe *cp)
37 if (!mtd) 37 if (!mtd)
38 mtd = check_cmd_set(map, 0); /* Then the secondary */ 38 mtd = check_cmd_set(map, 0); /* Then the secondary */
39 39
40 if (mtd) 40 if (mtd) {
41 if (mtd->size > map->size) {
42 printk(KERN_WARNING "Reducing visibility of %ldKiB chip to %ldKiB\n",
43 (unsigned long)mtd->size >> 10,
44 (unsigned long)map->size >> 10);
45 mtd->size = map->size;
46 }
41 return mtd; 47 return mtd;
48 }
42 49
43 printk(KERN_WARNING"gen_probe: No supported Vendor Command Set found\n"); 50 printk(KERN_WARNING"gen_probe: No supported Vendor Command Set found\n");
44 51
@@ -100,7 +107,12 @@ static struct cfi_private *genprobe_ident_chips(struct map_info *map, struct chi
100 * Align bitmap storage size to full byte. 107 * Align bitmap storage size to full byte.
101 */ 108 */
102 max_chips = map->size >> cfi.chipshift; 109 max_chips = map->size >> cfi.chipshift;
103 mapsize = (max_chips / 8) + ((max_chips % 8) ? 1 : 0); 110 if (!max_chips) {
111 printk(KERN_WARNING "NOR chip too large to fit in mapping. Attempting to cope...\n");
112 max_chips = 1;
113 }
114
115 mapsize = (max_chips + BITS_PER_LONG-1) / BITS_PER_LONG;
104 chip_map = kmalloc(mapsize, GFP_KERNEL); 116 chip_map = kmalloc(mapsize, GFP_KERNEL);
105 if (!chip_map) { 117 if (!chip_map) {
106 printk(KERN_WARNING "%s: kmalloc failed for CFI chip map\n", map->name); 118 printk(KERN_WARNING "%s: kmalloc failed for CFI chip map\n", map->name);
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 6e9f880e2f98..16c02b5ccf7e 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -47,6 +47,11 @@ config MTD_MS02NV
47 accelerator. Say Y here if you have a DECstation 5000/2x0 or a 47 accelerator. Say Y here if you have a DECstation 5000/2x0 or a
48 DECsystem 5900 equipped with such a module. 48 DECsystem 5900 equipped with such a module.
49 49
50 If you want to compile this driver as a module ( = code which can be
51 inserted in and removed from the running kernel whenever you want),
52 say M here and read <file:Documentation/modules.txt>. The module will
53 be called ms02-nv.o.
54
50config MTD_DATAFLASH 55config MTD_DATAFLASH
51 tristate "Support for AT45xxx DataFlash" 56 tristate "Support for AT45xxx DataFlash"
52 depends on MTD && SPI_MASTER && EXPERIMENTAL 57 depends on MTD && SPI_MASTER && EXPERIMENTAL
diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c
index f54e4bf9b968..8ca04f4e03f0 100644
--- a/drivers/mtd/devices/block2mtd.c
+++ b/drivers/mtd/devices/block2mtd.c
@@ -4,7 +4,7 @@
4 * block2mtd.c - create an mtd from a block device 4 * block2mtd.c - create an mtd from a block device
5 * 5 *
6 * Copyright (C) 2001,2002 Simon Evans <spse@secret.org.uk> 6 * Copyright (C) 2001,2002 Simon Evans <spse@secret.org.uk>
7 * Copyright (C) 2004-2006 Jörn Engel <joern@wh.fh-wedel.de> 7 * Copyright (C) 2004-2006 Jörn Engel <joern@wh.fh-wedel.de>
8 * 8 *
9 * Licence: GPL 9 * Licence: GPL
10 */ 10 */
@@ -429,7 +429,8 @@ static inline void kill_final_newline(char *str)
429 429
430static int block2mtd_setup(const char *val, struct kernel_param *kp) 430static int block2mtd_setup(const char *val, struct kernel_param *kp)
431{ 431{
432 char buf[80+12], *str=buf; /* 80 for device, 12 for erase size */ 432 char buf[80+12]; /* 80 for device, 12 for erase size */
433 char *str = buf;
433 char *token[2]; 434 char *token[2];
434 char *name; 435 char *name;
435 size_t erase_size = PAGE_SIZE; 436 size_t erase_size = PAGE_SIZE;
@@ -441,7 +442,7 @@ static int block2mtd_setup(const char *val, struct kernel_param *kp)
441 strcpy(str, val); 442 strcpy(str, val);
442 kill_final_newline(str); 443 kill_final_newline(str);
443 444
444 for (i=0; i<2; i++) 445 for (i = 0; i < 2; i++)
445 token[i] = strsep(&str, ","); 446 token[i] = strsep(&str, ",");
446 447
447 if (str) 448 if (str)
@@ -460,8 +461,10 @@ static int block2mtd_setup(const char *val, struct kernel_param *kp)
460 461
461 if (token[1]) { 462 if (token[1]) {
462 ret = parse_num(&erase_size, token[1]); 463 ret = parse_num(&erase_size, token[1]);
463 if (ret) 464 if (ret) {
465 kfree(name);
464 parse_err("illegal erase size"); 466 parse_err("illegal erase size");
467 }
465 } 468 }
466 469
467 add_device(name, erase_size); 470 add_device(name, erase_size);
diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c
index 32f1d332f5b5..42ec08416a60 100644
--- a/drivers/mtd/devices/docprobe.c
+++ b/drivers/mtd/devices/docprobe.c
@@ -231,21 +231,21 @@ static inline int __init doccheck(void __iomem *potential, unsigned long physadr
231 231
232static int docfound; 232static int docfound;
233 233
234#ifdef CONFIG_DOC2000 234#ifdef CONFIG_MTD_DOC2000
235extern void DoC2k_init(struct mtd_info *); 235extern void DoC2k_init(struct mtd_info *);
236#define doc2k_initfunc (&DoC2k_init) 236#define doc2k_initfunc (&DoC2k_init)
237#else 237#else
238#define doc2k_initfunc NULL 238#define doc2k_initfunc NULL
239#endif 239#endif
240 240
241#ifdef CONFIG_DOC2001 241#ifdef CONFIG_MTD_DOC2001
242extern void DoCMil_init(struct mtd_info *); 242extern void DoCMil_init(struct mtd_info *);
243#define docmil_initfunc (&DoCMil_init) 243#define docmil_initfunc (&DoCMil_init)
244#else 244#else
245#define docmil_initfunc NULL 245#define docmil_initfunc NULL
246#endif 246#endif
247 247
248#ifdef CONFIG_DOC2001PLUS 248#ifdef CONFIG_MTD_DOC2001PLUS
249extern void DoCMilPlus_init(struct mtd_info *); 249extern void DoCMilPlus_init(struct mtd_info *);
250#define docmplus_initfunc (&DoCMilPlus_init) 250#define docmplus_initfunc (&DoCMilPlus_init)
251#else 251#else
diff --git a/drivers/mtd/devices/phram.c b/drivers/mtd/devices/phram.c
index 41af9693d880..e09e416667d3 100644
--- a/drivers/mtd/devices/phram.c
+++ b/drivers/mtd/devices/phram.c
@@ -1,8 +1,8 @@
1/** 1/**
2 * $Id: phram.c,v 1.16 2005/11/07 11:14:25 gleixner Exp $ 2 * $Id: phram.c,v 1.16 2005/11/07 11:14:25 gleixner Exp $
3 * 3 *
4 * Copyright (c) ???? Jochen Schäuble <psionic@psionic.de> 4 * Copyright (c) ???? Jochen Schäuble <psionic@psionic.de>
5 * Copyright (c) 2003-2004 Jörn Engel <joern@wh.fh-wedel.de> 5 * Copyright (c) 2003-2004 Jörn Engel <joern@wh.fh-wedel.de>
6 * 6 *
7 * Usage: 7 * Usage:
8 * 8 *
@@ -266,12 +266,16 @@ static int phram_setup(const char *val, struct kernel_param *kp)
266 return 0; 266 return 0;
267 267
268 ret = parse_num32(&start, token[1]); 268 ret = parse_num32(&start, token[1]);
269 if (ret) 269 if (ret) {
270 kfree(name);
270 parse_err("illegal start address\n"); 271 parse_err("illegal start address\n");
272 }
271 273
272 ret = parse_num32(&len, token[2]); 274 ret = parse_num32(&len, token[2]);
273 if (ret) 275 if (ret) {
276 kfree(name);
274 parse_err("illegal device length\n"); 277 parse_err("illegal device length\n");
278 }
275 279
276 register_device(name, start, len); 280 register_device(name, start, len);
277 281
@@ -296,5 +300,5 @@ module_init(init_phram);
296module_exit(cleanup_phram); 300module_exit(cleanup_phram);
297 301
298MODULE_LICENSE("GPL"); 302MODULE_LICENSE("GPL");
299MODULE_AUTHOR("Jörn Engel <joern@wh.fh-wedel.de>"); 303MODULE_AUTHOR("Jörn Engel <joern@wh.fh-wedel.de>");
300MODULE_DESCRIPTION("MTD driver for physical RAM"); 304MODULE_DESCRIPTION("MTD driver for physical RAM");
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 4e2bd37b3d8a..6bdaacc6d6f9 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -200,8 +200,8 @@ config MTD_TSUNAMI
200 Support for the flash chip on Tsunami TIG bus. 200 Support for the flash chip on Tsunami TIG bus.
201 201
202config MTD_LASAT 202config MTD_LASAT
203 tristate "Flash chips on LASAT board" 203 tristate "LASAT flash device"
204 depends on LASAT 204 depends on LASAT && MTD_CFI
205 help 205 help
206 Support for the flash chips on the Lasat 100 and 200 boards. 206 Support for the flash chips on the Lasat 100 and 200 boards.
207 207
diff --git a/drivers/mtd/maps/cfi_flagadm.c b/drivers/mtd/maps/cfi_flagadm.c
index fd0f0d3187de..92b5d883d7b0 100644
--- a/drivers/mtd/maps/cfi_flagadm.c
+++ b/drivers/mtd/maps/cfi_flagadm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is> 2 * Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is>
3 * 3 *
4 * $Id: cfi_flagadm.c,v 1.15 2005/11/07 11:14:26 gleixner Exp $ 4 * $Id: cfi_flagadm.c,v 1.15 2005/11/07 11:14:26 gleixner Exp $
5 * 5 *
@@ -135,5 +135,5 @@ module_exit(cleanup_flagadm);
135 135
136 136
137MODULE_LICENSE("GPL"); 137MODULE_LICENSE("GPL");
138MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>"); 138MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>");
139MODULE_DESCRIPTION("MTD map driver for Flaga digital module"); 139MODULE_DESCRIPTION("MTD map driver for Flaga digital module");
diff --git a/drivers/mtd/maps/dbox2-flash.c b/drivers/mtd/maps/dbox2-flash.c
index 652813cd6c2d..85c2a9e22b1e 100644
--- a/drivers/mtd/maps/dbox2-flash.c
+++ b/drivers/mtd/maps/dbox2-flash.c
@@ -122,5 +122,5 @@ module_exit(cleanup_dbox2_flash);
122 122
123 123
124MODULE_LICENSE("GPL"); 124MODULE_LICENSE("GPL");
125MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>, Bastian Blank <waldi@tuxbox.org>, Alexander Wild <wild@te-elektronik.com>"); 125MODULE_AUTHOR("Kári Davíðsson <kd@flaga.is>, Bastian Blank <waldi@tuxbox.org>, Alexander Wild <wild@te-elektronik.com>");
126MODULE_DESCRIPTION("MTD map driver for D-Box 2 board"); 126MODULE_DESCRIPTION("MTD map driver for D-Box 2 board");
diff --git a/drivers/mtd/maps/mtx-1_flash.c b/drivers/mtd/maps/mtx-1_flash.c
index d1e66e186746..5c25d4e552c6 100644
--- a/drivers/mtd/maps/mtx-1_flash.c
+++ b/drivers/mtd/maps/mtx-1_flash.c
@@ -4,7 +4,7 @@
4 * $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $ 4 * $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $
5 * 5 *
6 * (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz> 6 * (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz>
7 * (C) 2005 Jörn Engel <joern@wohnheim.fh-wedel.de> 7 * (C) 2005 Jörn Engel <joern@wohnheim.fh-wedel.de>
8 * 8 *
9 */ 9 */
10 10
diff --git a/drivers/mtd/maps/pcmciamtd.c b/drivers/mtd/maps/pcmciamtd.c
index d27f4129afd3..c861134cbc48 100644
--- a/drivers/mtd/maps/pcmciamtd.c
+++ b/drivers/mtd/maps/pcmciamtd.c
@@ -713,6 +713,7 @@ static void pcmciamtd_detach(struct pcmcia_device *link)
713 713
714 if(dev->mtd_info) { 714 if(dev->mtd_info) {
715 del_mtd_device(dev->mtd_info); 715 del_mtd_device(dev->mtd_info);
716 map_destroy(dev->mtd_info);
716 info("mtd%d: Removed", dev->mtd_info->index); 717 info("mtd%d: Removed", dev->mtd_info->index);
717 } 718 }
718 719
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 76ce9bd943aa..bc82f702aa3c 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -22,7 +22,6 @@
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/mach/flash.h>
26 25
27struct physmap_flash_info { 26struct physmap_flash_info {
28 struct mtd_info *mtd; 27 struct mtd_info *mtd;
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 9af840364a74..b7de90845c2d 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -251,6 +251,106 @@ concat_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
251} 251}
252 252
253static int 253static int
254concat_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
255 unsigned long count, loff_t to, size_t * retlen,
256 u_char *eccbuf, struct nand_oobinfo *oobsel)
257{
258 struct mtd_concat *concat = CONCAT(mtd);
259 struct kvec *vecs_copy;
260 unsigned long entry_low, entry_high;
261 size_t total_len = 0;
262 int i;
263 int err = -EINVAL;
264
265 if (!(mtd->flags & MTD_WRITEABLE))
266 return -EROFS;
267
268 *retlen = 0;
269
270 /* Calculate total length of data */
271 for (i = 0; i < count; i++)
272 total_len += vecs[i].iov_len;
273
274 /* Do not allow write past end of device */
275 if ((to + total_len) > mtd->size)
276 return -EINVAL;
277
278 /* Check alignment */
279 if (mtd->oobblock > 1)
280 if ((to % mtd->oobblock) || (total_len % mtd->oobblock))
281 return -EINVAL;
282
283 /* make a copy of vecs */
284 vecs_copy = kmalloc(sizeof(struct kvec) * count, GFP_KERNEL);
285 if (!vecs_copy)
286 return -ENOMEM;
287 memcpy(vecs_copy, vecs, sizeof(struct kvec) * count);
288
289 entry_low = 0;
290 for (i = 0; i < concat->num_subdev; i++) {
291 struct mtd_info *subdev = concat->subdev[i];
292 size_t size, wsize, retsize, old_iov_len;
293
294 if (to >= subdev->size) {
295 to -= subdev->size;
296 continue;
297 }
298
299 size = min(total_len, (size_t)(subdev->size - to));
300 wsize = size; /* store for future use */
301
302 entry_high = entry_low;
303 while (entry_high < count) {
304 if (size <= vecs_copy[entry_high].iov_len)
305 break;
306 size -= vecs_copy[entry_high++].iov_len;
307 }
308
309 old_iov_len = vecs_copy[entry_high].iov_len;
310 vecs_copy[entry_high].iov_len = size;
311
312 if (!(subdev->flags & MTD_WRITEABLE))
313 err = -EROFS;
314 else if (eccbuf)
315 err = subdev->writev_ecc(subdev, &vecs_copy[entry_low],
316 entry_high - entry_low + 1, to, &retsize,
317 eccbuf, oobsel);
318 else
319 err = subdev->writev(subdev, &vecs_copy[entry_low],
320 entry_high - entry_low + 1, to, &retsize);
321
322 vecs_copy[entry_high].iov_len = old_iov_len - size;
323 vecs_copy[entry_high].iov_base += size;
324
325 entry_low = entry_high;
326
327 if (err)
328 break;
329
330 *retlen += retsize;
331 total_len -= wsize;
332 if (concat->mtd.type == MTD_NANDFLASH && eccbuf)
333 eccbuf += mtd->oobavail * (wsize / mtd->oobblock);
334
335 if (total_len == 0)
336 break;
337
338 err = -EINVAL;
339 to = 0;
340 }
341
342 kfree(vecs_copy);
343 return err;
344}
345
346static int
347concat_writev(struct mtd_info *mtd, const struct kvec *vecs,
348 unsigned long count, loff_t to, size_t * retlen)
349{
350 return concat_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
351}
352
353static int
254concat_read_oob(struct mtd_info *mtd, loff_t from, size_t len, 354concat_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
255 size_t * retlen, u_char * buf) 355 size_t * retlen, u_char * buf)
256{ 356{
@@ -636,6 +736,58 @@ static void concat_resume(struct mtd_info *mtd)
636 } 736 }
637} 737}
638 738
739static int concat_block_isbad(struct mtd_info *mtd, loff_t ofs)
740{
741 struct mtd_concat *concat = CONCAT(mtd);
742 int i, res = 0;
743
744 if (!concat->subdev[0]->block_isbad)
745 return res;
746
747 if (ofs > mtd->size)
748 return -EINVAL;
749
750 for (i = 0; i < concat->num_subdev; i++) {
751 struct mtd_info *subdev = concat->subdev[i];
752
753 if (ofs >= subdev->size) {
754 ofs -= subdev->size;
755 continue;
756 }
757
758 res = subdev->block_isbad(subdev, ofs);
759 break;
760 }
761
762 return res;
763}
764
765static int concat_block_markbad(struct mtd_info *mtd, loff_t ofs)
766{
767 struct mtd_concat *concat = CONCAT(mtd);
768 int i, err = -EINVAL;
769
770 if (!concat->subdev[0]->block_markbad)
771 return 0;
772
773 if (ofs > mtd->size)
774 return -EINVAL;
775
776 for (i = 0; i < concat->num_subdev; i++) {
777 struct mtd_info *subdev = concat->subdev[i];
778
779 if (ofs >= subdev->size) {
780 ofs -= subdev->size;
781 continue;
782 }
783
784 err = subdev->block_markbad(subdev, ofs);
785 break;
786 }
787
788 return err;
789}
790
639/* 791/*
640 * This function constructs a virtual MTD device by concatenating 792 * This function constructs a virtual MTD device by concatenating
641 * num_devs MTD devices. A pointer to the new device object is 793 * num_devs MTD devices. A pointer to the new device object is
@@ -685,10 +837,18 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c
685 concat->mtd.read_ecc = concat_read_ecc; 837 concat->mtd.read_ecc = concat_read_ecc;
686 if (subdev[0]->write_ecc) 838 if (subdev[0]->write_ecc)
687 concat->mtd.write_ecc = concat_write_ecc; 839 concat->mtd.write_ecc = concat_write_ecc;
840 if (subdev[0]->writev)
841 concat->mtd.writev = concat_writev;
842 if (subdev[0]->writev_ecc)
843 concat->mtd.writev_ecc = concat_writev_ecc;
688 if (subdev[0]->read_oob) 844 if (subdev[0]->read_oob)
689 concat->mtd.read_oob = concat_read_oob; 845 concat->mtd.read_oob = concat_read_oob;
690 if (subdev[0]->write_oob) 846 if (subdev[0]->write_oob)
691 concat->mtd.write_oob = concat_write_oob; 847 concat->mtd.write_oob = concat_write_oob;
848 if (subdev[0]->block_isbad)
849 concat->mtd.block_isbad = concat_block_isbad;
850 if (subdev[0]->block_markbad)
851 concat->mtd.block_markbad = concat_block_markbad;
692 852
693 concat->subdev[0] = subdev[0]; 853 concat->subdev[0] = subdev[0];
694 854
@@ -734,14 +894,13 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c
734 894
735 } 895 }
736 896
897 if(concat->mtd.type == MTD_NANDFLASH)
898 memcpy(&concat->mtd.oobinfo, &subdev[0]->oobinfo,
899 sizeof(struct nand_oobinfo));
900
737 concat->num_subdev = num_devs; 901 concat->num_subdev = num_devs;
738 concat->mtd.name = name; 902 concat->mtd.name = name;
739 903
740 /*
741 * NOTE: for now, we do not provide any readv()/writev() methods
742 * because they are messy to implement and they are not
743 * used to a great extent anyway.
744 */
745 concat->mtd.erase = concat_erase; 904 concat->mtd.erase = concat_erase;
746 concat->mtd.read = concat_read; 905 concat->mtd.read = concat_read;
747 concat->mtd.write = concat_write; 906 concat->mtd.write = concat_write;
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 99395911d26f..29ed5abe70c4 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -400,6 +400,7 @@ int add_mtd_partitions(struct mtd_info *master,
400 slave->mtd.size = parts[i].size; 400 slave->mtd.size = parts[i].size;
401 slave->mtd.oobblock = master->oobblock; 401 slave->mtd.oobblock = master->oobblock;
402 slave->mtd.oobsize = master->oobsize; 402 slave->mtd.oobsize = master->oobsize;
403 slave->mtd.oobavail = master->oobavail;
403 slave->mtd.ecctype = master->ecctype; 404 slave->mtd.ecctype = master->ecctype;
404 slave->mtd.eccsize = master->eccsize; 405 slave->mtd.eccsize = master->eccsize;
405 406
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index b4a7086b219c..b1f807980b79 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -192,12 +192,21 @@ config MTD_NAND_SHARPSL
192config MTD_NAND_CS553X 192config MTD_NAND_CS553X
193 tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" 193 tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
194 depends on MTD_NAND && X86_PC && PCI 194 depends on MTD_NAND && X86_PC && PCI
195 195 help
196 The CS553x companion chips for the AMD Geode processor
197 include NAND flash controllers with built-in hardware ECC
198 capabilities; enabling this option will allow you to use
199 these. The driver will check the MSRs to verify that the
200 controller is enabled for NAND, and currently requires that
201 the controller be in MMIO mode.
202
203 If you say "m", the module will be called "cs553x_nand.ko".
204
196config MTD_NAND_NANDSIM 205config MTD_NAND_NANDSIM
197 tristate "Support for NAND Flash Simulator" 206 tristate "Support for NAND Flash Simulator"
198 depends on MTD_NAND && MTD_PARTITIONS 207 depends on MTD_NAND && MTD_PARTITIONS
199 help 208 help
200 The simulator may simulate verious NAND flash chips for the 209 The simulator may simulate various NAND flash chips for the
201 MTD nand layer. 210 MTD nand layer.
202 211
203endmenu 212endmenu
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index bde3550910a2..d9a0143e1d3a 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -14,6 +14,7 @@
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/interrupt.h>
17#include <linux/mtd/mtd.h> 18#include <linux/mtd/mtd.h>
18#include <linux/mtd/nand.h> 19#include <linux/mtd/nand.h>
19#include <linux/mtd/partitions.h> 20#include <linux/mtd/partitions.h>
@@ -38,22 +39,20 @@
38 */ 39 */
39static struct mtd_info *au1550_mtd = NULL; 40static struct mtd_info *au1550_mtd = NULL;
40static void __iomem *p_nand; 41static void __iomem *p_nand;
41static int nand_width = 1; /* default x8*/ 42static int nand_width = 1; /* default x8 */
42 43
43/* 44/*
44 * Define partitions for flash device 45 * Define partitions for flash device
45 */ 46 */
46static const struct mtd_partition partition_info[] = { 47static const struct mtd_partition partition_info[] = {
47 { 48 {
48 .name = "NAND FS 0", 49 .name = "NAND FS 0",
49 .offset = 0, 50 .offset = 0,
50 .size = 8*1024*1024 51 .size = 8 * 1024 * 1024},
51 },
52 { 52 {
53 .name = "NAND FS 1", 53 .name = "NAND FS 1",
54 .offset = MTDPART_OFS_APPEND, 54 .offset = MTDPART_OFS_APPEND,
55 .size = MTDPART_SIZ_FULL 55 .size = MTDPART_SIZ_FULL}
56 }
57}; 56};
58 57
59/** 58/**
@@ -157,7 +156,7 @@ static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
157 int i; 156 int i;
158 struct nand_chip *this = mtd->priv; 157 struct nand_chip *this = mtd->priv;
159 158
160 for (i=0; i<len; i++) { 159 for (i = 0; i < len; i++) {
161 writeb(buf[i], this->IO_ADDR_W); 160 writeb(buf[i], this->IO_ADDR_W);
162 au_sync(); 161 au_sync();
163 } 162 }
@@ -176,7 +175,7 @@ static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len)
176 int i; 175 int i;
177 struct nand_chip *this = mtd->priv; 176 struct nand_chip *this = mtd->priv;
178 177
179 for (i=0; i<len; i++) { 178 for (i = 0; i < len; i++) {
180 buf[i] = readb(this->IO_ADDR_R); 179 buf[i] = readb(this->IO_ADDR_R);
181 au_sync(); 180 au_sync();
182 } 181 }
@@ -195,7 +194,7 @@ static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
195 int i; 194 int i;
196 struct nand_chip *this = mtd->priv; 195 struct nand_chip *this = mtd->priv;
197 196
198 for (i=0; i<len; i++) { 197 for (i = 0; i < len; i++) {
199 if (buf[i] != readb(this->IO_ADDR_R)) 198 if (buf[i] != readb(this->IO_ADDR_R))
200 return -EFAULT; 199 return -EFAULT;
201 au_sync(); 200 au_sync();
@@ -219,7 +218,7 @@ static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
219 u16 *p = (u16 *) buf; 218 u16 *p = (u16 *) buf;
220 len >>= 1; 219 len >>= 1;
221 220
222 for (i=0; i<len; i++) { 221 for (i = 0; i < len; i++) {
223 writew(p[i], this->IO_ADDR_W); 222 writew(p[i], this->IO_ADDR_W);
224 au_sync(); 223 au_sync();
225 } 224 }
@@ -241,7 +240,7 @@ static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
241 u16 *p = (u16 *) buf; 240 u16 *p = (u16 *) buf;
242 len >>= 1; 241 len >>= 1;
243 242
244 for (i=0; i<len; i++) { 243 for (i = 0; i < len; i++) {
245 p[i] = readw(this->IO_ADDR_R); 244 p[i] = readw(this->IO_ADDR_R);
246 au_sync(); 245 au_sync();
247 } 246 }
@@ -262,7 +261,7 @@ static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
262 u16 *p = (u16 *) buf; 261 u16 *p = (u16 *) buf;
263 len >>= 1; 262 len >>= 1;
264 263
265 for (i=0; i<len; i++) { 264 for (i = 0; i < len; i++) {
266 if (p[i] != readw(this->IO_ADDR_R)) 265 if (p[i] != readw(this->IO_ADDR_R))
267 return -EFAULT; 266 return -EFAULT;
268 au_sync(); 267 au_sync();
@@ -275,27 +274,35 @@ static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
275{ 274{
276 register struct nand_chip *this = mtd->priv; 275 register struct nand_chip *this = mtd->priv;
277 276
278 switch(cmd){ 277 switch (cmd) {
278
279 case NAND_CTL_SETCLE:
280 this->IO_ADDR_W = p_nand + MEM_STNAND_CMD;
281 break;
279 282
280 case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break; 283 case NAND_CTL_CLRCLE:
281 case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break; 284 this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
285 break;
286
287 case NAND_CTL_SETALE:
288 this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR;
289 break;
282 290
283 case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
284 case NAND_CTL_CLRALE: 291 case NAND_CTL_CLRALE:
285 this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; 292 this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
286 /* FIXME: Nobody knows why this is neccecary, 293 /* FIXME: Nobody knows why this is necessary,
287 * but it works only that way */ 294 * but it works only that way */
288 udelay(1); 295 udelay(1);
289 break; 296 break;
290 297
291 case NAND_CTL_SETNCE: 298 case NAND_CTL_SETNCE:
292 /* assert (force assert) chip enable */ 299 /* assert (force assert) chip enable */
293 au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break; 300 au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL);
294 break; 301 break;
295 302
296 case NAND_CTL_CLRNCE: 303 case NAND_CTL_CLRNCE:
297 /* deassert chip enable */ 304 /* deassert chip enable */
298 au_writel(0, MEM_STNDCTL); break; 305 au_writel(0, MEM_STNDCTL);
299 break; 306 break;
300 } 307 }
301 308
@@ -312,69 +319,200 @@ int au1550_device_ready(struct mtd_info *mtd)
312 return ret; 319 return ret;
313} 320}
314 321
322/**
323 * au1550_select_chip - control -CE line
324 * Forbid driving -CE manually permitting the NAND controller to do this.
325 * Keeping -CE asserted during the whole sector reads interferes with the
326 * NOR flash and PCMCIA drivers as it causes contention on the static bus.
327 * We only have to hold -CE low for the NAND read commands since the flash
328 * chip needs it to be asserted during chip not ready time but the NAND
329 * controller keeps it released.
330 *
331 * @mtd: MTD device structure
332 * @chip: chipnumber to select, -1 for deselect
333 */
334static void au1550_select_chip(struct mtd_info *mtd, int chip)
335{
336}
337
338/**
339 * au1550_command - Send command to NAND device
340 * @mtd: MTD device structure
341 * @command: the command to be sent
342 * @column: the column address for this command, -1 if none
343 * @page_addr: the page address for this command, -1 if none
344 */
345static void au1550_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
346{
347 register struct nand_chip *this = mtd->priv;
348 int ce_override = 0, i;
349 ulong flags;
350
351 /* Begin command latch cycle */
352 this->hwcontrol(mtd, NAND_CTL_SETCLE);
353 /*
354 * Write out the command to the device.
355 */
356 if (command == NAND_CMD_SEQIN) {
357 int readcmd;
358
359 if (column >= mtd->oobblock) {
360 /* OOB area */
361 column -= mtd->oobblock;
362 readcmd = NAND_CMD_READOOB;
363 } else if (column < 256) {
364 /* First 256 bytes --> READ0 */
365 readcmd = NAND_CMD_READ0;
366 } else {
367 column -= 256;
368 readcmd = NAND_CMD_READ1;
369 }
370 this->write_byte(mtd, readcmd);
371 }
372 this->write_byte(mtd, command);
373
374 /* Set ALE and clear CLE to start address cycle */
375 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
376
377 if (column != -1 || page_addr != -1) {
378 this->hwcontrol(mtd, NAND_CTL_SETALE);
379
380 /* Serially input address */
381 if (column != -1) {
382 /* Adjust columns for 16 bit buswidth */
383 if (this->options & NAND_BUSWIDTH_16)
384 column >>= 1;
385 this->write_byte(mtd, column);
386 }
387 if (page_addr != -1) {
388 this->write_byte(mtd, (u8)(page_addr & 0xff));
389
390 if (command == NAND_CMD_READ0 ||
391 command == NAND_CMD_READ1 ||
392 command == NAND_CMD_READOOB) {
393 /*
394 * NAND controller will release -CE after
395 * the last address byte is written, so we'll
396 * have to forcibly assert it. No interrupts
397 * are allowed while we do this as we don't
398 * want the NOR flash or PCMCIA drivers to
399 * steal our precious bytes of data...
400 */
401 ce_override = 1;
402 local_irq_save(flags);
403 this->hwcontrol(mtd, NAND_CTL_SETNCE);
404 }
405
406 this->write_byte(mtd, (u8)(page_addr >> 8));
407
408 /* One more address cycle for devices > 32MiB */
409 if (this->chipsize > (32 << 20))
410 this->write_byte(mtd, (u8)((page_addr >> 16) & 0x0f));
411 }
412 /* Latch in address */
413 this->hwcontrol(mtd, NAND_CTL_CLRALE);
414 }
415
416 /*
417 * Program and erase have their own busy handlers.
418 * Status and sequential in need no delay.
419 */
420 switch (command) {
421
422 case NAND_CMD_PAGEPROG:
423 case NAND_CMD_ERASE1:
424 case NAND_CMD_ERASE2:
425 case NAND_CMD_SEQIN:
426 case NAND_CMD_STATUS:
427 return;
428
429 case NAND_CMD_RESET:
430 break;
431
432 case NAND_CMD_READ0:
433 case NAND_CMD_READ1:
434 case NAND_CMD_READOOB:
435 /* Check if we're really driving -CE low (just in case) */
436 if (unlikely(!ce_override))
437 break;
438
439 /* Apply a short delay always to ensure that we do wait tWB. */
440 ndelay(100);
441 /* Wait for a chip to become ready... */
442 for (i = this->chip_delay; !this->dev_ready(mtd) && i > 0; --i)
443 udelay(1);
444
445 /* Release -CE and re-enable interrupts. */
446 this->hwcontrol(mtd, NAND_CTL_CLRNCE);
447 local_irq_restore(flags);
448 return;
449 }
450 /* Apply this short delay always to ensure that we do wait tWB. */
451 ndelay(100);
452
453 while(!this->dev_ready(mtd));
454}
455
456
315/* 457/*
316 * Main initialization routine 458 * Main initialization routine
317 */ 459 */
318int __init au1xxx_nand_init (void) 460static int __init au1xxx_nand_init(void)
319{ 461{
320 struct nand_chip *this; 462 struct nand_chip *this;
321 u16 boot_swapboot = 0; /* default value */ 463 u16 boot_swapboot = 0; /* default value */
322 int retval; 464 int retval;
323 u32 mem_staddr; 465 u32 mem_staddr;
324 u32 nand_phys; 466 u32 nand_phys;
325 467
326 /* Allocate memory for MTD device structure and private data */ 468 /* Allocate memory for MTD device structure and private data */
327 au1550_mtd = kmalloc (sizeof(struct mtd_info) + 469 au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
328 sizeof (struct nand_chip), GFP_KERNEL);
329 if (!au1550_mtd) { 470 if (!au1550_mtd) {
330 printk ("Unable to allocate NAND MTD dev structure.\n"); 471 printk("Unable to allocate NAND MTD dev structure.\n");
331 return -ENOMEM; 472 return -ENOMEM;
332 } 473 }
333 474
334 /* Get pointer to private data */ 475 /* Get pointer to private data */
335 this = (struct nand_chip *) (&au1550_mtd[1]); 476 this = (struct nand_chip *)(&au1550_mtd[1]);
336 477
337 /* Initialize structures */ 478 /* Initialize structures */
338 memset((char *) au1550_mtd, 0, sizeof(struct mtd_info)); 479 memset(au1550_mtd, 0, sizeof(struct mtd_info));
339 memset((char *) this, 0, sizeof(struct nand_chip)); 480 memset(this, 0, sizeof(struct nand_chip));
340 481
341 /* Link the private data with the MTD structure */ 482 /* Link the private data with the MTD structure */
342 au1550_mtd->priv = this; 483 au1550_mtd->priv = this;
484 au1550_mtd->owner = THIS_MODULE;
343 485
344 486
345 /* disable interrupts */ 487 /* MEM_STNDCTL: disable ints, disable nand boot */
346 au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL); 488 au_writel(0, MEM_STNDCTL);
347
348 /* disable NAND boot */
349 au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
350 489
351#ifdef CONFIG_MIPS_PB1550 490#ifdef CONFIG_MIPS_PB1550
352 /* set gpio206 high */ 491 /* set gpio206 high */
353 au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR); 492 au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
354 493
355 boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) | 494 boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1);
356 ((bcsr->status >> 6) & 0x1);
357 switch (boot_swapboot) { 495 switch (boot_swapboot) {
358 case 0: 496 case 0:
359 case 2: 497 case 2:
360 case 8: 498 case 8:
361 case 0xC: 499 case 0xC:
362 case 0xD: 500 case 0xD:
363 /* x16 NAND Flash */ 501 /* x16 NAND Flash */
364 nand_width = 0; 502 nand_width = 0;
365 break; 503 break;
366 case 1: 504 case 1:
367 case 9: 505 case 9:
368 case 3: 506 case 3:
369 case 0xE: 507 case 0xE:
370 case 0xF: 508 case 0xF:
371 /* x8 NAND Flash */ 509 /* x8 NAND Flash */
372 nand_width = 1; 510 nand_width = 1;
373 break; 511 break;
374 default: 512 default:
375 printk("Pb1550 NAND: bad boot:swap\n"); 513 printk("Pb1550 NAND: bad boot:swap\n");
376 retval = -EINVAL; 514 retval = -EINVAL;
377 goto outmem; 515 goto outmem;
378 } 516 }
379#endif 517#endif
380 518
@@ -424,18 +562,20 @@ int __init au1xxx_nand_init (void)
424 562
425 /* make controller and MTD agree */ 563 /* make controller and MTD agree */
426 if (NAND_CS == 0) 564 if (NAND_CS == 0)
427 nand_width = au_readl(MEM_STCFG0) & (1<<22); 565 nand_width = au_readl(MEM_STCFG0) & (1 << 22);
428 if (NAND_CS == 1) 566 if (NAND_CS == 1)
429 nand_width = au_readl(MEM_STCFG1) & (1<<22); 567 nand_width = au_readl(MEM_STCFG1) & (1 << 22);
430 if (NAND_CS == 2) 568 if (NAND_CS == 2)
431 nand_width = au_readl(MEM_STCFG2) & (1<<22); 569 nand_width = au_readl(MEM_STCFG2) & (1 << 22);
432 if (NAND_CS == 3) 570 if (NAND_CS == 3)
433 nand_width = au_readl(MEM_STCFG3) & (1<<22); 571 nand_width = au_readl(MEM_STCFG3) & (1 << 22);
434
435 572
436 /* Set address of hardware control function */ 573 /* Set address of hardware control function */
437 this->hwcontrol = au1550_hwcontrol; 574 this->hwcontrol = au1550_hwcontrol;
438 this->dev_ready = au1550_device_ready; 575 this->dev_ready = au1550_device_ready;
576 this->select_chip = au1550_select_chip;
577 this->cmdfunc = au1550_command;
578
439 /* 30 us command delay time */ 579 /* 30 us command delay time */
440 this->chip_delay = 30; 580 this->chip_delay = 30;
441 this->eccmode = NAND_ECC_SOFT; 581 this->eccmode = NAND_ECC_SOFT;
@@ -454,7 +594,7 @@ int __init au1xxx_nand_init (void)
454 this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf; 594 this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
455 595
456 /* Scan to find existence of the device */ 596 /* Scan to find existence of the device */
457 if (nand_scan (au1550_mtd, 1)) { 597 if (nand_scan(au1550_mtd, 1)) {
458 retval = -ENXIO; 598 retval = -ENXIO;
459 goto outio; 599 goto outio;
460 } 600 }
@@ -465,10 +605,10 @@ int __init au1xxx_nand_init (void)
465 return 0; 605 return 0;
466 606
467 outio: 607 outio:
468 iounmap ((void *)p_nand); 608 iounmap((void *)p_nand);
469 609
470 outmem: 610 outmem:
471 kfree (au1550_mtd); 611 kfree(au1550_mtd);
472 return retval; 612 return retval;
473} 613}
474 614
@@ -477,22 +617,21 @@ module_init(au1xxx_nand_init);
477/* 617/*
478 * Clean up routine 618 * Clean up routine
479 */ 619 */
480#ifdef MODULE 620static void __exit au1550_cleanup(void)
481static void __exit au1550_cleanup (void)
482{ 621{
483 struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1]; 622 struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1];
484 623
485 /* Release resources, unregister device */ 624 /* Release resources, unregister device */
486 nand_release (au1550_mtd); 625 nand_release(au1550_mtd);
487 626
488 /* Free the MTD device structure */ 627 /* Free the MTD device structure */
489 kfree (au1550_mtd); 628 kfree(au1550_mtd);
490 629
491 /* Unmap */ 630 /* Unmap */
492 iounmap ((void *)p_nand); 631 iounmap((void *)p_nand);
493} 632}
633
494module_exit(au1550_cleanup); 634module_exit(au1550_cleanup);
495#endif
496 635
497MODULE_LICENSE("GPL"); 636MODULE_LICENSE("GPL");
498MODULE_AUTHOR("Embedded Edge, LLC"); 637MODULE_AUTHOR("Embedded Edge, LLC");
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
index a3c7fea404d0..43b296040d7f 100644
--- a/drivers/mtd/nand/autcpu12.c
+++ b/drivers/mtd/nand/autcpu12.c
@@ -47,7 +47,7 @@ static int autcpu12_io_base = CS89712_VIRT_BASE;
47static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC; 47static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
48static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET; 48static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
49static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET; 49static int autcpu12_pedr = AUTCPU12_SMC_PORT_OFFSET;
50static void __iomem * autcpu12_fio_base; 50static void __iomem *autcpu12_fio_base;
51 51
52/* 52/*
53 * Define partitions for flash devices 53 * Define partitions for flash devices
@@ -95,10 +95,10 @@ static struct mtd_partition partition_info128k[] = {
95/* 95/*
96 * hardware specific access to control-lines 96 * hardware specific access to control-lines
97*/ 97*/
98
98static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd) 99static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
99{ 100{
100 101 switch (cmd) {
101 switch(cmd){
102 102
103 case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_CLE; break; 103 case NAND_CTL_SETCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) |= AUTCPU12_SMC_CLE; break;
104 case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break; 104 case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) &= ~AUTCPU12_SMC_CLE; break;
@@ -117,44 +117,44 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd)
117int autcpu12_device_ready(struct mtd_info *mtd) 117int autcpu12_device_ready(struct mtd_info *mtd)
118{ 118{
119 119
120 return ( (*(volatile unsigned char *) (autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0; 120 return ((*(volatile unsigned char *)(autcpu12_io_base + autcpu12_pedr)) & AUTCPU12_SMC_RDY) ? 1 : 0;
121 121
122} 122}
123 123
124/* 124/*
125 * Main initialization routine 125 * Main initialization routine
126 */ 126 */
127int __init autcpu12_init (void) 127static int __init autcpu12_init(void)
128{ 128{
129 struct nand_chip *this; 129 struct nand_chip *this;
130 int err = 0; 130 int err = 0;
131 131
132 /* Allocate memory for MTD device structure and private data */ 132 /* Allocate memory for MTD device structure and private data */
133 autcpu12_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), 133 autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
134 GFP_KERNEL);
135 if (!autcpu12_mtd) { 134 if (!autcpu12_mtd) {
136 printk ("Unable to allocate AUTCPU12 NAND MTD device structure.\n"); 135 printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
137 err = -ENOMEM; 136 err = -ENOMEM;
138 goto out; 137 goto out;
139 } 138 }
140 139
141 /* map physical adress */ 140 /* map physical adress */
142 autcpu12_fio_base = ioremap(autcpu12_fio_pbase,SZ_1K); 141 autcpu12_fio_base = ioremap(autcpu12_fio_pbase, SZ_1K);
143 if(!autcpu12_fio_base){ 142 if (!autcpu12_fio_base) {
144 printk("Ioremap autcpu12 SmartMedia Card failed\n"); 143 printk("Ioremap autcpu12 SmartMedia Card failed\n");
145 err = -EIO; 144 err = -EIO;
146 goto out_mtd; 145 goto out_mtd;
147 } 146 }
148 147
149 /* Get pointer to private data */ 148 /* Get pointer to private data */
150 this = (struct nand_chip *) (&autcpu12_mtd[1]); 149 this = (struct nand_chip *)(&autcpu12_mtd[1]);
151 150
152 /* Initialize structures */ 151 /* Initialize structures */
153 memset((char *) autcpu12_mtd, 0, sizeof(struct mtd_info)); 152 memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
154 memset((char *) this, 0, sizeof(struct nand_chip)); 153 memset(this, 0, sizeof(struct nand_chip));
155 154
156 /* Link the private data with the MTD structure */ 155 /* Link the private data with the MTD structure */
157 autcpu12_mtd->priv = this; 156 autcpu12_mtd->priv = this;
157 autcpu12_mtd->owner = THIS_MODULE;
158 158
159 /* Set address of NAND IO lines */ 159 /* Set address of NAND IO lines */
160 this->IO_ADDR_R = autcpu12_fio_base; 160 this->IO_ADDR_R = autcpu12_fio_base;
@@ -167,35 +167,34 @@ int __init autcpu12_init (void)
167 167
168 /* Enable the following for a flash based bad block table */ 168 /* Enable the following for a flash based bad block table */
169 /* 169 /*
170 this->options = NAND_USE_FLASH_BBT; 170 this->options = NAND_USE_FLASH_BBT;
171 */ 171 */
172 this->options = NAND_USE_FLASH_BBT; 172 this->options = NAND_USE_FLASH_BBT;
173 173
174 /* Scan to find existance of the device */ 174 /* Scan to find existance of the device */
175 if (nand_scan (autcpu12_mtd, 1)) { 175 if (nand_scan(autcpu12_mtd, 1)) {
176 err = -ENXIO; 176 err = -ENXIO;
177 goto out_ior; 177 goto out_ior;
178 } 178 }
179 179
180 /* Register the partitions */ 180 /* Register the partitions */
181 switch(autcpu12_mtd->size){ 181 switch (autcpu12_mtd->size) {
182 case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break; 182 case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break;
183 case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break; 183 case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break;
184 case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break; 184 case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break;
185 case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break; 185 case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break;
186 default: { 186 default:
187 printk ("Unsupported SmartMedia device\n"); 187 printk("Unsupported SmartMedia device\n");
188 err = -ENXIO; 188 err = -ENXIO;
189 goto out_ior; 189 goto out_ior;
190 }
191 } 190 }
192 goto out; 191 goto out;
193 192
194out_ior: 193 out_ior:
195 iounmap((void *)autcpu12_fio_base); 194 iounmap((void *)autcpu12_fio_base);
196out_mtd: 195 out_mtd:
197 kfree (autcpu12_mtd); 196 kfree(autcpu12_mtd);
198out: 197 out:
199 return err; 198 return err;
200} 199}
201 200
@@ -204,20 +203,19 @@ module_init(autcpu12_init);
204/* 203/*
205 * Clean up routine 204 * Clean up routine
206 */ 205 */
207#ifdef MODULE 206static void __exit autcpu12_cleanup(void)
208static void __exit autcpu12_cleanup (void)
209{ 207{
210 /* Release resources, unregister device */ 208 /* Release resources, unregister device */
211 nand_release (autcpu12_mtd); 209 nand_release(autcpu12_mtd);
212 210
213 /* unmap physical adress */ 211 /* unmap physical adress */
214 iounmap((void *)autcpu12_fio_base); 212 iounmap((void *)autcpu12_fio_base);
215 213
216 /* Free the MTD device structure */ 214 /* Free the MTD device structure */
217 kfree (autcpu12_mtd); 215 kfree(autcpu12_mtd);
218} 216}
217
219module_exit(autcpu12_cleanup); 218module_exit(autcpu12_cleanup);
220#endif
221 219
222MODULE_LICENSE("GPL"); 220MODULE_LICENSE("GPL");
223MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); 221MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
diff --git a/drivers/mtd/nand/cs553x_nand.c b/drivers/mtd/nand/cs553x_nand.c
index 91207a45ad55..bf251253ea1f 100644
--- a/drivers/mtd/nand/cs553x_nand.c
+++ b/drivers/mtd/nand/cs553x_nand.c
@@ -4,6 +4,7 @@
4 * (C) 2005, 2006 Red Hat Inc. 4 * (C) 2005, 2006 Red Hat Inc.
5 * 5 *
6 * Author: David Woodhouse <dwmw2@infradead.org> 6 * Author: David Woodhouse <dwmw2@infradead.org>
7 * Tom Sylla <tom.sylla@amd.com>
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -22,6 +23,7 @@
22#include <linux/pci.h> 23#include <linux/pci.h>
23#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
24#include <linux/mtd/nand.h> 25#include <linux/mtd/nand.h>
26#include <linux/mtd/nand_ecc.h>
25#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
26 28
27#include <asm/msr.h> 29#include <asm/msr.h>
@@ -48,7 +50,7 @@
48 50
49/* Pin function selection MSR (IDE vs. flash on the IDE pins) */ 51/* Pin function selection MSR (IDE vs. flash on the IDE pins) */
50#define MSR_DIVIL_BALL_OPTS 0x51400015 52#define MSR_DIVIL_BALL_OPTS 0x51400015
51#define PIN_OPT_IDE (1<<0) /* 0 for flash, 1 for IDE */ 53#define PIN_OPT_IDE (1<<0) /* 0 for flash, 1 for IDE */
52 54
53/* Registers within the NAND flash controller BAR -- memory mapped */ 55/* Registers within the NAND flash controller BAR -- memory mapped */
54#define MM_NAND_DATA 0x00 /* 0 to 0x7ff, in fact */ 56#define MM_NAND_DATA 0x00 /* 0 to 0x7ff, in fact */
@@ -87,11 +89,34 @@
87#define CS_NAND_ECC_CLRECC (1<<1) 89#define CS_NAND_ECC_CLRECC (1<<1)
88#define CS_NAND_ECC_ENECC (1<<0) 90#define CS_NAND_ECC_ENECC (1<<0)
89 91
92static void cs553x_read_buf(struct mtd_info *mtd, u_char *buf, int len)
93{
94 struct nand_chip *this = mtd->priv;
95
96 while (unlikely(len > 0x800)) {
97 memcpy_fromio(buf, this->IO_ADDR_R, 0x800);
98 buf += 0x800;
99 len -= 0x800;
100 }
101 memcpy_fromio(buf, this->IO_ADDR_R, len);
102}
103
104static void cs553x_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
105{
106 struct nand_chip *this = mtd->priv;
107
108 while (unlikely(len > 0x800)) {
109 memcpy_toio(this->IO_ADDR_R, buf, 0x800);
110 buf += 0x800;
111 len -= 0x800;
112 }
113 memcpy_toio(this->IO_ADDR_R, buf, len);
114}
115
90static unsigned char cs553x_read_byte(struct mtd_info *mtd) 116static unsigned char cs553x_read_byte(struct mtd_info *mtd)
91{ 117{
92 struct nand_chip *this = mtd->priv; 118 struct nand_chip *this = mtd->priv;
93 unsigned char foo = readb(this->IO_ADDR_R); 119 return readb(this->IO_ADDR_R);
94 return foo;
95} 120}
96 121
97static void cs553x_write_byte(struct mtd_info *mtd, u_char byte) 122static void cs553x_write_byte(struct mtd_info *mtd, u_char byte)
@@ -103,52 +128,67 @@ static void cs553x_write_byte(struct mtd_info *mtd, u_char byte)
103 udelay(1); 128 udelay(1);
104 i--; 129 i--;
105 } 130 }
106 writeb(byte, this->IO_ADDR_W+0x801); 131 writeb(byte, this->IO_ADDR_W + 0x801);
107} 132}
108 133
109static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd) 134static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
110{ 135{
111 struct nand_chip *this = mtd->priv; 136 struct nand_chip *this = mtd->priv;
112 void __iomem *mmio_base = this->IO_ADDR_R; 137 void __iomem *mmio_base = this->IO_ADDR_R;
138 unsigned char ctl;
113 139
114 uint8_t old = readb(mmio_base + MM_NAND_CTL); 140 switch (cmd) {
115
116 switch(cmd) {
117 case NAND_CTL_SETCLE: 141 case NAND_CTL_SETCLE:
118 old |= CS_NAND_CTL_CLE; 142 ctl = CS_NAND_CTL_CLE;
119 break; 143 break;
120 144
121 case NAND_CTL_CLRCLE: 145 case NAND_CTL_CLRCLE:
122 old &= ~CS_NAND_CTL_CLE;
123 break;
124
125 case NAND_CTL_SETALE:
126 old |= CS_NAND_CTL_ALE;
127 break;
128
129 case NAND_CTL_CLRALE: 146 case NAND_CTL_CLRALE:
130 old &= ~CS_NAND_CTL_ALE; 147 case NAND_CTL_SETNCE:
148 ctl = 0;
131 break; 149 break;
132 150
133 case NAND_CTL_SETNCE: 151 case NAND_CTL_SETALE:
134 old &= ~CS_NAND_CTL_CE; 152 ctl = CS_NAND_CTL_ALE;
135 break; 153 break;
136 154
155 default:
137 case NAND_CTL_CLRNCE: 156 case NAND_CTL_CLRNCE:
138 old |= CS_NAND_CTL_CE; 157 ctl = CS_NAND_CTL_CE;
139 break; 158 break;
140 } 159 }
141 writeb(old, mmio_base + MM_NAND_CTL); 160 writeb(ctl, mmio_base + MM_NAND_CTL);
142} 161}
143 162
144
145static int cs553x_device_ready(struct mtd_info *mtd) 163static int cs553x_device_ready(struct mtd_info *mtd)
146{ 164{
147 struct nand_chip *this = mtd->priv; 165 struct nand_chip *this = mtd->priv;
148 void __iomem *mmio_base = this->IO_ADDR_R; 166 void __iomem *mmio_base = this->IO_ADDR_R;
149 unsigned char foo = readb(mmio_base + MM_NAND_STS); 167 unsigned char foo = readb(mmio_base + MM_NAND_STS);
150 168
151 return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY); 169 return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY);
170}
171
172static void cs_enable_hwecc(struct mtd_info *mtd, int mode)
173{
174 struct nand_chip *this = mtd->priv;
175 void __iomem *mmio_base = this->IO_ADDR_R;
176
177 writeb(0x07, mmio_base + MM_NAND_ECC_CTL);
178}
179
180static int cs_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
181{
182 uint32_t ecc;
183 struct nand_chip *this = mtd->priv;
184 void __iomem *mmio_base = this->IO_ADDR_R;
185
186 ecc = readl(mmio_base + MM_NAND_STS);
187
188 ecc_code[1] = ecc >> 8;
189 ecc_code[0] = ecc >> 16;
190 ecc_code[2] = ecc >> 24;
191 return 0;
152} 192}
153 193
154static struct mtd_info *cs553x_mtd[4]; 194static struct mtd_info *cs553x_mtd[4];
@@ -167,7 +207,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
167 } 207 }
168 208
169 /* Allocate memory for MTD device structure and private data */ 209 /* Allocate memory for MTD device structure and private data */
170 new_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL); 210 new_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
171 if (!new_mtd) { 211 if (!new_mtd) {
172 printk(KERN_WARNING "Unable to allocate CS553X NAND MTD device structure.\n"); 212 printk(KERN_WARNING "Unable to allocate CS553X NAND MTD device structure.\n");
173 err = -ENOMEM; 213 err = -ENOMEM;
@@ -175,14 +215,15 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
175 } 215 }
176 216
177 /* Get pointer to private data */ 217 /* Get pointer to private data */
178 this = (struct nand_chip *) (&new_mtd[1]); 218 this = (struct nand_chip *)(&new_mtd[1]);
179 219
180 /* Initialize structures */ 220 /* Initialize structures */
181 memset((char *) new_mtd, 0, sizeof(struct mtd_info)); 221 memset(new_mtd, 0, sizeof(struct mtd_info));
182 memset((char *) this, 0, sizeof(struct nand_chip)); 222 memset(this, 0, sizeof(struct nand_chip));
183 223
184 /* Link the private data with the MTD structure */ 224 /* Link the private data with the MTD structure */
185 new_mtd->priv = this; 225 new_mtd->priv = this;
226 new_mtd->owner = THIS_MODULE;
186 227
187 /* map physical address */ 228 /* map physical address */
188 this->IO_ADDR_R = this->IO_ADDR_W = ioremap(adr, 4096); 229 this->IO_ADDR_R = this->IO_ADDR_W = ioremap(adr, 4096);
@@ -196,16 +237,21 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
196 this->dev_ready = cs553x_device_ready; 237 this->dev_ready = cs553x_device_ready;
197 this->read_byte = cs553x_read_byte; 238 this->read_byte = cs553x_read_byte;
198 this->write_byte = cs553x_write_byte; 239 this->write_byte = cs553x_write_byte;
240 this->read_buf = cs553x_read_buf;
241 this->write_buf = cs553x_write_buf;
199 242
200 /* 20 us command delay time */ 243 this->chip_delay = 0;
201 this->chip_delay = 20;
202 this->eccmode = NAND_ECC_SOFT;
203 244
245 this->eccmode = NAND_ECC_HW3_256;
246 this->enable_hwecc = cs_enable_hwecc;
247 this->calculate_ecc = cs_calculate_ecc;
248 this->correct_data = nand_correct_data;
249
204 /* Enable the following for a flash based bad block table */ 250 /* Enable the following for a flash based bad block table */
205 // this->options = NAND_USE_FLASH_BBT; 251 this->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
206 252
207 /* Scan to find existance of the device */ 253 /* Scan to find existance of the device */
208 if (nand_scan (new_mtd, 1)) { 254 if (nand_scan(new_mtd, 1)) {
209 err = -ENXIO; 255 err = -ENXIO;
210 goto out_ior; 256 goto out_ior;
211 } 257 }
@@ -216,12 +262,12 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
216out_ior: 262out_ior:
217 iounmap((void *)this->IO_ADDR_R); 263 iounmap((void *)this->IO_ADDR_R);
218out_mtd: 264out_mtd:
219 kfree (new_mtd); 265 kfree(new_mtd);
220out: 266out:
221 return err; 267 return err;
222} 268}
223 269
224int __init cs553x_init(void) 270static int __init cs553x_init(void)
225{ 271{
226 int err = -ENXIO; 272 int err = -ENXIO;
227 int i; 273 int i;
@@ -238,16 +284,16 @@ int __init cs553x_init(void)
238 return -ENXIO; 284 return -ENXIO;
239 } 285 }
240 286
241 for (i=0; i<NR_CS553X_CONTROLLERS; i++) { 287 for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
242 rdmsrl(MSR_DIVIL_LBAR_FLSH0+i, val); 288 rdmsrl(MSR_DIVIL_LBAR_FLSH0 + i, val);
243 289
244 if ((val & (FLSH_LBAR_EN|FLSH_NOR_NAND)) == (FLSH_LBAR_EN|FLSH_NOR_NAND)) 290 if ((val & (FLSH_LBAR_EN|FLSH_NOR_NAND)) == (FLSH_LBAR_EN|FLSH_NOR_NAND))
245 err = cs553x_init_one(i, !!(val & FLSH_MEM_IO), val & 0xFFFFFFFF); 291 err = cs553x_init_one(i, !!(val & FLSH_MEM_IO), val & 0xFFFFFFFF);
246 } 292 }
247 293
248 /* Register all devices together here. This means we can easily hack it to 294 /* Register all devices together here. This means we can easily hack it to
249 do mtdconcat etc. if we want to. */ 295 do mtdconcat etc. if we want to. */
250 for (i=0; i<NR_CS553X_CONTROLLERS; i++) { 296 for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
251 if (cs553x_mtd[i]) { 297 if (cs553x_mtd[i]) {
252 add_mtd_device(cs553x_mtd[i]); 298 add_mtd_device(cs553x_mtd[i]);
253 299
@@ -258,13 +304,14 @@ int __init cs553x_init(void)
258 304
259 return err; 305 return err;
260} 306}
307
261module_init(cs553x_init); 308module_init(cs553x_init);
262 309
263static void __exit cs553x_cleanup (void) 310static void __exit cs553x_cleanup(void)
264{ 311{
265 int i; 312 int i;
266 313
267 for (i=0; i<NR_CS553X_CONTROLLERS; i++) { 314 for (i = 0; i < NR_CS553X_CONTROLLERS; i++) {
268 struct mtd_info *mtd = cs553x_mtd[i]; 315 struct mtd_info *mtd = cs553x_mtd[i];
269 struct nand_chip *this; 316 struct nand_chip *this;
270 void __iomem *mmio_base; 317 void __iomem *mmio_base;
@@ -276,16 +323,17 @@ static void __exit cs553x_cleanup (void)
276 mmio_base = this->IO_ADDR_R; 323 mmio_base = this->IO_ADDR_R;
277 324
278 /* Release resources, unregister device */ 325 /* Release resources, unregister device */
279 nand_release (cs553x_mtd[i]); 326 nand_release(cs553x_mtd[i]);
280 cs553x_mtd[i] = NULL; 327 cs553x_mtd[i] = NULL;
281 328
282 /* unmap physical adress */ 329 /* unmap physical adress */
283 iounmap(mmio_base); 330 iounmap(mmio_base);
284 331
285 /* Free the MTD device structure */ 332 /* Free the MTD device structure */
286 kfree (mtd); 333 kfree(mtd);
287 } 334 }
288} 335}
336
289module_exit(cs553x_cleanup); 337module_exit(cs553x_cleanup);
290 338
291MODULE_LICENSE("GPL"); 339MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index ec5e45e4e4ef..a2391c66a63f 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -58,10 +58,10 @@ static unsigned long __initdata doc_locations[] = {
58 0xe4000000, 58 0xe4000000,
59#elif defined(CONFIG_MOMENCO_OCELOT) 59#elif defined(CONFIG_MOMENCO_OCELOT)
60 0x2f000000, 60 0x2f000000,
61 0xff000000, 61 0xff000000,
62#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C) 62#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
63 0xff000000, 63 0xff000000,
64##else 64#else
65#warning Unknown architecture for DiskOnChip. No default probe locations defined 65#warning Unknown architecture for DiskOnChip. No default probe locations defined
66#endif 66#endif
67 0xffffffff }; 67 0xffffffff };
@@ -73,7 +73,7 @@ struct doc_priv {
73 unsigned long physadr; 73 unsigned long physadr;
74 u_char ChipID; 74 u_char ChipID;
75 u_char CDSNControl; 75 u_char CDSNControl;
76 int chips_per_floor; /* The number of chips detected on each floor */ 76 int chips_per_floor; /* The number of chips detected on each floor */
77 int curfloor; 77 int curfloor;
78 int curchip; 78 int curchip;
79 int mh0_page; 79 int mh0_page;
@@ -84,6 +84,7 @@ struct doc_priv {
84/* This is the syndrome computed by the HW ecc generator upon reading an empty 84/* This is the syndrome computed by the HW ecc generator upon reading an empty
85 page, one with all 0xff for data and stored ecc code. */ 85 page, one with all 0xff for data and stored ecc code. */
86static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a }; 86static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a };
87
87/* This is the ecc value computed by the HW ecc generator upon writing an empty 88/* This is the ecc value computed by the HW ecc generator upon writing an empty
88 page, one with all 0xff for data. */ 89 page, one with all 0xff for data. */
89static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 }; 90static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
@@ -97,25 +98,25 @@ static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
97static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd); 98static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd);
98static void doc200x_select_chip(struct mtd_info *mtd, int chip); 99static void doc200x_select_chip(struct mtd_info *mtd, int chip);
99 100
100static int debug=0; 101static int debug = 0;
101module_param(debug, int, 0); 102module_param(debug, int, 0);
102 103
103static int try_dword=1; 104static int try_dword = 1;
104module_param(try_dword, int, 0); 105module_param(try_dword, int, 0);
105 106
106static int no_ecc_failures=0; 107static int no_ecc_failures = 0;
107module_param(no_ecc_failures, int, 0); 108module_param(no_ecc_failures, int, 0);
108 109
109static int no_autopart=0; 110static int no_autopart = 0;
110module_param(no_autopart, int, 0); 111module_param(no_autopart, int, 0);
111 112
112static int show_firmware_partition=0; 113static int show_firmware_partition = 0;
113module_param(show_firmware_partition, int, 0); 114module_param(show_firmware_partition, int, 0);
114 115
115#ifdef MTD_NAND_DISKONCHIP_BBTWRITE 116#ifdef MTD_NAND_DISKONCHIP_BBTWRITE
116static int inftl_bbt_write=1; 117static int inftl_bbt_write = 1;
117#else 118#else
118static int inftl_bbt_write=0; 119static int inftl_bbt_write = 0;
119#endif 120#endif
120module_param(inftl_bbt_write, int, 0); 121module_param(inftl_bbt_write, int, 0);
121 122
@@ -123,7 +124,6 @@ static unsigned long doc_config_location = CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDR
123module_param(doc_config_location, ulong, 0); 124module_param(doc_config_location, ulong, 0);
124MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip"); 125MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip");
125 126
126
127/* Sector size for HW ECC */ 127/* Sector size for HW ECC */
128#define SECTOR_SIZE 512 128#define SECTOR_SIZE 512
129/* The sector bytes are packed into NB_DATA 10 bit words */ 129/* The sector bytes are packed into NB_DATA 10 bit words */
@@ -147,7 +147,7 @@ static struct rs_control *rs_decoder;
147 * some comments, improved a minor bit and converted it to make use 147 * some comments, improved a minor bit and converted it to make use
148 * of the generic Reed-Solomon libary. tglx 148 * of the generic Reed-Solomon libary. tglx
149 */ 149 */
150static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc) 150static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc)
151{ 151{
152 int i, j, nerr, errpos[8]; 152 int i, j, nerr, errpos[8];
153 uint8_t parity; 153 uint8_t parity;
@@ -168,18 +168,18 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
168 * s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0] 168 * s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0]
169 * where x = alpha^(FCR + i) 169 * where x = alpha^(FCR + i)
170 */ 170 */
171 for(j = 1; j < NROOTS; j++) { 171 for (j = 1; j < NROOTS; j++) {
172 if(ds[j] == 0) 172 if (ds[j] == 0)
173 continue; 173 continue;
174 tmp = rs->index_of[ds[j]]; 174 tmp = rs->index_of[ds[j]];
175 for(i = 0; i < NROOTS; i++) 175 for (i = 0; i < NROOTS; i++)
176 s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)]; 176 s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)];
177 } 177 }
178 178
179 /* Calc s[i] = s[i] / alpha^(v + i) */ 179 /* Calc s[i] = s[i] / alpha^(v + i) */
180 for (i = 0; i < NROOTS; i++) { 180 for (i = 0; i < NROOTS; i++) {
181 if (syn[i]) 181 if (syn[i])
182 syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i)); 182 syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
183 } 183 }
184 /* Call the decoder library */ 184 /* Call the decoder library */
185 nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval); 185 nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
@@ -193,7 +193,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
193 * but they are given by the design of the de/encoder circuit 193 * but they are given by the design of the de/encoder circuit
194 * in the DoC ASIC's. 194 * in the DoC ASIC's.
195 */ 195 */
196 for(i = 0;i < nerr; i++) { 196 for (i = 0; i < nerr; i++) {
197 int index, bitpos, pos = 1015 - errpos[i]; 197 int index, bitpos, pos = 1015 - errpos[i];
198 uint8_t val; 198 uint8_t val;
199 if (pos >= NB_DATA && pos < 1019) 199 if (pos >= NB_DATA && pos < 1019)
@@ -205,8 +205,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
205 can be modified since pos is even */ 205 can be modified since pos is even */
206 index = (pos >> 3) ^ 1; 206 index = (pos >> 3) ^ 1;
207 bitpos = pos & 7; 207 bitpos = pos & 7;
208 if ((index >= 0 && index < SECTOR_SIZE) || 208 if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) {
209 index == (SECTOR_SIZE + 1)) {
210 val = (uint8_t) (errval[i] >> (2 + bitpos)); 209 val = (uint8_t) (errval[i] >> (2 + bitpos));
211 parity ^= val; 210 parity ^= val;
212 if (index < SECTOR_SIZE) 211 if (index < SECTOR_SIZE)
@@ -216,9 +215,8 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
216 bitpos = (bitpos + 10) & 7; 215 bitpos = (bitpos + 10) & 7;
217 if (bitpos == 0) 216 if (bitpos == 0)
218 bitpos = 8; 217 bitpos = 8;
219 if ((index >= 0 && index < SECTOR_SIZE) || 218 if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) {
220 index == (SECTOR_SIZE + 1)) { 219 val = (uint8_t) (errval[i] << (8 - bitpos));
221 val = (uint8_t)(errval[i] << (8 - bitpos));
222 parity ^= val; 220 parity ^= val;
223 if (index < SECTOR_SIZE) 221 if (index < SECTOR_SIZE)
224 data[index] ^= val; 222 data[index] ^= val;
@@ -250,10 +248,11 @@ static void DoC_Delay(struct doc_priv *doc, unsigned short cycles)
250/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */ 248/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
251static int _DoC_WaitReady(struct doc_priv *doc) 249static int _DoC_WaitReady(struct doc_priv *doc)
252{ 250{
253 void __iomem *docptr = doc->virtadr; 251 void __iomem *docptr = doc->virtadr;
254 unsigned long timeo = jiffies + (HZ * 10); 252 unsigned long timeo = jiffies + (HZ * 10);
255 253
256 if(debug) printk("_DoC_WaitReady...\n"); 254 if (debug)
255 printk("_DoC_WaitReady...\n");
257 /* Out-of-line routine to wait for chip response */ 256 /* Out-of-line routine to wait for chip response */
258 if (DoC_is_MillenniumPlus(doc)) { 257 if (DoC_is_MillenniumPlus(doc)) {
259 while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) { 258 while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
@@ -280,7 +279,7 @@ static int _DoC_WaitReady(struct doc_priv *doc)
280 279
281static inline int DoC_WaitReady(struct doc_priv *doc) 280static inline int DoC_WaitReady(struct doc_priv *doc)
282{ 281{
283 void __iomem *docptr = doc->virtadr; 282 void __iomem *docptr = doc->virtadr;
284 int ret = 0; 283 int ret = 0;
285 284
286 if (DoC_is_MillenniumPlus(doc)) { 285 if (DoC_is_MillenniumPlus(doc)) {
@@ -298,7 +297,8 @@ static inline int DoC_WaitReady(struct doc_priv *doc)
298 DoC_Delay(doc, 2); 297 DoC_Delay(doc, 2);
299 } 298 }
300 299
301 if(debug) printk("DoC_WaitReady OK\n"); 300 if (debug)
301 printk("DoC_WaitReady OK\n");
302 return ret; 302 return ret;
303} 303}
304 304
@@ -306,9 +306,10 @@ static void doc2000_write_byte(struct mtd_info *mtd, u_char datum)
306{ 306{
307 struct nand_chip *this = mtd->priv; 307 struct nand_chip *this = mtd->priv;
308 struct doc_priv *doc = this->priv; 308 struct doc_priv *doc = this->priv;
309 void __iomem *docptr = doc->virtadr; 309 void __iomem *docptr = doc->virtadr;
310 310
311 if(debug)printk("write_byte %02x\n", datum); 311 if (debug)
312 printk("write_byte %02x\n", datum);
312 WriteDOC(datum, docptr, CDSNSlowIO); 313 WriteDOC(datum, docptr, CDSNSlowIO);
313 WriteDOC(datum, docptr, 2k_CDSN_IO); 314 WriteDOC(datum, docptr, 2k_CDSN_IO);
314} 315}
@@ -317,77 +318,78 @@ static u_char doc2000_read_byte(struct mtd_info *mtd)
317{ 318{
318 struct nand_chip *this = mtd->priv; 319 struct nand_chip *this = mtd->priv;
319 struct doc_priv *doc = this->priv; 320 struct doc_priv *doc = this->priv;
320 void __iomem *docptr = doc->virtadr; 321 void __iomem *docptr = doc->virtadr;
321 u_char ret; 322 u_char ret;
322 323
323 ReadDOC(docptr, CDSNSlowIO); 324 ReadDOC(docptr, CDSNSlowIO);
324 DoC_Delay(doc, 2); 325 DoC_Delay(doc, 2);
325 ret = ReadDOC(docptr, 2k_CDSN_IO); 326 ret = ReadDOC(docptr, 2k_CDSN_IO);
326 if (debug) printk("read_byte returns %02x\n", ret); 327 if (debug)
328 printk("read_byte returns %02x\n", ret);
327 return ret; 329 return ret;
328} 330}
329 331
330static void doc2000_writebuf(struct mtd_info *mtd, 332static void doc2000_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
331 const u_char *buf, int len)
332{ 333{
333 struct nand_chip *this = mtd->priv; 334 struct nand_chip *this = mtd->priv;
334 struct doc_priv *doc = this->priv; 335 struct doc_priv *doc = this->priv;
335 void __iomem *docptr = doc->virtadr; 336 void __iomem *docptr = doc->virtadr;
336 int i; 337 int i;
337 if (debug)printk("writebuf of %d bytes: ", len); 338 if (debug)
338 for (i=0; i < len; i++) { 339 printk("writebuf of %d bytes: ", len);
340 for (i = 0; i < len; i++) {
339 WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i); 341 WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i);
340 if (debug && i < 16) 342 if (debug && i < 16)
341 printk("%02x ", buf[i]); 343 printk("%02x ", buf[i]);
342 } 344 }
343 if (debug) printk("\n"); 345 if (debug)
346 printk("\n");
344} 347}
345 348
346static void doc2000_readbuf(struct mtd_info *mtd, 349static void doc2000_readbuf(struct mtd_info *mtd, u_char *buf, int len)
347 u_char *buf, int len)
348{ 350{
349 struct nand_chip *this = mtd->priv; 351 struct nand_chip *this = mtd->priv;
350 struct doc_priv *doc = this->priv; 352 struct doc_priv *doc = this->priv;
351 void __iomem *docptr = doc->virtadr; 353 void __iomem *docptr = doc->virtadr;
352 int i; 354 int i;
353 355
354 if (debug)printk("readbuf of %d bytes: ", len); 356 if (debug)
357 printk("readbuf of %d bytes: ", len);
355 358
356 for (i=0; i < len; i++) { 359 for (i = 0; i < len; i++) {
357 buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i); 360 buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i);
358 } 361 }
359} 362}
360 363
361static void doc2000_readbuf_dword(struct mtd_info *mtd, 364static void doc2000_readbuf_dword(struct mtd_info *mtd, u_char *buf, int len)
362 u_char *buf, int len)
363{ 365{
364 struct nand_chip *this = mtd->priv; 366 struct nand_chip *this = mtd->priv;
365 struct doc_priv *doc = this->priv; 367 struct doc_priv *doc = this->priv;
366 void __iomem *docptr = doc->virtadr; 368 void __iomem *docptr = doc->virtadr;
367 int i; 369 int i;
368 370
369 if (debug) printk("readbuf_dword of %d bytes: ", len); 371 if (debug)
372 printk("readbuf_dword of %d bytes: ", len);
370 373
371 if (unlikely((((unsigned long)buf)|len) & 3)) { 374 if (unlikely((((unsigned long)buf) | len) & 3)) {
372 for (i=0; i < len; i++) { 375 for (i = 0; i < len; i++) {
373 *(uint8_t *)(&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i); 376 *(uint8_t *) (&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
374 } 377 }
375 } else { 378 } else {
376 for (i=0; i < len; i+=4) { 379 for (i = 0; i < len; i += 4) {
377 *(uint32_t*)(&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i); 380 *(uint32_t *) (&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
378 } 381 }
379 } 382 }
380} 383}
381 384
382static int doc2000_verifybuf(struct mtd_info *mtd, 385static int doc2000_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
383 const u_char *buf, int len)
384{ 386{
385 struct nand_chip *this = mtd->priv; 387 struct nand_chip *this = mtd->priv;
386 struct doc_priv *doc = this->priv; 388 struct doc_priv *doc = this->priv;
387 void __iomem *docptr = doc->virtadr; 389 void __iomem *docptr = doc->virtadr;
388 int i; 390 int i;
389 391
390 for (i=0; i < len; i++) 392 for (i = 0; i < len; i++)
391 if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO)) 393 if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO))
392 return -EFAULT; 394 return -EFAULT;
393 return 0; 395 return 0;
@@ -482,7 +484,7 @@ static void doc2001_write_byte(struct mtd_info *mtd, u_char datum)
482{ 484{
483 struct nand_chip *this = mtd->priv; 485 struct nand_chip *this = mtd->priv;
484 struct doc_priv *doc = this->priv; 486 struct doc_priv *doc = this->priv;
485 void __iomem *docptr = doc->virtadr; 487 void __iomem *docptr = doc->virtadr;
486 488
487 WriteDOC(datum, docptr, CDSNSlowIO); 489 WriteDOC(datum, docptr, CDSNSlowIO);
488 WriteDOC(datum, docptr, Mil_CDSN_IO); 490 WriteDOC(datum, docptr, Mil_CDSN_IO);
@@ -493,7 +495,7 @@ static u_char doc2001_read_byte(struct mtd_info *mtd)
493{ 495{
494 struct nand_chip *this = mtd->priv; 496 struct nand_chip *this = mtd->priv;
495 struct doc_priv *doc = this->priv; 497 struct doc_priv *doc = this->priv;
496 void __iomem *docptr = doc->virtadr; 498 void __iomem *docptr = doc->virtadr;
497 499
498 //ReadDOC(docptr, CDSNSlowIO); 500 //ReadDOC(docptr, CDSNSlowIO);
499 /* 11.4.5 -- delay twice to allow extended length cycle */ 501 /* 11.4.5 -- delay twice to allow extended length cycle */
@@ -503,50 +505,47 @@ static u_char doc2001_read_byte(struct mtd_info *mtd)
503 return ReadDOC(docptr, LastDataRead); 505 return ReadDOC(docptr, LastDataRead);
504} 506}
505 507
506static void doc2001_writebuf(struct mtd_info *mtd, 508static void doc2001_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
507 const u_char *buf, int len)
508{ 509{
509 struct nand_chip *this = mtd->priv; 510 struct nand_chip *this = mtd->priv;
510 struct doc_priv *doc = this->priv; 511 struct doc_priv *doc = this->priv;
511 void __iomem *docptr = doc->virtadr; 512 void __iomem *docptr = doc->virtadr;
512 int i; 513 int i;
513 514
514 for (i=0; i < len; i++) 515 for (i = 0; i < len; i++)
515 WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i); 516 WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
516 /* Terminate write pipeline */ 517 /* Terminate write pipeline */
517 WriteDOC(0x00, docptr, WritePipeTerm); 518 WriteDOC(0x00, docptr, WritePipeTerm);
518} 519}
519 520
520static void doc2001_readbuf(struct mtd_info *mtd, 521static void doc2001_readbuf(struct mtd_info *mtd, u_char *buf, int len)
521 u_char *buf, int len)
522{ 522{
523 struct nand_chip *this = mtd->priv; 523 struct nand_chip *this = mtd->priv;
524 struct doc_priv *doc = this->priv; 524 struct doc_priv *doc = this->priv;
525 void __iomem *docptr = doc->virtadr; 525 void __iomem *docptr = doc->virtadr;
526 int i; 526 int i;
527 527
528 /* Start read pipeline */ 528 /* Start read pipeline */
529 ReadDOC(docptr, ReadPipeInit); 529 ReadDOC(docptr, ReadPipeInit);
530 530
531 for (i=0; i < len-1; i++) 531 for (i = 0; i < len - 1; i++)
532 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff)); 532 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
533 533
534 /* Terminate read pipeline */ 534 /* Terminate read pipeline */
535 buf[i] = ReadDOC(docptr, LastDataRead); 535 buf[i] = ReadDOC(docptr, LastDataRead);
536} 536}
537 537
538static int doc2001_verifybuf(struct mtd_info *mtd, 538static int doc2001_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
539 const u_char *buf, int len)
540{ 539{
541 struct nand_chip *this = mtd->priv; 540 struct nand_chip *this = mtd->priv;
542 struct doc_priv *doc = this->priv; 541 struct doc_priv *doc = this->priv;
543 void __iomem *docptr = doc->virtadr; 542 void __iomem *docptr = doc->virtadr;
544 int i; 543 int i;
545 544
546 /* Start read pipeline */ 545 /* Start read pipeline */
547 ReadDOC(docptr, ReadPipeInit); 546 ReadDOC(docptr, ReadPipeInit);
548 547
549 for (i=0; i < len-1; i++) 548 for (i = 0; i < len - 1; i++)
550 if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) { 549 if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
551 ReadDOC(docptr, LastDataRead); 550 ReadDOC(docptr, LastDataRead);
552 return i; 551 return i;
@@ -560,87 +559,90 @@ static u_char doc2001plus_read_byte(struct mtd_info *mtd)
560{ 559{
561 struct nand_chip *this = mtd->priv; 560 struct nand_chip *this = mtd->priv;
562 struct doc_priv *doc = this->priv; 561 struct doc_priv *doc = this->priv;
563 void __iomem *docptr = doc->virtadr; 562 void __iomem *docptr = doc->virtadr;
564 u_char ret; 563 u_char ret;
565 564
566 ReadDOC(docptr, Mplus_ReadPipeInit); 565 ReadDOC(docptr, Mplus_ReadPipeInit);
567 ReadDOC(docptr, Mplus_ReadPipeInit); 566 ReadDOC(docptr, Mplus_ReadPipeInit);
568 ret = ReadDOC(docptr, Mplus_LastDataRead); 567 ret = ReadDOC(docptr, Mplus_LastDataRead);
569 if (debug) printk("read_byte returns %02x\n", ret); 568 if (debug)
569 printk("read_byte returns %02x\n", ret);
570 return ret; 570 return ret;
571} 571}
572 572
573static void doc2001plus_writebuf(struct mtd_info *mtd, 573static void doc2001plus_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
574 const u_char *buf, int len)
575{ 574{
576 struct nand_chip *this = mtd->priv; 575 struct nand_chip *this = mtd->priv;
577 struct doc_priv *doc = this->priv; 576 struct doc_priv *doc = this->priv;
578 void __iomem *docptr = doc->virtadr; 577 void __iomem *docptr = doc->virtadr;
579 int i; 578 int i;
580 579
581 if (debug)printk("writebuf of %d bytes: ", len); 580 if (debug)
582 for (i=0; i < len; i++) { 581 printk("writebuf of %d bytes: ", len);
582 for (i = 0; i < len; i++) {
583 WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i); 583 WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
584 if (debug && i < 16) 584 if (debug && i < 16)
585 printk("%02x ", buf[i]); 585 printk("%02x ", buf[i]);
586 } 586 }
587 if (debug) printk("\n"); 587 if (debug)
588 printk("\n");
588} 589}
589 590
590static void doc2001plus_readbuf(struct mtd_info *mtd, 591static void doc2001plus_readbuf(struct mtd_info *mtd, u_char *buf, int len)
591 u_char *buf, int len)
592{ 592{
593 struct nand_chip *this = mtd->priv; 593 struct nand_chip *this = mtd->priv;
594 struct doc_priv *doc = this->priv; 594 struct doc_priv *doc = this->priv;
595 void __iomem *docptr = doc->virtadr; 595 void __iomem *docptr = doc->virtadr;
596 int i; 596 int i;
597 597
598 if (debug)printk("readbuf of %d bytes: ", len); 598 if (debug)
599 printk("readbuf of %d bytes: ", len);
599 600
600 /* Start read pipeline */ 601 /* Start read pipeline */
601 ReadDOC(docptr, Mplus_ReadPipeInit); 602 ReadDOC(docptr, Mplus_ReadPipeInit);
602 ReadDOC(docptr, Mplus_ReadPipeInit); 603 ReadDOC(docptr, Mplus_ReadPipeInit);
603 604
604 for (i=0; i < len-2; i++) { 605 for (i = 0; i < len - 2; i++) {
605 buf[i] = ReadDOC(docptr, Mil_CDSN_IO); 606 buf[i] = ReadDOC(docptr, Mil_CDSN_IO);
606 if (debug && i < 16) 607 if (debug && i < 16)
607 printk("%02x ", buf[i]); 608 printk("%02x ", buf[i]);
608 } 609 }
609 610
610 /* Terminate read pipeline */ 611 /* Terminate read pipeline */
611 buf[len-2] = ReadDOC(docptr, Mplus_LastDataRead); 612 buf[len - 2] = ReadDOC(docptr, Mplus_LastDataRead);
612 if (debug && i < 16) 613 if (debug && i < 16)
613 printk("%02x ", buf[len-2]); 614 printk("%02x ", buf[len - 2]);
614 buf[len-1] = ReadDOC(docptr, Mplus_LastDataRead); 615 buf[len - 1] = ReadDOC(docptr, Mplus_LastDataRead);
615 if (debug && i < 16) 616 if (debug && i < 16)
616 printk("%02x ", buf[len-1]); 617 printk("%02x ", buf[len - 1]);
617 if (debug) printk("\n"); 618 if (debug)
619 printk("\n");
618} 620}
619 621
620static int doc2001plus_verifybuf(struct mtd_info *mtd, 622static int doc2001plus_verifybuf(struct mtd_info *mtd, const u_char *buf, int len)
621 const u_char *buf, int len)
622{ 623{
623 struct nand_chip *this = mtd->priv; 624 struct nand_chip *this = mtd->priv;
624 struct doc_priv *doc = this->priv; 625 struct doc_priv *doc = this->priv;
625 void __iomem *docptr = doc->virtadr; 626 void __iomem *docptr = doc->virtadr;
626 int i; 627 int i;
627 628
628 if (debug)printk("verifybuf of %d bytes: ", len); 629 if (debug)
630 printk("verifybuf of %d bytes: ", len);
629 631
630 /* Start read pipeline */ 632 /* Start read pipeline */
631 ReadDOC(docptr, Mplus_ReadPipeInit); 633 ReadDOC(docptr, Mplus_ReadPipeInit);
632 ReadDOC(docptr, Mplus_ReadPipeInit); 634 ReadDOC(docptr, Mplus_ReadPipeInit);
633 635
634 for (i=0; i < len-2; i++) 636 for (i = 0; i < len - 2; i++)
635 if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) { 637 if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
636 ReadDOC(docptr, Mplus_LastDataRead); 638 ReadDOC(docptr, Mplus_LastDataRead);
637 ReadDOC(docptr, Mplus_LastDataRead); 639 ReadDOC(docptr, Mplus_LastDataRead);
638 return i; 640 return i;
639 } 641 }
640 if (buf[len-2] != ReadDOC(docptr, Mplus_LastDataRead)) 642 if (buf[len - 2] != ReadDOC(docptr, Mplus_LastDataRead))
641 return len-2; 643 return len - 2;
642 if (buf[len-1] != ReadDOC(docptr, Mplus_LastDataRead)) 644 if (buf[len - 1] != ReadDOC(docptr, Mplus_LastDataRead))
643 return len-1; 645 return len - 1;
644 return 0; 646 return 0;
645} 647}
646 648
@@ -648,10 +650,11 @@ static void doc2001plus_select_chip(struct mtd_info *mtd, int chip)
648{ 650{
649 struct nand_chip *this = mtd->priv; 651 struct nand_chip *this = mtd->priv;
650 struct doc_priv *doc = this->priv; 652 struct doc_priv *doc = this->priv;
651 void __iomem *docptr = doc->virtadr; 653 void __iomem *docptr = doc->virtadr;
652 int floor = 0; 654 int floor = 0;
653 655
654 if(debug)printk("select chip (%d)\n", chip); 656 if (debug)
657 printk("select chip (%d)\n", chip);
655 658
656 if (chip == -1) { 659 if (chip == -1) {
657 /* Disable flash internally */ 660 /* Disable flash internally */
@@ -660,7 +663,7 @@ static void doc2001plus_select_chip(struct mtd_info *mtd, int chip)
660 } 663 }
661 664
662 floor = chip / doc->chips_per_floor; 665 floor = chip / doc->chips_per_floor;
663 chip -= (floor * doc->chips_per_floor); 666 chip -= (floor * doc->chips_per_floor);
664 667
665 /* Assert ChipEnable and deassert WriteProtect */ 668 /* Assert ChipEnable and deassert WriteProtect */
666 WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect); 669 WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect);
@@ -674,16 +677,17 @@ static void doc200x_select_chip(struct mtd_info *mtd, int chip)
674{ 677{
675 struct nand_chip *this = mtd->priv; 678 struct nand_chip *this = mtd->priv;
676 struct doc_priv *doc = this->priv; 679 struct doc_priv *doc = this->priv;
677 void __iomem *docptr = doc->virtadr; 680 void __iomem *docptr = doc->virtadr;
678 int floor = 0; 681 int floor = 0;
679 682
680 if(debug)printk("select chip (%d)\n", chip); 683 if (debug)
684 printk("select chip (%d)\n", chip);
681 685
682 if (chip == -1) 686 if (chip == -1)
683 return; 687 return;
684 688
685 floor = chip / doc->chips_per_floor; 689 floor = chip / doc->chips_per_floor;
686 chip -= (floor * doc->chips_per_floor); 690 chip -= (floor * doc->chips_per_floor);
687 691
688 /* 11.4.4 -- deassert CE before changing chip */ 692 /* 11.4.4 -- deassert CE before changing chip */
689 doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE); 693 doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE);
@@ -701,9 +705,9 @@ static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd)
701{ 705{
702 struct nand_chip *this = mtd->priv; 706 struct nand_chip *this = mtd->priv;
703 struct doc_priv *doc = this->priv; 707 struct doc_priv *doc = this->priv;
704 void __iomem *docptr = doc->virtadr; 708 void __iomem *docptr = doc->virtadr;
705 709
706 switch(cmd) { 710 switch (cmd) {
707 case NAND_CTL_SETNCE: 711 case NAND_CTL_SETNCE:
708 doc->CDSNControl |= CDSN_CTRL_CE; 712 doc->CDSNControl |= CDSN_CTRL_CE;
709 break; 713 break;
@@ -729,17 +733,18 @@ static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd)
729 doc->CDSNControl &= ~CDSN_CTRL_WP; 733 doc->CDSNControl &= ~CDSN_CTRL_WP;
730 break; 734 break;
731 } 735 }
732 if (debug)printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl); 736 if (debug)
737 printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
733 WriteDOC(doc->CDSNControl, docptr, CDSNControl); 738 WriteDOC(doc->CDSNControl, docptr, CDSNControl);
734 /* 11.4.3 -- 4 NOPs after CSDNControl write */ 739 /* 11.4.3 -- 4 NOPs after CSDNControl write */
735 DoC_Delay(doc, 4); 740 DoC_Delay(doc, 4);
736} 741}
737 742
738static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int column, int page_addr) 743static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
739{ 744{
740 struct nand_chip *this = mtd->priv; 745 struct nand_chip *this = mtd->priv;
741 struct doc_priv *doc = this->priv; 746 struct doc_priv *doc = this->priv;
742 void __iomem *docptr = doc->virtadr; 747 void __iomem *docptr = doc->virtadr;
743 748
744 /* 749 /*
745 * Must terminate write pipeline before sending any commands 750 * Must terminate write pipeline before sending any commands
@@ -782,25 +787,26 @@ static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int col
782 WriteDOC(column, docptr, Mplus_FlashAddress); 787 WriteDOC(column, docptr, Mplus_FlashAddress);
783 } 788 }
784 if (page_addr != -1) { 789 if (page_addr != -1) {
785 WriteDOC((unsigned char) (page_addr & 0xff), docptr, Mplus_FlashAddress); 790 WriteDOC((unsigned char)(page_addr & 0xff), docptr, Mplus_FlashAddress);
786 WriteDOC((unsigned char) ((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress); 791 WriteDOC((unsigned char)((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
787 /* One more address cycle for higher density devices */ 792 /* One more address cycle for higher density devices */
788 if (this->chipsize & 0x0c000000) { 793 if (this->chipsize & 0x0c000000) {
789 WriteDOC((unsigned char) ((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress); 794 WriteDOC((unsigned char)((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
790 printk("high density\n"); 795 printk("high density\n");
791 } 796 }
792 } 797 }
793 WriteDOC(0, docptr, Mplus_WritePipeTerm); 798 WriteDOC(0, docptr, Mplus_WritePipeTerm);
794 WriteDOC(0, docptr, Mplus_WritePipeTerm); 799 WriteDOC(0, docptr, Mplus_WritePipeTerm);
795 /* deassert ALE */ 800 /* deassert ALE */
796 if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID) 801 if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
802 command == NAND_CMD_READOOB || command == NAND_CMD_READID)
797 WriteDOC(0, docptr, Mplus_FlashControl); 803 WriteDOC(0, docptr, Mplus_FlashControl);
798 } 804 }
799 805
800 /* 806 /*
801 * program and erase have their own busy handlers 807 * program and erase have their own busy handlers
802 * status and sequential in needs no delay 808 * status and sequential in needs no delay
803 */ 809 */
804 switch (command) { 810 switch (command) {
805 811
806 case NAND_CMD_PAGEPROG: 812 case NAND_CMD_PAGEPROG:
@@ -817,55 +823,57 @@ static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int col
817 WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd); 823 WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
818 WriteDOC(0, docptr, Mplus_WritePipeTerm); 824 WriteDOC(0, docptr, Mplus_WritePipeTerm);
819 WriteDOC(0, docptr, Mplus_WritePipeTerm); 825 WriteDOC(0, docptr, Mplus_WritePipeTerm);
820 while ( !(this->read_byte(mtd) & 0x40)); 826 while (!(this->read_byte(mtd) & 0x40)) ;
821 return; 827 return;
822 828
823 /* This applies to read commands */ 829 /* This applies to read commands */
824 default: 830 default:
825 /* 831 /*
826 * If we don't have access to the busy pin, we apply the given 832 * If we don't have access to the busy pin, we apply the given
827 * command delay 833 * command delay
828 */ 834 */
829 if (!this->dev_ready) { 835 if (!this->dev_ready) {
830 udelay (this->chip_delay); 836 udelay(this->chip_delay);
831 return; 837 return;
832 } 838 }
833 } 839 }
834 840
835 /* Apply this short delay always to ensure that we do wait tWB in 841 /* Apply this short delay always to ensure that we do wait tWB in
836 * any case on any machine. */ 842 * any case on any machine. */
837 ndelay (100); 843 ndelay(100);
838 /* wait until command is processed */ 844 /* wait until command is processed */
839 while (!this->dev_ready(mtd)); 845 while (!this->dev_ready(mtd)) ;
840} 846}
841 847
842static int doc200x_dev_ready(struct mtd_info *mtd) 848static int doc200x_dev_ready(struct mtd_info *mtd)
843{ 849{
844 struct nand_chip *this = mtd->priv; 850 struct nand_chip *this = mtd->priv;
845 struct doc_priv *doc = this->priv; 851 struct doc_priv *doc = this->priv;
846 void __iomem *docptr = doc->virtadr; 852 void __iomem *docptr = doc->virtadr;
847 853
848 if (DoC_is_MillenniumPlus(doc)) { 854 if (DoC_is_MillenniumPlus(doc)) {
849 /* 11.4.2 -- must NOP four times before checking FR/B# */ 855 /* 11.4.2 -- must NOP four times before checking FR/B# */
850 DoC_Delay(doc, 4); 856 DoC_Delay(doc, 4);
851 if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) { 857 if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
852 if(debug) 858 if (debug)
853 printk("not ready\n"); 859 printk("not ready\n");
854 return 0; 860 return 0;
855 } 861 }
856 if (debug)printk("was ready\n"); 862 if (debug)
863 printk("was ready\n");
857 return 1; 864 return 1;
858 } else { 865 } else {
859 /* 11.4.2 -- must NOP four times before checking FR/B# */ 866 /* 11.4.2 -- must NOP four times before checking FR/B# */
860 DoC_Delay(doc, 4); 867 DoC_Delay(doc, 4);
861 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) { 868 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
862 if(debug) 869 if (debug)
863 printk("not ready\n"); 870 printk("not ready\n");
864 return 0; 871 return 0;
865 } 872 }
866 /* 11.4.2 -- Must NOP twice if it's ready */ 873 /* 11.4.2 -- Must NOP twice if it's ready */
867 DoC_Delay(doc, 2); 874 DoC_Delay(doc, 2);
868 if (debug)printk("was ready\n"); 875 if (debug)
876 printk("was ready\n");
869 return 1; 877 return 1;
870 } 878 }
871} 879}
@@ -881,10 +889,10 @@ static void doc200x_enable_hwecc(struct mtd_info *mtd, int mode)
881{ 889{
882 struct nand_chip *this = mtd->priv; 890 struct nand_chip *this = mtd->priv;
883 struct doc_priv *doc = this->priv; 891 struct doc_priv *doc = this->priv;
884 void __iomem *docptr = doc->virtadr; 892 void __iomem *docptr = doc->virtadr;
885 893
886 /* Prime the ECC engine */ 894 /* Prime the ECC engine */
887 switch(mode) { 895 switch (mode) {
888 case NAND_ECC_READ: 896 case NAND_ECC_READ:
889 WriteDOC(DOC_ECC_RESET, docptr, ECCConf); 897 WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
890 WriteDOC(DOC_ECC_EN, docptr, ECCConf); 898 WriteDOC(DOC_ECC_EN, docptr, ECCConf);
@@ -900,10 +908,10 @@ static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode)
900{ 908{
901 struct nand_chip *this = mtd->priv; 909 struct nand_chip *this = mtd->priv;
902 struct doc_priv *doc = this->priv; 910 struct doc_priv *doc = this->priv;
903 void __iomem *docptr = doc->virtadr; 911 void __iomem *docptr = doc->virtadr;
904 912
905 /* Prime the ECC engine */ 913 /* Prime the ECC engine */
906 switch(mode) { 914 switch (mode) {
907 case NAND_ECC_READ: 915 case NAND_ECC_READ:
908 WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); 916 WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
909 WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf); 917 WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf);
@@ -916,12 +924,11 @@ static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode)
916} 924}
917 925
918/* This code is only called on write */ 926/* This code is only called on write */
919static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat, 927static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat, unsigned char *ecc_code)
920 unsigned char *ecc_code)
921{ 928{
922 struct nand_chip *this = mtd->priv; 929 struct nand_chip *this = mtd->priv;
923 struct doc_priv *doc = this->priv; 930 struct doc_priv *doc = this->priv;
924 void __iomem *docptr = doc->virtadr; 931 void __iomem *docptr = doc->virtadr;
925 int i; 932 int i;
926 int emptymatch = 1; 933 int emptymatch = 1;
927 934
@@ -961,7 +968,8 @@ static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
961 often. It could be optimized away by examining the data in 968 often. It could be optimized away by examining the data in
962 the writebuf routine, and remembering the result. */ 969 the writebuf routine, and remembering the result. */
963 for (i = 0; i < 512; i++) { 970 for (i = 0; i < 512; i++) {
964 if (dat[i] == 0xff) continue; 971 if (dat[i] == 0xff)
972 continue;
965 emptymatch = 0; 973 emptymatch = 0;
966 break; 974 break;
967 } 975 }
@@ -969,7 +977,8 @@ static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
969 /* If emptymatch still =1, we do have an all-0xff data buffer. 977 /* If emptymatch still =1, we do have an all-0xff data buffer.
970 Return all-0xff ecc value instead of the computed one, so 978 Return all-0xff ecc value instead of the computed one, so
971 it'll look just like a freshly-erased page. */ 979 it'll look just like a freshly-erased page. */
972 if (emptymatch) memset(ecc_code, 0xff, 6); 980 if (emptymatch)
981 memset(ecc_code, 0xff, 6);
973#endif 982#endif
974 return 0; 983 return 0;
975} 984}
@@ -979,7 +988,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_
979 int i, ret = 0; 988 int i, ret = 0;
980 struct nand_chip *this = mtd->priv; 989 struct nand_chip *this = mtd->priv;
981 struct doc_priv *doc = this->priv; 990 struct doc_priv *doc = this->priv;
982 void __iomem *docptr = doc->virtadr; 991 void __iomem *docptr = doc->virtadr;
983 volatile u_char dummy; 992 volatile u_char dummy;
984 int emptymatch = 1; 993 int emptymatch = 1;
985 994
@@ -1012,18 +1021,20 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_
1012 all-0xff data and stored ecc block. Check the stored ecc. */ 1021 all-0xff data and stored ecc block. Check the stored ecc. */
1013 if (emptymatch) { 1022 if (emptymatch) {
1014 for (i = 0; i < 6; i++) { 1023 for (i = 0; i < 6; i++) {
1015 if (read_ecc[i] == 0xff) continue; 1024 if (read_ecc[i] == 0xff)
1025 continue;
1016 emptymatch = 0; 1026 emptymatch = 0;
1017 break; 1027 break;
1018 } 1028 }
1019 } 1029 }
1020 /* If emptymatch still =1, check the data block. */ 1030 /* If emptymatch still =1, check the data block. */
1021 if (emptymatch) { 1031 if (emptymatch) {
1022 /* Note: this somewhat expensive test should not be triggered 1032 /* Note: this somewhat expensive test should not be triggered
1023 often. It could be optimized away by examining the data in 1033 often. It could be optimized away by examining the data in
1024 the readbuf routine, and remembering the result. */ 1034 the readbuf routine, and remembering the result. */
1025 for (i = 0; i < 512; i++) { 1035 for (i = 0; i < 512; i++) {
1026 if (dat[i] == 0xff) continue; 1036 if (dat[i] == 0xff)
1037 continue;
1027 emptymatch = 0; 1038 emptymatch = 0;
1028 break; 1039 break;
1029 } 1040 }
@@ -1032,7 +1043,8 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_
1032 erased block, in which case the ECC will not come out right. 1043 erased block, in which case the ECC will not come out right.
1033 We'll suppress the error and tell the caller everything's 1044 We'll suppress the error and tell the caller everything's
1034 OK. Because it is. */ 1045 OK. Because it is. */
1035 if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc); 1046 if (!emptymatch)
1047 ret = doc_ecc_decode(rs_decoder, dat, calc_ecc);
1036 if (ret > 0) 1048 if (ret > 0)
1037 printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret); 1049 printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret);
1038 } 1050 }
@@ -1060,10 +1072,10 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_
1060 * be able to handle out-of-order segments. 1072 * be able to handle out-of-order segments.
1061 */ 1073 */
1062static struct nand_oobinfo doc200x_oobinfo = { 1074static struct nand_oobinfo doc200x_oobinfo = {
1063 .useecc = MTD_NANDECC_AUTOPLACE, 1075 .useecc = MTD_NANDECC_AUTOPLACE,
1064 .eccbytes = 6, 1076 .eccbytes = 6,
1065 .eccpos = {0, 1, 2, 3, 4, 5}, 1077 .eccpos = {0, 1, 2, 3, 4, 5},
1066 .oobfree = { {8, 8}, {6, 2} } 1078 .oobfree = {{8, 8}, {6, 2}}
1067}; 1079};
1068 1080
1069/* Find the (I)NFTL Media Header, and optionally also the mirror media header. 1081/* Find the (I)NFTL Media Header, and optionally also the mirror media header.
@@ -1072,8 +1084,7 @@ static struct nand_oobinfo doc200x_oobinfo = {
1072 either "ANAND" or "BNAND". If findmirror=1, also look for the mirror media 1084 either "ANAND" or "BNAND". If findmirror=1, also look for the mirror media
1073 header. The page #s of the found media headers are placed in mh0_page and 1085 header. The page #s of the found media headers are placed in mh0_page and
1074 mh1_page in the DOC private structure. */ 1086 mh1_page in the DOC private structure. */
1075static int __init find_media_headers(struct mtd_info *mtd, u_char *buf, 1087static int __init find_media_headers(struct mtd_info *mtd, u_char *buf, const char *id, int findmirror)
1076 const char *id, int findmirror)
1077{ 1088{
1078 struct nand_chip *this = mtd->priv; 1089 struct nand_chip *this = mtd->priv;
1079 struct doc_priv *doc = this->priv; 1090 struct doc_priv *doc = this->priv;
@@ -1083,16 +1094,18 @@ static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
1083 1094
1084 for (offs = 0; offs < mtd->size; offs += mtd->erasesize) { 1095 for (offs = 0; offs < mtd->size; offs += mtd->erasesize) {
1085 ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf); 1096 ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
1086 if (retlen != mtd->oobblock) continue; 1097 if (retlen != mtd->oobblock)
1098 continue;
1087 if (ret) { 1099 if (ret) {
1088 printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n", 1100 printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n", offs);
1089 offs);
1090 } 1101 }
1091 if (memcmp(buf, id, 6)) continue; 1102 if (memcmp(buf, id, 6))
1103 continue;
1092 printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs); 1104 printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs);
1093 if (doc->mh0_page == -1) { 1105 if (doc->mh0_page == -1) {
1094 doc->mh0_page = offs >> this->page_shift; 1106 doc->mh0_page = offs >> this->page_shift;
1095 if (!findmirror) return 1; 1107 if (!findmirror)
1108 return 1;
1096 continue; 1109 continue;
1097 } 1110 }
1098 doc->mh1_page = offs >> this->page_shift; 1111 doc->mh1_page = offs >> this->page_shift;
@@ -1114,8 +1127,7 @@ static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
1114 return 1; 1127 return 1;
1115} 1128}
1116 1129
1117static inline int __init nftl_partscan(struct mtd_info *mtd, 1130static inline int __init nftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts)
1118 struct mtd_partition *parts)
1119{ 1131{
1120 struct nand_chip *this = mtd->priv; 1132 struct nand_chip *this = mtd->priv;
1121 struct doc_priv *doc = this->priv; 1133 struct doc_priv *doc = this->priv;
@@ -1132,8 +1144,9 @@ static inline int __init nftl_partscan(struct mtd_info *mtd,
1132 printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n"); 1144 printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
1133 return 0; 1145 return 0;
1134 } 1146 }
1135 if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out; 1147 if (!(numheaders = find_media_headers(mtd, buf, "ANAND", 1)))
1136 mh = (struct NFTLMediaHeader *) buf; 1148 goto out;
1149 mh = (struct NFTLMediaHeader *)buf;
1137 1150
1138 mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits); 1151 mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits);
1139 mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN); 1152 mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN);
@@ -1155,8 +1168,8 @@ static inline int __init nftl_partscan(struct mtd_info *mtd,
1155 /* Auto-determine UnitSizeFactor. The constraints are: 1168 /* Auto-determine UnitSizeFactor. The constraints are:
1156 - There can be at most 32768 virtual blocks. 1169 - There can be at most 32768 virtual blocks.
1157 - There can be at most (virtual block size - page size) 1170 - There can be at most (virtual block size - page size)
1158 virtual blocks (because MediaHeader+BBT must fit in 1). 1171 virtual blocks (because MediaHeader+BBT must fit in 1).
1159 */ 1172 */
1160 mh->UnitSizeFactor = 0xff; 1173 mh->UnitSizeFactor = 0xff;
1161 while (blocks > maxblocks) { 1174 while (blocks > maxblocks) {
1162 blocks >>= 1; 1175 blocks >>= 1;
@@ -1211,14 +1224,13 @@ static inline int __init nftl_partscan(struct mtd_info *mtd,
1211 } 1224 }
1212 1225
1213 ret = numparts; 1226 ret = numparts;
1214out: 1227 out:
1215 kfree(buf); 1228 kfree(buf);
1216 return ret; 1229 return ret;
1217} 1230}
1218 1231
1219/* This is a stripped-down copy of the code in inftlmount.c */ 1232/* This is a stripped-down copy of the code in inftlmount.c */
1220static inline int __init inftl_partscan(struct mtd_info *mtd, 1233static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts)
1221 struct mtd_partition *parts)
1222{ 1234{
1223 struct nand_chip *this = mtd->priv; 1235 struct nand_chip *this = mtd->priv;
1224 struct doc_priv *doc = this->priv; 1236 struct doc_priv *doc = this->priv;
@@ -1241,9 +1253,10 @@ static inline int __init inftl_partscan(struct mtd_info *mtd,
1241 return 0; 1253 return 0;
1242 } 1254 }
1243 1255
1244 if (!find_media_headers(mtd, buf, "BNAND", 0)) goto out; 1256 if (!find_media_headers(mtd, buf, "BNAND", 0))
1257 goto out;
1245 doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift); 1258 doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
1246 mh = (struct INFTLMediaHeader *) buf; 1259 mh = (struct INFTLMediaHeader *)buf;
1247 1260
1248 mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks); 1261 mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks);
1249 mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions); 1262 mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions);
@@ -1319,8 +1332,10 @@ static inline int __init inftl_partscan(struct mtd_info *mtd,
1319 parts[numparts].offset = ip->firstUnit << vshift; 1332 parts[numparts].offset = ip->firstUnit << vshift;
1320 parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift; 1333 parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift;
1321 numparts++; 1334 numparts++;
1322 if (ip->lastUnit > lastvunit) lastvunit = ip->lastUnit; 1335 if (ip->lastUnit > lastvunit)
1323 if (ip->flags & INFTL_LAST) break; 1336 lastvunit = ip->lastUnit;
1337 if (ip->flags & INFTL_LAST)
1338 break;
1324 } 1339 }
1325 lastvunit++; 1340 lastvunit++;
1326 if ((lastvunit << vshift) < end) { 1341 if ((lastvunit << vshift) < end) {
@@ -1330,7 +1345,7 @@ static inline int __init inftl_partscan(struct mtd_info *mtd,
1330 numparts++; 1345 numparts++;
1331 } 1346 }
1332 ret = numparts; 1347 ret = numparts;
1333out: 1348 out:
1334 kfree(buf); 1349 kfree(buf);
1335 return ret; 1350 return ret;
1336} 1351}
@@ -1342,11 +1357,12 @@ static int __init nftl_scan_bbt(struct mtd_info *mtd)
1342 struct doc_priv *doc = this->priv; 1357 struct doc_priv *doc = this->priv;
1343 struct mtd_partition parts[2]; 1358 struct mtd_partition parts[2];
1344 1359
1345 memset((char *) parts, 0, sizeof(parts)); 1360 memset((char *)parts, 0, sizeof(parts));
1346 /* On NFTL, we have to find the media headers before we can read the 1361 /* On NFTL, we have to find the media headers before we can read the
1347 BBTs, since they're stored in the media header eraseblocks. */ 1362 BBTs, since they're stored in the media header eraseblocks. */
1348 numparts = nftl_partscan(mtd, parts); 1363 numparts = nftl_partscan(mtd, parts);
1349 if (!numparts) return -EIO; 1364 if (!numparts)
1365 return -EIO;
1350 this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT | 1366 this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
1351 NAND_BBT_SAVECONTENT | NAND_BBT_WRITE | 1367 NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
1352 NAND_BBT_VERSION; 1368 NAND_BBT_VERSION;
@@ -1393,8 +1409,7 @@ static int __init inftl_scan_bbt(struct mtd_info *mtd)
1393 this->bbt_td->pages[0] = 2; 1409 this->bbt_td->pages[0] = 2;
1394 this->bbt_md = NULL; 1410 this->bbt_md = NULL;
1395 } else { 1411 } else {
1396 this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | 1412 this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | NAND_BBT_VERSION;
1397 NAND_BBT_VERSION;
1398 if (inftl_bbt_write) 1413 if (inftl_bbt_write)
1399 this->bbt_td->options |= NAND_BBT_WRITE; 1414 this->bbt_td->options |= NAND_BBT_WRITE;
1400 this->bbt_td->offs = 8; 1415 this->bbt_td->offs = 8;
@@ -1404,8 +1419,7 @@ static int __init inftl_scan_bbt(struct mtd_info *mtd)
1404 this->bbt_td->reserved_block_code = 0x01; 1419 this->bbt_td->reserved_block_code = 0x01;
1405 this->bbt_td->pattern = "MSYS_BBT"; 1420 this->bbt_td->pattern = "MSYS_BBT";
1406 1421
1407 this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | 1422 this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT | NAND_BBT_VERSION;
1408 NAND_BBT_VERSION;
1409 if (inftl_bbt_write) 1423 if (inftl_bbt_write)
1410 this->bbt_md->options |= NAND_BBT_WRITE; 1424 this->bbt_md->options |= NAND_BBT_WRITE;
1411 this->bbt_md->offs = 8; 1425 this->bbt_md->offs = 8;
@@ -1420,12 +1434,13 @@ static int __init inftl_scan_bbt(struct mtd_info *mtd)
1420 At least as nand_bbt.c is currently written. */ 1434 At least as nand_bbt.c is currently written. */
1421 if ((ret = nand_scan_bbt(mtd, NULL))) 1435 if ((ret = nand_scan_bbt(mtd, NULL)))
1422 return ret; 1436 return ret;
1423 memset((char *) parts, 0, sizeof(parts)); 1437 memset((char *)parts, 0, sizeof(parts));
1424 numparts = inftl_partscan(mtd, parts); 1438 numparts = inftl_partscan(mtd, parts);
1425 /* At least for now, require the INFTL Media Header. We could probably 1439 /* At least for now, require the INFTL Media Header. We could probably
1426 do without it for non-INFTL use, since all it gives us is 1440 do without it for non-INFTL use, since all it gives us is
1427 autopartitioning, but I want to give it more thought. */ 1441 autopartitioning, but I want to give it more thought. */
1428 if (!numparts) return -EIO; 1442 if (!numparts)
1443 return -EIO;
1429 add_mtd_device(mtd); 1444 add_mtd_device(mtd);
1430#ifdef CONFIG_MTD_PARTITIONS 1445#ifdef CONFIG_MTD_PARTITIONS
1431 if (!no_autopart) 1446 if (!no_autopart)
@@ -1535,20 +1550,16 @@ static int __init doc_probe(unsigned long physadr)
1535 save_control = ReadDOC(virtadr, DOCControl); 1550 save_control = ReadDOC(virtadr, DOCControl);
1536 1551
1537 /* Reset the DiskOnChip ASIC */ 1552 /* Reset the DiskOnChip ASIC */
1538 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, 1553 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl);
1539 virtadr, DOCControl); 1554 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl);
1540 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
1541 virtadr, DOCControl);
1542 1555
1543 /* Enable the DiskOnChip ASIC */ 1556 /* Enable the DiskOnChip ASIC */
1544 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, 1557 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl);
1545 virtadr, DOCControl); 1558 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl);
1546 WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
1547 virtadr, DOCControl);
1548 1559
1549 ChipID = ReadDOC(virtadr, ChipID); 1560 ChipID = ReadDOC(virtadr, ChipID);
1550 1561
1551 switch(ChipID) { 1562 switch (ChipID) {
1552 case DOC_ChipID_Doc2k: 1563 case DOC_ChipID_Doc2k:
1553 reg = DoC_2k_ECCStatus; 1564 reg = DoC_2k_ECCStatus;
1554 break; 1565 break;
@@ -1564,15 +1575,13 @@ static int __init doc_probe(unsigned long physadr)
1564 ReadDOC(virtadr, Mplus_Power); 1575 ReadDOC(virtadr, Mplus_Power);
1565 1576
1566 /* Reset the Millennium Plus ASIC */ 1577 /* Reset the Millennium Plus ASIC */
1567 tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | 1578 tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | DOC_MODE_BDECT;
1568 DOC_MODE_BDECT;
1569 WriteDOC(tmp, virtadr, Mplus_DOCControl); 1579 WriteDOC(tmp, virtadr, Mplus_DOCControl);
1570 WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm); 1580 WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
1571 1581
1572 mdelay(1); 1582 mdelay(1);
1573 /* Enable the Millennium Plus ASIC */ 1583 /* Enable the Millennium Plus ASIC */
1574 tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | 1584 tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | DOC_MODE_BDECT;
1575 DOC_MODE_BDECT;
1576 WriteDOC(tmp, virtadr, Mplus_DOCControl); 1585 WriteDOC(tmp, virtadr, Mplus_DOCControl);
1577 WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm); 1586 WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
1578 mdelay(1); 1587 mdelay(1);
@@ -1596,7 +1605,7 @@ static int __init doc_probe(unsigned long physadr)
1596 goto notfound; 1605 goto notfound;
1597 } 1606 }
1598 /* Check the TOGGLE bit in the ECC register */ 1607 /* Check the TOGGLE bit in the ECC register */
1599 tmp = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT; 1608 tmp = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
1600 tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT; 1609 tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
1601 tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT; 1610 tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
1602 if ((tmp == tmpb) || (tmp != tmpc)) { 1611 if ((tmp == tmpb) || (tmp != tmpc)) {
@@ -1626,11 +1635,11 @@ static int __init doc_probe(unsigned long physadr)
1626 if (ChipID == DOC_ChipID_DocMilPlus16) { 1635 if (ChipID == DOC_ChipID_DocMilPlus16) {
1627 WriteDOC(~newval, virtadr, Mplus_AliasResolution); 1636 WriteDOC(~newval, virtadr, Mplus_AliasResolution);
1628 oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution); 1637 oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
1629 WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it 1638 WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it
1630 } else { 1639 } else {
1631 WriteDOC(~newval, virtadr, AliasResolution); 1640 WriteDOC(~newval, virtadr, AliasResolution);
1632 oldval = ReadDOC(doc->virtadr, AliasResolution); 1641 oldval = ReadDOC(doc->virtadr, AliasResolution);
1633 WriteDOC(newval, virtadr, AliasResolution); // restore it 1642 WriteDOC(newval, virtadr, AliasResolution); // restore it
1634 } 1643 }
1635 newval = ~newval; 1644 newval = ~newval;
1636 if (oldval == newval) { 1645 if (oldval == newval) {
@@ -1642,10 +1651,8 @@ static int __init doc_probe(unsigned long physadr)
1642 printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr); 1651 printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
1643 1652
1644 len = sizeof(struct mtd_info) + 1653 len = sizeof(struct mtd_info) +
1645 sizeof(struct nand_chip) + 1654 sizeof(struct nand_chip) + sizeof(struct doc_priv) + (2 * sizeof(struct nand_bbt_descr));
1646 sizeof(struct doc_priv) + 1655 mtd = kmalloc(len, GFP_KERNEL);
1647 (2 * sizeof(struct nand_bbt_descr));
1648 mtd = kmalloc(len, GFP_KERNEL);
1649 if (!mtd) { 1656 if (!mtd) {
1650 printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len); 1657 printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len);
1651 ret = -ENOMEM; 1658 ret = -ENOMEM;
@@ -1707,18 +1714,18 @@ static int __init doc_probe(unsigned long physadr)
1707 doclist = mtd; 1714 doclist = mtd;
1708 return 0; 1715 return 0;
1709 1716
1710notfound: 1717 notfound:
1711 /* Put back the contents of the DOCControl register, in case it's not 1718 /* Put back the contents of the DOCControl register, in case it's not
1712 actually a DiskOnChip. */ 1719 actually a DiskOnChip. */
1713 WriteDOC(save_control, virtadr, DOCControl); 1720 WriteDOC(save_control, virtadr, DOCControl);
1714fail: 1721 fail:
1715 iounmap(virtadr); 1722 iounmap(virtadr);
1716 return ret; 1723 return ret;
1717} 1724}
1718 1725
1719static void release_nanddoc(void) 1726static void release_nanddoc(void)
1720{ 1727{
1721 struct mtd_info *mtd, *nextmtd; 1728 struct mtd_info *mtd, *nextmtd;
1722 struct nand_chip *nand; 1729 struct nand_chip *nand;
1723 struct doc_priv *doc; 1730 struct doc_priv *doc;
1724 1731
@@ -1747,8 +1754,8 @@ static int __init init_nanddoc(void)
1747 * generator polinomial degree = 4 1754 * generator polinomial degree = 4
1748 */ 1755 */
1749 rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS); 1756 rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
1750 if (!rs_decoder) { 1757 if (!rs_decoder) {
1751 printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n"); 1758 printk(KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
1752 return -ENOMEM; 1759 return -ENOMEM;
1753 } 1760 }
1754 1761
@@ -1758,7 +1765,7 @@ static int __init init_nanddoc(void)
1758 if (ret < 0) 1765 if (ret < 0)
1759 goto outerr; 1766 goto outerr;
1760 } else { 1767 } else {
1761 for (i=0; (doc_locations[i] != 0xffffffff); i++) { 1768 for (i = 0; (doc_locations[i] != 0xffffffff); i++) {
1762 doc_probe(doc_locations[i]); 1769 doc_probe(doc_locations[i]);
1763 } 1770 }
1764 } 1771 }
@@ -1770,7 +1777,7 @@ static int __init init_nanddoc(void)
1770 goto outerr; 1777 goto outerr;
1771 } 1778 }
1772 return 0; 1779 return 0;
1773outerr: 1780 outerr:
1774 free_rs(rs_decoder); 1781 free_rs(rs_decoder);
1775 return ret; 1782 return ret;
1776} 1783}
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
index 9b1fd2f387fa..8e56570af91f 100644
--- a/drivers/mtd/nand/edb7312.c
+++ b/drivers/mtd/nand/edb7312.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/mtd/nand/edb7312.c 2 * drivers/mtd/nand/edb7312.c
3 * 3 *
4 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) 4 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
5 * 5 *
6 * Derived from drivers/mtd/nand/autcpu12.c 6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) 7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
@@ -25,7 +25,7 @@
25#include <linux/mtd/nand.h> 25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */ 28#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
29#include <asm/sizes.h> 29#include <asm/sizes.h>
30#include <asm/hardware/clps7111.h> 30#include <asm/hardware/clps7111.h>
31 31
@@ -54,29 +54,29 @@ static struct mtd_info *ep7312_mtd = NULL;
54 */ 54 */
55 55
56static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE; 56static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
57static void __iomem * ep7312_pxdr = (void __iomem *) EP7312_PXDR; 57static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
58static void __iomem * ep7312_pxddr = (void __iomem *) EP7312_PXDDR; 58static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
59 59
60#ifdef CONFIG_MTD_PARTITIONS 60#ifdef CONFIG_MTD_PARTITIONS
61/* 61/*
62 * Define static partitions for flash device 62 * Define static partitions for flash device
63 */ 63 */
64static struct mtd_partition partition_info[] = { 64static struct mtd_partition partition_info[] = {
65 { .name = "EP7312 Nand Flash", 65 {.name = "EP7312 Nand Flash",
66 .offset = 0, 66 .offset = 0,
67 .size = 8*1024*1024 } 67 .size = 8 * 1024 * 1024}
68}; 68};
69
69#define NUM_PARTITIONS 1 70#define NUM_PARTITIONS 1
70 71
71#endif 72#endif
72 73
73
74/* 74/*
75 * hardware specific access to control-lines 75 * hardware specific access to control-lines
76 */ 76 */
77static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd) 77static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd)
78{ 78{
79 switch(cmd) { 79 switch (cmd) {
80 80
81 case NAND_CTL_SETCLE: 81 case NAND_CTL_SETCLE:
82 clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr); 82 clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr);
@@ -108,6 +108,7 @@ static int ep7312_device_ready(struct mtd_info *mtd)
108{ 108{
109 return 1; 109 return 1;
110} 110}
111
111#ifdef CONFIG_MTD_PARTITIONS 112#ifdef CONFIG_MTD_PARTITIONS
112const char *part_probes[] = { "cmdlinepart", NULL }; 113const char *part_probes[] = { "cmdlinepart", NULL };
113#endif 114#endif
@@ -115,18 +116,16 @@ const char *part_probes[] = { "cmdlinepart", NULL };
115/* 116/*
116 * Main initialization routine 117 * Main initialization routine
117 */ 118 */
118static int __init ep7312_init (void) 119static int __init ep7312_init(void)
119{ 120{
120 struct nand_chip *this; 121 struct nand_chip *this;
121 const char *part_type = 0; 122 const char *part_type = 0;
122 int mtd_parts_nb = 0; 123 int mtd_parts_nb = 0;
123 struct mtd_partition *mtd_parts = 0; 124 struct mtd_partition *mtd_parts = 0;
124 void __iomem * ep7312_fio_base; 125 void __iomem *ep7312_fio_base;
125 126
126 /* Allocate memory for MTD device structure and private data */ 127 /* Allocate memory for MTD device structure and private data */
127 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + 128 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
128 sizeof(struct nand_chip),
129 GFP_KERNEL);
130 if (!ep7312_mtd) { 129 if (!ep7312_mtd) {
131 printk("Unable to allocate EDB7312 NAND MTD device structure.\n"); 130 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
132 return -ENOMEM; 131 return -ENOMEM;
@@ -134,21 +133,22 @@ static int __init ep7312_init (void)
134 133
135 /* map physical adress */ 134 /* map physical adress */
136 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K); 135 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
137 if(!ep7312_fio_base) { 136 if (!ep7312_fio_base) {
138 printk("ioremap EDB7312 NAND flash failed\n"); 137 printk("ioremap EDB7312 NAND flash failed\n");
139 kfree(ep7312_mtd); 138 kfree(ep7312_mtd);
140 return -EIO; 139 return -EIO;
141 } 140 }
142 141
143 /* Get pointer to private data */ 142 /* Get pointer to private data */
144 this = (struct nand_chip *) (&ep7312_mtd[1]); 143 this = (struct nand_chip *)(&ep7312_mtd[1]);
145 144
146 /* Initialize structures */ 145 /* Initialize structures */
147 memset((char *) ep7312_mtd, 0, sizeof(struct mtd_info)); 146 memset(ep7312_mtd, 0, sizeof(struct mtd_info));
148 memset((char *) this, 0, sizeof(struct nand_chip)); 147 memset(this, 0, sizeof(struct nand_chip));
149 148
150 /* Link the private data with the MTD structure */ 149 /* Link the private data with the MTD structure */
151 ep7312_mtd->priv = this; 150 ep7312_mtd->priv = this;
151 ep7312_mtd->owner = THIS_MODULE;
152 152
153 /* 153 /*
154 * Set GPIO Port B control register so that the pins are configured 154 * Set GPIO Port B control register so that the pins are configured
@@ -165,16 +165,14 @@ static int __init ep7312_init (void)
165 this->chip_delay = 15; 165 this->chip_delay = 15;
166 166
167 /* Scan to find existence of the device */ 167 /* Scan to find existence of the device */
168 if (nand_scan (ep7312_mtd, 1)) { 168 if (nand_scan(ep7312_mtd, 1)) {
169 iounmap((void *)ep7312_fio_base); 169 iounmap((void *)ep7312_fio_base);
170 kfree (ep7312_mtd); 170 kfree(ep7312_mtd);
171 return -ENXIO; 171 return -ENXIO;
172 } 172 }
173
174#ifdef CONFIG_MTD_PARTITIONS 173#ifdef CONFIG_MTD_PARTITIONS
175 ep7312_mtd->name = "edb7312-nand"; 174 ep7312_mtd->name = "edb7312-nand";
176 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, 175 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
177 &mtd_parts, 0);
178 if (mtd_parts_nb > 0) 176 if (mtd_parts_nb > 0)
179 part_type = "command line"; 177 part_type = "command line";
180 else 178 else
@@ -193,24 +191,26 @@ static int __init ep7312_init (void)
193 /* Return happy */ 191 /* Return happy */
194 return 0; 192 return 0;
195} 193}
194
196module_init(ep7312_init); 195module_init(ep7312_init);
197 196
198/* 197/*
199 * Clean up routine 198 * Clean up routine
200 */ 199 */
201static void __exit ep7312_cleanup (void) 200static void __exit ep7312_cleanup(void)
202{ 201{
203 struct nand_chip *this = (struct nand_chip *) &ep7312_mtd[1]; 202 struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
204 203
205 /* Release resources, unregister device */ 204 /* Release resources, unregister device */
206 nand_release (ap7312_mtd); 205 nand_release(ap7312_mtd);
207 206
208 /* Free internal data buffer */ 207 /* Free internal data buffer */
209 kfree (this->data_buf); 208 kfree(this->data_buf);
210 209
211 /* Free the MTD device structure */ 210 /* Free the MTD device structure */
212 kfree (ep7312_mtd); 211 kfree(ep7312_mtd);
213} 212}
213
214module_exit(ep7312_cleanup); 214module_exit(ep7312_cleanup);
215 215
216MODULE_LICENSE("GPL"); 216MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c
index f68f7a99a630..9848eb09b884 100644
--- a/drivers/mtd/nand/h1910.c
+++ b/drivers/mtd/nand/h1910.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 2003 Joshua Wise (joshua@joshuawise.com) 4 * Copyright (C) 2003 Joshua Wise (joshua@joshuawise.com)
5 * 5 *
6 * Derived from drivers/mtd/nand/edb7312.c 6 * Derived from drivers/mtd/nand/edb7312.c
7 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) 7 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
8 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) 8 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
9 * 9 *
10 * $Id: h1910.c,v 1.6 2005/11/07 11:14:30 gleixner Exp $ 10 * $Id: h1910.c,v 1.6 2005/11/07 11:14:30 gleixner Exp $
@@ -26,7 +26,7 @@
26#include <linux/mtd/nand.h> 26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */ 29#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
30#include <asm/sizes.h> 30#include <asm/sizes.h>
31#include <asm/arch/h1900-gpio.h> 31#include <asm/arch/h1900-gpio.h>
32#include <asm/arch/ipaq.h> 32#include <asm/arch/ipaq.h>
@@ -45,23 +45,23 @@ static struct mtd_info *h1910_nand_mtd = NULL;
45 * Define static partitions for flash device 45 * Define static partitions for flash device
46 */ 46 */
47static struct mtd_partition partition_info[] = { 47static struct mtd_partition partition_info[] = {
48 { name: "h1910 NAND Flash", 48 {name:"h1910 NAND Flash",
49 offset: 0, 49 offset:0,
50 size: 16*1024*1024 } 50 size:16 * 1024 * 1024}
51}; 51};
52
52#define NUM_PARTITIONS 1 53#define NUM_PARTITIONS 1
53 54
54#endif 55#endif
55 56
56
57/* 57/*
58 * hardware specific access to control-lines 58 * hardware specific access to control-lines
59 */ 59 */
60static void h1910_hwcontrol(struct mtd_info *mtd, int cmd) 60static void h1910_hwcontrol(struct mtd_info *mtd, int cmd)
61{ 61{
62 struct nand_chip* this = (struct nand_chip *) (mtd->priv); 62 struct nand_chip *this = (struct nand_chip *)(mtd->priv);
63 63
64 switch(cmd) { 64 switch (cmd) {
65 65
66 case NAND_CTL_SETCLE: 66 case NAND_CTL_SETCLE:
67 this->IO_ADDR_R |= (1 << 2); 67 this->IO_ADDR_R |= (1 << 2);
@@ -101,7 +101,7 @@ static int h1910_device_ready(struct mtd_info *mtd)
101/* 101/*
102 * Main initialization routine 102 * Main initialization routine
103 */ 103 */
104static int __init h1910_init (void) 104static int __init h1910_init(void)
105{ 105{
106 struct nand_chip *this; 106 struct nand_chip *this;
107 const char *part_type = 0; 107 const char *part_type = 0;
@@ -119,24 +119,23 @@ static int __init h1910_init (void)
119 } 119 }
120 120
121 /* Allocate memory for MTD device structure and private data */ 121 /* Allocate memory for MTD device structure and private data */
122 h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + 122 h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
123 sizeof(struct nand_chip),
124 GFP_KERNEL);
125 if (!h1910_nand_mtd) { 123 if (!h1910_nand_mtd) {
126 printk("Unable to allocate h1910 NAND MTD device structure.\n"); 124 printk("Unable to allocate h1910 NAND MTD device structure.\n");
127 iounmap ((void *) nandaddr); 125 iounmap((void *)nandaddr);
128 return -ENOMEM; 126 return -ENOMEM;
129 } 127 }
130 128
131 /* Get pointer to private data */ 129 /* Get pointer to private data */
132 this = (struct nand_chip *) (&h1910_nand_mtd[1]); 130 this = (struct nand_chip *)(&h1910_nand_mtd[1]);
133 131
134 /* Initialize structures */ 132 /* Initialize structures */
135 memset((char *) h1910_nand_mtd, 0, sizeof(struct mtd_info)); 133 memset(h1910_nand_mtd, 0, sizeof(struct mtd_info));
136 memset((char *) this, 0, sizeof(struct nand_chip)); 134 memset(this, 0, sizeof(struct nand_chip));
137 135
138 /* Link the private data with the MTD structure */ 136 /* Link the private data with the MTD structure */
139 h1910_nand_mtd->priv = this; 137 h1910_nand_mtd->priv = this;
138 h1910_nand_mtd->owner = THIS_MODULE;
140 139
141 /* 140 /*
142 * Enable VPEN 141 * Enable VPEN
@@ -154,23 +153,20 @@ static int __init h1910_init (void)
154 this->options = NAND_NO_AUTOINCR; 153 this->options = NAND_NO_AUTOINCR;
155 154
156 /* Scan to find existence of the device */ 155 /* Scan to find existence of the device */
157 if (nand_scan (h1910_nand_mtd, 1)) { 156 if (nand_scan(h1910_nand_mtd, 1)) {
158 printk(KERN_NOTICE "No NAND device - returning -ENXIO\n"); 157 printk(KERN_NOTICE "No NAND device - returning -ENXIO\n");
159 kfree (h1910_nand_mtd); 158 kfree(h1910_nand_mtd);
160 iounmap ((void *) nandaddr); 159 iounmap((void *)nandaddr);
161 return -ENXIO; 160 return -ENXIO;
162 } 161 }
163
164#ifdef CONFIG_MTD_CMDLINE_PARTS 162#ifdef CONFIG_MTD_CMDLINE_PARTS
165 mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts, 163 mtd_parts_nb = parse_cmdline_partitions(h1910_nand_mtd, &mtd_parts, "h1910-nand");
166 "h1910-nand");
167 if (mtd_parts_nb > 0) 164 if (mtd_parts_nb > 0)
168 part_type = "command line"; 165 part_type = "command line";
169 else 166 else
170 mtd_parts_nb = 0; 167 mtd_parts_nb = 0;
171#endif 168#endif
172 if (mtd_parts_nb == 0) 169 if (mtd_parts_nb == 0) {
173 {
174 mtd_parts = partition_info; 170 mtd_parts = partition_info;
175 mtd_parts_nb = NUM_PARTITIONS; 171 mtd_parts_nb = NUM_PARTITIONS;
176 part_type = "static"; 172 part_type = "static";
@@ -183,24 +179,26 @@ static int __init h1910_init (void)
183 /* Return happy */ 179 /* Return happy */
184 return 0; 180 return 0;
185} 181}
182
186module_init(h1910_init); 183module_init(h1910_init);
187 184
188/* 185/*
189 * Clean up routine 186 * Clean up routine
190 */ 187 */
191static void __exit h1910_cleanup (void) 188static void __exit h1910_cleanup(void)
192{ 189{
193 struct nand_chip *this = (struct nand_chip *) &h1910_nand_mtd[1]; 190 struct nand_chip *this = (struct nand_chip *)&h1910_nand_mtd[1];
194 191
195 /* Release resources, unregister device */ 192 /* Release resources, unregister device */
196 nand_release (h1910_nand_mtd); 193 nand_release(h1910_nand_mtd);
197 194
198 /* Release io resource */ 195 /* Release io resource */
199 iounmap ((void *) this->IO_ADDR_W); 196 iounmap((void *)this->IO_ADDR_W);
200 197
201 /* Free the MTD device structure */ 198 /* Free the MTD device structure */
202 kfree (h1910_nand_mtd); 199 kfree(h1910_nand_mtd);
203} 200}
201
204module_exit(h1910_cleanup); 202module_exit(h1910_cleanup);
205 203
206MODULE_LICENSE("GPL"); 204MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 95e96fa1fceb..08dffb7a9389 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -69,6 +69,7 @@
69 * 69 *
70 */ 70 */
71 71
72#include <linux/module.h>
72#include <linux/delay.h> 73#include <linux/delay.h>
73#include <linux/errno.h> 74#include <linux/errno.h>
74#include <linux/sched.h> 75#include <linux/sched.h>
@@ -92,24 +93,24 @@ static struct nand_oobinfo nand_oob_8 = {
92 .useecc = MTD_NANDECC_AUTOPLACE, 93 .useecc = MTD_NANDECC_AUTOPLACE,
93 .eccbytes = 3, 94 .eccbytes = 3,
94 .eccpos = {0, 1, 2}, 95 .eccpos = {0, 1, 2},
95 .oobfree = { {3, 2}, {6, 2} } 96 .oobfree = {{3, 2}, {6, 2}}
96}; 97};
97 98
98static struct nand_oobinfo nand_oob_16 = { 99static struct nand_oobinfo nand_oob_16 = {
99 .useecc = MTD_NANDECC_AUTOPLACE, 100 .useecc = MTD_NANDECC_AUTOPLACE,
100 .eccbytes = 6, 101 .eccbytes = 6,
101 .eccpos = {0, 1, 2, 3, 6, 7}, 102 .eccpos = {0, 1, 2, 3, 6, 7},
102 .oobfree = { {8, 8} } 103 .oobfree = {{8, 8}}
103}; 104};
104 105
105static struct nand_oobinfo nand_oob_64 = { 106static struct nand_oobinfo nand_oob_64 = {
106 .useecc = MTD_NANDECC_AUTOPLACE, 107 .useecc = MTD_NANDECC_AUTOPLACE,
107 .eccbytes = 24, 108 .eccbytes = 24,
108 .eccpos = { 109 .eccpos = {
109 40, 41, 42, 43, 44, 45, 46, 47, 110 40, 41, 42, 43, 44, 45, 46, 47,
110 48, 49, 50, 51, 52, 53, 54, 55, 111 48, 49, 50, 51, 52, 53, 54, 55,
111 56, 57, 58, 59, 60, 61, 62, 63}, 112 56, 57, 58, 59, 60, 61, 62, 63},
112 .oobfree = { {2, 38} } 113 .oobfree = {{2, 38}}
113}; 114};
114 115
115/* This is used for padding purposes in nand_write_oob */ 116/* This is used for padding purposes in nand_write_oob */
@@ -131,32 +132,32 @@ static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
131static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len); 132static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
132static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len); 133static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
133 134
134static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf); 135static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
135static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, 136static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
136 size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel); 137 size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
137static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf); 138static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
138static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf); 139static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
139static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len, 140static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
140 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel); 141 size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
141static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf); 142static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
142static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, 143static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
143 unsigned long count, loff_t to, size_t * retlen); 144static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
144static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, 145 unsigned long count, loff_t to, size_t *retlen, u_char *eccbuf,
145 unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel); 146 struct nand_oobinfo *oobsel);
146static int nand_erase (struct mtd_info *mtd, struct erase_info *instr); 147static int nand_erase(struct mtd_info *mtd, struct erase_info *instr);
147static void nand_sync (struct mtd_info *mtd); 148static void nand_sync(struct mtd_info *mtd);
148 149
149/* Some internal functions */ 150/* Some internal functions */
150static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf, 151static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, u_char * oob_buf,
151 struct nand_oobinfo *oobsel, int mode); 152 struct nand_oobinfo *oobsel, int mode);
152#ifdef CONFIG_MTD_NAND_VERIFY_WRITE 153#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
153static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, 154static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
154 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode); 155 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
155#else 156#else
156#define nand_verify_pages(...) (0) 157#define nand_verify_pages(...) (0)
157#endif 158#endif
158 159
159static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state); 160static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state);
160 161
161/** 162/**
162 * nand_release_device - [GENERIC] release chip 163 * nand_release_device - [GENERIC] release chip
@@ -164,7 +165,7 @@ static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int ne
164 * 165 *
165 * Deselect, release chip lock and wake up anyone waiting on the device 166 * Deselect, release chip lock and wake up anyone waiting on the device
166 */ 167 */
167static void nand_release_device (struct mtd_info *mtd) 168static void nand_release_device(struct mtd_info *mtd)
168{ 169{
169 struct nand_chip *this = mtd->priv; 170 struct nand_chip *this = mtd->priv;
170 171
@@ -276,7 +277,7 @@ static void nand_write_word(struct mtd_info *mtd, u16 word)
276static void nand_select_chip(struct mtd_info *mtd, int chip) 277static void nand_select_chip(struct mtd_info *mtd, int chip)
277{ 278{
278 struct nand_chip *this = mtd->priv; 279 struct nand_chip *this = mtd->priv;
279 switch(chip) { 280 switch (chip) {
280 case -1: 281 case -1:
281 this->hwcontrol(mtd, NAND_CTL_CLRNCE); 282 this->hwcontrol(mtd, NAND_CTL_CLRNCE);
282 break; 283 break;
@@ -302,7 +303,7 @@ static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
302 int i; 303 int i;
303 struct nand_chip *this = mtd->priv; 304 struct nand_chip *this = mtd->priv;
304 305
305 for (i=0; i<len; i++) 306 for (i = 0; i < len; i++)
306 writeb(buf[i], this->IO_ADDR_W); 307 writeb(buf[i], this->IO_ADDR_W);
307} 308}
308 309
@@ -319,7 +320,7 @@ static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
319 int i; 320 int i;
320 struct nand_chip *this = mtd->priv; 321 struct nand_chip *this = mtd->priv;
321 322
322 for (i=0; i<len; i++) 323 for (i = 0; i < len; i++)
323 buf[i] = readb(this->IO_ADDR_R); 324 buf[i] = readb(this->IO_ADDR_R);
324} 325}
325 326
@@ -336,7 +337,7 @@ static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
336 int i; 337 int i;
337 struct nand_chip *this = mtd->priv; 338 struct nand_chip *this = mtd->priv;
338 339
339 for (i=0; i<len; i++) 340 for (i = 0; i < len; i++)
340 if (buf[i] != readb(this->IO_ADDR_R)) 341 if (buf[i] != readb(this->IO_ADDR_R))
341 return -EFAULT; 342 return -EFAULT;
342 343
@@ -358,7 +359,7 @@ static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
358 u16 *p = (u16 *) buf; 359 u16 *p = (u16 *) buf;
359 len >>= 1; 360 len >>= 1;
360 361
361 for (i=0; i<len; i++) 362 for (i = 0; i < len; i++)
362 writew(p[i], this->IO_ADDR_W); 363 writew(p[i], this->IO_ADDR_W);
363 364
364} 365}
@@ -378,7 +379,7 @@ static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
378 u16 *p = (u16 *) buf; 379 u16 *p = (u16 *) buf;
379 len >>= 1; 380 len >>= 1;
380 381
381 for (i=0; i<len; i++) 382 for (i = 0; i < len; i++)
382 p[i] = readw(this->IO_ADDR_R); 383 p[i] = readw(this->IO_ADDR_R);
383} 384}
384 385
@@ -397,7 +398,7 @@ static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
397 u16 *p = (u16 *) buf; 398 u16 *p = (u16 *) buf;
398 len >>= 1; 399 len >>= 1;
399 400
400 for (i=0; i<len; i++) 401 for (i = 0; i < len; i++)
401 if (p[i] != readw(this->IO_ADDR_R)) 402 if (p[i] != readw(this->IO_ADDR_R))
402 return -EFAULT; 403 return -EFAULT;
403 404
@@ -423,22 +424,22 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
423 chipnr = (int)(ofs >> this->chip_shift); 424 chipnr = (int)(ofs >> this->chip_shift);
424 425
425 /* Grab the lock and see if the device is available */ 426 /* Grab the lock and see if the device is available */
426 nand_get_device (this, mtd, FL_READING); 427 nand_get_device(this, mtd, FL_READING);
427 428
428 /* Select the NAND device */ 429 /* Select the NAND device */
429 this->select_chip(mtd, chipnr); 430 this->select_chip(mtd, chipnr);
430 } else 431 } else
431 page = (int) ofs; 432 page = (int)ofs;
432 433
433 if (this->options & NAND_BUSWIDTH_16) { 434 if (this->options & NAND_BUSWIDTH_16) {
434 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask); 435 this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
435 bad = cpu_to_le16(this->read_word(mtd)); 436 bad = cpu_to_le16(this->read_word(mtd));
436 if (this->badblockpos & 0x1) 437 if (this->badblockpos & 0x1)
437 bad >>= 8; 438 bad >>= 8;
438 if ((bad & 0xFF) != 0xff) 439 if ((bad & 0xFF) != 0xff)
439 res = 1; 440 res = 1;
440 } else { 441 } else {
441 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask); 442 this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
442 if (this->read_byte(mtd) != 0xff) 443 if (this->read_byte(mtd) != 0xff)
443 res = 1; 444 res = 1;
444 } 445 }
@@ -462,22 +463,22 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
462static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 463static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
463{ 464{
464 struct nand_chip *this = mtd->priv; 465 struct nand_chip *this = mtd->priv;
465 u_char buf[2] = {0, 0}; 466 u_char buf[2] = { 0, 0 };
466 size_t retlen; 467 size_t retlen;
467 int block; 468 int block;
468 469
469 /* Get block number */ 470 /* Get block number */
470 block = ((int) ofs) >> this->bbt_erase_shift; 471 block = ((int)ofs) >> this->bbt_erase_shift;
471 if (this->bbt) 472 if (this->bbt)
472 this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 473 this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
473 474
474 /* Do we have a flash based bad block table ? */ 475 /* Do we have a flash based bad block table ? */
475 if (this->options & NAND_USE_FLASH_BBT) 476 if (this->options & NAND_USE_FLASH_BBT)
476 return nand_update_bbt (mtd, ofs); 477 return nand_update_bbt(mtd, ofs);
477 478
478 /* We write two bytes, so we dont have to mess with 16 bit access */ 479 /* We write two bytes, so we dont have to mess with 16 bit access */
479 ofs += mtd->oobsize + (this->badblockpos & ~0x01); 480 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
480 return nand_write_oob (mtd, ofs , 2, &retlen, buf); 481 return nand_write_oob(mtd, ofs, 2, &retlen, buf);
481} 482}
482 483
483/** 484/**
@@ -487,11 +488,11 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
487 * 488 *
488 * The function expects, that the device is already selected 489 * The function expects, that the device is already selected
489 */ 490 */
490static int nand_check_wp (struct mtd_info *mtd) 491static int nand_check_wp(struct mtd_info *mtd)
491{ 492{
492 struct nand_chip *this = mtd->priv; 493 struct nand_chip *this = mtd->priv;
493 /* Check the WP bit */ 494 /* Check the WP bit */
494 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1); 495 this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
495 return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; 496 return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
496} 497}
497 498
@@ -505,7 +506,7 @@ static int nand_check_wp (struct mtd_info *mtd)
505 * Check, if the block is bad. Either by reading the bad block table or 506 * Check, if the block is bad. Either by reading the bad block table or
506 * calling of the scan function. 507 * calling of the scan function.
507 */ 508 */
508static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) 509static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
509{ 510{
510 struct nand_chip *this = mtd->priv; 511 struct nand_chip *this = mtd->priv;
511 512
@@ -513,7 +514,7 @@ static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, i
513 return this->block_bad(mtd, ofs, getchip); 514 return this->block_bad(mtd, ofs, getchip);
514 515
515 /* Return info from the table */ 516 /* Return info from the table */
516 return nand_isbad_bbt (mtd, ofs, allowbbt); 517 return nand_isbad_bbt(mtd, ofs, allowbbt);
517} 518}
518 519
519DEFINE_LED_TRIGGER(nand_led_trigger); 520DEFINE_LED_TRIGGER(nand_led_trigger);
@@ -525,7 +526,7 @@ DEFINE_LED_TRIGGER(nand_led_trigger);
525static void nand_wait_ready(struct mtd_info *mtd) 526static void nand_wait_ready(struct mtd_info *mtd)
526{ 527{
527 struct nand_chip *this = mtd->priv; 528 struct nand_chip *this = mtd->priv;
528 unsigned long timeo = jiffies + 2; 529 unsigned long timeo = jiffies + 2;
529 530
530 led_trigger_event(nand_led_trigger, LED_FULL); 531 led_trigger_event(nand_led_trigger, LED_FULL);
531 /* wait until command is processed or timeout occures */ 532 /* wait until command is processed or timeout occures */
@@ -547,7 +548,7 @@ static void nand_wait_ready(struct mtd_info *mtd)
547 * Send command to NAND device. This function is used for small page 548 * Send command to NAND device. This function is used for small page
548 * devices (256/512 Bytes per page) 549 * devices (256/512 Bytes per page)
549 */ 550 */
550static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr) 551static void nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
551{ 552{
552 register struct nand_chip *this = mtd->priv; 553 register struct nand_chip *this = mtd->priv;
553 554
@@ -588,11 +589,11 @@ static void nand_command (struct mtd_info *mtd, unsigned command, int column, in
588 this->write_byte(mtd, column); 589 this->write_byte(mtd, column);
589 } 590 }
590 if (page_addr != -1) { 591 if (page_addr != -1) {
591 this->write_byte(mtd, (unsigned char) (page_addr & 0xff)); 592 this->write_byte(mtd, (unsigned char)(page_addr & 0xff));
592 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff)); 593 this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff));
593 /* One more address cycle for devices > 32MiB */ 594 /* One more address cycle for devices > 32MiB */
594 if (this->chipsize > (32 << 20)) 595 if (this->chipsize > (32 << 20))
595 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f)); 596 this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0x0f));
596 } 597 }
597 /* Latch in address */ 598 /* Latch in address */
598 this->hwcontrol(mtd, NAND_CTL_CLRALE); 599 this->hwcontrol(mtd, NAND_CTL_CLRALE);
@@ -601,7 +602,7 @@ static void nand_command (struct mtd_info *mtd, unsigned command, int column, in
601 /* 602 /*
602 * program and erase have their own busy handlers 603 * program and erase have their own busy handlers
603 * status and sequential in needs no delay 604 * status and sequential in needs no delay
604 */ 605 */
605 switch (command) { 606 switch (command) {
606 607
607 case NAND_CMD_PAGEPROG: 608 case NAND_CMD_PAGEPROG:
@@ -618,23 +619,23 @@ static void nand_command (struct mtd_info *mtd, unsigned command, int column, in
618 this->hwcontrol(mtd, NAND_CTL_SETCLE); 619 this->hwcontrol(mtd, NAND_CTL_SETCLE);
619 this->write_byte(mtd, NAND_CMD_STATUS); 620 this->write_byte(mtd, NAND_CMD_STATUS);
620 this->hwcontrol(mtd, NAND_CTL_CLRCLE); 621 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
621 while ( !(this->read_byte(mtd) & NAND_STATUS_READY)); 622 while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ;
622 return; 623 return;
623 624
624 /* This applies to read commands */ 625 /* This applies to read commands */
625 default: 626 default:
626 /* 627 /*
627 * If we don't have access to the busy pin, we apply the given 628 * If we don't have access to the busy pin, we apply the given
628 * command delay 629 * command delay
629 */ 630 */
630 if (!this->dev_ready) { 631 if (!this->dev_ready) {
631 udelay (this->chip_delay); 632 udelay(this->chip_delay);
632 return; 633 return;
633 } 634 }
634 } 635 }
635 /* Apply this short delay always to ensure that we do wait tWB in 636 /* Apply this short delay always to ensure that we do wait tWB in
636 * any case on any machine. */ 637 * any case on any machine. */
637 ndelay (100); 638 ndelay(100);
638 639
639 nand_wait_ready(mtd); 640 nand_wait_ready(mtd);
640} 641}
@@ -647,11 +648,11 @@ static void nand_command (struct mtd_info *mtd, unsigned command, int column, in
647 * @page_addr: the page address for this command, -1 if none 648 * @page_addr: the page address for this command, -1 if none
648 * 649 *
649 * Send command to NAND device. This is the version for the new large page devices 650 * Send command to NAND device. This is the version for the new large page devices
650 * We dont have the seperate regions as we have in the small page devices. 651 * We dont have the separate regions as we have in the small page devices.
651 * We must emulate NAND_CMD_READOOB to keep the code compatible. 652 * We must emulate NAND_CMD_READOOB to keep the code compatible.
652 * 653 *
653 */ 654 */
654static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr) 655static void nand_command_lp(struct mtd_info *mtd, unsigned command, int column, int page_addr)
655{ 656{
656 register struct nand_chip *this = mtd->priv; 657 register struct nand_chip *this = mtd->priv;
657 658
@@ -661,7 +662,6 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
661 command = NAND_CMD_READ0; 662 command = NAND_CMD_READ0;
662 } 663 }
663 664
664
665 /* Begin command latch cycle */ 665 /* Begin command latch cycle */
666 this->hwcontrol(mtd, NAND_CTL_SETCLE); 666 this->hwcontrol(mtd, NAND_CTL_SETCLE);
667 /* Write out the command to the device. */ 667 /* Write out the command to the device. */
@@ -681,11 +681,11 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
681 this->write_byte(mtd, column >> 8); 681 this->write_byte(mtd, column >> 8);
682 } 682 }
683 if (page_addr != -1) { 683 if (page_addr != -1) {
684 this->write_byte(mtd, (unsigned char) (page_addr & 0xff)); 684 this->write_byte(mtd, (unsigned char)(page_addr & 0xff));
685 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff)); 685 this->write_byte(mtd, (unsigned char)((page_addr >> 8) & 0xff));
686 /* One more address cycle for devices > 128MiB */ 686 /* One more address cycle for devices > 128MiB */
687 if (this->chipsize > (128 << 20)) 687 if (this->chipsize > (128 << 20))
688 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff)); 688 this->write_byte(mtd, (unsigned char)((page_addr >> 16) & 0xff));
689 } 689 }
690 /* Latch in address */ 690 /* Latch in address */
691 this->hwcontrol(mtd, NAND_CTL_CLRALE); 691 this->hwcontrol(mtd, NAND_CTL_CLRALE);
@@ -706,9 +706,9 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
706 case NAND_CMD_DEPLETE1: 706 case NAND_CMD_DEPLETE1:
707 return; 707 return;
708 708
709 /* 709 /*
710 * read error status commands require only a short delay 710 * read error status commands require only a short delay
711 */ 711 */
712 case NAND_CMD_STATUS_ERROR: 712 case NAND_CMD_STATUS_ERROR:
713 case NAND_CMD_STATUS_ERROR0: 713 case NAND_CMD_STATUS_ERROR0:
714 case NAND_CMD_STATUS_ERROR1: 714 case NAND_CMD_STATUS_ERROR1:
@@ -724,7 +724,7 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
724 this->hwcontrol(mtd, NAND_CTL_SETCLE); 724 this->hwcontrol(mtd, NAND_CTL_SETCLE);
725 this->write_byte(mtd, NAND_CMD_STATUS); 725 this->write_byte(mtd, NAND_CMD_STATUS);
726 this->hwcontrol(mtd, NAND_CTL_CLRCLE); 726 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
727 while ( !(this->read_byte(mtd) & NAND_STATUS_READY)); 727 while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ;
728 return; 728 return;
729 729
730 case NAND_CMD_READ0: 730 case NAND_CMD_READ0:
@@ -736,21 +736,21 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
736 this->hwcontrol(mtd, NAND_CTL_CLRCLE); 736 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
737 /* Fall through into ready check */ 737 /* Fall through into ready check */
738 738
739 /* This applies to read commands */ 739 /* This applies to read commands */
740 default: 740 default:
741 /* 741 /*
742 * If we don't have access to the busy pin, we apply the given 742 * If we don't have access to the busy pin, we apply the given
743 * command delay 743 * command delay
744 */ 744 */
745 if (!this->dev_ready) { 745 if (!this->dev_ready) {
746 udelay (this->chip_delay); 746 udelay(this->chip_delay);
747 return; 747 return;
748 } 748 }
749 } 749 }
750 750
751 /* Apply this short delay always to ensure that we do wait tWB in 751 /* Apply this short delay always to ensure that we do wait tWB in
752 * any case on any machine. */ 752 * any case on any machine. */
753 ndelay (100); 753 ndelay(100);
754 754
755 nand_wait_ready(mtd); 755 nand_wait_ready(mtd);
756} 756}
@@ -763,16 +763,16 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
763 * 763 *
764 * Get the device and lock it for exclusive access 764 * Get the device and lock it for exclusive access
765 */ 765 */
766static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state) 766static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state)
767{ 767{
768 struct nand_chip *active; 768 struct nand_chip *active;
769 spinlock_t *lock; 769 spinlock_t *lock;
770 wait_queue_head_t *wq; 770 wait_queue_head_t *wq;
771 DECLARE_WAITQUEUE (wait, current); 771 DECLARE_WAITQUEUE(wait, current);
772 772
773 lock = (this->controller) ? &this->controller->lock : &this->chip_lock; 773 lock = (this->controller) ? &this->controller->lock : &this->chip_lock;
774 wq = (this->controller) ? &this->controller->wq : &this->wq; 774 wq = (this->controller) ? &this->controller->wq : &this->wq;
775retry: 775 retry:
776 active = this; 776 active = this;
777 spin_lock(lock); 777 spin_lock(lock);
778 778
@@ -814,24 +814,24 @@ retry:
814static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) 814static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
815{ 815{
816 816
817 unsigned long timeo = jiffies; 817 unsigned long timeo = jiffies;
818 int status; 818 int status;
819 819
820 if (state == FL_ERASING) 820 if (state == FL_ERASING)
821 timeo += (HZ * 400) / 1000; 821 timeo += (HZ * 400) / 1000;
822 else 822 else
823 timeo += (HZ * 20) / 1000; 823 timeo += (HZ * 20) / 1000;
824 824
825 led_trigger_event(nand_led_trigger, LED_FULL); 825 led_trigger_event(nand_led_trigger, LED_FULL);
826 826
827 /* Apply this short delay always to ensure that we do wait tWB in 827 /* Apply this short delay always to ensure that we do wait tWB in
828 * any case on any machine. */ 828 * any case on any machine. */
829 ndelay (100); 829 ndelay(100);
830 830
831 if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) 831 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
832 this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1); 832 this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
833 else 833 else
834 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1); 834 this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
835 835
836 while (time_before(jiffies, timeo)) { 836 while (time_before(jiffies, timeo)) {
837 /* Check, if we were interrupted */ 837 /* Check, if we were interrupted */
@@ -849,7 +849,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
849 } 849 }
850 led_trigger_event(nand_led_trigger, LED_OFF); 850 led_trigger_event(nand_led_trigger, LED_OFF);
851 851
852 status = (int) this->read_byte(mtd); 852 status = (int)this->read_byte(mtd);
853 return status; 853 return status;
854} 854}
855 855
@@ -868,31 +868,31 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
868 * 868 *
869 * Cached programming is not supported yet. 869 * Cached programming is not supported yet.
870 */ 870 */
871static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, 871static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page,
872 u_char *oob_buf, struct nand_oobinfo *oobsel, int cached) 872 u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
873{ 873{
874 int i, status; 874 int i, status;
875 u_char ecc_code[32]; 875 u_char ecc_code[32];
876 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE; 876 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
877 int *oob_config = oobsel->eccpos; 877 int *oob_config = oobsel->eccpos;
878 int datidx = 0, eccidx = 0, eccsteps = this->eccsteps; 878 int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
879 int eccbytes = 0; 879 int eccbytes = 0;
880 880
881 /* FIXME: Enable cached programming */ 881 /* FIXME: Enable cached programming */
882 cached = 0; 882 cached = 0;
883 883
884 /* Send command to begin auto page programming */ 884 /* Send command to begin auto page programming */
885 this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page); 885 this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
886 886
887 /* Write out complete page of data, take care of eccmode */ 887 /* Write out complete page of data, take care of eccmode */
888 switch (eccmode) { 888 switch (eccmode) {
889 /* No ecc, write all */ 889 /* No ecc, write all */
890 case NAND_ECC_NONE: 890 case NAND_ECC_NONE:
891 printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n"); 891 printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
892 this->write_buf(mtd, this->data_poi, mtd->oobblock); 892 this->write_buf(mtd, this->data_poi, mtd->oobblock);
893 break; 893 break;
894 894
895 /* Software ecc 3/256, write all */ 895 /* Software ecc 3/256, write all */
896 case NAND_ECC_SOFT: 896 case NAND_ECC_SOFT:
897 for (; eccsteps; eccsteps--) { 897 for (; eccsteps; eccsteps--) {
898 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code); 898 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
@@ -928,11 +928,11 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
928 this->write_buf(mtd, oob_buf, mtd->oobsize); 928 this->write_buf(mtd, oob_buf, mtd->oobsize);
929 929
930 /* Send command to actually program the data */ 930 /* Send command to actually program the data */
931 this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); 931 this->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
932 932
933 if (!cached) { 933 if (!cached) {
934 /* call wait ready function */ 934 /* call wait ready function */
935 status = this->waitfunc (mtd, this, FL_WRITING); 935 status = this->waitfunc(mtd, this, FL_WRITING);
936 936
937 /* See if operation failed and additional status checks are available */ 937 /* See if operation failed and additional status checks are available */
938 if ((status & NAND_STATUS_FAIL) && (this->errstat)) { 938 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
@@ -941,12 +941,12 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
941 941
942 /* See if device thinks it succeeded */ 942 /* See if device thinks it succeeded */
943 if (status & NAND_STATUS_FAIL) { 943 if (status & NAND_STATUS_FAIL) {
944 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page); 944 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
945 return -EIO; 945 return -EIO;
946 } 946 }
947 } else { 947 } else {
948 /* FIXME: Implement cached programming ! */ 948 /* FIXME: Implement cached programming ! */
949 /* wait until cache is ready*/ 949 /* wait until cache is ready */
950 // status = this->waitfunc (mtd, this, FL_CACHEDRPG); 950 // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
951 } 951 }
952 return 0; 952 return 0;
@@ -972,24 +972,24 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
972 * the error later when the ECC page check fails, but we would rather catch 972 * the error later when the ECC page check fails, but we would rather catch
973 * it early in the page write stage. Better to write no data than invalid data. 973 * it early in the page write stage. Better to write no data than invalid data.
974 */ 974 */
975static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, 975static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
976 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode) 976 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
977{ 977{
978 int i, j, datidx = 0, oobofs = 0, res = -EIO; 978 int i, j, datidx = 0, oobofs = 0, res = -EIO;
979 int eccsteps = this->eccsteps; 979 int eccsteps = this->eccsteps;
980 int hweccbytes; 980 int hweccbytes;
981 u_char oobdata[64]; 981 u_char oobdata[64];
982 982
983 hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; 983 hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
984 984
985 /* Send command to read back the first page */ 985 /* Send command to read back the first page */
986 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page); 986 this->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
987 987
988 for(;;) { 988 for (;;) {
989 for (j = 0; j < eccsteps; j++) { 989 for (j = 0; j < eccsteps; j++) {
990 /* Loop through and verify the data */ 990 /* Loop through and verify the data */
991 if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) { 991 if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
992 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); 992 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
993 goto out; 993 goto out;
994 } 994 }
995 datidx += mtd->eccsize; 995 datidx += mtd->eccsize;
@@ -997,7 +997,7 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
997 if (!hweccbytes) 997 if (!hweccbytes)
998 continue; 998 continue;
999 if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) { 999 if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
1000 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); 1000 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
1001 goto out; 1001 goto out;
1002 } 1002 }
1003 oobofs += hweccbytes; 1003 oobofs += hweccbytes;
@@ -1008,7 +1008,7 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
1008 */ 1008 */
1009 if (oobmode) { 1009 if (oobmode) {
1010 if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { 1010 if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
1011 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); 1011 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
1012 goto out; 1012 goto out;
1013 } 1013 }
1014 } else { 1014 } else {
@@ -1020,10 +1020,9 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
1020 1020
1021 for (i = 0; i < ecccnt; i++) { 1021 for (i = 0; i < ecccnt; i++) {
1022 int idx = oobsel->eccpos[i]; 1022 int idx = oobsel->eccpos[i];
1023 if (oobdata[idx] != oob_buf[oobofs + idx] ) { 1023 if (oobdata[idx] != oob_buf[oobofs + idx]) {
1024 DEBUG (MTD_DEBUG_LEVEL0, 1024 DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n",
1025 "%s: Failed ECC write " 1025 __FUNCTION__, page, i);
1026 "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
1027 goto out; 1026 goto out;
1028 } 1027 }
1029 } 1028 }
@@ -1039,9 +1038,9 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
1039 * is marked as NOAUTOINCR by the board driver. 1038 * is marked as NOAUTOINCR by the board driver.
1040 * Do this also before returning, so the chip is 1039 * Do this also before returning, so the chip is
1041 * ready for the next command. 1040 * ready for the next command.
1042 */ 1041 */
1043 if (!this->dev_ready) 1042 if (!this->dev_ready)
1044 udelay (this->chip_delay); 1043 udelay(this->chip_delay);
1045 else 1044 else
1046 nand_wait_ready(mtd); 1045 nand_wait_ready(mtd);
1047 1046
@@ -1049,17 +1048,16 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
1049 if (!numpages) 1048 if (!numpages)
1050 return 0; 1049 return 0;
1051 1050
1052
1053 /* Check, if the chip supports auto page increment */ 1051 /* Check, if the chip supports auto page increment */
1054 if (!NAND_CANAUTOINCR(this)) 1052 if (!NAND_CANAUTOINCR(this))
1055 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page); 1053 this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1056 } 1054 }
1057 /* 1055 /*
1058 * Terminate the read command. We come here in case of an error 1056 * Terminate the read command. We come here in case of an error
1059 * So we must issue a reset command. 1057 * So we must issue a reset command.
1060 */ 1058 */
1061out: 1059 out:
1062 this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1); 1060 this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1063 return res; 1061 return res;
1064} 1062}
1065#endif 1063#endif
@@ -1075,12 +1073,11 @@ out:
1075 * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL 1073 * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
1076 * and flags = 0xff 1074 * and flags = 0xff
1077 */ 1075 */
1078static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf) 1076static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
1079{ 1077{
1080 return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff); 1078 return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
1081} 1079}
1082 1080
1083
1084/** 1081/**
1085 * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc 1082 * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
1086 * @mtd: MTD device structure 1083 * @mtd: MTD device structure
@@ -1093,8 +1090,8 @@ static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * re
1093 * 1090 *
1094 * This function simply calls nand_do_read_ecc with flags = 0xff 1091 * This function simply calls nand_do_read_ecc with flags = 0xff
1095 */ 1092 */
1096static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, 1093static int nand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
1097 size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel) 1094 size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel)
1098{ 1095{
1099 /* use userspace supplied oobinfo, if zero */ 1096 /* use userspace supplied oobinfo, if zero */
1100 if (oobsel == NULL) 1097 if (oobsel == NULL)
@@ -1102,7 +1099,6 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1102 return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff); 1099 return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
1103} 1100}
1104 1101
1105
1106/** 1102/**
1107 * nand_do_read_ecc - [MTD Interface] Read data with ECC 1103 * nand_do_read_ecc - [MTD Interface] Read data with ECC
1108 * @mtd: MTD device structure 1104 * @mtd: MTD device structure
@@ -1119,9 +1115,8 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1119 * 1115 *
1120 * NAND read with ECC 1116 * NAND read with ECC
1121 */ 1117 */
1122int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, 1118int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
1123 size_t * retlen, u_char * buf, u_char * oob_buf, 1119 size_t *retlen, u_char *buf, u_char *oob_buf, struct nand_oobinfo *oobsel, int flags)
1124 struct nand_oobinfo *oobsel, int flags)
1125{ 1120{
1126 1121
1127 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; 1122 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
@@ -1130,26 +1125,25 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1130 u_char *data_poi, *oob_data = oob_buf; 1125 u_char *data_poi, *oob_data = oob_buf;
1131 u_char ecc_calc[32]; 1126 u_char ecc_calc[32];
1132 u_char ecc_code[32]; 1127 u_char ecc_code[32];
1133 int eccmode, eccsteps; 1128 int eccmode, eccsteps;
1134 int *oob_config, datidx; 1129 int *oob_config, datidx;
1135 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; 1130 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1136 int eccbytes; 1131 int eccbytes;
1137 int compareecc = 1; 1132 int compareecc = 1;
1138 int oobreadlen; 1133 int oobreadlen;
1139 1134
1140 1135 DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
1141 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1142 1136
1143 /* Do not allow reads past end of device */ 1137 /* Do not allow reads past end of device */
1144 if ((from + len) > mtd->size) { 1138 if ((from + len) > mtd->size) {
1145 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n"); 1139 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
1146 *retlen = 0; 1140 *retlen = 0;
1147 return -EINVAL; 1141 return -EINVAL;
1148 } 1142 }
1149 1143
1150 /* Grab the lock and see if the device is available */ 1144 /* Grab the lock and see if the device is available */
1151 if (flags & NAND_GET_DEVICE) 1145 if (flags & NAND_GET_DEVICE)
1152 nand_get_device (this, mtd, FL_READING); 1146 nand_get_device(this, mtd, FL_READING);
1153 1147
1154 /* Autoplace of oob data ? Use the default placement scheme */ 1148 /* Autoplace of oob data ? Use the default placement scheme */
1155 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) 1149 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
@@ -1163,7 +1157,7 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1163 this->select_chip(mtd, chipnr); 1157 this->select_chip(mtd, chipnr);
1164 1158
1165 /* First we calculate the starting page */ 1159 /* First we calculate the starting page */
1166 realpage = (int) (from >> this->page_shift); 1160 realpage = (int)(from >> this->page_shift);
1167 page = realpage & this->pagemask; 1161 page = realpage & this->pagemask;
1168 1162
1169 /* Get raw starting column */ 1163 /* Get raw starting column */
@@ -1201,13 +1195,13 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1201 if (realpage == this->pagebuf && !oob_buf) { 1195 if (realpage == this->pagebuf && !oob_buf) {
1202 /* aligned read ? */ 1196 /* aligned read ? */
1203 if (aligned) 1197 if (aligned)
1204 memcpy (data_poi, this->data_buf, end); 1198 memcpy(data_poi, this->data_buf, end);
1205 goto readdata; 1199 goto readdata;
1206 } 1200 }
1207 1201
1208 /* Check, if we must send the read command */ 1202 /* Check, if we must send the read command */
1209 if (sndcmd) { 1203 if (sndcmd) {
1210 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page); 1204 this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1211 sndcmd = 0; 1205 sndcmd = 0;
1212 } 1206 }
1213 1207
@@ -1219,24 +1213,26 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1219 eccsteps = this->eccsteps; 1213 eccsteps = this->eccsteps;
1220 1214
1221 switch (eccmode) { 1215 switch (eccmode) {
1222 case NAND_ECC_NONE: { /* No ECC, Read in a page */ 1216 case NAND_ECC_NONE:{
1223 static unsigned long lastwhinge = 0; 1217 /* No ECC, Read in a page */
1224 if ((lastwhinge / HZ) != (jiffies / HZ)) { 1218 static unsigned long lastwhinge = 0;
1225 printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n"); 1219 if ((lastwhinge / HZ) != (jiffies / HZ)) {
1226 lastwhinge = jiffies; 1220 printk(KERN_WARNING
1221 "Reading data from NAND FLASH without ECC is not recommended\n");
1222 lastwhinge = jiffies;
1223 }
1224 this->read_buf(mtd, data_poi, end);
1225 break;
1227 } 1226 }
1228 this->read_buf(mtd, data_poi, end);
1229 break;
1230 }
1231 1227
1232 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */ 1228 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
1233 this->read_buf(mtd, data_poi, end); 1229 this->read_buf(mtd, data_poi, end);
1234 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc) 1230 for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc)
1235 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]); 1231 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1236 break; 1232 break;
1237 1233
1238 default: 1234 default:
1239 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) { 1235 for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) {
1240 this->enable_hwecc(mtd, NAND_ECC_READ); 1236 this->enable_hwecc(mtd, NAND_ECC_READ);
1241 this->read_buf(mtd, &data_poi[datidx], ecc); 1237 this->read_buf(mtd, &data_poi[datidx], ecc);
1242 1238
@@ -1252,8 +1248,8 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1252 * does the error correction on the fly */ 1248 * does the error correction on the fly */
1253 ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]); 1249 ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
1254 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { 1250 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1255 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " 1251 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: "
1256 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr); 1252 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
1257 ecc_failed++; 1253 ecc_failed++;
1258 } 1254 }
1259 } else { 1255 } else {
@@ -1274,7 +1270,7 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1274 for (j = 0; j < oobsel->eccbytes; j++) 1270 for (j = 0; j < oobsel->eccbytes; j++)
1275 ecc_code[j] = oob_data[oob_config[j]]; 1271 ecc_code[j] = oob_data[oob_config[j]];
1276 1272
1277 /* correct data, if neccecary */ 1273 /* correct data, if necessary */
1278 for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) { 1274 for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
1279 ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]); 1275 ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
1280 1276
@@ -1291,16 +1287,16 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1291 } 1287 }
1292 1288
1293 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { 1289 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1294 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page); 1290 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
1295 ecc_failed++; 1291 ecc_failed++;
1296 } 1292 }
1297 } 1293 }
1298 1294
1299 readoob: 1295 readoob:
1300 /* check, if we have a fs supplied oob-buffer */ 1296 /* check, if we have a fs supplied oob-buffer */
1301 if (oob_buf) { 1297 if (oob_buf) {
1302 /* without autoplace. Legacy mode used by YAFFS1 */ 1298 /* without autoplace. Legacy mode used by YAFFS1 */
1303 switch(oobsel->useecc) { 1299 switch (oobsel->useecc) {
1304 case MTD_NANDECC_AUTOPLACE: 1300 case MTD_NANDECC_AUTOPLACE:
1305 case MTD_NANDECC_AUTOPL_USR: 1301 case MTD_NANDECC_AUTOPL_USR:
1306 /* Walk through the autoplace chunks */ 1302 /* Walk through the autoplace chunks */
@@ -1313,7 +1309,7 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1313 break; 1309 break;
1314 case MTD_NANDECC_PLACE: 1310 case MTD_NANDECC_PLACE:
1315 /* YAFFS1 legacy mode */ 1311 /* YAFFS1 legacy mode */
1316 oob_data += this->eccsteps * sizeof (int); 1312 oob_data += this->eccsteps * sizeof(int);
1317 default: 1313 default:
1318 oob_data += mtd->oobsize; 1314 oob_data += mtd->oobsize;
1319 } 1315 }
@@ -1331,9 +1327,9 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1331 * Do this before the AUTOINCR check, so no problems 1327 * Do this before the AUTOINCR check, so no problems
1332 * arise if a chip which does auto increment 1328 * arise if a chip which does auto increment
1333 * is marked as NOAUTOINCR by the board driver. 1329 * is marked as NOAUTOINCR by the board driver.
1334 */ 1330 */
1335 if (!this->dev_ready) 1331 if (!this->dev_ready)
1336 udelay (this->chip_delay); 1332 udelay(this->chip_delay);
1337 else 1333 else
1338 nand_wait_ready(mtd); 1334 nand_wait_ready(mtd);
1339 1335
@@ -1354,7 +1350,7 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1354 } 1350 }
1355 /* Check, if the chip supports auto page increment 1351 /* Check, if the chip supports auto page increment
1356 * or if we have hit a block boundary. 1352 * or if we have hit a block boundary.
1357 */ 1353 */
1358 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) 1354 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1359 sndcmd = 1; 1355 sndcmd = 1;
1360 } 1356 }
@@ -1382,13 +1378,13 @@ int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1382 * 1378 *
1383 * NAND read out-of-band data from the spare area 1379 * NAND read out-of-band data from the spare area
1384 */ 1380 */
1385static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf) 1381static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
1386{ 1382{
1387 int i, col, page, chipnr; 1383 int i, col, page, chipnr;
1388 struct nand_chip *this = mtd->priv; 1384 struct nand_chip *this = mtd->priv;
1389 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; 1385 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1390 1386
1391 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 1387 DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
1392 1388
1393 /* Shift to get page */ 1389 /* Shift to get page */
1394 page = (int)(from >> this->page_shift); 1390 page = (int)(from >> this->page_shift);
@@ -1402,19 +1398,19 @@ static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t
1402 1398
1403 /* Do not allow reads past end of device */ 1399 /* Do not allow reads past end of device */
1404 if ((from + len) > mtd->size) { 1400 if ((from + len) > mtd->size) {
1405 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n"); 1401 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
1406 *retlen = 0; 1402 *retlen = 0;
1407 return -EINVAL; 1403 return -EINVAL;
1408 } 1404 }
1409 1405
1410 /* Grab the lock and see if the device is available */ 1406 /* Grab the lock and see if the device is available */
1411 nand_get_device (this, mtd , FL_READING); 1407 nand_get_device(this, mtd, FL_READING);
1412 1408
1413 /* Select the NAND device */ 1409 /* Select the NAND device */
1414 this->select_chip(mtd, chipnr); 1410 this->select_chip(mtd, chipnr);
1415 1411
1416 /* Send the read command */ 1412 /* Send the read command */
1417 this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask); 1413 this->cmdfunc(mtd, NAND_CMD_READOOB, col, page & this->pagemask);
1418 /* 1414 /*
1419 * Read the data, if we read more than one page 1415 * Read the data, if we read more than one page
1420 * oob data, let the device transfer the data ! 1416 * oob data, let the device transfer the data !
@@ -1444,16 +1440,16 @@ static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t
1444 * is marked as NOAUTOINCR by the board driver. 1440 * is marked as NOAUTOINCR by the board driver.
1445 */ 1441 */
1446 if (!this->dev_ready) 1442 if (!this->dev_ready)
1447 udelay (this->chip_delay); 1443 udelay(this->chip_delay);
1448 else 1444 else
1449 nand_wait_ready(mtd); 1445 nand_wait_ready(mtd);
1450 1446
1451 /* Check, if the chip supports auto page increment 1447 /* Check, if the chip supports auto page increment
1452 * or if we have hit a block boundary. 1448 * or if we have hit a block boundary.
1453 */ 1449 */
1454 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) { 1450 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
1455 /* For subsequent page reads set offset to 0 */ 1451 /* For subsequent page reads set offset to 0 */
1456 this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask); 1452 this->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
1457 } 1453 }
1458 } 1454 }
1459 } 1455 }
@@ -1476,43 +1472,43 @@ static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t
1476 * 1472 *
1477 * Read raw data including oob into buffer 1473 * Read raw data including oob into buffer
1478 */ 1474 */
1479int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen) 1475int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
1480{ 1476{
1481 struct nand_chip *this = mtd->priv; 1477 struct nand_chip *this = mtd->priv;
1482 int page = (int) (from >> this->page_shift); 1478 int page = (int)(from >> this->page_shift);
1483 int chip = (int) (from >> this->chip_shift); 1479 int chip = (int)(from >> this->chip_shift);
1484 int sndcmd = 1; 1480 int sndcmd = 1;
1485 int cnt = 0; 1481 int cnt = 0;
1486 int pagesize = mtd->oobblock + mtd->oobsize; 1482 int pagesize = mtd->oobblock + mtd->oobsize;
1487 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; 1483 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1488 1484
1489 /* Do not allow reads past end of device */ 1485 /* Do not allow reads past end of device */
1490 if ((from + len) > mtd->size) { 1486 if ((from + len) > mtd->size) {
1491 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n"); 1487 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
1492 return -EINVAL; 1488 return -EINVAL;
1493 } 1489 }
1494 1490
1495 /* Grab the lock and see if the device is available */ 1491 /* Grab the lock and see if the device is available */
1496 nand_get_device (this, mtd , FL_READING); 1492 nand_get_device(this, mtd, FL_READING);
1497 1493
1498 this->select_chip (mtd, chip); 1494 this->select_chip(mtd, chip);
1499 1495
1500 /* Add requested oob length */ 1496 /* Add requested oob length */
1501 len += ooblen; 1497 len += ooblen;
1502 1498
1503 while (len) { 1499 while (len) {
1504 if (sndcmd) 1500 if (sndcmd)
1505 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask); 1501 this->cmdfunc(mtd, NAND_CMD_READ0, 0, page & this->pagemask);
1506 sndcmd = 0; 1502 sndcmd = 0;
1507 1503
1508 this->read_buf (mtd, &buf[cnt], pagesize); 1504 this->read_buf(mtd, &buf[cnt], pagesize);
1509 1505
1510 len -= pagesize; 1506 len -= pagesize;
1511 cnt += pagesize; 1507 cnt += pagesize;
1512 page++; 1508 page++;
1513 1509
1514 if (!this->dev_ready) 1510 if (!this->dev_ready)
1515 udelay (this->chip_delay); 1511 udelay(this->chip_delay);
1516 else 1512 else
1517 nand_wait_ready(mtd); 1513 nand_wait_ready(mtd);
1518 1514
@@ -1526,7 +1522,6 @@ int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len,
1526 return 0; 1522 return 0;
1527} 1523}
1528 1524
1529
1530/** 1525/**
1531 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer 1526 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
1532 * @mtd: MTD device structure 1527 * @mtd: MTD device structure
@@ -1550,8 +1545,8 @@ int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len,
1550 * forces the 0xff fill before using the buffer again. 1545 * forces the 0xff fill before using the buffer again.
1551 * 1546 *
1552*/ 1547*/
1553static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel, 1548static u_char *nand_prepare_oobbuf(struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
1554 int autoplace, int numpages) 1549 int autoplace, int numpages)
1555{ 1550{
1556 struct nand_chip *this = mtd->priv; 1551 struct nand_chip *this = mtd->priv;
1557 int i, len, ofs; 1552 int i, len, ofs;
@@ -1562,8 +1557,7 @@ static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct
1562 1557
1563 /* Check, if the buffer must be filled with ff again */ 1558 /* Check, if the buffer must be filled with ff again */
1564 if (this->oobdirty) { 1559 if (this->oobdirty) {
1565 memset (this->oob_buf, 0xff, 1560 memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
1566 mtd->oobsize << (this->phys_erase_shift - this->page_shift));
1567 this->oobdirty = 0; 1561 this->oobdirty = 0;
1568 } 1562 }
1569 1563
@@ -1578,7 +1572,7 @@ static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct
1578 for (i = 0, len = 0; len < mtd->oobavail; i++) { 1572 for (i = 0, len = 0; len < mtd->oobavail; i++) {
1579 int to = ofs + oobsel->oobfree[i][0]; 1573 int to = ofs + oobsel->oobfree[i][0];
1580 int num = oobsel->oobfree[i][1]; 1574 int num = oobsel->oobfree[i][1];
1581 memcpy (&this->oob_buf[to], fsbuf, num); 1575 memcpy(&this->oob_buf[to], fsbuf, num);
1582 len += num; 1576 len += num;
1583 fsbuf += num; 1577 fsbuf += num;
1584 } 1578 }
@@ -1600,9 +1594,9 @@ static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct
1600 * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL 1594 * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
1601 * 1595 *
1602*/ 1596*/
1603static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf) 1597static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
1604{ 1598{
1605 return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL)); 1599 return (nand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL));
1606} 1600}
1607 1601
1608/** 1602/**
@@ -1617,34 +1611,35 @@ static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * ret
1617 * 1611 *
1618 * NAND write with ECC 1612 * NAND write with ECC
1619 */ 1613 */
1620static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len, 1614static int nand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
1621 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel) 1615 size_t *retlen, const u_char *buf, u_char *eccbuf,
1616 struct nand_oobinfo *oobsel)
1622{ 1617{
1623 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr; 1618 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
1624 int autoplace = 0, numpages, totalpages; 1619 int autoplace = 0, numpages, totalpages;
1625 struct nand_chip *this = mtd->priv; 1620 struct nand_chip *this = mtd->priv;
1626 u_char *oobbuf, *bufstart; 1621 u_char *oobbuf, *bufstart;
1627 int ppblock = (1 << (this->phys_erase_shift - this->page_shift)); 1622 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1628 1623
1629 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1624 DEBUG(MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
1630 1625
1631 /* Initialize retlen, in case of early exit */ 1626 /* Initialize retlen, in case of early exit */
1632 *retlen = 0; 1627 *retlen = 0;
1633 1628
1634 /* Do not allow write past end of device */ 1629 /* Do not allow write past end of device */
1635 if ((to + len) > mtd->size) { 1630 if ((to + len) > mtd->size) {
1636 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n"); 1631 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
1637 return -EINVAL; 1632 return -EINVAL;
1638 } 1633 }
1639 1634
1640 /* reject writes, which are not page aligned */ 1635 /* reject writes, which are not page aligned */
1641 if (NOTALIGNED (to) || NOTALIGNED(len)) { 1636 if (NOTALIGNED(to) || NOTALIGNED(len)) {
1642 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n"); 1637 printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1643 return -EINVAL; 1638 return -EINVAL;
1644 } 1639 }
1645 1640
1646 /* Grab the lock and see if the device is available */ 1641 /* Grab the lock and see if the device is available */
1647 nand_get_device (this, mtd, FL_WRITING); 1642 nand_get_device(this, mtd, FL_WRITING);
1648 1643
1649 /* Calculate chipnr */ 1644 /* Calculate chipnr */
1650 chipnr = (int)(to >> this->chip_shift); 1645 chipnr = (int)(to >> this->chip_shift);
@@ -1669,7 +1664,7 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1669 1664
1670 /* Setup variables and oob buffer */ 1665 /* Setup variables and oob buffer */
1671 totalpages = len >> this->page_shift; 1666 totalpages = len >> this->page_shift;
1672 page = (int) (to >> this->page_shift); 1667 page = (int)(to >> this->page_shift);
1673 /* Invalidate the page cache, if we write to the cached page */ 1668 /* Invalidate the page cache, if we write to the cached page */
1674 if (page <= this->pagebuf && this->pagebuf < (page + totalpages)) 1669 if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
1675 this->pagebuf = -1; 1670 this->pagebuf = -1;
@@ -1678,22 +1673,22 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1678 page &= this->pagemask; 1673 page &= this->pagemask;
1679 startpage = page; 1674 startpage = page;
1680 /* Calc number of pages we can write in one go */ 1675 /* Calc number of pages we can write in one go */
1681 numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages); 1676 numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages);
1682 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages); 1677 oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
1683 bufstart = (u_char *)buf; 1678 bufstart = (u_char *) buf;
1684 1679
1685 /* Loop until all data is written */ 1680 /* Loop until all data is written */
1686 while (written < len) { 1681 while (written < len) {
1687 1682
1688 this->data_poi = (u_char*) &buf[written]; 1683 this->data_poi = (u_char *) &buf[written];
1689 /* Write one page. If this is the last page to write 1684 /* Write one page. If this is the last page to write
1690 * or the last page in this block, then use the 1685 * or the last page in this block, then use the
1691 * real pageprogram command, else select cached programming 1686 * real pageprogram command, else select cached programming
1692 * if supported by the chip. 1687 * if supported by the chip.
1693 */ 1688 */
1694 ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0)); 1689 ret = nand_write_page(mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
1695 if (ret) { 1690 if (ret) {
1696 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret); 1691 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
1697 goto out; 1692 goto out;
1698 } 1693 }
1699 /* Next oob page */ 1694 /* Next oob page */
@@ -1709,15 +1704,14 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1709 /* Have we hit a block boundary ? Then we have to verify and 1704 /* Have we hit a block boundary ? Then we have to verify and
1710 * if verify is ok, we have to setup the oob buffer for 1705 * if verify is ok, we have to setup the oob buffer for
1711 * the next pages. 1706 * the next pages.
1712 */ 1707 */
1713 if (!(page & (ppblock - 1))){ 1708 if (!(page & (ppblock - 1))) {
1714 int ofs; 1709 int ofs;
1715 this->data_poi = bufstart; 1710 this->data_poi = bufstart;
1716 ret = nand_verify_pages (mtd, this, startpage, 1711 ret = nand_verify_pages(mtd, this, startpage, page - startpage,
1717 page - startpage, 1712 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1718 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1719 if (ret) { 1713 if (ret) {
1720 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); 1714 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1721 goto out; 1715 goto out;
1722 } 1716 }
1723 *retlen = written; 1717 *retlen = written;
@@ -1726,11 +1720,10 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1726 if (eccbuf) 1720 if (eccbuf)
1727 eccbuf += (page - startpage) * ofs; 1721 eccbuf += (page - startpage) * ofs;
1728 totalpages -= page - startpage; 1722 totalpages -= page - startpage;
1729 numpages = min (totalpages, ppblock); 1723 numpages = min(totalpages, ppblock);
1730 page &= this->pagemask; 1724 page &= this->pagemask;
1731 startpage = page; 1725 startpage = page;
1732 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, 1726 oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
1733 autoplace, numpages);
1734 oob = 0; 1727 oob = 0;
1735 /* Check, if we cross a chip boundary */ 1728 /* Check, if we cross a chip boundary */
1736 if (!page) { 1729 if (!page) {
@@ -1741,23 +1734,21 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1741 } 1734 }
1742 } 1735 }
1743 /* Verify the remaining pages */ 1736 /* Verify the remaining pages */
1744cmp: 1737 cmp:
1745 this->data_poi = bufstart; 1738 this->data_poi = bufstart;
1746 ret = nand_verify_pages (mtd, this, startpage, totalpages, 1739 ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL));
1747 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1748 if (!ret) 1740 if (!ret)
1749 *retlen = written; 1741 *retlen = written;
1750 else 1742 else
1751 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret); 1743 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1752 1744
1753out: 1745 out:
1754 /* Deselect and wake up anyone waiting on the device */ 1746 /* Deselect and wake up anyone waiting on the device */
1755 nand_release_device(mtd); 1747 nand_release_device(mtd);
1756 1748
1757 return ret; 1749 return ret;
1758} 1750}
1759 1751
1760
1761/** 1752/**
1762 * nand_write_oob - [MTD Interface] NAND write out-of-band 1753 * nand_write_oob - [MTD Interface] NAND write out-of-band
1763 * @mtd: MTD device structure 1754 * @mtd: MTD device structure
@@ -1768,16 +1759,16 @@ out:
1768 * 1759 *
1769 * NAND write out-of-band 1760 * NAND write out-of-band
1770 */ 1761 */
1771static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf) 1762static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
1772{ 1763{
1773 int column, page, status, ret = -EIO, chipnr; 1764 int column, page, status, ret = -EIO, chipnr;
1774 struct nand_chip *this = mtd->priv; 1765 struct nand_chip *this = mtd->priv;
1775 1766
1776 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1767 DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
1777 1768
1778 /* Shift to get page */ 1769 /* Shift to get page */
1779 page = (int) (to >> this->page_shift); 1770 page = (int)(to >> this->page_shift);
1780 chipnr = (int) (to >> this->chip_shift); 1771 chipnr = (int)(to >> this->chip_shift);
1781 1772
1782 /* Mask to get column */ 1773 /* Mask to get column */
1783 column = to & (mtd->oobsize - 1); 1774 column = to & (mtd->oobsize - 1);
@@ -1787,12 +1778,12 @@ static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t *
1787 1778
1788 /* Do not allow write past end of page */ 1779 /* Do not allow write past end of page */
1789 if ((column + len) > mtd->oobsize) { 1780 if ((column + len) > mtd->oobsize) {
1790 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n"); 1781 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
1791 return -EINVAL; 1782 return -EINVAL;
1792 } 1783 }
1793 1784
1794 /* Grab the lock and see if the device is available */ 1785 /* Grab the lock and see if the device is available */
1795 nand_get_device (this, mtd, FL_WRITING); 1786 nand_get_device(this, mtd, FL_WRITING);
1796 1787
1797 /* Select the NAND device */ 1788 /* Select the NAND device */
1798 this->select_chip(mtd, chipnr); 1789 this->select_chip(mtd, chipnr);
@@ -1814,27 +1805,27 @@ static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t *
1814 1805
1815 if (NAND_MUST_PAD(this)) { 1806 if (NAND_MUST_PAD(this)) {
1816 /* Write out desired data */ 1807 /* Write out desired data */
1817 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask); 1808 this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
1818 /* prepad 0xff for partial programming */ 1809 /* prepad 0xff for partial programming */
1819 this->write_buf(mtd, ffchars, column); 1810 this->write_buf(mtd, ffchars, column);
1820 /* write data */ 1811 /* write data */
1821 this->write_buf(mtd, buf, len); 1812 this->write_buf(mtd, buf, len);
1822 /* postpad 0xff for partial programming */ 1813 /* postpad 0xff for partial programming */
1823 this->write_buf(mtd, ffchars, mtd->oobsize - (len+column)); 1814 this->write_buf(mtd, ffchars, mtd->oobsize - (len + column));
1824 } else { 1815 } else {
1825 /* Write out desired data */ 1816 /* Write out desired data */
1826 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask); 1817 this->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
1827 /* write data */ 1818 /* write data */
1828 this->write_buf(mtd, buf, len); 1819 this->write_buf(mtd, buf, len);
1829 } 1820 }
1830 /* Send command to program the OOB data */ 1821 /* Send command to program the OOB data */
1831 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1); 1822 this->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1832 1823
1833 status = this->waitfunc (mtd, this, FL_WRITING); 1824 status = this->waitfunc(mtd, this, FL_WRITING);
1834 1825
1835 /* See if device thinks it succeeded */ 1826 /* See if device thinks it succeeded */
1836 if (status & NAND_STATUS_FAIL) { 1827 if (status & NAND_STATUS_FAIL) {
1837 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page); 1828 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
1838 ret = -EIO; 1829 ret = -EIO;
1839 goto out; 1830 goto out;
1840 } 1831 }
@@ -1843,23 +1834,22 @@ static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t *
1843 1834
1844#ifdef CONFIG_MTD_NAND_VERIFY_WRITE 1835#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1845 /* Send command to read back the data */ 1836 /* Send command to read back the data */
1846 this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask); 1837 this->cmdfunc(mtd, NAND_CMD_READOOB, column, page & this->pagemask);
1847 1838
1848 if (this->verify_buf(mtd, buf, len)) { 1839 if (this->verify_buf(mtd, buf, len)) {
1849 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page); 1840 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
1850 ret = -EIO; 1841 ret = -EIO;
1851 goto out; 1842 goto out;
1852 } 1843 }
1853#endif 1844#endif
1854 ret = 0; 1845 ret = 0;
1855out: 1846 out:
1856 /* Deselect and wake up anyone waiting on the device */ 1847 /* Deselect and wake up anyone waiting on the device */
1857 nand_release_device(mtd); 1848 nand_release_device(mtd);
1858 1849
1859 return ret; 1850 return ret;
1860} 1851}
1861 1852
1862
1863/** 1853/**
1864 * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc 1854 * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
1865 * @mtd: MTD device structure 1855 * @mtd: MTD device structure
@@ -1870,10 +1860,10 @@ out:
1870 * 1860 *
1871 * NAND write with kvec. This just calls the ecc function 1861 * NAND write with kvec. This just calls the ecc function
1872 */ 1862 */
1873static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, 1863static int nand_writev(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1874 loff_t to, size_t * retlen) 1864 loff_t to, size_t *retlen)
1875{ 1865{
1876 return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL)); 1866 return (nand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL));
1877} 1867}
1878 1868
1879/** 1869/**
@@ -1888,13 +1878,13 @@ static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned
1888 * 1878 *
1889 * NAND write with iovec with ecc 1879 * NAND write with iovec with ecc
1890 */ 1880 */
1891static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, 1881static int nand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1892 loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel) 1882 loff_t to, size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
1893{ 1883{
1894 int i, page, len, total_len, ret = -EIO, written = 0, chipnr; 1884 int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
1895 int oob, numpages, autoplace = 0, startpage; 1885 int oob, numpages, autoplace = 0, startpage;
1896 struct nand_chip *this = mtd->priv; 1886 struct nand_chip *this = mtd->priv;
1897 int ppblock = (1 << (this->phys_erase_shift - this->page_shift)); 1887 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1898 u_char *oobbuf, *bufstart; 1888 u_char *oobbuf, *bufstart;
1899 1889
1900 /* Preset written len for early exit */ 1890 /* Preset written len for early exit */
@@ -1903,28 +1893,27 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1903 /* Calculate total length of data */ 1893 /* Calculate total length of data */
1904 total_len = 0; 1894 total_len = 0;
1905 for (i = 0; i < count; i++) 1895 for (i = 0; i < count; i++)
1906 total_len += (int) vecs[i].iov_len; 1896 total_len += (int)vecs[i].iov_len;
1907 1897
1908 DEBUG (MTD_DEBUG_LEVEL3, 1898 DEBUG(MTD_DEBUG_LEVEL3, "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int)to, (unsigned int)total_len, count);
1909 "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
1910 1899
1911 /* Do not allow write past end of page */ 1900 /* Do not allow write past end of page */
1912 if ((to + total_len) > mtd->size) { 1901 if ((to + total_len) > mtd->size) {
1913 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n"); 1902 DEBUG(MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
1914 return -EINVAL; 1903 return -EINVAL;
1915 } 1904 }
1916 1905
1917 /* reject writes, which are not page aligned */ 1906 /* reject writes, which are not page aligned */
1918 if (NOTALIGNED (to) || NOTALIGNED(total_len)) { 1907 if (NOTALIGNED(to) || NOTALIGNED(total_len)) {
1919 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n"); 1908 printk(KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1920 return -EINVAL; 1909 return -EINVAL;
1921 } 1910 }
1922 1911
1923 /* Grab the lock and see if the device is available */ 1912 /* Grab the lock and see if the device is available */
1924 nand_get_device (this, mtd, FL_WRITING); 1913 nand_get_device(this, mtd, FL_WRITING);
1925 1914
1926 /* Get the current chip-nr */ 1915 /* Get the current chip-nr */
1927 chipnr = (int) (to >> this->chip_shift); 1916 chipnr = (int)(to >> this->chip_shift);
1928 /* Select the NAND device */ 1917 /* Select the NAND device */
1929 this->select_chip(mtd, chipnr); 1918 this->select_chip(mtd, chipnr);
1930 1919
@@ -1945,7 +1934,7 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1945 autoplace = 1; 1934 autoplace = 1;
1946 1935
1947 /* Setup start page */ 1936 /* Setup start page */
1948 page = (int) (to >> this->page_shift); 1937 page = (int)(to >> this->page_shift);
1949 /* Invalidate the page cache, if we write to the cached page */ 1938 /* Invalidate the page cache, if we write to the cached page */
1950 if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift)) 1939 if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
1951 this->pagebuf = -1; 1940 this->pagebuf = -1;
@@ -1963,9 +1952,9 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1963 * out of this iov in one go */ 1952 * out of this iov in one go */
1964 numpages = (vecs->iov_len - len) >> this->page_shift; 1953 numpages = (vecs->iov_len - len) >> this->page_shift;
1965 /* Do not cross block boundaries */ 1954 /* Do not cross block boundaries */
1966 numpages = min (ppblock - (startpage & (ppblock - 1)), numpages); 1955 numpages = min(ppblock - (startpage & (ppblock - 1)), numpages);
1967 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages); 1956 oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages);
1968 bufstart = (u_char *)vecs->iov_base; 1957 bufstart = (u_char *) vecs->iov_base;
1969 bufstart += len; 1958 bufstart += len;
1970 this->data_poi = bufstart; 1959 this->data_poi = bufstart;
1971 oob = 0; 1960 oob = 0;
@@ -1974,8 +1963,8 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1974 * then use the real pageprogram command, else select 1963 * then use the real pageprogram command, else select
1975 * cached programming if supported by the chip. 1964 * cached programming if supported by the chip.
1976 */ 1965 */
1977 ret = nand_write_page (mtd, this, page & this->pagemask, 1966 ret = nand_write_page(mtd, this, page & this->pagemask,
1978 &oobbuf[oob], oobsel, i != numpages); 1967 &oobbuf[oob], oobsel, i != numpages);
1979 if (ret) 1968 if (ret)
1980 goto out; 1969 goto out;
1981 this->data_poi += mtd->oobblock; 1970 this->data_poi += mtd->oobblock;
@@ -1984,7 +1973,7 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1984 page++; 1973 page++;
1985 } 1974 }
1986 /* Check, if we have to switch to the next tuple */ 1975 /* Check, if we have to switch to the next tuple */
1987 if (len >= (int) vecs->iov_len) { 1976 if (len >= (int)vecs->iov_len) {
1988 vecs++; 1977 vecs++;
1989 len = 0; 1978 len = 0;
1990 count--; 1979 count--;
@@ -1998,7 +1987,7 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
1998 if (vecs->iov_base != NULL && vecs->iov_len) 1987 if (vecs->iov_base != NULL && vecs->iov_len)
1999 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++]; 1988 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
2000 /* Check, if we have to switch to the next tuple */ 1989 /* Check, if we have to switch to the next tuple */
2001 if (len >= (int) vecs->iov_len) { 1990 if (len >= (int)vecs->iov_len) {
2002 vecs++; 1991 vecs++;
2003 len = 0; 1992 len = 0;
2004 count--; 1993 count--;
@@ -2008,16 +1997,15 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
2008 this->data_poi = this->data_buf; 1997 this->data_poi = this->data_buf;
2009 bufstart = this->data_poi; 1998 bufstart = this->data_poi;
2010 numpages = 1; 1999 numpages = 1;
2011 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages); 2000 oobbuf = nand_prepare_oobbuf(mtd, NULL, oobsel, autoplace, numpages);
2012 ret = nand_write_page (mtd, this, page & this->pagemask, 2001 ret = nand_write_page(mtd, this, page & this->pagemask, oobbuf, oobsel, 0);
2013 oobbuf, oobsel, 0);
2014 if (ret) 2002 if (ret)
2015 goto out; 2003 goto out;
2016 page++; 2004 page++;
2017 } 2005 }
2018 2006
2019 this->data_poi = bufstart; 2007 this->data_poi = bufstart;
2020 ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0); 2008 ret = nand_verify_pages(mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
2021 if (ret) 2009 if (ret)
2022 goto out; 2010 goto out;
2023 2011
@@ -2035,7 +2023,7 @@ static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsig
2035 } 2023 }
2036 } 2024 }
2037 ret = 0; 2025 ret = 0;
2038out: 2026 out:
2039 /* Deselect and wake up anyone waiting on the device */ 2027 /* Deselect and wake up anyone waiting on the device */
2040 nand_release_device(mtd); 2028 nand_release_device(mtd);
2041 2029
@@ -2050,12 +2038,12 @@ out:
2050 * 2038 *
2051 * Standard erase command for NAND chips 2039 * Standard erase command for NAND chips
2052 */ 2040 */
2053static void single_erase_cmd (struct mtd_info *mtd, int page) 2041static void single_erase_cmd(struct mtd_info *mtd, int page)
2054{ 2042{
2055 struct nand_chip *this = mtd->priv; 2043 struct nand_chip *this = mtd->priv;
2056 /* Send commands to erase a block */ 2044 /* Send commands to erase a block */
2057 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page); 2045 this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2058 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1); 2046 this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
2059} 2047}
2060 2048
2061/** 2049/**
@@ -2066,15 +2054,15 @@ static void single_erase_cmd (struct mtd_info *mtd, int page)
2066 * AND multi block erase command function 2054 * AND multi block erase command function
2067 * Erase 4 consecutive blocks 2055 * Erase 4 consecutive blocks
2068 */ 2056 */
2069static void multi_erase_cmd (struct mtd_info *mtd, int page) 2057static void multi_erase_cmd(struct mtd_info *mtd, int page)
2070{ 2058{
2071 struct nand_chip *this = mtd->priv; 2059 struct nand_chip *this = mtd->priv;
2072 /* Send commands to erase a block */ 2060 /* Send commands to erase a block */
2073 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++); 2061 this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2074 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++); 2062 this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2075 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++); 2063 this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2076 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page); 2064 this->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2077 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1); 2065 this->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
2078} 2066}
2079 2067
2080/** 2068/**
@@ -2084,9 +2072,9 @@ static void multi_erase_cmd (struct mtd_info *mtd, int page)
2084 * 2072 *
2085 * Erase one ore more blocks 2073 * Erase one ore more blocks
2086 */ 2074 */
2087static int nand_erase (struct mtd_info *mtd, struct erase_info *instr) 2075static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
2088{ 2076{
2089 return nand_erase_nand (mtd, instr, 0); 2077 return nand_erase_nand(mtd, instr, 0);
2090} 2078}
2091 2079
2092#define BBT_PAGE_MASK 0xffffff3f 2080#define BBT_PAGE_MASK 0xffffff3f
@@ -2098,7 +2086,7 @@ static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
2098 * 2086 *
2099 * Erase one ore more blocks 2087 * Erase one ore more blocks
2100 */ 2088 */
2101int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt) 2089int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
2102{ 2090{
2103 int page, len, status, pages_per_block, ret, chipnr; 2091 int page, len, status, pages_per_block, ret, chipnr;
2104 struct nand_chip *this = mtd->priv; 2092 struct nand_chip *this = mtd->priv;
@@ -2107,35 +2095,34 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2107 /* It is used to see if the current page is in the same */ 2095 /* It is used to see if the current page is in the same */
2108 /* 256 block group and the same bank as the bbt. */ 2096 /* 256 block group and the same bank as the bbt. */
2109 2097
2110 DEBUG (MTD_DEBUG_LEVEL3, 2098 DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", (unsigned int)instr->addr, (unsigned int)instr->len);
2111 "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
2112 2099
2113 /* Start address must align on block boundary */ 2100 /* Start address must align on block boundary */
2114 if (instr->addr & ((1 << this->phys_erase_shift) - 1)) { 2101 if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
2115 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); 2102 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
2116 return -EINVAL; 2103 return -EINVAL;
2117 } 2104 }
2118 2105
2119 /* Length must align on block boundary */ 2106 /* Length must align on block boundary */
2120 if (instr->len & ((1 << this->phys_erase_shift) - 1)) { 2107 if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
2121 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n"); 2108 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
2122 return -EINVAL; 2109 return -EINVAL;
2123 } 2110 }
2124 2111
2125 /* Do not allow erase past end of device */ 2112 /* Do not allow erase past end of device */
2126 if ((instr->len + instr->addr) > mtd->size) { 2113 if ((instr->len + instr->addr) > mtd->size) {
2127 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n"); 2114 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
2128 return -EINVAL; 2115 return -EINVAL;
2129 } 2116 }
2130 2117
2131 instr->fail_addr = 0xffffffff; 2118 instr->fail_addr = 0xffffffff;
2132 2119
2133 /* Grab the lock and see if the device is available */ 2120 /* Grab the lock and see if the device is available */
2134 nand_get_device (this, mtd, FL_ERASING); 2121 nand_get_device(this, mtd, FL_ERASING);
2135 2122
2136 /* Shift to get first page */ 2123 /* Shift to get first page */
2137 page = (int) (instr->addr >> this->page_shift); 2124 page = (int)(instr->addr >> this->page_shift);
2138 chipnr = (int) (instr->addr >> this->chip_shift); 2125 chipnr = (int)(instr->addr >> this->chip_shift);
2139 2126
2140 /* Calculate pages in each block */ 2127 /* Calculate pages in each block */
2141 pages_per_block = 1 << (this->phys_erase_shift - this->page_shift); 2128 pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
@@ -2146,7 +2133,7 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2146 /* Check the WP bit */ 2133 /* Check the WP bit */
2147 /* Check, if it is write protected */ 2134 /* Check, if it is write protected */
2148 if (nand_check_wp(mtd)) { 2135 if (nand_check_wp(mtd)) {
2149 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n"); 2136 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
2150 instr->state = MTD_ERASE_FAILED; 2137 instr->state = MTD_ERASE_FAILED;
2151 goto erase_exit; 2138 goto erase_exit;
2152 } 2139 }
@@ -2166,7 +2153,7 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2166 while (len) { 2153 while (len) {
2167 /* Check if we have a bad block, we do not erase bad blocks ! */ 2154 /* Check if we have a bad block, we do not erase bad blocks ! */
2168 if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) { 2155 if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
2169 printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page); 2156 printk(KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
2170 instr->state = MTD_ERASE_FAILED; 2157 instr->state = MTD_ERASE_FAILED;
2171 goto erase_exit; 2158 goto erase_exit;
2172 } 2159 }
@@ -2176,9 +2163,9 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2176 if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block)) 2163 if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
2177 this->pagebuf = -1; 2164 this->pagebuf = -1;
2178 2165
2179 this->erase_cmd (mtd, page & this->pagemask); 2166 this->erase_cmd(mtd, page & this->pagemask);
2180 2167
2181 status = this->waitfunc (mtd, this, FL_ERASING); 2168 status = this->waitfunc(mtd, this, FL_ERASING);
2182 2169
2183 /* See if operation failed and additional status checks are available */ 2170 /* See if operation failed and additional status checks are available */
2184 if ((status & NAND_STATUS_FAIL) && (this->errstat)) { 2171 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
@@ -2187,7 +2174,7 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2187 2174
2188 /* See if block erase succeeded */ 2175 /* See if block erase succeeded */
2189 if (status & NAND_STATUS_FAIL) { 2176 if (status & NAND_STATUS_FAIL) {
2190 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page); 2177 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
2191 instr->state = MTD_ERASE_FAILED; 2178 instr->state = MTD_ERASE_FAILED;
2192 instr->fail_addr = (page << this->page_shift); 2179 instr->fail_addr = (page << this->page_shift);
2193 goto erase_exit; 2180 goto erase_exit;
@@ -2221,7 +2208,7 @@ int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbb
2221 } 2208 }
2222 instr->state = MTD_ERASE_DONE; 2209 instr->state = MTD_ERASE_DONE;
2223 2210
2224erase_exit: 2211 erase_exit:
2225 2212
2226 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 2213 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
2227 /* Do call back function */ 2214 /* Do call back function */
@@ -2236,9 +2223,9 @@ erase_exit:
2236 for (chipnr = 0; chipnr < this->numchips; chipnr++) { 2223 for (chipnr = 0; chipnr < this->numchips; chipnr++) {
2237 if (rewrite_bbt[chipnr]) { 2224 if (rewrite_bbt[chipnr]) {
2238 /* update the BBT for chip */ 2225 /* update the BBT for chip */
2239 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n", 2226 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
2240 chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]); 2227 chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
2241 nand_update_bbt (mtd, rewrite_bbt[chipnr]); 2228 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2242 } 2229 }
2243 } 2230 }
2244 } 2231 }
@@ -2253,31 +2240,30 @@ erase_exit:
2253 * 2240 *
2254 * Sync is actually a wait for chip ready function 2241 * Sync is actually a wait for chip ready function
2255 */ 2242 */
2256static void nand_sync (struct mtd_info *mtd) 2243static void nand_sync(struct mtd_info *mtd)
2257{ 2244{
2258 struct nand_chip *this = mtd->priv; 2245 struct nand_chip *this = mtd->priv;
2259 2246
2260 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n"); 2247 DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n");
2261 2248
2262 /* Grab the lock and see if the device is available */ 2249 /* Grab the lock and see if the device is available */
2263 nand_get_device (this, mtd, FL_SYNCING); 2250 nand_get_device(this, mtd, FL_SYNCING);
2264 /* Release it and go back */ 2251 /* Release it and go back */
2265 nand_release_device (mtd); 2252 nand_release_device(mtd);
2266} 2253}
2267 2254
2268
2269/** 2255/**
2270 * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2256 * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2271 * @mtd: MTD device structure 2257 * @mtd: MTD device structure
2272 * @ofs: offset relative to mtd start 2258 * @ofs: offset relative to mtd start
2273 */ 2259 */
2274static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs) 2260static int nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2275{ 2261{
2276 /* Check for invalid offset */ 2262 /* Check for invalid offset */
2277 if (ofs > mtd->size) 2263 if (ofs > mtd->size)
2278 return -EINVAL; 2264 return -EINVAL;
2279 2265
2280 return nand_block_checkbad (mtd, ofs, 1, 0); 2266 return nand_block_checkbad(mtd, ofs, 1, 0);
2281} 2267}
2282 2268
2283/** 2269/**
@@ -2285,17 +2271,17 @@ static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
2285 * @mtd: MTD device structure 2271 * @mtd: MTD device structure
2286 * @ofs: offset relative to mtd start 2272 * @ofs: offset relative to mtd start
2287 */ 2273 */
2288static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs) 2274static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2289{ 2275{
2290 struct nand_chip *this = mtd->priv; 2276 struct nand_chip *this = mtd->priv;
2291 int ret; 2277 int ret;
2292 2278
2293 if ((ret = nand_block_isbad(mtd, ofs))) { 2279 if ((ret = nand_block_isbad(mtd, ofs))) {
2294 /* If it was bad already, return success and do nothing. */ 2280 /* If it was bad already, return success and do nothing. */
2295 if (ret > 0) 2281 if (ret > 0)
2296 return 0; 2282 return 0;
2297 return ret; 2283 return ret;
2298 } 2284 }
2299 2285
2300 return this->block_markbad(mtd, ofs); 2286 return this->block_markbad(mtd, ofs);
2301} 2287}
@@ -2308,7 +2294,7 @@ static int nand_suspend(struct mtd_info *mtd)
2308{ 2294{
2309 struct nand_chip *this = mtd->priv; 2295 struct nand_chip *this = mtd->priv;
2310 2296
2311 return nand_get_device (this, mtd, FL_PM_SUSPENDED); 2297 return nand_get_device(this, mtd, FL_PM_SUSPENDED);
2312} 2298}
2313 2299
2314/** 2300/**
@@ -2322,30 +2308,44 @@ static void nand_resume(struct mtd_info *mtd)
2322 if (this->state == FL_PM_SUSPENDED) 2308 if (this->state == FL_PM_SUSPENDED)
2323 nand_release_device(mtd); 2309 nand_release_device(mtd);
2324 else 2310 else
2325 printk(KERN_ERR "resume() called for the chip which is not " 2311 printk(KERN_ERR "resume() called for the chip which is not in suspended state\n");
2326 "in suspended state\n");
2327 2312
2328} 2313}
2329 2314
2315/* module_text_address() isn't exported, and it's mostly a pointless
2316 test if this is a module _anyway_ -- they'd have to try _really_ hard
2317 to call us from in-kernel code if the core NAND support is modular. */
2318#ifdef MODULE
2319#define caller_is_module() (1)
2320#else
2321#define caller_is_module() module_text_address((unsigned long)__builtin_return_address(0))
2322#endif
2330 2323
2331/** 2324/**
2332 * nand_scan - [NAND Interface] Scan for the NAND device 2325 * nand_scan - [NAND Interface] Scan for the NAND device
2333 * @mtd: MTD device structure 2326 * @mtd: MTD device structure
2334 * @maxchips: Number of chips to scan for 2327 * @maxchips: Number of chips to scan for
2335 * 2328 *
2336 * This fills out all the not initialized function pointers 2329 * This fills out all the uninitialized function pointers
2337 * with the defaults. 2330 * with the defaults.
2338 * The flash ID is read and the mtd/chip structures are 2331 * The flash ID is read and the mtd/chip structures are
2339 * filled with the appropriate values. Buffers are allocated if 2332 * filled with the appropriate values. Buffers are allocated if
2340 * they are not provided by the board driver 2333 * they are not provided by the board driver
2334 * The mtd->owner field must be set to the module of the caller
2341 * 2335 *
2342 */ 2336 */
2343int nand_scan (struct mtd_info *mtd, int maxchips) 2337int nand_scan(struct mtd_info *mtd, int maxchips)
2344{ 2338{
2345 int i, nand_maf_id, nand_dev_id, busw, maf_id; 2339 int i, nand_maf_id, nand_dev_id, busw, maf_id;
2346 struct nand_chip *this = mtd->priv; 2340 struct nand_chip *this = mtd->priv;
2347 2341
2348 /* Get buswidth to select the correct functions*/ 2342 /* Many callers got this wrong, so check for it for a while... */
2343 if (!mtd->owner && caller_is_module()) {
2344 printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
2345 BUG();
2346 }
2347
2348 /* Get buswidth to select the correct functions */
2349 busw = this->options & NAND_BUSWIDTH_16; 2349 busw = this->options & NAND_BUSWIDTH_16;
2350 2350
2351 /* check for proper chip_delay setup, set 20us if not */ 2351 /* check for proper chip_delay setup, set 20us if not */
@@ -2387,7 +2387,7 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2387 this->select_chip(mtd, 0); 2387 this->select_chip(mtd, 0);
2388 2388
2389 /* Send the command for reading device ID */ 2389 /* Send the command for reading device ID */
2390 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1); 2390 this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2391 2391
2392 /* Read manufacturer and device IDs */ 2392 /* Read manufacturer and device IDs */
2393 nand_maf_id = this->read_byte(mtd); 2393 nand_maf_id = this->read_byte(mtd);
@@ -2399,7 +2399,8 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2399 if (nand_dev_id != nand_flash_ids[i].id) 2399 if (nand_dev_id != nand_flash_ids[i].id)
2400 continue; 2400 continue;
2401 2401
2402 if (!mtd->name) mtd->name = nand_flash_ids[i].name; 2402 if (!mtd->name)
2403 mtd->name = nand_flash_ids[i].name;
2403 this->chipsize = nand_flash_ids[i].chipsize << 20; 2404 this->chipsize = nand_flash_ids[i].chipsize << 20;
2404 2405
2405 /* New devices have all the information in additional id bytes */ 2406 /* New devices have all the information in additional id bytes */
@@ -2416,7 +2417,7 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2416 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9); 2417 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9);
2417 extid >>= 2; 2418 extid >>= 2;
2418 /* Calc blocksize. Blocksize is multiples of 64KiB */ 2419 /* Calc blocksize. Blocksize is multiples of 64KiB */
2419 mtd->erasesize = (64 * 1024) << (extid & 0x03); 2420 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2420 extid >>= 2; 2421 extid >>= 2;
2421 /* Get buswidth information */ 2422 /* Get buswidth information */
2422 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; 2423 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
@@ -2439,13 +2440,12 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2439 /* Check, if buswidth is correct. Hardware drivers should set 2440 /* Check, if buswidth is correct. Hardware drivers should set
2440 * this correct ! */ 2441 * this correct ! */
2441 if (busw != (this->options & NAND_BUSWIDTH_16)) { 2442 if (busw != (this->options & NAND_BUSWIDTH_16)) {
2442 printk (KERN_INFO "NAND device: Manufacturer ID:" 2443 printk(KERN_INFO "NAND device: Manufacturer ID:"
2443 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, 2444 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2444 nand_manuf_ids[maf_id].name , mtd->name); 2445 nand_manuf_ids[maf_id].name, mtd->name);
2445 printk (KERN_WARNING 2446 printk(KERN_WARNING
2446 "NAND bus width %d instead %d bit\n", 2447 "NAND bus width %d instead %d bit\n",
2447 (this->options & NAND_BUSWIDTH_16) ? 16 : 8, 2448 (this->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8);
2448 busw ? 16 : 8);
2449 this->select_chip(mtd, -1); 2449 this->select_chip(mtd, -1);
2450 return 1; 2450 return 1;
2451 } 2451 }
@@ -2456,13 +2456,12 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2456 this->chip_shift = ffs(this->chipsize) - 1; 2456 this->chip_shift = ffs(this->chipsize) - 1;
2457 2457
2458 /* Set the bad block position */ 2458 /* Set the bad block position */
2459 this->badblockpos = mtd->oobblock > 512 ? 2459 this->badblockpos = mtd->oobblock > 512 ? NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2460 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2461 2460
2462 /* Get chip options, preserve non chip based options */ 2461 /* Get chip options, preserve non chip based options */
2463 this->options &= ~NAND_CHIPOPTIONS_MSK; 2462 this->options &= ~NAND_CHIPOPTIONS_MSK;
2464 this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK; 2463 this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
2465 /* Set this as a default. Board drivers can override it, if neccecary */ 2464 /* Set this as a default. Board drivers can override it, if necessary */
2466 this->options |= NAND_NO_AUTOINCR; 2465 this->options |= NAND_NO_AUTOINCR;
2467 /* Check if this is a not a samsung device. Do not clear the options 2466 /* Check if this is a not a samsung device. Do not clear the options
2468 * for chips which are not having an extended id. 2467 * for chips which are not having an extended id.
@@ -2480,23 +2479,23 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2480 if (mtd->oobblock > 512 && this->cmdfunc == nand_command) 2479 if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
2481 this->cmdfunc = nand_command_lp; 2480 this->cmdfunc = nand_command_lp;
2482 2481
2483 printk (KERN_INFO "NAND device: Manufacturer ID:" 2482 printk(KERN_INFO "NAND device: Manufacturer ID:"
2484 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, 2483 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2485 nand_manuf_ids[maf_id].name , nand_flash_ids[i].name); 2484 nand_manuf_ids[maf_id].name, nand_flash_ids[i].name);
2486 break; 2485 break;
2487 } 2486 }
2488 2487
2489 if (!nand_flash_ids[i].name) { 2488 if (!nand_flash_ids[i].name) {
2490 printk (KERN_WARNING "No NAND device found!!!\n"); 2489 printk(KERN_WARNING "No NAND device found!!!\n");
2491 this->select_chip(mtd, -1); 2490 this->select_chip(mtd, -1);
2492 return 1; 2491 return 1;
2493 } 2492 }
2494 2493
2495 for (i=1; i < maxchips; i++) { 2494 for (i = 1; i < maxchips; i++) {
2496 this->select_chip(mtd, i); 2495 this->select_chip(mtd, i);
2497 2496
2498 /* Send the command for reading device ID */ 2497 /* Send the command for reading device ID */
2499 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1); 2498 this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2500 2499
2501 /* Read manufacturer and device IDs */ 2500 /* Read manufacturer and device IDs */
2502 if (nand_maf_id != this->read_byte(mtd) || 2501 if (nand_maf_id != this->read_byte(mtd) ||
@@ -2506,13 +2505,13 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2506 if (i > 1) 2505 if (i > 1)
2507 printk(KERN_INFO "%d NAND chips detected\n", i); 2506 printk(KERN_INFO "%d NAND chips detected\n", i);
2508 2507
2509 /* Allocate buffers, if neccecary */ 2508 /* Allocate buffers, if necessary */
2510 if (!this->oob_buf) { 2509 if (!this->oob_buf) {
2511 size_t len; 2510 size_t len;
2512 len = mtd->oobsize << (this->phys_erase_shift - this->page_shift); 2511 len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
2513 this->oob_buf = kmalloc (len, GFP_KERNEL); 2512 this->oob_buf = kmalloc(len, GFP_KERNEL);
2514 if (!this->oob_buf) { 2513 if (!this->oob_buf) {
2515 printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n"); 2514 printk(KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
2516 return -ENOMEM; 2515 return -ENOMEM;
2517 } 2516 }
2518 this->options |= NAND_OOBBUF_ALLOC; 2517 this->options |= NAND_OOBBUF_ALLOC;
@@ -2521,11 +2520,11 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2521 if (!this->data_buf) { 2520 if (!this->data_buf) {
2522 size_t len; 2521 size_t len;
2523 len = mtd->oobblock + mtd->oobsize; 2522 len = mtd->oobblock + mtd->oobsize;
2524 this->data_buf = kmalloc (len, GFP_KERNEL); 2523 this->data_buf = kmalloc(len, GFP_KERNEL);
2525 if (!this->data_buf) { 2524 if (!this->data_buf) {
2526 if (this->options & NAND_OOBBUF_ALLOC) 2525 if (this->options & NAND_OOBBUF_ALLOC)
2527 kfree (this->oob_buf); 2526 kfree(this->oob_buf);
2528 printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n"); 2527 printk(KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
2529 return -ENOMEM; 2528 return -ENOMEM;
2530 } 2529 }
2531 this->options |= NAND_DATABUF_ALLOC; 2530 this->options |= NAND_DATABUF_ALLOC;
@@ -2555,8 +2554,7 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2555 this->autooob = &nand_oob_64; 2554 this->autooob = &nand_oob_64;
2556 break; 2555 break;
2557 default: 2556 default:
2558 printk (KERN_WARNING "No oob scheme defined for oobsize %d\n", 2557 printk(KERN_WARNING "No oob scheme defined for oobsize %d\n", mtd->oobsize);
2559 mtd->oobsize);
2560 BUG(); 2558 BUG();
2561 } 2559 }
2562 } 2560 }
@@ -2571,7 +2569,7 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2571 * check ECC mode, default to software 2569 * check ECC mode, default to software
2572 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize 2570 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
2573 * fallback to software ECC 2571 * fallback to software ECC
2574 */ 2572 */
2575 this->eccsize = 256; /* set default eccsize */ 2573 this->eccsize = 256; /* set default eccsize */
2576 this->eccbytes = 3; 2574 this->eccbytes = 3;
2577 2575
@@ -2591,19 +2589,19 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2591 case NAND_ECC_HW6_512: 2589 case NAND_ECC_HW6_512:
2592 case NAND_ECC_HW8_512: 2590 case NAND_ECC_HW8_512:
2593 if (mtd->oobblock == 256) { 2591 if (mtd->oobblock == 256) {
2594 printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n"); 2592 printk(KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
2595 this->eccmode = NAND_ECC_SOFT; 2593 this->eccmode = NAND_ECC_SOFT;
2596 this->calculate_ecc = nand_calculate_ecc; 2594 this->calculate_ecc = nand_calculate_ecc;
2597 this->correct_data = nand_correct_data; 2595 this->correct_data = nand_correct_data;
2598 } else 2596 } else
2599 this->eccsize = 512; /* set eccsize to 512 */ 2597 this->eccsize = 512; /* set eccsize to 512 */
2600 break; 2598 break;
2601 2599
2602 case NAND_ECC_HW3_256: 2600 case NAND_ECC_HW3_256:
2603 break; 2601 break;
2604 2602
2605 case NAND_ECC_NONE: 2603 case NAND_ECC_NONE:
2606 printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n"); 2604 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
2607 this->eccmode = NAND_ECC_NONE; 2605 this->eccmode = NAND_ECC_NONE;
2608 break; 2606 break;
2609 2607
@@ -2613,13 +2611,13 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2613 break; 2611 break;
2614 2612
2615 default: 2613 default:
2616 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode); 2614 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
2617 BUG(); 2615 BUG();
2618 } 2616 }
2619 2617
2620 /* Check hardware ecc function availability and adjust number of ecc bytes per 2618 /* Check hardware ecc function availability and adjust number of ecc bytes per
2621 * calculation step 2619 * calculation step
2622 */ 2620 */
2623 switch (this->eccmode) { 2621 switch (this->eccmode) {
2624 case NAND_ECC_HW12_2048: 2622 case NAND_ECC_HW12_2048:
2625 this->eccbytes += 4; 2623 this->eccbytes += 4;
@@ -2631,7 +2629,7 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2631 case NAND_ECC_HW3_256: 2629 case NAND_ECC_HW3_256:
2632 if (this->calculate_ecc && this->correct_data && this->enable_hwecc) 2630 if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
2633 break; 2631 break;
2634 printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n"); 2632 printk(KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
2635 BUG(); 2633 BUG();
2636 } 2634 }
2637 2635
@@ -2659,8 +2657,8 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2659 2657
2660 /* Initialize state, waitqueue and spinlock */ 2658 /* Initialize state, waitqueue and spinlock */
2661 this->state = FL_READY; 2659 this->state = FL_READY;
2662 init_waitqueue_head (&this->wq); 2660 init_waitqueue_head(&this->wq);
2663 spin_lock_init (&this->chip_lock); 2661 spin_lock_init(&this->chip_lock);
2664 2662
2665 /* De-select the device */ 2663 /* De-select the device */
2666 this->select_chip(mtd, -1); 2664 this->select_chip(mtd, -1);
@@ -2695,44 +2693,41 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
2695 /* and make the autooob the default one */ 2693 /* and make the autooob the default one */
2696 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo)); 2694 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
2697 2695
2698 mtd->owner = THIS_MODULE;
2699
2700 /* Check, if we should skip the bad block table scan */ 2696 /* Check, if we should skip the bad block table scan */
2701 if (this->options & NAND_SKIP_BBTSCAN) 2697 if (this->options & NAND_SKIP_BBTSCAN)
2702 return 0; 2698 return 0;
2703 2699
2704 /* Build bad block table */ 2700 /* Build bad block table */
2705 return this->scan_bbt (mtd); 2701 return this->scan_bbt(mtd);
2706} 2702}
2707 2703
2708/** 2704/**
2709 * nand_release - [NAND Interface] Free resources held by the NAND device 2705 * nand_release - [NAND Interface] Free resources held by the NAND device
2710 * @mtd: MTD device structure 2706 * @mtd: MTD device structure
2711*/ 2707*/
2712void nand_release (struct mtd_info *mtd) 2708void nand_release(struct mtd_info *mtd)
2713{ 2709{
2714 struct nand_chip *this = mtd->priv; 2710 struct nand_chip *this = mtd->priv;
2715 2711
2716#ifdef CONFIG_MTD_PARTITIONS 2712#ifdef CONFIG_MTD_PARTITIONS
2717 /* Deregister partitions */ 2713 /* Deregister partitions */
2718 del_mtd_partitions (mtd); 2714 del_mtd_partitions(mtd);
2719#endif 2715#endif
2720 /* Deregister the device */ 2716 /* Deregister the device */
2721 del_mtd_device (mtd); 2717 del_mtd_device(mtd);
2722 2718
2723 /* Free bad block table memory */ 2719 /* Free bad block table memory */
2724 kfree (this->bbt); 2720 kfree(this->bbt);
2725 /* Buffer allocated by nand_scan ? */ 2721 /* Buffer allocated by nand_scan ? */
2726 if (this->options & NAND_OOBBUF_ALLOC) 2722 if (this->options & NAND_OOBBUF_ALLOC)
2727 kfree (this->oob_buf); 2723 kfree(this->oob_buf);
2728 /* Buffer allocated by nand_scan ? */ 2724 /* Buffer allocated by nand_scan ? */
2729 if (this->options & NAND_DATABUF_ALLOC) 2725 if (this->options & NAND_DATABUF_ALLOC)
2730 kfree (this->data_buf); 2726 kfree(this->data_buf);
2731} 2727}
2732 2728
2733EXPORT_SYMBOL_GPL (nand_scan); 2729EXPORT_SYMBOL_GPL(nand_scan);
2734EXPORT_SYMBOL_GPL (nand_release); 2730EXPORT_SYMBOL_GPL(nand_release);
2735
2736 2731
2737static int __init nand_base_init(void) 2732static int __init nand_base_init(void)
2738{ 2733{
@@ -2748,6 +2743,6 @@ static void __exit nand_base_exit(void)
2748module_init(nand_base_init); 2743module_init(nand_base_init);
2749module_exit(nand_base_exit); 2744module_exit(nand_base_exit);
2750 2745
2751MODULE_LICENSE ("GPL"); 2746MODULE_LICENSE("GPL");
2752MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); 2747MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2753MODULE_DESCRIPTION ("Generic NAND flash driver code"); 2748MODULE_DESCRIPTION("Generic NAND flash driver code");
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index ca286999fe08..9adc6d62332a 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -48,7 +48,7 @@
48 * 48 *
49 * Following assumptions are made: 49 * Following assumptions are made:
50 * - bbts start at a page boundary, if autolocated on a block boundary 50 * - bbts start at a page boundary, if autolocated on a block boundary
51 * - the space neccecary for a bbt in FLASH does not exceed a block boundary 51 * - the space necessary for a bbt in FLASH does not exceed a block boundary
52 * 52 *
53 */ 53 */
54 54
@@ -60,7 +60,7 @@
60#include <linux/mtd/compatmac.h> 60#include <linux/mtd/compatmac.h>
61#include <linux/bitops.h> 61#include <linux/bitops.h>
62#include <linux/delay.h> 62#include <linux/delay.h>
63 63#include <linux/vmalloc.h>
64 64
65/** 65/**
66 * check_pattern - [GENERIC] check if a pattern is in the buffer 66 * check_pattern - [GENERIC] check if a pattern is in the buffer
@@ -75,7 +75,7 @@
75 * pattern area contain 0xff 75 * pattern area contain 0xff
76 * 76 *
77*/ 77*/
78static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td) 78static int check_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
79{ 79{
80 int i, end = 0; 80 int i, end = 0;
81 uint8_t *p = buf; 81 uint8_t *p = buf;
@@ -116,7 +116,7 @@ static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_des
116 * no optional empty check 116 * no optional empty check
117 * 117 *
118*/ 118*/
119static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td) 119static int check_short_pattern(uint8_t *buf, struct nand_bbt_descr *td)
120{ 120{
121 int i; 121 int i;
122 uint8_t *p = buf; 122 uint8_t *p = buf;
@@ -142,8 +142,8 @@ static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td)
142 * Read the bad block table starting from page. 142 * Read the bad block table starting from page.
143 * 143 *
144 */ 144 */
145static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num, 145static int read_bbt(struct mtd_info *mtd, uint8_t *buf, int page, int num,
146 int bits, int offs, int reserved_block_code) 146 int bits, int offs, int reserved_block_code)
147{ 147{
148 int res, i, j, act = 0; 148 int res, i, j, act = 0;
149 struct nand_chip *this = mtd->priv; 149 struct nand_chip *this = mtd->priv;
@@ -152,17 +152,17 @@ static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
152 uint8_t msk = (uint8_t) ((1 << bits) - 1); 152 uint8_t msk = (uint8_t) ((1 << bits) - 1);
153 153
154 totlen = (num * bits) >> 3; 154 totlen = (num * bits) >> 3;
155 from = ((loff_t)page) << this->page_shift; 155 from = ((loff_t) page) << this->page_shift;
156 156
157 while (totlen) { 157 while (totlen) {
158 len = min (totlen, (size_t) (1 << this->bbt_erase_shift)); 158 len = min(totlen, (size_t) (1 << this->bbt_erase_shift));
159 res = mtd->read_ecc (mtd, from, len, &retlen, buf, NULL, this->autooob); 159 res = mtd->read_ecc(mtd, from, len, &retlen, buf, NULL, this->autooob);
160 if (res < 0) { 160 if (res < 0) {
161 if (retlen != len) { 161 if (retlen != len) {
162 printk (KERN_INFO "nand_bbt: Error reading bad block table\n"); 162 printk(KERN_INFO "nand_bbt: Error reading bad block table\n");
163 return res; 163 return res;
164 } 164 }
165 printk (KERN_WARNING "nand_bbt: ECC error while reading bad block table\n"); 165 printk(KERN_WARNING "nand_bbt: ECC error while reading bad block table\n");
166 } 166 }
167 167
168 /* Analyse data */ 168 /* Analyse data */
@@ -172,17 +172,16 @@ static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
172 uint8_t tmp = (dat >> j) & msk; 172 uint8_t tmp = (dat >> j) & msk;
173 if (tmp == msk) 173 if (tmp == msk)
174 continue; 174 continue;
175 if (reserved_block_code && 175 if (reserved_block_code && (tmp == reserved_block_code)) {
176 (tmp == reserved_block_code)) { 176 printk(KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n",
177 printk (KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n", 177 ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
178 ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
179 this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06); 178 this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
180 continue; 179 continue;
181 } 180 }
182 /* Leave it for now, if its matured we can move this 181 /* Leave it for now, if its matured we can move this
183 * message to MTD_DEBUG_LEVEL0 */ 182 * message to MTD_DEBUG_LEVEL0 */
184 printk (KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n", 183 printk(KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n",
185 ((offs << 2) + (act >> 1)) << this->bbt_erase_shift); 184 ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
186 /* Factory marked bad or worn out ? */ 185 /* Factory marked bad or worn out ? */
187 if (tmp == 0) 186 if (tmp == 0)
188 this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06); 187 this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
@@ -207,7 +206,7 @@ static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
207 * Read the bad block table for all chips starting at a given page 206 * Read the bad block table for all chips starting at a given page
208 * We assume that the bbt bits are in consecutive order. 207 * We assume that the bbt bits are in consecutive order.
209*/ 208*/
210static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip) 209static int read_abs_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
211{ 210{
212 struct nand_chip *this = mtd->priv; 211 struct nand_chip *this = mtd->priv;
213 int res = 0, i; 212 int res = 0, i;
@@ -242,23 +241,22 @@ static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_des
242 * We assume that the bbt bits are in consecutive order. 241 * We assume that the bbt bits are in consecutive order.
243 * 242 *
244*/ 243*/
245static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, 244static int read_abs_bbts(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, struct nand_bbt_descr *md)
246 struct nand_bbt_descr *md)
247{ 245{
248 struct nand_chip *this = mtd->priv; 246 struct nand_chip *this = mtd->priv;
249 247
250 /* Read the primary version, if available */ 248 /* Read the primary version, if available */
251 if (td->options & NAND_BBT_VERSION) { 249 if (td->options & NAND_BBT_VERSION) {
252 nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); 250 nand_read_raw(mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
253 td->version[0] = buf[mtd->oobblock + td->veroffs]; 251 td->version[0] = buf[mtd->oobblock + td->veroffs];
254 printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]); 252 printk(KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
255 } 253 }
256 254
257 /* Read the mirror version, if available */ 255 /* Read the mirror version, if available */
258 if (md && (md->options & NAND_BBT_VERSION)) { 256 if (md && (md->options & NAND_BBT_VERSION)) {
259 nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); 257 nand_read_raw(mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
260 md->version[0] = buf[mtd->oobblock + md->veroffs]; 258 md->version[0] = buf[mtd->oobblock + md->veroffs];
261 printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]); 259 printk(KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
262 } 260 }
263 261
264 return 1; 262 return 1;
@@ -275,7 +273,7 @@ static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_de
275 * Create a bad block table by scanning the device 273 * Create a bad block table by scanning the device
276 * for the given good/bad block identify pattern 274 * for the given good/bad block identify pattern
277 */ 275 */
278static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip) 276static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
279{ 277{
280 struct nand_chip *this = mtd->priv; 278 struct nand_chip *this = mtd->priv;
281 int i, j, numblocks, len, scanlen; 279 int i, j, numblocks, len, scanlen;
@@ -283,7 +281,7 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
283 loff_t from; 281 loff_t from;
284 size_t readlen, ooblen; 282 size_t readlen, ooblen;
285 283
286 printk (KERN_INFO "Scanning device for bad blocks\n"); 284 printk(KERN_INFO "Scanning device for bad blocks\n");
287 285
288 if (bd->options & NAND_BBT_SCANALLPAGES) 286 if (bd->options & NAND_BBT_SCANALLPAGES)
289 len = 1 << (this->bbt_erase_shift - this->page_shift); 287 len = 1 << (this->bbt_erase_shift - this->page_shift);
@@ -300,7 +298,7 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
300 readlen = bd->len; 298 readlen = bd->len;
301 } else { 299 } else {
302 /* Full page content should be read */ 300 /* Full page content should be read */
303 scanlen = mtd->oobblock + mtd->oobsize; 301 scanlen = mtd->oobblock + mtd->oobsize;
304 readlen = len * mtd->oobblock; 302 readlen = len * mtd->oobblock;
305 ooblen = len * mtd->oobsize; 303 ooblen = len * mtd->oobsize;
306 } 304 }
@@ -313,8 +311,8 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
313 from = 0; 311 from = 0;
314 } else { 312 } else {
315 if (chip >= this->numchips) { 313 if (chip >= this->numchips) {
316 printk (KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n", 314 printk(KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n",
317 chip + 1, this->numchips); 315 chip + 1, this->numchips);
318 return -EINVAL; 316 return -EINVAL;
319 } 317 }
320 numblocks = this->chipsize >> (this->bbt_erase_shift - 1); 318 numblocks = this->chipsize >> (this->bbt_erase_shift - 1);
@@ -327,7 +325,7 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
327 int ret; 325 int ret;
328 326
329 if (bd->options & NAND_BBT_SCANEMPTY) 327 if (bd->options & NAND_BBT_SCANEMPTY)
330 if ((ret = nand_read_raw (mtd, buf, from, readlen, ooblen))) 328 if ((ret = nand_read_raw(mtd, buf, from, readlen, ooblen)))
331 return ret; 329 return ret;
332 330
333 for (j = 0; j < len; j++) { 331 for (j = 0; j < len; j++) {
@@ -336,22 +334,21 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
336 334
337 /* Read the full oob until read_oob is fixed to 335 /* Read the full oob until read_oob is fixed to
338 * handle single byte reads for 16 bit buswidth */ 336 * handle single byte reads for 16 bit buswidth */
339 ret = mtd->read_oob(mtd, from + j * mtd->oobblock, 337 ret = mtd->read_oob(mtd, from + j * mtd->oobblock, mtd->oobsize, &retlen, buf);
340 mtd->oobsize, &retlen, buf);
341 if (ret) 338 if (ret)
342 return ret; 339 return ret;
343 340
344 if (check_short_pattern (buf, bd)) { 341 if (check_short_pattern(buf, bd)) {
345 this->bbt[i >> 3] |= 0x03 << (i & 0x6); 342 this->bbt[i >> 3] |= 0x03 << (i & 0x6);
346 printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n", 343 printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
347 i >> 1, (unsigned int) from); 344 i >> 1, (unsigned int)from);
348 break; 345 break;
349 } 346 }
350 } else { 347 } else {
351 if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) { 348 if (check_pattern(&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
352 this->bbt[i >> 3] |= 0x03 << (i & 0x6); 349 this->bbt[i >> 3] |= 0x03 << (i & 0x6);
353 printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n", 350 printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
354 i >> 1, (unsigned int) from); 351 i >> 1, (unsigned int)from);
355 break; 352 break;
356 } 353 }
357 } 354 }
@@ -374,12 +371,12 @@ static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
374 * block. 371 * block.
375 * If the option NAND_BBT_PERCHIP is given, each chip is searched 372 * If the option NAND_BBT_PERCHIP is given, each chip is searched
376 * for a bbt, which contains the bad block information of this chip. 373 * for a bbt, which contains the bad block information of this chip.
377 * This is neccecary to provide support for certain DOC devices. 374 * This is necessary to provide support for certain DOC devices.
378 * 375 *
379 * The bbt ident pattern resides in the oob area of the first page 376 * The bbt ident pattern resides in the oob area of the first page
380 * in a block. 377 * in a block.
381 */ 378 */
382static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td) 379static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
383{ 380{
384 struct nand_chip *this = mtd->priv; 381 struct nand_chip *this = mtd->priv;
385 int i, chips; 382 int i, chips;
@@ -389,7 +386,7 @@ static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
389 386
390 /* Search direction top -> down ? */ 387 /* Search direction top -> down ? */
391 if (td->options & NAND_BBT_LASTBLOCK) { 388 if (td->options & NAND_BBT_LASTBLOCK) {
392 startblock = (mtd->size >> this->bbt_erase_shift) -1; 389 startblock = (mtd->size >> this->bbt_erase_shift) - 1;
393 dir = -1; 390 dir = -1;
394 } else { 391 } else {
395 startblock = 0; 392 startblock = 0;
@@ -417,7 +414,7 @@ static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
417 for (block = 0; block < td->maxblocks; block++) { 414 for (block = 0; block < td->maxblocks; block++) {
418 int actblock = startblock + dir * block; 415 int actblock = startblock + dir * block;
419 /* Read first page */ 416 /* Read first page */
420 nand_read_raw (mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize); 417 nand_read_raw(mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
421 if (!check_pattern(buf, scanlen, mtd->oobblock, td)) { 418 if (!check_pattern(buf, scanlen, mtd->oobblock, td)) {
422 td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift); 419 td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift);
423 if (td->options & NAND_BBT_VERSION) { 420 if (td->options & NAND_BBT_VERSION) {
@@ -431,9 +428,10 @@ static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
431 /* Check, if we found a bbt for each requested chip */ 428 /* Check, if we found a bbt for each requested chip */
432 for (i = 0; i < chips; i++) { 429 for (i = 0; i < chips; i++) {
433 if (td->pages[i] == -1) 430 if (td->pages[i] == -1)
434 printk (KERN_WARNING "Bad block table not found for chip %d\n", i); 431 printk(KERN_WARNING "Bad block table not found for chip %d\n", i);
435 else 432 else
436 printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]); 433 printk(KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i],
434 td->version[i]);
437 } 435 }
438 return 0; 436 return 0;
439} 437}
@@ -447,21 +445,19 @@ static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
447 * 445 *
448 * Search and read the bad block table(s) 446 * Search and read the bad block table(s)
449*/ 447*/
450static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf, 448static int search_read_bbts(struct mtd_info *mtd, uint8_t * buf, struct nand_bbt_descr *td, struct nand_bbt_descr *md)
451 struct nand_bbt_descr *td, struct nand_bbt_descr *md)
452{ 449{
453 /* Search the primary table */ 450 /* Search the primary table */
454 search_bbt (mtd, buf, td); 451 search_bbt(mtd, buf, td);
455 452
456 /* Search the mirror table */ 453 /* Search the mirror table */
457 if (md) 454 if (md)
458 search_bbt (mtd, buf, md); 455 search_bbt(mtd, buf, md);
459 456
460 /* Force result check */ 457 /* Force result check */
461 return 1; 458 return 1;
462} 459}
463 460
464
465/** 461/**
466 * write_bbt - [GENERIC] (Re)write the bad block table 462 * write_bbt - [GENERIC] (Re)write the bad block table
467 * 463 *
@@ -474,8 +470,8 @@ static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf,
474 * (Re)write the bad block table 470 * (Re)write the bad block table
475 * 471 *
476*/ 472*/
477static int write_bbt (struct mtd_info *mtd, uint8_t *buf, 473static int write_bbt(struct mtd_info *mtd, uint8_t *buf,
478 struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel) 474 struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
479{ 475{
480 struct nand_chip *this = mtd->priv; 476 struct nand_chip *this = mtd->priv;
481 struct nand_oobinfo oobinfo; 477 struct nand_oobinfo oobinfo;
@@ -492,7 +488,7 @@ static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
492 rcode = 0xff; 488 rcode = 0xff;
493 /* Write bad block table per chip rather than per device ? */ 489 /* Write bad block table per chip rather than per device ? */
494 if (td->options & NAND_BBT_PERCHIP) { 490 if (td->options & NAND_BBT_PERCHIP) {
495 numblocks = (int) (this->chipsize >> this->bbt_erase_shift); 491 numblocks = (int)(this->chipsize >> this->bbt_erase_shift);
496 /* Full device write or specific chip ? */ 492 /* Full device write or specific chip ? */
497 if (chipsel == -1) { 493 if (chipsel == -1) {
498 nrchips = this->numchips; 494 nrchips = this->numchips;
@@ -501,7 +497,7 @@ static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
501 chip = chipsel; 497 chip = chipsel;
502 } 498 }
503 } else { 499 } else {
504 numblocks = (int) (mtd->size >> this->bbt_erase_shift); 500 numblocks = (int)(mtd->size >> this->bbt_erase_shift);
505 nrchips = 1; 501 nrchips = 1;
506 } 502 }
507 503
@@ -540,9 +536,9 @@ static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
540 if (!md || md->pages[chip] != page) 536 if (!md || md->pages[chip] != page)
541 goto write; 537 goto write;
542 } 538 }
543 printk (KERN_ERR "No space left to write bad block table\n"); 539 printk(KERN_ERR "No space left to write bad block table\n");
544 return -ENOSPC; 540 return -ENOSPC;
545write: 541 write:
546 542
547 /* Set up shift count and masks for the flash table */ 543 /* Set up shift count and masks for the flash table */
548 bits = td->options & NAND_BBT_NRBITS_MSK; 544 bits = td->options & NAND_BBT_NRBITS_MSK;
@@ -558,7 +554,7 @@ write:
558 554
559 to = ((loff_t) page) << this->page_shift; 555 to = ((loff_t) page) << this->page_shift;
560 556
561 memcpy (&oobinfo, this->autooob, sizeof(oobinfo)); 557 memcpy(&oobinfo, this->autooob, sizeof(oobinfo));
562 oobinfo.useecc = MTD_NANDECC_PLACEONLY; 558 oobinfo.useecc = MTD_NANDECC_PLACEONLY;
563 559
564 /* Must we save the block contents ? */ 560 /* Must we save the block contents ? */
@@ -566,22 +562,23 @@ write:
566 /* Make it block aligned */ 562 /* Make it block aligned */
567 to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1)); 563 to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1));
568 len = 1 << this->bbt_erase_shift; 564 len = 1 << this->bbt_erase_shift;
569 res = mtd->read_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo); 565 res = mtd->read_ecc(mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
570 if (res < 0) { 566 if (res < 0) {
571 if (retlen != len) { 567 if (retlen != len) {
572 printk (KERN_INFO "nand_bbt: Error reading block for writing the bad block table\n"); 568 printk(KERN_INFO
569 "nand_bbt: Error reading block for writing the bad block table\n");
573 return res; 570 return res;
574 } 571 }
575 printk (KERN_WARNING "nand_bbt: ECC error while reading block for writing bad block table\n"); 572 printk(KERN_WARNING "nand_bbt: ECC error while reading block for writing bad block table\n");
576 } 573 }
577 /* Calc the byte offset in the buffer */ 574 /* Calc the byte offset in the buffer */
578 pageoffs = page - (int)(to >> this->page_shift); 575 pageoffs = page - (int)(to >> this->page_shift);
579 offs = pageoffs << this->page_shift; 576 offs = pageoffs << this->page_shift;
580 /* Preset the bbt area with 0xff */ 577 /* Preset the bbt area with 0xff */
581 memset (&buf[offs], 0xff, (size_t)(numblocks >> sft)); 578 memset(&buf[offs], 0xff, (size_t) (numblocks >> sft));
582 /* Preset the bbt's oob area with 0xff */ 579 /* Preset the bbt's oob area with 0xff */
583 memset (&buf[len + pageoffs * mtd->oobsize], 0xff, 580 memset(&buf[len + pageoffs * mtd->oobsize], 0xff,
584 ((len >> this->page_shift) - pageoffs) * mtd->oobsize); 581 ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
585 if (td->options & NAND_BBT_VERSION) { 582 if (td->options & NAND_BBT_VERSION) {
586 buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip]; 583 buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip];
587 } 584 }
@@ -589,22 +586,22 @@ write:
589 /* Calc length */ 586 /* Calc length */
590 len = (size_t) (numblocks >> sft); 587 len = (size_t) (numblocks >> sft);
591 /* Make it page aligned ! */ 588 /* Make it page aligned ! */
592 len = (len + (mtd->oobblock-1)) & ~(mtd->oobblock-1); 589 len = (len + (mtd->oobblock - 1)) & ~(mtd->oobblock - 1);
593 /* Preset the buffer with 0xff */ 590 /* Preset the buffer with 0xff */
594 memset (buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize); 591 memset(buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
595 offs = 0; 592 offs = 0;
596 /* Pattern is located in oob area of first page */ 593 /* Pattern is located in oob area of first page */
597 memcpy (&buf[len + td->offs], td->pattern, td->len); 594 memcpy(&buf[len + td->offs], td->pattern, td->len);
598 if (td->options & NAND_BBT_VERSION) { 595 if (td->options & NAND_BBT_VERSION) {
599 buf[len + td->veroffs] = td->version[chip]; 596 buf[len + td->veroffs] = td->version[chip];
600 } 597 }
601 } 598 }
602 599
603 /* walk through the memory table */ 600 /* walk through the memory table */
604 for (i = 0; i < numblocks; ) { 601 for (i = 0; i < numblocks;) {
605 uint8_t dat; 602 uint8_t dat;
606 dat = this->bbt[bbtoffs + (i >> 2)]; 603 dat = this->bbt[bbtoffs + (i >> 2)];
607 for (j = 0; j < 4; j++ , i++) { 604 for (j = 0; j < 4; j++, i++) {
608 int sftcnt = (i << (3 - sft)) & sftmsk; 605 int sftcnt = (i << (3 - sft)) & sftmsk;
609 /* Do not store the reserved bbt blocks ! */ 606 /* Do not store the reserved bbt blocks ! */
610 buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt); 607 buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt);
@@ -612,23 +609,23 @@ write:
612 } 609 }
613 } 610 }
614 611
615 memset (&einfo, 0, sizeof (einfo)); 612 memset(&einfo, 0, sizeof(einfo));
616 einfo.mtd = mtd; 613 einfo.mtd = mtd;
617 einfo.addr = (unsigned long) to; 614 einfo.addr = (unsigned long)to;
618 einfo.len = 1 << this->bbt_erase_shift; 615 einfo.len = 1 << this->bbt_erase_shift;
619 res = nand_erase_nand (mtd, &einfo, 1); 616 res = nand_erase_nand(mtd, &einfo, 1);
620 if (res < 0) { 617 if (res < 0) {
621 printk (KERN_WARNING "nand_bbt: Error during block erase: %d\n", res); 618 printk(KERN_WARNING "nand_bbt: Error during block erase: %d\n", res);
622 return res; 619 return res;
623 } 620 }
624 621
625 res = mtd->write_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo); 622 res = mtd->write_ecc(mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
626 if (res < 0) { 623 if (res < 0) {
627 printk (KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res); 624 printk(KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res);
628 return res; 625 return res;
629 } 626 }
630 printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n", 627 printk(KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
631 (unsigned int) to, td->version[chip]); 628 (unsigned int)to, td->version[chip]);
632 629
633 /* Mark it as used */ 630 /* Mark it as used */
634 td->pages[chip] = page; 631 td->pages[chip] = page;
@@ -644,27 +641,27 @@ write:
644 * The function creates a memory based bbt by scanning the device 641 * The function creates a memory based bbt by scanning the device
645 * for manufacturer / software marked good / bad blocks 642 * for manufacturer / software marked good / bad blocks
646*/ 643*/
647static inline int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd) 644static inline int nand_memory_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
648{ 645{
649 struct nand_chip *this = mtd->priv; 646 struct nand_chip *this = mtd->priv;
650 647
651 bd->options &= ~NAND_BBT_SCANEMPTY; 648 bd->options &= ~NAND_BBT_SCANEMPTY;
652 return create_bbt (mtd, this->data_buf, bd, -1); 649 return create_bbt(mtd, this->data_buf, bd, -1);
653} 650}
654 651
655/** 652/**
656 * check_create - [GENERIC] create and write bbt(s) if neccecary 653 * check_create - [GENERIC] create and write bbt(s) if necessary
657 * @mtd: MTD device structure 654 * @mtd: MTD device structure
658 * @buf: temporary buffer 655 * @buf: temporary buffer
659 * @bd: descriptor for the good/bad block search pattern 656 * @bd: descriptor for the good/bad block search pattern
660 * 657 *
661 * The function checks the results of the previous call to read_bbt 658 * The function checks the results of the previous call to read_bbt
662 * and creates / updates the bbt(s) if neccecary 659 * and creates / updates the bbt(s) if necessary
663 * Creation is neccecary if no bbt was found for the chip/device 660 * Creation is necessary if no bbt was found for the chip/device
664 * Update is neccecary if one of the tables is missing or the 661 * Update is necessary if one of the tables is missing or the
665 * version nr. of one table is less than the other 662 * version nr. of one table is less than the other
666*/ 663*/
667static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd) 664static int check_create(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
668{ 665{
669 int i, chips, writeops, chipsel, res; 666 int i, chips, writeops, chipsel, res;
670 struct nand_chip *this = mtd->priv; 667 struct nand_chip *this = mtd->priv;
@@ -732,35 +729,35 @@ static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_des
732 rd = td; 729 rd = td;
733 goto writecheck; 730 goto writecheck;
734 } 731 }
735create: 732 create:
736 /* Create the bad block table by scanning the device ? */ 733 /* Create the bad block table by scanning the device ? */
737 if (!(td->options & NAND_BBT_CREATE)) 734 if (!(td->options & NAND_BBT_CREATE))
738 continue; 735 continue;
739 736
740 /* Create the table in memory by scanning the chip(s) */ 737 /* Create the table in memory by scanning the chip(s) */
741 create_bbt (mtd, buf, bd, chipsel); 738 create_bbt(mtd, buf, bd, chipsel);
742 739
743 td->version[i] = 1; 740 td->version[i] = 1;
744 if (md) 741 if (md)
745 md->version[i] = 1; 742 md->version[i] = 1;
746writecheck: 743 writecheck:
747 /* read back first ? */ 744 /* read back first ? */
748 if (rd) 745 if (rd)
749 read_abs_bbt (mtd, buf, rd, chipsel); 746 read_abs_bbt(mtd, buf, rd, chipsel);
750 /* If they weren't versioned, read both. */ 747 /* If they weren't versioned, read both. */
751 if (rd2) 748 if (rd2)
752 read_abs_bbt (mtd, buf, rd2, chipsel); 749 read_abs_bbt(mtd, buf, rd2, chipsel);
753 750
754 /* Write the bad block table to the device ? */ 751 /* Write the bad block table to the device ? */
755 if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) { 752 if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
756 res = write_bbt (mtd, buf, td, md, chipsel); 753 res = write_bbt(mtd, buf, td, md, chipsel);
757 if (res < 0) 754 if (res < 0)
758 return res; 755 return res;
759 } 756 }
760 757
761 /* Write the mirror bad block table to the device ? */ 758 /* Write the mirror bad block table to the device ? */
762 if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) { 759 if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
763 res = write_bbt (mtd, buf, md, td, chipsel); 760 res = write_bbt(mtd, buf, md, td, chipsel);
764 if (res < 0) 761 if (res < 0)
765 return res; 762 return res;
766 } 763 }
@@ -777,7 +774,7 @@ writecheck:
777 * accidental erasures / writes. The regions are identified by 774 * accidental erasures / writes. The regions are identified by
778 * the mark 0x02. 775 * the mark 0x02.
779*/ 776*/
780static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td) 777static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td)
781{ 778{
782 struct nand_chip *this = mtd->priv; 779 struct nand_chip *this = mtd->priv;
783 int i, j, chips, block, nrblocks, update; 780 int i, j, chips, block, nrblocks, update;
@@ -795,7 +792,8 @@ static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
795 for (i = 0; i < chips; i++) { 792 for (i = 0; i < chips; i++) {
796 if ((td->options & NAND_BBT_ABSPAGE) || 793 if ((td->options & NAND_BBT_ABSPAGE) ||
797 !(td->options & NAND_BBT_WRITE)) { 794 !(td->options & NAND_BBT_WRITE)) {
798 if (td->pages[i] == -1) continue; 795 if (td->pages[i] == -1)
796 continue;
799 block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift); 797 block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
800 block <<= 1; 798 block <<= 1;
801 oldval = this->bbt[(block >> 3)]; 799 oldval = this->bbt[(block >> 3)];
@@ -815,7 +813,8 @@ static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
815 oldval = this->bbt[(block >> 3)]; 813 oldval = this->bbt[(block >> 3)];
816 newval = oldval | (0x2 << (block & 0x06)); 814 newval = oldval | (0x2 << (block & 0x06));
817 this->bbt[(block >> 3)] = newval; 815 this->bbt[(block >> 3)] = newval;
818 if (oldval != newval) update = 1; 816 if (oldval != newval)
817 update = 1;
819 block += 2; 818 block += 2;
820 } 819 }
821 /* If we want reserved blocks to be recorded to flash, and some 820 /* If we want reserved blocks to be recorded to flash, and some
@@ -840,7 +839,7 @@ static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
840 * by calling the nand_free_bbt function. 839 * by calling the nand_free_bbt function.
841 * 840 *
842*/ 841*/
843int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd) 842int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
844{ 843{
845 struct nand_chip *this = mtd->priv; 844 struct nand_chip *this = mtd->priv;
846 int len, res = 0; 845 int len, res = 0;
@@ -850,21 +849,21 @@ int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
850 849
851 len = mtd->size >> (this->bbt_erase_shift + 2); 850 len = mtd->size >> (this->bbt_erase_shift + 2);
852 /* Allocate memory (2bit per block) */ 851 /* Allocate memory (2bit per block) */
853 this->bbt = kmalloc (len, GFP_KERNEL); 852 this->bbt = kmalloc(len, GFP_KERNEL);
854 if (!this->bbt) { 853 if (!this->bbt) {
855 printk (KERN_ERR "nand_scan_bbt: Out of memory\n"); 854 printk(KERN_ERR "nand_scan_bbt: Out of memory\n");
856 return -ENOMEM; 855 return -ENOMEM;
857 } 856 }
858 /* Clear the memory bad block table */ 857 /* Clear the memory bad block table */
859 memset (this->bbt, 0x00, len); 858 memset(this->bbt, 0x00, len);
860 859
861 /* If no primary table decriptor is given, scan the device 860 /* If no primary table decriptor is given, scan the device
862 * to build a memory based bad block table 861 * to build a memory based bad block table
863 */ 862 */
864 if (!td) { 863 if (!td) {
865 if ((res = nand_memory_bbt(mtd, bd))) { 864 if ((res = nand_memory_bbt(mtd, bd))) {
866 printk (KERN_ERR "nand_bbt: Can't scan flash and build the RAM-based BBT\n"); 865 printk(KERN_ERR "nand_bbt: Can't scan flash and build the RAM-based BBT\n");
867 kfree (this->bbt); 866 kfree(this->bbt);
868 this->bbt = NULL; 867 this->bbt = NULL;
869 } 868 }
870 return res; 869 return res;
@@ -873,35 +872,34 @@ int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
873 /* Allocate a temporary buffer for one eraseblock incl. oob */ 872 /* Allocate a temporary buffer for one eraseblock incl. oob */
874 len = (1 << this->bbt_erase_shift); 873 len = (1 << this->bbt_erase_shift);
875 len += (len >> this->page_shift) * mtd->oobsize; 874 len += (len >> this->page_shift) * mtd->oobsize;
876 buf = kmalloc (len, GFP_KERNEL); 875 buf = vmalloc(len);
877 if (!buf) { 876 if (!buf) {
878 printk (KERN_ERR "nand_bbt: Out of memory\n"); 877 printk(KERN_ERR "nand_bbt: Out of memory\n");
879 kfree (this->bbt); 878 kfree(this->bbt);
880 this->bbt = NULL; 879 this->bbt = NULL;
881 return -ENOMEM; 880 return -ENOMEM;
882 } 881 }
883 882
884 /* Is the bbt at a given page ? */ 883 /* Is the bbt at a given page ? */
885 if (td->options & NAND_BBT_ABSPAGE) { 884 if (td->options & NAND_BBT_ABSPAGE) {
886 res = read_abs_bbts (mtd, buf, td, md); 885 res = read_abs_bbts(mtd, buf, td, md);
887 } else { 886 } else {
888 /* Search the bad block table using a pattern in oob */ 887 /* Search the bad block table using a pattern in oob */
889 res = search_read_bbts (mtd, buf, td, md); 888 res = search_read_bbts(mtd, buf, td, md);
890 } 889 }
891 890
892 if (res) 891 if (res)
893 res = check_create (mtd, buf, bd); 892 res = check_create(mtd, buf, bd);
894 893
895 /* Prevent the bbt regions from erasing / writing */ 894 /* Prevent the bbt regions from erasing / writing */
896 mark_bbt_region (mtd, td); 895 mark_bbt_region(mtd, td);
897 if (md) 896 if (md)
898 mark_bbt_region (mtd, md); 897 mark_bbt_region(mtd, md);
899 898
900 kfree (buf); 899 vfree(buf);
901 return res; 900 return res;
902} 901}
903 902
904
905/** 903/**
906 * nand_update_bbt - [NAND Interface] update bad block table(s) 904 * nand_update_bbt - [NAND Interface] update bad block table(s)
907 * @mtd: MTD device structure 905 * @mtd: MTD device structure
@@ -909,7 +907,7 @@ int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
909 * 907 *
910 * The function updates the bad block table(s) 908 * The function updates the bad block table(s)
911*/ 909*/
912int nand_update_bbt (struct mtd_info *mtd, loff_t offs) 910int nand_update_bbt(struct mtd_info *mtd, loff_t offs)
913{ 911{
914 struct nand_chip *this = mtd->priv; 912 struct nand_chip *this = mtd->priv;
915 int len, res = 0, writeops = 0; 913 int len, res = 0, writeops = 0;
@@ -925,9 +923,9 @@ int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
925 /* Allocate a temporary buffer for one eraseblock incl. oob */ 923 /* Allocate a temporary buffer for one eraseblock incl. oob */
926 len = (1 << this->bbt_erase_shift); 924 len = (1 << this->bbt_erase_shift);
927 len += (len >> this->page_shift) * mtd->oobsize; 925 len += (len >> this->page_shift) * mtd->oobsize;
928 buf = kmalloc (len, GFP_KERNEL); 926 buf = kmalloc(len, GFP_KERNEL);
929 if (!buf) { 927 if (!buf) {
930 printk (KERN_ERR "nand_update_bbt: Out of memory\n"); 928 printk(KERN_ERR "nand_update_bbt: Out of memory\n");
931 return -ENOMEM; 929 return -ENOMEM;
932 } 930 }
933 931
@@ -935,7 +933,7 @@ int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
935 933
936 /* Do we have a bbt per chip ? */ 934 /* Do we have a bbt per chip ? */
937 if (td->options & NAND_BBT_PERCHIP) { 935 if (td->options & NAND_BBT_PERCHIP) {
938 chip = (int) (offs >> this->chip_shift); 936 chip = (int)(offs >> this->chip_shift);
939 chipsel = chip; 937 chipsel = chip;
940 } else { 938 } else {
941 chip = 0; 939 chip = 0;
@@ -948,17 +946,17 @@ int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
948 946
949 /* Write the bad block table to the device ? */ 947 /* Write the bad block table to the device ? */
950 if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) { 948 if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
951 res = write_bbt (mtd, buf, td, md, chipsel); 949 res = write_bbt(mtd, buf, td, md, chipsel);
952 if (res < 0) 950 if (res < 0)
953 goto out; 951 goto out;
954 } 952 }
955 /* Write the mirror bad block table to the device ? */ 953 /* Write the mirror bad block table to the device ? */
956 if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) { 954 if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
957 res = write_bbt (mtd, buf, md, td, chipsel); 955 res = write_bbt(mtd, buf, md, td, chipsel);
958 } 956 }
959 957
960out: 958 out:
961 kfree (buf); 959 kfree(buf);
962 return res; 960 return res;
963} 961}
964 962
@@ -981,14 +979,14 @@ static struct nand_bbt_descr largepage_memorybased = {
981}; 979};
982 980
983static struct nand_bbt_descr smallpage_flashbased = { 981static struct nand_bbt_descr smallpage_flashbased = {
984 .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES, 982 .options = NAND_BBT_SCAN2NDPAGE,
985 .offs = 5, 983 .offs = 5,
986 .len = 1, 984 .len = 1,
987 .pattern = scan_ff_pattern 985 .pattern = scan_ff_pattern
988}; 986};
989 987
990static struct nand_bbt_descr largepage_flashbased = { 988static struct nand_bbt_descr largepage_flashbased = {
991 .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES, 989 .options = NAND_BBT_SCAN2NDPAGE,
992 .offs = 0, 990 .offs = 0,
993 .len = 2, 991 .len = 2,
994 .pattern = scan_ff_pattern 992 .pattern = scan_ff_pattern
@@ -1036,7 +1034,7 @@ static struct nand_bbt_descr bbt_mirror_descr = {
1036 * support for the device and calls the nand_scan_bbt function 1034 * support for the device and calls the nand_scan_bbt function
1037 * 1035 *
1038*/ 1036*/
1039int nand_default_bbt (struct mtd_info *mtd) 1037int nand_default_bbt(struct mtd_info *mtd)
1040{ 1038{
1041 struct nand_chip *this = mtd->priv; 1039 struct nand_chip *this = mtd->priv;
1042 1040
@@ -1046,7 +1044,7 @@ int nand_default_bbt (struct mtd_info *mtd)
1046 * of the good / bad information, so we _must_ store 1044 * of the good / bad information, so we _must_ store
1047 * this information in a good / bad table during 1045 * this information in a good / bad table during
1048 * startup 1046 * startup
1049 */ 1047 */
1050 if (this->options & NAND_IS_AND) { 1048 if (this->options & NAND_IS_AND) {
1051 /* Use the default pattern descriptors */ 1049 /* Use the default pattern descriptors */
1052 if (!this->bbt_td) { 1050 if (!this->bbt_td) {
@@ -1054,10 +1052,9 @@ int nand_default_bbt (struct mtd_info *mtd)
1054 this->bbt_md = &bbt_mirror_descr; 1052 this->bbt_md = &bbt_mirror_descr;
1055 } 1053 }
1056 this->options |= NAND_USE_FLASH_BBT; 1054 this->options |= NAND_USE_FLASH_BBT;
1057 return nand_scan_bbt (mtd, &agand_flashbased); 1055 return nand_scan_bbt(mtd, &agand_flashbased);
1058 } 1056 }
1059 1057
1060
1061 /* Is a flash based bad block table requested ? */ 1058 /* Is a flash based bad block table requested ? */
1062 if (this->options & NAND_USE_FLASH_BBT) { 1059 if (this->options & NAND_USE_FLASH_BBT) {
1063 /* Use the default pattern descriptors */ 1060 /* Use the default pattern descriptors */
@@ -1066,18 +1063,17 @@ int nand_default_bbt (struct mtd_info *mtd)
1066 this->bbt_md = &bbt_mirror_descr; 1063 this->bbt_md = &bbt_mirror_descr;
1067 } 1064 }
1068 if (!this->badblock_pattern) { 1065 if (!this->badblock_pattern) {
1069 this->badblock_pattern = (mtd->oobblock > 512) ? 1066 this->badblock_pattern = (mtd->oobblock > 512) ? &largepage_flashbased : &smallpage_flashbased;
1070 &largepage_flashbased : &smallpage_flashbased;
1071 } 1067 }
1072 } else { 1068 } else {
1073 this->bbt_td = NULL; 1069 this->bbt_td = NULL;
1074 this->bbt_md = NULL; 1070 this->bbt_md = NULL;
1075 if (!this->badblock_pattern) { 1071 if (!this->badblock_pattern) {
1076 this->badblock_pattern = (mtd->oobblock > 512) ? 1072 this->badblock_pattern = (mtd->oobblock > 512) ?
1077 &largepage_memorybased : &smallpage_memorybased; 1073 &largepage_memorybased : &smallpage_memorybased;
1078 } 1074 }
1079 } 1075 }
1080 return nand_scan_bbt (mtd, this->badblock_pattern); 1076 return nand_scan_bbt(mtd, this->badblock_pattern);
1081} 1077}
1082 1078
1083/** 1079/**
@@ -1087,26 +1083,29 @@ int nand_default_bbt (struct mtd_info *mtd)
1087 * @allowbbt: allow access to bad block table region 1083 * @allowbbt: allow access to bad block table region
1088 * 1084 *
1089*/ 1085*/
1090int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt) 1086int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
1091{ 1087{
1092 struct nand_chip *this = mtd->priv; 1088 struct nand_chip *this = mtd->priv;
1093 int block; 1089 int block;
1094 uint8_t res; 1090 uint8_t res;
1095 1091
1096 /* Get block number * 2 */ 1092 /* Get block number * 2 */
1097 block = (int) (offs >> (this->bbt_erase_shift - 1)); 1093 block = (int)(offs >> (this->bbt_erase_shift - 1));
1098 res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03; 1094 res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
1099 1095
1100 DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n", 1096 DEBUG(MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
1101 (unsigned int)offs, block >> 1, res); 1097 (unsigned int)offs, block >> 1, res);
1102 1098
1103 switch ((int)res) { 1099 switch ((int)res) {
1104 case 0x00: return 0; 1100 case 0x00:
1105 case 0x01: return 1; 1101 return 0;
1106 case 0x02: return allowbbt ? 0 : 1; 1102 case 0x01:
1103 return 1;
1104 case 0x02:
1105 return allowbbt ? 0 : 1;
1107 } 1106 }
1108 return 1; 1107 return 1;
1109} 1108}
1110 1109
1111EXPORT_SYMBOL (nand_scan_bbt); 1110EXPORT_SYMBOL(nand_scan_bbt);
1112EXPORT_SYMBOL (nand_default_bbt); 1111EXPORT_SYMBOL(nand_default_bbt);
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 40ac909150a3..101892985b02 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -62,7 +62,6 @@ static const u_char nand_ecc_precalc_table[] = {
62 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00 62 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
63}; 63};
64 64
65
66/** 65/**
67 * nand_trans_result - [GENERIC] create non-inverted ECC 66 * nand_trans_result - [GENERIC] create non-inverted ECC
68 * @reg2: line parity reg 2 67 * @reg2: line parity reg 2
@@ -71,8 +70,7 @@ static const u_char nand_ecc_precalc_table[] = {
71 * 70 *
72 * Creates non-inverted ECC code from line parity 71 * Creates non-inverted ECC code from line parity
73 */ 72 */
74static void nand_trans_result(u_char reg2, u_char reg3, 73static void nand_trans_result(u_char reg2, u_char reg3, u_char *ecc_code)
75 u_char *ecc_code)
76{ 74{
77 u_char a, b, i, tmp1, tmp2; 75 u_char a, b, i, tmp1, tmp2;
78 76
@@ -82,10 +80,10 @@ static void nand_trans_result(u_char reg2, u_char reg3,
82 80
83 /* Calculate first ECC byte */ 81 /* Calculate first ECC byte */
84 for (i = 0; i < 4; i++) { 82 for (i = 0; i < 4; i++) {
85 if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */ 83 if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
86 tmp1 |= b; 84 tmp1 |= b;
87 b >>= 1; 85 b >>= 1;
88 if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */ 86 if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
89 tmp1 |= b; 87 tmp1 |= b;
90 b >>= 1; 88 b >>= 1;
91 a >>= 1; 89 a >>= 1;
@@ -94,10 +92,10 @@ static void nand_trans_result(u_char reg2, u_char reg3,
94 /* Calculate second ECC byte */ 92 /* Calculate second ECC byte */
95 b = 0x80; 93 b = 0x80;
96 for (i = 0; i < 4; i++) { 94 for (i = 0; i < 4; i++) {
97 if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */ 95 if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
98 tmp2 |= b; 96 tmp2 |= b;
99 b >>= 1; 97 b >>= 1;
100 if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */ 98 if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
101 tmp2 |= b; 99 tmp2 |= b;
102 b >>= 1; 100 b >>= 1;
103 a >>= 1; 101 a >>= 1;
@@ -124,7 +122,7 @@ int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code
124 ecc_code[0] = ecc_code[1] = ecc_code[2] = 0; 122 ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
125 123
126 /* Build up column parity */ 124 /* Build up column parity */
127 for(j = 0; j < 256; j++) { 125 for (j = 0; j < 256; j++) {
128 126
129 /* Get CP0 - CP5 from table */ 127 /* Get CP0 - CP5 from table */
130 idx = nand_ecc_precalc_table[dat[j]]; 128 idx = nand_ecc_precalc_table[dat[j]];
@@ -168,8 +166,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
168 if ((d1 | d2 | d3) == 0) { 166 if ((d1 | d2 | d3) == 0) {
169 /* No errors */ 167 /* No errors */
170 return 0; 168 return 0;
171 } 169 } else {
172 else {
173 a = (d1 ^ (d1 >> 1)) & 0x55; 170 a = (d1 ^ (d1 >> 1)) & 0x55;
174 b = (d2 ^ (d2 >> 1)) & 0x55; 171 b = (d2 ^ (d2 >> 1)) & 0x55;
175 c = (d3 ^ (d3 >> 1)) & 0x54; 172 c = (d3 ^ (d3 >> 1)) & 0x54;
@@ -179,14 +176,14 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
179 c = 0x80; 176 c = 0x80;
180 add = 0; 177 add = 0;
181 a = 0x80; 178 a = 0x80;
182 for (i=0; i<4; i++) { 179 for (i = 0; i < 4; i++) {
183 if (d1 & c) 180 if (d1 & c)
184 add |= a; 181 add |= a;
185 c >>= 2; 182 c >>= 2;
186 a >>= 1; 183 a >>= 1;
187 } 184 }
188 c = 0x80; 185 c = 0x80;
189 for (i=0; i<4; i++) { 186 for (i = 0; i < 4; i++) {
190 if (d2 & c) 187 if (d2 & c)
191 add |= a; 188 add |= a;
192 c >>= 2; 189 c >>= 2;
@@ -195,7 +192,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
195 bit = 0; 192 bit = 0;
196 b = 0x04; 193 b = 0x04;
197 c = 0x80; 194 c = 0x80;
198 for (i=0; i<3; i++) { 195 for (i = 0; i < 3; i++) {
199 if (d3 & c) 196 if (d3 & c)
200 bit |= b; 197 bit |= b;
201 c >>= 2; 198 c >>= 2;
@@ -206,8 +203,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
206 a ^= (b << bit); 203 a ^= (b << bit);
207 dat[add] = a; 204 dat[add] = a;
208 return 1; 205 return 1;
209 } 206 } else {
210 else {
211 i = 0; 207 i = 0;
212 while (d1) { 208 while (d1) {
213 if (d1 & 0x01) 209 if (d1 & 0x01)
@@ -230,8 +226,7 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_cha
230 read_ecc[1] = calc_ecc[1]; 226 read_ecc[1] = calc_ecc[1];
231 read_ecc[2] = calc_ecc[2]; 227 read_ecc[2] = calc_ecc[2];
232 return 2; 228 return 2;
233 } 229 } else {
234 else {
235 /* Uncorrectable Error */ 230 /* Uncorrectable Error */
236 return -1; 231 return -1;
237 } 232 }
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index dbc7e55a4247..a9d52fc6e5d7 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -125,13 +125,13 @@ struct nand_manufacturers nand_manuf_ids[] = {
125 {NAND_MFR_NATIONAL, "National"}, 125 {NAND_MFR_NATIONAL, "National"},
126 {NAND_MFR_RENESAS, "Renesas"}, 126 {NAND_MFR_RENESAS, "Renesas"},
127 {NAND_MFR_STMICRO, "ST Micro"}, 127 {NAND_MFR_STMICRO, "ST Micro"},
128 {NAND_MFR_HYNIX, "Hynix"}, 128 {NAND_MFR_HYNIX, "Hynix"},
129 {0x0, "Unknown"} 129 {0x0, "Unknown"}
130}; 130};
131 131
132EXPORT_SYMBOL (nand_manuf_ids); 132EXPORT_SYMBOL(nand_manuf_ids);
133EXPORT_SYMBOL (nand_flash_ids); 133EXPORT_SYMBOL(nand_flash_ids);
134 134
135MODULE_LICENSE ("GPL"); 135MODULE_LICENSE("GPL");
136MODULE_AUTHOR ("Thomas Gleixner <tglx@linutronix.de>"); 136MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
137MODULE_DESCRIPTION ("Nand device & manufacturer ID's"); 137MODULE_DESCRIPTION("Nand device & manufacturer IDs");
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index a0af92cc7efd..6903f5b903c6 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -1546,6 +1546,8 @@ static int __init ns_init_module(void)
1546 chip->options |= NAND_BUSWIDTH_16; 1546 chip->options |= NAND_BUSWIDTH_16;
1547 } 1547 }
1548 1548
1549 nsmtd->owner = THIS_MODULE;
1550
1549 if ((retval = nand_scan(nsmtd, 1)) != 0) { 1551 if ((retval = nand_scan(nsmtd, 1)) != 0) {
1550 NS_ERR("can't register NAND Simulator\n"); 1552 NS_ERR("can't register NAND Simulator\n");
1551 if (retval > 0) 1553 if (retval > 0)
diff --git a/drivers/mtd/nand/ppchameleonevb.c b/drivers/mtd/nand/ppchameleonevb.c
index 91a95f34a6ee..5d4d16fb1df6 100644
--- a/drivers/mtd/nand/ppchameleonevb.c
+++ b/drivers/mtd/nand/ppchameleonevb.c
@@ -58,21 +58,21 @@
58/* 58/*
59 * MTD structure for PPChameleonEVB board 59 * MTD structure for PPChameleonEVB board
60 */ 60 */
61static struct mtd_info *ppchameleon_mtd = NULL; 61static struct mtd_info *ppchameleon_mtd = NULL;
62static struct mtd_info *ppchameleonevb_mtd = NULL; 62static struct mtd_info *ppchameleonevb_mtd = NULL;
63 63
64/* 64/*
65 * Module stuff 65 * Module stuff
66 */ 66 */
67static unsigned long ppchameleon_fio_pbase = CFG_NAND0_PADDR; 67static unsigned long ppchameleon_fio_pbase = CFG_NAND0_PADDR;
68static unsigned long ppchameleonevb_fio_pbase = CFG_NAND1_PADDR; 68static unsigned long ppchameleonevb_fio_pbase = CFG_NAND1_PADDR;
69 69
70#ifdef MODULE 70#ifdef MODULE
71module_param(ppchameleon_fio_pbase, ulong, 0); 71module_param(ppchameleon_fio_pbase, ulong, 0);
72module_param(ppchameleonevb_fio_pbase, ulong, 0); 72module_param(ppchameleonevb_fio_pbase, ulong, 0);
73#else 73#else
74__setup("ppchameleon_fio_pbase=",ppchameleon_fio_pbase); 74__setup("ppchameleon_fio_pbase=", ppchameleon_fio_pbase);
75__setup("ppchameleonevb_fio_pbase=",ppchameleonevb_fio_pbase); 75__setup("ppchameleonevb_fio_pbase=", ppchameleonevb_fio_pbase);
76#endif 76#endif
77 77
78#ifdef CONFIG_MTD_PARTITIONS 78#ifdef CONFIG_MTD_PARTITIONS
@@ -80,80 +80,80 @@ __setup("ppchameleonevb_fio_pbase=",ppchameleonevb_fio_pbase);
80 * Define static partitions for flash devices 80 * Define static partitions for flash devices
81 */ 81 */
82static struct mtd_partition partition_info_hi[] = { 82static struct mtd_partition partition_info_hi[] = {
83 { name: "PPChameleon HI Nand Flash", 83 { .name = "PPChameleon HI Nand Flash",
84 offset: 0, 84 offset = 0,
85 size: 128*1024*1024 } 85 .size = 128 * 1024 * 1024
86 }
86}; 87};
87 88
88static struct mtd_partition partition_info_me[] = { 89static struct mtd_partition partition_info_me[] = {
89 { name: "PPChameleon ME Nand Flash", 90 { .name = "PPChameleon ME Nand Flash",
90 offset: 0, 91 .offset = 0,
91 size: 32*1024*1024 } 92 .size = 32 * 1024 * 1024
93 }
92}; 94};
93 95
94static struct mtd_partition partition_info_evb[] = { 96static struct mtd_partition partition_info_evb[] = {
95 { name: "PPChameleonEVB Nand Flash", 97 { .name = "PPChameleonEVB Nand Flash",
96 offset: 0, 98 .offset = 0,
97 size: 32*1024*1024 } 99 .size = 32 * 1024 * 1024
100 }
98}; 101};
99 102
100#define NUM_PARTITIONS 1 103#define NUM_PARTITIONS 1
101 104
102extern int parse_cmdline_partitions(struct mtd_info *master, 105extern int parse_cmdline_partitions(struct mtd_info *master, struct mtd_partition **pparts, const char *mtd_id);
103 struct mtd_partition **pparts,
104 const char *mtd_id);
105#endif 106#endif
106 107
107
108/* 108/*
109 * hardware specific access to control-lines 109 * hardware specific access to control-lines
110 */ 110 */
111static void ppchameleon_hwcontrol(struct mtd_info *mtdinfo, int cmd) 111static void ppchameleon_hwcontrol(struct mtd_info *mtdinfo, int cmd)
112{ 112{
113 switch(cmd) { 113 switch (cmd) {
114 114
115 case NAND_CTL_SETCLE: 115 case NAND_CTL_SETCLE:
116 MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND0_PADDR); 116 MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND0_PADDR);
117 break; 117 break;
118 case NAND_CTL_CLRCLE: 118 case NAND_CTL_CLRCLE:
119 MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND0_PADDR); 119 MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND0_PADDR);
120 break; 120 break;
121 case NAND_CTL_SETALE: 121 case NAND_CTL_SETALE:
122 MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND0_PADDR); 122 MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND0_PADDR);
123 break; 123 break;
124 case NAND_CTL_CLRALE: 124 case NAND_CTL_CLRALE:
125 MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND0_PADDR); 125 MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND0_PADDR);
126 break; 126 break;
127 case NAND_CTL_SETNCE: 127 case NAND_CTL_SETNCE:
128 MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND0_PADDR); 128 MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND0_PADDR);
129 break; 129 break;
130 case NAND_CTL_CLRNCE: 130 case NAND_CTL_CLRNCE:
131 MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND0_PADDR); 131 MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND0_PADDR);
132 break; 132 break;
133 } 133 }
134} 134}
135 135
136static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd) 136static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
137{ 137{
138 switch(cmd) { 138 switch (cmd) {
139 139
140 case NAND_CTL_SETCLE: 140 case NAND_CTL_SETCLE:
141 MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR); 141 MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
142 break; 142 break;
143 case NAND_CTL_CLRCLE: 143 case NAND_CTL_CLRCLE:
144 MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR); 144 MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);
145 break; 145 break;
146 case NAND_CTL_SETALE: 146 case NAND_CTL_SETALE:
147 MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR); 147 MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
148 break; 148 break;
149 case NAND_CTL_CLRALE: 149 case NAND_CTL_CLRALE:
150 MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR); 150 MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);
151 break; 151 break;
152 case NAND_CTL_SETNCE: 152 case NAND_CTL_SETNCE:
153 MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR); 153 MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
154 break; 154 break;
155 case NAND_CTL_CLRNCE: 155 case NAND_CTL_CLRNCE:
156 MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR); 156 MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
157 break; 157 break;
158 } 158 }
159} 159}
@@ -164,15 +164,15 @@ static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
164 */ 164 */
165static int ppchameleon_device_ready(struct mtd_info *minfo) 165static int ppchameleon_device_ready(struct mtd_info *minfo)
166{ 166{
167 if (in_be32((volatile unsigned*)GPIO0_IR) & NAND_RB_GPIO_PIN) 167 if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_RB_GPIO_PIN)
168 return 1; 168 return 1;
169 return 0; 169 return 0;
170} 170}
171 171
172static int ppchameleonevb_device_ready(struct mtd_info *minfo) 172static int ppchameleonevb_device_ready(struct mtd_info *minfo)
173{ 173{
174 if (in_be32((volatile unsigned*)GPIO0_IR) & NAND_EVB_RB_GPIO_PIN) 174 if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_EVB_RB_GPIO_PIN)
175 return 1; 175 return 1;
176 return 0; 176 return 0;
177} 177}
178#endif 178#endif
@@ -185,7 +185,7 @@ const char *part_probes_evb[] = { "cmdlinepart", NULL };
185/* 185/*
186 * Main initialization routine 186 * Main initialization routine
187 */ 187 */
188static int __init ppchameleonevb_init (void) 188static int __init ppchameleonevb_init(void)
189{ 189{
190 struct nand_chip *this; 190 struct nand_chip *this;
191 const char *part_type = 0; 191 const char *part_type = 0;
@@ -194,13 +194,11 @@ static int __init ppchameleonevb_init (void)
194 void __iomem *ppchameleon_fio_base; 194 void __iomem *ppchameleon_fio_base;
195 void __iomem *ppchameleonevb_fio_base; 195 void __iomem *ppchameleonevb_fio_base;
196 196
197
198 /********************************* 197 /*********************************
199 * Processor module NAND (if any) * 198 * Processor module NAND (if any) *
200 *********************************/ 199 *********************************/
201 /* Allocate memory for MTD device structure and private data */ 200 /* Allocate memory for MTD device structure and private data */
202 ppchameleon_mtd = kmalloc(sizeof(struct mtd_info) + 201 ppchameleon_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
203 sizeof(struct nand_chip), GFP_KERNEL);
204 if (!ppchameleon_mtd) { 202 if (!ppchameleon_mtd) {
205 printk("Unable to allocate PPChameleon NAND MTD device structure.\n"); 203 printk("Unable to allocate PPChameleon NAND MTD device structure.\n");
206 return -ENOMEM; 204 return -ENOMEM;
@@ -208,43 +206,46 @@ static int __init ppchameleonevb_init (void)
208 206
209 /* map physical address */ 207 /* map physical address */
210 ppchameleon_fio_base = ioremap(ppchameleon_fio_pbase, SZ_4M); 208 ppchameleon_fio_base = ioremap(ppchameleon_fio_pbase, SZ_4M);
211 if(!ppchameleon_fio_base) { 209 if (!ppchameleon_fio_base) {
212 printk("ioremap PPChameleon NAND flash failed\n"); 210 printk("ioremap PPChameleon NAND flash failed\n");
213 kfree(ppchameleon_mtd); 211 kfree(ppchameleon_mtd);
214 return -EIO; 212 return -EIO;
215 } 213 }
216 214
217 /* Get pointer to private data */ 215 /* Get pointer to private data */
218 this = (struct nand_chip *) (&ppchameleon_mtd[1]); 216 this = (struct nand_chip *)(&ppchameleon_mtd[1]);
219 217
220 /* Initialize structures */ 218 /* Initialize structures */
221 memset((char *) ppchameleon_mtd, 0, sizeof(struct mtd_info)); 219 memset(ppchameleon_mtd, 0, sizeof(struct mtd_info));
222 memset((char *) this, 0, sizeof(struct nand_chip)); 220 memset(this, 0, sizeof(struct nand_chip));
223 221
224 /* Link the private data with the MTD structure */ 222 /* Link the private data with the MTD structure */
225 ppchameleon_mtd->priv = this; 223 ppchameleon_mtd->priv = this;
224 ppchameleon_mtd->owner = THIS_MODULE;
226 225
227 /* Initialize GPIOs */ 226 /* Initialize GPIOs */
228 /* Pin mapping for NAND chip */ 227 /* Pin mapping for NAND chip */
229 /* 228 /*
230 CE GPIO_01 229 CE GPIO_01
231 CLE GPIO_02 230 CLE GPIO_02
232 ALE GPIO_03 231 ALE GPIO_03
233 R/B GPIO_04 232 R/B GPIO_04
234 */ 233 */
235 /* output select */ 234 /* output select */
236 out_be32((volatile unsigned*)GPIO0_OSRH, in_be32((volatile unsigned*)GPIO0_OSRH) & 0xC0FFFFFF); 235 out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xC0FFFFFF);
237 /* three-state select */ 236 /* three-state select */
238 out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xC0FFFFFF); 237 out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xC0FFFFFF);
239 /* enable output driver */ 238 /* enable output driver */
240 out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) | NAND_nCE_GPIO_PIN | NAND_CLE_GPIO_PIN | NAND_ALE_GPIO_PIN); 239 out_be32((volatile unsigned *)GPIO0_TCR,
240 in_be32((volatile unsigned *)GPIO0_TCR) | NAND_nCE_GPIO_PIN | NAND_CLE_GPIO_PIN | NAND_ALE_GPIO_PIN);
241#ifdef USE_READY_BUSY_PIN 241#ifdef USE_READY_BUSY_PIN
242 /* three-state select */ 242 /* three-state select */
243 out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xFF3FFFFF); 243 out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFF3FFFFF);
244 /* high-impedecence */ 244 /* high-impedecence */
245 out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) & (~NAND_RB_GPIO_PIN)); 245 out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_RB_GPIO_PIN));
246 /* input select */ 246 /* input select */
247 out_be32((volatile unsigned*)GPIO0_ISR1H, (in_be32((volatile unsigned*)GPIO0_ISR1H) & 0xFF3FFFFF) | 0x00400000); 247 out_be32((volatile unsigned *)GPIO0_ISR1H,
248 (in_be32((volatile unsigned *)GPIO0_ISR1H) & 0xFF3FFFFF) | 0x00400000);
248#endif 249#endif
249 250
250 /* insert callbacks */ 251 /* insert callbacks */
@@ -259,12 +260,11 @@ static int __init ppchameleonevb_init (void)
259 this->eccmode = NAND_ECC_SOFT; 260 this->eccmode = NAND_ECC_SOFT;
260 261
261 /* Scan to find existence of the device (it could not be mounted) */ 262 /* Scan to find existence of the device (it could not be mounted) */
262 if (nand_scan (ppchameleon_mtd, 1)) { 263 if (nand_scan(ppchameleon_mtd, 1)) {
263 iounmap((void *)ppchameleon_fio_base); 264 iounmap((void *)ppchameleon_fio_base);
264 kfree (ppchameleon_mtd); 265 kfree(ppchameleon_mtd);
265 goto nand_evb_init; 266 goto nand_evb_init;
266 } 267 }
267
268#ifndef USE_READY_BUSY_PIN 268#ifndef USE_READY_BUSY_PIN
269 /* Adjust delay if necessary */ 269 /* Adjust delay if necessary */
270 if (ppchameleon_mtd->size == NAND_SMALL_SIZE) 270 if (ppchameleon_mtd->size == NAND_SMALL_SIZE)
@@ -275,12 +275,11 @@ static int __init ppchameleonevb_init (void)
275 ppchameleon_mtd->name = "ppchameleon-nand"; 275 ppchameleon_mtd->name = "ppchameleon-nand";
276 mtd_parts_nb = parse_mtd_partitions(ppchameleon_mtd, part_probes, &mtd_parts, 0); 276 mtd_parts_nb = parse_mtd_partitions(ppchameleon_mtd, part_probes, &mtd_parts, 0);
277 if (mtd_parts_nb > 0) 277 if (mtd_parts_nb > 0)
278 part_type = "command line"; 278 part_type = "command line";
279 else 279 else
280 mtd_parts_nb = 0; 280 mtd_parts_nb = 0;
281#endif 281#endif
282 if (mtd_parts_nb == 0) 282 if (mtd_parts_nb == 0) {
283 {
284 if (ppchameleon_mtd->size == NAND_SMALL_SIZE) 283 if (ppchameleon_mtd->size == NAND_SMALL_SIZE)
285 mtd_parts = partition_info_me; 284 mtd_parts = partition_info_me;
286 else 285 else
@@ -293,13 +292,12 @@ static int __init ppchameleonevb_init (void)
293 printk(KERN_NOTICE "Using %s partition definition\n", part_type); 292 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
294 add_mtd_partitions(ppchameleon_mtd, mtd_parts, mtd_parts_nb); 293 add_mtd_partitions(ppchameleon_mtd, mtd_parts, mtd_parts_nb);
295 294
296nand_evb_init: 295 nand_evb_init:
297 /**************************** 296 /****************************
298 * EVB NAND (always present) * 297 * EVB NAND (always present) *
299 ****************************/ 298 ****************************/
300 /* Allocate memory for MTD device structure and private data */ 299 /* Allocate memory for MTD device structure and private data */
301 ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) + 300 ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
302 sizeof(struct nand_chip), GFP_KERNEL);
303 if (!ppchameleonevb_mtd) { 301 if (!ppchameleonevb_mtd) {
304 printk("Unable to allocate PPChameleonEVB NAND MTD device structure.\n"); 302 printk("Unable to allocate PPChameleonEVB NAND MTD device structure.\n");
305 return -ENOMEM; 303 return -ENOMEM;
@@ -307,46 +305,47 @@ nand_evb_init:
307 305
308 /* map physical address */ 306 /* map physical address */
309 ppchameleonevb_fio_base = ioremap(ppchameleonevb_fio_pbase, SZ_4M); 307 ppchameleonevb_fio_base = ioremap(ppchameleonevb_fio_pbase, SZ_4M);
310 if(!ppchameleonevb_fio_base) { 308 if (!ppchameleonevb_fio_base) {
311 printk("ioremap PPChameleonEVB NAND flash failed\n"); 309 printk("ioremap PPChameleonEVB NAND flash failed\n");
312 kfree(ppchameleonevb_mtd); 310 kfree(ppchameleonevb_mtd);
313 return -EIO; 311 return -EIO;
314 } 312 }
315 313
316 /* Get pointer to private data */ 314 /* Get pointer to private data */
317 this = (struct nand_chip *) (&ppchameleonevb_mtd[1]); 315 this = (struct nand_chip *)(&ppchameleonevb_mtd[1]);
318 316
319 /* Initialize structures */ 317 /* Initialize structures */
320 memset((char *) ppchameleonevb_mtd, 0, sizeof(struct mtd_info)); 318 memset(ppchameleonevb_mtd, 0, sizeof(struct mtd_info));
321 memset((char *) this, 0, sizeof(struct nand_chip)); 319 memset(this, 0, sizeof(struct nand_chip));
322 320
323 /* Link the private data with the MTD structure */ 321 /* Link the private data with the MTD structure */
324 ppchameleonevb_mtd->priv = this; 322 ppchameleonevb_mtd->priv = this;
325 323
326 /* Initialize GPIOs */ 324 /* Initialize GPIOs */
327 /* Pin mapping for NAND chip */ 325 /* Pin mapping for NAND chip */
328 /* 326 /*
329 CE GPIO_14 327 CE GPIO_14
330 CLE GPIO_15 328 CLE GPIO_15
331 ALE GPIO_16 329 ALE GPIO_16
332 R/B GPIO_31 330 R/B GPIO_31
333 */ 331 */
334 /* output select */ 332 /* output select */
335 out_be32((volatile unsigned*)GPIO0_OSRH, in_be32((volatile unsigned*)GPIO0_OSRH) & 0xFFFFFFF0); 333 out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xFFFFFFF0);
336 out_be32((volatile unsigned*)GPIO0_OSRL, in_be32((volatile unsigned*)GPIO0_OSRL) & 0x3FFFFFFF); 334 out_be32((volatile unsigned *)GPIO0_OSRL, in_be32((volatile unsigned *)GPIO0_OSRL) & 0x3FFFFFFF);
337 /* three-state select */ 335 /* three-state select */
338 out_be32((volatile unsigned*)GPIO0_TSRH, in_be32((volatile unsigned*)GPIO0_TSRH) & 0xFFFFFFF0); 336 out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFFFFFFF0);
339 out_be32((volatile unsigned*)GPIO0_TSRL, in_be32((volatile unsigned*)GPIO0_TSRL) & 0x3FFFFFFF); 337 out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0x3FFFFFFF);
340 /* enable output driver */ 338 /* enable output driver */
341 out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) | NAND_EVB_nCE_GPIO_PIN | 339 out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) | NAND_EVB_nCE_GPIO_PIN |
342 NAND_EVB_CLE_GPIO_PIN | NAND_EVB_ALE_GPIO_PIN); 340 NAND_EVB_CLE_GPIO_PIN | NAND_EVB_ALE_GPIO_PIN);
343#ifdef USE_READY_BUSY_PIN 341#ifdef USE_READY_BUSY_PIN
344 /* three-state select */ 342 /* three-state select */
345 out_be32((volatile unsigned*)GPIO0_TSRL, in_be32((volatile unsigned*)GPIO0_TSRL) & 0xFFFFFFFC); 343 out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0xFFFFFFFC);
346 /* high-impedecence */ 344 /* high-impedecence */
347 out_be32((volatile unsigned*)GPIO0_TCR, in_be32((volatile unsigned*)GPIO0_TCR) & (~NAND_EVB_RB_GPIO_PIN)); 345 out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_EVB_RB_GPIO_PIN));
348 /* input select */ 346 /* input select */
349 out_be32((volatile unsigned*)GPIO0_ISR1L, (in_be32((volatile unsigned*)GPIO0_ISR1L) & 0xFFFFFFFC) | 0x00000001); 347 out_be32((volatile unsigned *)GPIO0_ISR1L,
348 (in_be32((volatile unsigned *)GPIO0_ISR1L) & 0xFFFFFFFC) | 0x00000001);
350#endif 349#endif
351 350
352 /* insert callbacks */ 351 /* insert callbacks */
@@ -362,22 +361,20 @@ nand_evb_init:
362 this->eccmode = NAND_ECC_SOFT; 361 this->eccmode = NAND_ECC_SOFT;
363 362
364 /* Scan to find existence of the device */ 363 /* Scan to find existence of the device */
365 if (nand_scan (ppchameleonevb_mtd, 1)) { 364 if (nand_scan(ppchameleonevb_mtd, 1)) {
366 iounmap((void *)ppchameleonevb_fio_base); 365 iounmap((void *)ppchameleonevb_fio_base);
367 kfree (ppchameleonevb_mtd); 366 kfree(ppchameleonevb_mtd);
368 return -ENXIO; 367 return -ENXIO;
369 } 368 }
370
371#ifdef CONFIG_MTD_PARTITIONS 369#ifdef CONFIG_MTD_PARTITIONS
372 ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME; 370 ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME;
373 mtd_parts_nb = parse_mtd_partitions(ppchameleonevb_mtd, part_probes_evb, &mtd_parts, 0); 371 mtd_parts_nb = parse_mtd_partitions(ppchameleonevb_mtd, part_probes_evb, &mtd_parts, 0);
374 if (mtd_parts_nb > 0) 372 if (mtd_parts_nb > 0)
375 part_type = "command line"; 373 part_type = "command line";
376 else 374 else
377 mtd_parts_nb = 0; 375 mtd_parts_nb = 0;
378#endif 376#endif
379 if (mtd_parts_nb == 0) 377 if (mtd_parts_nb == 0) {
380 {
381 mtd_parts = partition_info_evb; 378 mtd_parts = partition_info_evb;
382 mtd_parts_nb = NUM_PARTITIONS; 379 mtd_parts_nb = NUM_PARTITIONS;
383 part_type = "static"; 380 part_type = "static";
@@ -390,18 +387,19 @@ nand_evb_init:
390 /* Return happy */ 387 /* Return happy */
391 return 0; 388 return 0;
392} 389}
390
393module_init(ppchameleonevb_init); 391module_init(ppchameleonevb_init);
394 392
395/* 393/*
396 * Clean up routine 394 * Clean up routine
397 */ 395 */
398static void __exit ppchameleonevb_cleanup (void) 396static void __exit ppchameleonevb_cleanup(void)
399{ 397{
400 struct nand_chip *this; 398 struct nand_chip *this;
401 399
402 /* Release resources, unregister device(s) */ 400 /* Release resources, unregister device(s) */
403 nand_release (ppchameleon_mtd); 401 nand_release(ppchameleon_mtd);
404 nand_release (ppchameleonevb_mtd); 402 nand_release(ppchameleonevb_mtd);
405 403
406 /* Release iomaps */ 404 /* Release iomaps */
407 this = (struct nand_chip *) &ppchameleon_mtd[1]; 405 this = (struct nand_chip *) &ppchameleon_mtd[1];
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c
index 4129c03dfd90..bc9d849fbd5d 100644
--- a/drivers/mtd/nand/rtc_from4.c
+++ b/drivers/mtd/nand/rtc_from4.c
@@ -97,12 +97,12 @@ static struct mtd_info *rtc_from4_mtd = NULL;
97static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE); 97static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE);
98 98
99static const struct mtd_partition partition_info[] = { 99static const struct mtd_partition partition_info[] = {
100 { 100 {
101 .name = "Renesas flash partition 1", 101 .name = "Renesas flash partition 1",
102 .offset = 0, 102 .offset = 0,
103 .size = MTDPART_SIZ_FULL 103 .size = MTDPART_SIZ_FULL},
104 },
105}; 104};
105
106#define NUM_PARTITIONS 1 106#define NUM_PARTITIONS 1
107 107
108/* 108/*
@@ -111,8 +111,8 @@ static const struct mtd_partition partition_info[] = {
111 * NAND_BBT_CREATE and/or NAND_BBT_WRITE 111 * NAND_BBT_CREATE and/or NAND_BBT_WRITE
112 * 112 *
113 */ 113 */
114static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; 114static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
115static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' }; 115static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
116 116
117static struct nand_bbt_descr rtc_from4_bbt_main_descr = { 117static struct nand_bbt_descr rtc_from4_bbt_main_descr = {
118 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE 118 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
@@ -134,8 +134,6 @@ static struct nand_bbt_descr rtc_from4_bbt_mirror_descr = {
134 .pattern = mirror_pattern 134 .pattern = mirror_pattern
135}; 135};
136 136
137
138
139#ifdef RTC_FROM4_HWECC 137#ifdef RTC_FROM4_HWECC
140 138
141/* the Reed Solomon control structure */ 139/* the Reed Solomon control structure */
@@ -148,11 +146,11 @@ static struct nand_oobinfo rtc_from4_nand_oobinfo = {
148 .useecc = MTD_NANDECC_AUTOPLACE, 146 .useecc = MTD_NANDECC_AUTOPLACE,
149 .eccbytes = 32, 147 .eccbytes = 32,
150 .eccpos = { 148 .eccpos = {
151 0, 1, 2, 3, 4, 5, 6, 7, 149 0, 1, 2, 3, 4, 5, 6, 7,
152 8, 9, 10, 11, 12, 13, 14, 15, 150 8, 9, 10, 11, 12, 13, 14, 15,
153 16, 17, 18, 19, 20, 21, 22, 23, 151 16, 17, 18, 19, 20, 21, 22, 23,
154 24, 25, 26, 27, 28, 29, 30, 31}, 152 24, 25, 26, 27, 28, 29, 30, 31},
155 .oobfree = { {32, 32} } 153 .oobfree = {{32, 32}}
156}; 154};
157 155
158/* Aargh. I missed the reversed bit order, when I 156/* Aargh. I missed the reversed bit order, when I
@@ -162,44 +160,42 @@ static struct nand_oobinfo rtc_from4_nand_oobinfo = {
162 * of the ecc byte which we get from the FPGA 160 * of the ecc byte which we get from the FPGA
163 */ 161 */
164static uint8_t revbits[256] = { 162static uint8_t revbits[256] = {
165 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 163 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
166 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0, 164 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
167 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, 165 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
168 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, 166 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
169 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, 167 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
170 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, 168 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
171 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, 169 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
172 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, 170 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
173 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, 171 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
174 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, 172 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
175 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, 173 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
176 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, 174 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
177 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, 175 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
178 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, 176 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
179 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, 177 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
180 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, 178 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
181 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, 179 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
182 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, 180 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
183 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, 181 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
184 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, 182 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
185 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, 183 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
186 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, 184 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
187 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, 185 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
188 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, 186 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
189 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, 187 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
190 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, 188 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
191 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, 189 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
192 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, 190 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
193 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, 191 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
194 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, 192 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
195 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, 193 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
196 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff, 194 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
197}; 195};
198 196
199#endif 197#endif
200 198
201
202
203/* 199/*
204 * rtc_from4_hwcontrol - hardware specific access to control-lines 200 * rtc_from4_hwcontrol - hardware specific access to control-lines
205 * @mtd: MTD device structure 201 * @mtd: MTD device structure
@@ -214,9 +210,9 @@ static uint8_t revbits[256] = {
214 */ 210 */
215static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) 211static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd)
216{ 212{
217 struct nand_chip* this = (struct nand_chip *) (mtd->priv); 213 struct nand_chip *this = (struct nand_chip *)(mtd->priv);
218 214
219 switch(cmd) { 215 switch (cmd) {
220 216
221 case NAND_CTL_SETCLE: 217 case NAND_CTL_SETCLE:
222 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE); 218 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE);
@@ -240,7 +236,6 @@ static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd)
240 } 236 }
241} 237}
242 238
243
244/* 239/*
245 * rtc_from4_nand_select_chip - hardware specific chip select 240 * rtc_from4_nand_select_chip - hardware specific chip select
246 * @mtd: MTD device structure 241 * @mtd: MTD device structure
@@ -252,26 +247,25 @@ static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd)
252 */ 247 */
253static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip) 248static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip)
254{ 249{
255 struct nand_chip *this = mtd->priv; 250 struct nand_chip *this = mtd->priv;
256 251
257 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK); 252 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK);
258 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK); 253 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK);
259 254
260 switch(chip) { 255 switch (chip) {
261 256
262 case 0: /* select slot 3 chip */ 257 case 0: /* select slot 3 chip */
263 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3); 258 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3);
264 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3); 259 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3);
265 break; 260 break;
266 case 1: /* select slot 4 chip */ 261 case 1: /* select slot 4 chip */
267 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4); 262 this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4);
268 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4); 263 this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4);
269 break; 264 break;
270 265
271 } 266 }
272} 267}
273 268
274
275/* 269/*
276 * rtc_from4_nand_device_ready - hardware specific ready/busy check 270 * rtc_from4_nand_device_ready - hardware specific ready/busy check
277 * @mtd: MTD device structure 271 * @mtd: MTD device structure
@@ -290,7 +284,6 @@ static int rtc_from4_nand_device_ready(struct mtd_info *mtd)
290 284
291} 285}
292 286
293
294/* 287/*
295 * deplete - code to perform device recovery in case there was a power loss 288 * deplete - code to perform device recovery in case there was a power loss
296 * @mtd: MTD device structure 289 * @mtd: MTD device structure
@@ -306,24 +299,23 @@ static int rtc_from4_nand_device_ready(struct mtd_info *mtd)
306 */ 299 */
307static void deplete(struct mtd_info *mtd, int chip) 300static void deplete(struct mtd_info *mtd, int chip)
308{ 301{
309 struct nand_chip *this = mtd->priv; 302 struct nand_chip *this = mtd->priv;
310 303
311 /* wait until device is ready */ 304 /* wait until device is ready */
312 while (!this->dev_ready(mtd)); 305 while (!this->dev_ready(mtd)) ;
313 306
314 this->select_chip(mtd, chip); 307 this->select_chip(mtd, chip);
315 308
316 /* Send the commands for device recovery, phase 1 */ 309 /* Send the commands for device recovery, phase 1 */
317 this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000); 310 this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000);
318 this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1); 311 this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1);
319 312
320 /* Send the commands for device recovery, phase 2 */ 313 /* Send the commands for device recovery, phase 2 */
321 this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004); 314 this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004);
322 this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1); 315 this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1);
323 316
324} 317}
325 318
326
327#ifdef RTC_FROM4_HWECC 319#ifdef RTC_FROM4_HWECC
328/* 320/*
329 * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function 321 * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function
@@ -335,39 +327,35 @@ static void deplete(struct mtd_info *mtd, int chip)
335 */ 327 */
336static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) 328static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode)
337{ 329{
338 volatile unsigned short * rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL); 330 volatile unsigned short *rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL);
339 unsigned short status; 331 unsigned short status;
340 332
341 switch (mode) { 333 switch (mode) {
342 case NAND_ECC_READ : 334 case NAND_ECC_READ:
343 status = RTC_FROM4_RS_ECC_CTL_CLR 335 status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_FD_E;
344 | RTC_FROM4_RS_ECC_CTL_FD_E;
345 336
346 *rs_ecc_ctl = status; 337 *rs_ecc_ctl = status;
347 break; 338 break;
348 339
349 case NAND_ECC_READSYN : 340 case NAND_ECC_READSYN:
350 status = 0x00; 341 status = 0x00;
351 342
352 *rs_ecc_ctl = status; 343 *rs_ecc_ctl = status;
353 break; 344 break;
354 345
355 case NAND_ECC_WRITE : 346 case NAND_ECC_WRITE:
356 status = RTC_FROM4_RS_ECC_CTL_CLR 347 status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_GEN | RTC_FROM4_RS_ECC_CTL_FD_E;
357 | RTC_FROM4_RS_ECC_CTL_GEN
358 | RTC_FROM4_RS_ECC_CTL_FD_E;
359 348
360 *rs_ecc_ctl = status; 349 *rs_ecc_ctl = status;
361 break; 350 break;
362 351
363 default: 352 default:
364 BUG(); 353 BUG();
365 break; 354 break;
366 } 355 }
367 356
368} 357}
369 358
370
371/* 359/*
372 * rtc_from4_calculate_ecc - hardware specific code to read ECC code 360 * rtc_from4_calculate_ecc - hardware specific code to read ECC code
373 * @mtd: MTD device structure 361 * @mtd: MTD device structure
@@ -383,7 +371,7 @@ static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode)
383 */ 371 */
384static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) 372static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
385{ 373{
386 volatile unsigned short * rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN); 374 volatile unsigned short *rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN);
387 unsigned short value; 375 unsigned short value;
388 int i; 376 int i;
389 377
@@ -395,7 +383,6 @@ static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_c
395 ecc_code[7] |= 0x0f; /* set the last four bits (not used) */ 383 ecc_code[7] |= 0x0f; /* set the last four bits (not used) */
396} 384}
397 385
398
399/* 386/*
400 * rtc_from4_correct_data - hardware specific code to correct data using ECC code 387 * rtc_from4_correct_data - hardware specific code to correct data using ECC code
401 * @mtd: MTD device structure 388 * @mtd: MTD device structure
@@ -414,7 +401,7 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha
414 unsigned short status; 401 unsigned short status;
415 uint16_t par[6], syn[6]; 402 uint16_t par[6], syn[6];
416 uint8_t ecc[8]; 403 uint8_t ecc[8];
417 volatile unsigned short *rs_ecc; 404 volatile unsigned short *rs_ecc;
418 405
419 status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK)); 406 status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK));
420 407
@@ -424,23 +411,18 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha
424 411
425 /* Read the syndrom pattern from the FPGA and correct the bitorder */ 412 /* Read the syndrom pattern from the FPGA and correct the bitorder */
426 rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC); 413 rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC);
427 for (i = 0; i < 8; i++) { 414 for (i = 0; i < 8; i++) {
428 ecc[i] = revbits[(*rs_ecc) & 0xFF]; 415 ecc[i] = revbits[(*rs_ecc) & 0xFF];
429 rs_ecc++; 416 rs_ecc++;
430 } 417 }
431 418
432 /* convert into 6 10bit syndrome fields */ 419 /* convert into 6 10bit syndrome fields */
433 par[5] = rs_decoder->index_of[(((uint16_t)ecc[0] >> 0) & 0x0ff) | 420 par[5] = rs_decoder->index_of[(((uint16_t) ecc[0] >> 0) & 0x0ff) | (((uint16_t) ecc[1] << 8) & 0x300)];
434 (((uint16_t)ecc[1] << 8) & 0x300)]; 421 par[4] = rs_decoder->index_of[(((uint16_t) ecc[1] >> 2) & 0x03f) | (((uint16_t) ecc[2] << 6) & 0x3c0)];
435 par[4] = rs_decoder->index_of[(((uint16_t)ecc[1] >> 2) & 0x03f) | 422 par[3] = rs_decoder->index_of[(((uint16_t) ecc[2] >> 4) & 0x00f) | (((uint16_t) ecc[3] << 4) & 0x3f0)];
436 (((uint16_t)ecc[2] << 6) & 0x3c0)]; 423 par[2] = rs_decoder->index_of[(((uint16_t) ecc[3] >> 6) & 0x003) | (((uint16_t) ecc[4] << 2) & 0x3fc)];
437 par[3] = rs_decoder->index_of[(((uint16_t)ecc[2] >> 4) & 0x00f) | 424 par[1] = rs_decoder->index_of[(((uint16_t) ecc[5] >> 0) & 0x0ff) | (((uint16_t) ecc[6] << 8) & 0x300)];
438 (((uint16_t)ecc[3] << 4) & 0x3f0)]; 425 par[0] = (((uint16_t) ecc[6] >> 2) & 0x03f) | (((uint16_t) ecc[7] << 6) & 0x3c0);
439 par[2] = rs_decoder->index_of[(((uint16_t)ecc[3] >> 6) & 0x003) |
440 (((uint16_t)ecc[4] << 2) & 0x3fc)];
441 par[1] = rs_decoder->index_of[(((uint16_t)ecc[5] >> 0) & 0x0ff) |
442 (((uint16_t)ecc[6] << 8) & 0x300)];
443 par[0] = (((uint16_t)ecc[6] >> 2) & 0x03f) | (((uint16_t)ecc[7] << 6) & 0x3c0);
444 426
445 /* Convert to computable syndrome */ 427 /* Convert to computable syndrome */
446 for (i = 0; i < 6; i++) { 428 for (i = 0; i < 6; i++) {
@@ -453,16 +435,14 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha
453 syn[i] = rs_decoder->index_of[syn[i]]; 435 syn[i] = rs_decoder->index_of[syn[i]];
454 } 436 }
455 437
456 /* Let the library code do its magic.*/ 438 /* Let the library code do its magic. */
457 res = decode_rs8(rs_decoder, (uint8_t *)buf, par, 512, syn, 0, NULL, 0xff, NULL); 439 res = decode_rs8(rs_decoder, (uint8_t *) buf, par, 512, syn, 0, NULL, 0xff, NULL);
458 if (res > 0) { 440 if (res > 0) {
459 DEBUG (MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " 441 DEBUG(MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " "ECC corrected %d errors on read\n", res);
460 "ECC corrected %d errors on read\n", res);
461 } 442 }
462 return res; 443 return res;
463} 444}
464 445
465
466/** 446/**
467 * rtc_from4_errstat - perform additional error status checks 447 * rtc_from4_errstat - perform additional error status checks
468 * @mtd: MTD device structure 448 * @mtd: MTD device structure
@@ -480,44 +460,44 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha
480 */ 460 */
481static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page) 461static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page)
482{ 462{
483 int er_stat=0; 463 int er_stat = 0;
484 int rtn, retlen; 464 int rtn, retlen;
485 size_t len; 465 size_t len;
486 uint8_t *buf; 466 uint8_t *buf;
487 int i; 467 int i;
488 468
489 this->cmdfunc (mtd, NAND_CMD_STATUS_CLEAR, -1, -1); 469 this->cmdfunc(mtd, NAND_CMD_STATUS_CLEAR, -1, -1);
490 470
491 if (state == FL_ERASING) { 471 if (state == FL_ERASING) {
492 for (i=0; i<4; i++) { 472 for (i = 0; i < 4; i++) {
493 if (status & 1<<(i+1)) { 473 if (status & 1 << (i + 1)) {
494 this->cmdfunc (mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1); 474 this->cmdfunc(mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1);
495 rtn = this->read_byte(mtd); 475 rtn = this->read_byte(mtd);
496 this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1); 476 this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1);
497 if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { 477 if (!(rtn & ERR_STAT_ECC_AVAILABLE)) {
498 er_stat |= 1<<(i+1); /* err_ecc_not_avail */ 478 er_stat |= 1 << (i + 1); /* err_ecc_not_avail */
499 } 479 }
500 } 480 }
501 } 481 }
502 } else if (state == FL_WRITING) { 482 } else if (state == FL_WRITING) {
503 /* single bank write logic */ 483 /* single bank write logic */
504 this->cmdfunc (mtd, NAND_CMD_STATUS_ERROR, -1, -1); 484 this->cmdfunc(mtd, NAND_CMD_STATUS_ERROR, -1, -1);
505 rtn = this->read_byte(mtd); 485 rtn = this->read_byte(mtd);
506 this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1); 486 this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1);
507 if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { 487 if (!(rtn & ERR_STAT_ECC_AVAILABLE)) {
508 er_stat |= 1<<1; /* err_ecc_not_avail */ 488 er_stat |= 1 << 1; /* err_ecc_not_avail */
509 } else { 489 } else {
510 len = mtd->oobblock; 490 len = mtd->oobblock;
511 buf = kmalloc (len, GFP_KERNEL); 491 buf = kmalloc(len, GFP_KERNEL);
512 if (!buf) { 492 if (!buf) {
513 printk (KERN_ERR "rtc_from4_errstat: Out of memory!\n"); 493 printk(KERN_ERR "rtc_from4_errstat: Out of memory!\n");
514 er_stat = 1; /* if we can't check, assume failed */ 494 er_stat = 1; /* if we can't check, assume failed */
515 } else { 495 } else {
516 /* recovery read */ 496 /* recovery read */
517 /* page read */ 497 /* page read */
518 rtn = nand_do_read_ecc (mtd, page, len, &retlen, buf, NULL, this->autooob, 1); 498 rtn = nand_do_read_ecc(mtd, page, len, &retlen, buf, NULL, this->autooob, 1);
519 if (rtn) { /* if read failed or > 1-bit error corrected */ 499 if (rtn) { /* if read failed or > 1-bit error corrected */
520 er_stat |= 1<<1; /* ECC read failed */ 500 er_stat |= 1 << 1; /* ECC read failed */
521 } 501 }
522 kfree(buf); 502 kfree(buf);
523 } 503 }
@@ -525,7 +505,7 @@ static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int s
525 } 505 }
526 506
527 rtn = status; 507 rtn = status;
528 if (er_stat == 0) { /* if ECC is available */ 508 if (er_stat == 0) { /* if ECC is available */
529 rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */ 509 rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */
530 } 510 }
531 511
@@ -533,33 +513,32 @@ static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int s
533} 513}
534#endif 514#endif
535 515
536
537/* 516/*
538 * Main initialization routine 517 * Main initialization routine
539 */ 518 */
540int __init rtc_from4_init (void) 519static int __init rtc_from4_init(void)
541{ 520{
542 struct nand_chip *this; 521 struct nand_chip *this;
543 unsigned short bcr1, bcr2, wcr2; 522 unsigned short bcr1, bcr2, wcr2;
544 int i; 523 int i;
545 524
546 /* Allocate memory for MTD device structure and private data */ 525 /* Allocate memory for MTD device structure and private data */
547 rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof (struct nand_chip), 526 rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
548 GFP_KERNEL);
549 if (!rtc_from4_mtd) { 527 if (!rtc_from4_mtd) {
550 printk ("Unable to allocate Renesas NAND MTD device structure.\n"); 528 printk("Unable to allocate Renesas NAND MTD device structure.\n");
551 return -ENOMEM; 529 return -ENOMEM;
552 } 530 }
553 531
554 /* Get pointer to private data */ 532 /* Get pointer to private data */
555 this = (struct nand_chip *) (&rtc_from4_mtd[1]); 533 this = (struct nand_chip *)(&rtc_from4_mtd[1]);
556 534
557 /* Initialize structures */ 535 /* Initialize structures */
558 memset((char *) rtc_from4_mtd, 0, sizeof(struct mtd_info)); 536 memset(rtc_from4_mtd, 0, sizeof(struct mtd_info));
559 memset((char *) this, 0, sizeof(struct nand_chip)); 537 memset(this, 0, sizeof(struct nand_chip));
560 538
561 /* Link the private data with the MTD structure */ 539 /* Link the private data with the MTD structure */
562 rtc_from4_mtd->priv = this; 540 rtc_from4_mtd->priv = this;
541 rtc_from4_mtd->owner = THIS_MODULE;
563 542
564 /* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */ 543 /* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */
565 bcr1 = *SH77X9_BCR1 & ~0x0002; 544 bcr1 = *SH77X9_BCR1 & ~0x0002;
@@ -582,7 +561,7 @@ int __init rtc_from4_init (void)
582 /* Set address of hardware control function */ 561 /* Set address of hardware control function */
583 this->hwcontrol = rtc_from4_hwcontrol; 562 this->hwcontrol = rtc_from4_hwcontrol;
584 /* Set address of chip select function */ 563 /* Set address of chip select function */
585 this->select_chip = rtc_from4_nand_select_chip; 564 this->select_chip = rtc_from4_nand_select_chip;
586 /* command delay time (in us) */ 565 /* command delay time (in us) */
587 this->chip_delay = 100; 566 this->chip_delay = 100;
588 /* return the status of the Ready/Busy line */ 567 /* return the status of the Ready/Busy line */
@@ -591,7 +570,7 @@ int __init rtc_from4_init (void)
591#ifdef RTC_FROM4_HWECC 570#ifdef RTC_FROM4_HWECC
592 printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n"); 571 printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n");
593 572
594 this->eccmode = NAND_ECC_HW8_512; 573 this->eccmode = NAND_ECC_HW8_512;
595 this->options |= NAND_HWECC_SYNDROME; 574 this->options |= NAND_HWECC_SYNDROME;
596 /* return the status of extra status and ECC checks */ 575 /* return the status of extra status and ECC checks */
597 this->errstat = rtc_from4_errstat; 576 this->errstat = rtc_from4_errstat;
@@ -617,7 +596,7 @@ int __init rtc_from4_init (void)
617 } 596 }
618 597
619 /* Perform 'device recovery' for each chip in case there was a power loss. */ 598 /* Perform 'device recovery' for each chip in case there was a power loss. */
620 for (i=0; i < this->numchips; i++) { 599 for (i = 0; i < this->numchips; i++) {
621 deplete(rtc_from4_mtd, i); 600 deplete(rtc_from4_mtd, i);
622 } 601 }
623 602
@@ -643,7 +622,7 @@ int __init rtc_from4_init (void)
643 */ 622 */
644 rs_decoder = init_rs(10, 0x409, 0, 1, 6); 623 rs_decoder = init_rs(10, 0x409, 0, 1, 6);
645 if (!rs_decoder) { 624 if (!rs_decoder) {
646 printk (KERN_ERR "Could not create a RS decoder\n"); 625 printk(KERN_ERR "Could not create a RS decoder\n");
647 nand_release(rtc_from4_mtd); 626 nand_release(rtc_from4_mtd);
648 kfree(rtc_from4_mtd); 627 kfree(rtc_from4_mtd);
649 return -ENOMEM; 628 return -ENOMEM;
@@ -652,20 +631,19 @@ int __init rtc_from4_init (void)
652 /* Return happy */ 631 /* Return happy */
653 return 0; 632 return 0;
654} 633}
655module_init(rtc_from4_init);
656 634
635module_init(rtc_from4_init);
657 636
658/* 637/*
659 * Clean up routine 638 * Clean up routine
660 */ 639 */
661#ifdef MODULE 640static void __exit rtc_from4_cleanup(void)
662static void __exit rtc_from4_cleanup (void)
663{ 641{
664 /* Release resource, unregister partitions */ 642 /* Release resource, unregister partitions */
665 nand_release(rtc_from4_mtd); 643 nand_release(rtc_from4_mtd);
666 644
667 /* Free the MTD device structure */ 645 /* Free the MTD device structure */
668 kfree (rtc_from4_mtd); 646 kfree(rtc_from4_mtd);
669 647
670#ifdef RTC_FROM4_HWECC 648#ifdef RTC_FROM4_HWECC
671 /* Free the reed solomon resources */ 649 /* Free the reed solomon resources */
@@ -674,10 +652,9 @@ static void __exit rtc_from4_cleanup (void)
674 } 652 }
675#endif 653#endif
676} 654}
655
677module_exit(rtc_from4_cleanup); 656module_exit(rtc_from4_cleanup);
678#endif
679 657
680MODULE_LICENSE("GPL"); 658MODULE_LICENSE("GPL");
681MODULE_AUTHOR("d.marlin <dmarlin@redhat.com"); 659MODULE_AUTHOR("d.marlin <dmarlin@redhat.com");
682MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4"); 660MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4");
683
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 5b55599739f3..f8002596de8b 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -77,10 +77,10 @@ static int hardware_ecc = 0;
77 */ 77 */
78 78
79static struct nand_oobinfo nand_hw_eccoob = { 79static struct nand_oobinfo nand_hw_eccoob = {
80 .useecc = MTD_NANDECC_AUTOPLACE, 80 .useecc = MTD_NANDECC_AUTOPLACE,
81 .eccbytes = 3, 81 .eccbytes = 3,
82 .eccpos = {0, 1, 2 }, 82 .eccpos = {0, 1, 2},
83 .oobfree = { {8, 8} } 83 .oobfree = {{8, 8}}
84}; 84};
85 85
86/* controller and mtd information */ 86/* controller and mtd information */
@@ -149,8 +149,7 @@ static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max)
149 pr_debug("result %d from %ld, %d\n", result, clk, wanted); 149 pr_debug("result %d from %ld, %d\n", result, clk, wanted);
150 150
151 if (result > max) { 151 if (result > max) {
152 printk("%d ns is too big for current clock rate %ld\n", 152 printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
153 wanted, clk);
154 return -1; 153 return -1;
155 } 154 }
156 155
@@ -164,8 +163,7 @@ static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max)
164 163
165/* controller setup */ 164/* controller setup */
166 165
167static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, 166static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev)
168 struct platform_device *pdev)
169{ 167{
170 struct s3c2410_platform_nand *plat = to_nand_plat(pdev); 168 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
171 unsigned long clkrate = clk_get_rate(info->clk); 169 unsigned long clkrate = clk_get_rate(info->clk);
@@ -177,7 +175,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
177 clkrate /= 1000; /* turn clock into kHz for ease of use */ 175 clkrate /= 1000; /* turn clock into kHz for ease of use */
178 176
179 if (plat != NULL) { 177 if (plat != NULL) {
180 tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4); 178 tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
181 twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); 179 twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
182 twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8); 180 twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
183 } else { 181 } else {
@@ -193,19 +191,17 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
193 } 191 }
194 192
195 printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", 193 printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
196 tacls, to_ns(tacls, clkrate), 194 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
197 twrph0, to_ns(twrph0, clkrate),
198 twrph1, to_ns(twrph1, clkrate));
199 195
200 if (!info->is_s3c2440) { 196 if (!info->is_s3c2440) {
201 cfg = S3C2410_NFCONF_EN; 197 cfg = S3C2410_NFCONF_EN;
202 cfg |= S3C2410_NFCONF_TACLS(tacls-1); 198 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
203 cfg |= S3C2410_NFCONF_TWRPH0(twrph0-1); 199 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
204 cfg |= S3C2410_NFCONF_TWRPH1(twrph1-1); 200 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
205 } else { 201 } else {
206 cfg = S3C2440_NFCONF_TACLS(tacls-1); 202 cfg = S3C2440_NFCONF_TACLS(tacls - 1);
207 cfg |= S3C2440_NFCONF_TWRPH0(twrph0-1); 203 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
208 cfg |= S3C2440_NFCONF_TWRPH1(twrph1-1); 204 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
209 } 205 }
210 206
211 pr_debug(PFX "NF_CONF is 0x%lx\n", cfg); 207 pr_debug(PFX "NF_CONF is 0x%lx\n", cfg);
@@ -229,7 +225,7 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
229 info = nmtd->info; 225 info = nmtd->info;
230 226
231 bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE; 227 bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE;
232 reg = info->regs+((info->is_s3c2440) ? S3C2440_NFCONT:S3C2410_NFCONF); 228 reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF);
233 229
234 cur = readl(reg); 230 cur = readl(reg);
235 231
@@ -243,7 +239,7 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
243 239
244 if (info->platform != NULL) { 240 if (info->platform != NULL) {
245 if (info->platform->select_chip != NULL) 241 if (info->platform->select_chip != NULL)
246 (info->platform->select_chip)(nmtd->set, chip); 242 (info->platform->select_chip) (nmtd->set, chip);
247 } 243 }
248 244
249 cur &= ~bit; 245 cur &= ~bit;
@@ -330,22 +326,16 @@ static int s3c2410_nand_devready(struct mtd_info *mtd)
330 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; 326 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
331} 327}
332 328
333
334/* ECC handling functions */ 329/* ECC handling functions */
335 330
336static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, 331static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
337 u_char *read_ecc, u_char *calc_ecc)
338{ 332{
339 pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", 333 pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc);
340 mtd, dat, read_ecc, calc_ecc);
341 334
342 pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n", 335 pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n",
343 read_ecc[0], read_ecc[1], read_ecc[2], 336 read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]);
344 calc_ecc[0], calc_ecc[1], calc_ecc[2]);
345 337
346 if (read_ecc[0] == calc_ecc[0] && 338 if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2])
347 read_ecc[1] == calc_ecc[1] &&
348 read_ecc[2] == calc_ecc[2])
349 return 0; 339 return 0;
350 340
351 /* we curently have no method for correcting the error */ 341 /* we curently have no method for correcting the error */
@@ -378,8 +368,7 @@ static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
378 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); 368 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
379} 369}
380 370
381static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, 371static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
382 const u_char *dat, u_char *ecc_code)
383{ 372{
384 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); 373 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
385 374
@@ -387,15 +376,12 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd,
387 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); 376 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
388 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); 377 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
389 378
390 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", 379 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
391 ecc_code[0], ecc_code[1], ecc_code[2]);
392 380
393 return 0; 381 return 0;
394} 382}
395 383
396 384static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
397static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd,
398 const u_char *dat, u_char *ecc_code)
399{ 385{
400 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); 386 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
401 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); 387 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
@@ -404,13 +390,11 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd,
404 ecc_code[1] = ecc >> 8; 390 ecc_code[1] = ecc >> 8;
405 ecc_code[2] = ecc >> 16; 391 ecc_code[2] = ecc >> 16;
406 392
407 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", 393 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
408 ecc_code[0], ecc_code[1], ecc_code[2]);
409 394
410 return 0; 395 return 0;
411} 396}
412 397
413
414/* over-ride the standard functions for a little more speed. We can 398/* over-ride the standard functions for a little more speed. We can
415 * use read/write block to move the data buffers to/from the controller 399 * use read/write block to move the data buffers to/from the controller
416*/ 400*/
@@ -421,8 +405,7 @@ static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
421 readsb(this->IO_ADDR_R, buf, len); 405 readsb(this->IO_ADDR_R, buf, len);
422} 406}
423 407
424static void s3c2410_nand_write_buf(struct mtd_info *mtd, 408static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
425 const u_char *buf, int len)
426{ 409{
427 struct nand_chip *this = mtd->priv; 410 struct nand_chip *this = mtd->priv;
428 writesb(this->IO_ADDR_W, buf, len); 411 writesb(this->IO_ADDR_W, buf, len);
@@ -488,9 +471,7 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
488 return add_mtd_device(&mtd->mtd); 471 return add_mtd_device(&mtd->mtd);
489 472
490 if (set->nr_partitions > 0 && set->partitions != NULL) { 473 if (set->nr_partitions > 0 && set->partitions != NULL) {
491 return add_mtd_partitions(&mtd->mtd, 474 return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
492 set->partitions,
493 set->nr_partitions);
494 } 475 }
495 476
496 return add_mtd_device(&mtd->mtd); 477 return add_mtd_device(&mtd->mtd);
@@ -535,6 +516,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
535 516
536 nmtd->info = info; 517 nmtd->info = info;
537 nmtd->mtd.priv = chip; 518 nmtd->mtd.priv = chip;
519 nmtd->mtd.owner = THIS_MODULE;
538 nmtd->set = set; 520 nmtd->set = set;
539 521
540 if (hardware_ecc) { 522 if (hardware_ecc) {
@@ -654,13 +636,11 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440)
654 nmtd = info->mtds; 636 nmtd = info->mtds;
655 637
656 for (setno = 0; setno < nr_sets; setno++, nmtd++) { 638 for (setno = 0; setno < nr_sets; setno++, nmtd++) {
657 pr_debug("initialising set %d (%p, info %p)\n", 639 pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
658 setno, nmtd, info);
659 640
660 s3c2410_nand_init_chip(info, nmtd, sets); 641 s3c2410_nand_init_chip(info, nmtd, sets);
661 642
662 nmtd->scan_res = nand_scan(&nmtd->mtd, 643 nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
663 (sets) ? sets->nr_chips : 1);
664 644
665 if (nmtd->scan_res == 0) { 645 if (nmtd->scan_res == 0) {
666 s3c2410_nand_add_partition(info, nmtd, sets); 646 s3c2410_nand_add_partition(info, nmtd, sets);
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index c294374871a4..60e10c0d6980 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -46,7 +46,6 @@ static int sharpsl_phys_base = 0x0C000000;
46#define FLCLE (1 << 1) 46#define FLCLE (1 << 1)
47#define FLCE0 (1 << 0) 47#define FLCE0 (1 << 0)
48 48
49
50/* 49/*
51 * MTD structure for SharpSL 50 * MTD structure for SharpSL
52 */ 51 */
@@ -60,27 +59,26 @@ static struct mtd_info *sharpsl_mtd = NULL;
60static int nr_partitions; 59static int nr_partitions;
61static struct mtd_partition sharpsl_nand_default_partition_info[] = { 60static struct mtd_partition sharpsl_nand_default_partition_info[] = {
62 { 61 {
63 .name = "System Area", 62 .name = "System Area",
64 .offset = 0, 63 .offset = 0,
65 .size = 7 * 1024 * 1024, 64 .size = 7 * 1024 * 1024,
66 }, 65 },
67 { 66 {
68 .name = "Root Filesystem", 67 .name = "Root Filesystem",
69 .offset = 7 * 1024 * 1024, 68 .offset = 7 * 1024 * 1024,
70 .size = 30 * 1024 * 1024, 69 .size = 30 * 1024 * 1024,
71 }, 70 },
72 { 71 {
73 .name = "Home Filesystem", 72 .name = "Home Filesystem",
74 .offset = MTDPART_OFS_APPEND , 73 .offset = MTDPART_OFS_APPEND,
75 .size = MTDPART_SIZ_FULL , 74 .size = MTDPART_SIZ_FULL,
76 }, 75 },
77}; 76};
78 77
79/* 78/*
80 * hardware specific access to control-lines 79 * hardware specific access to control-lines
81 */ 80 */
82static void 81static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd)
83sharpsl_nand_hwcontrol(struct mtd_info* mtd, int cmd)
84{ 82{
85 switch (cmd) { 83 switch (cmd) {
86 case NAND_CTL_SETCLE: 84 case NAND_CTL_SETCLE:
@@ -98,10 +96,10 @@ sharpsl_nand_hwcontrol(struct mtd_info* mtd, int cmd)
98 break; 96 break;
99 97
100 case NAND_CTL_SETNCE: 98 case NAND_CTL_SETNCE:
101 writeb(readb(FLASHCTL) & ~(FLCE0|FLCE1), FLASHCTL); 99 writeb(readb(FLASHCTL) & ~(FLCE0 | FLCE1), FLASHCTL);
102 break; 100 break;
103 case NAND_CTL_CLRNCE: 101 case NAND_CTL_CLRNCE:
104 writeb(readb(FLASHCTL) | (FLCE0|FLCE1), FLASHCTL); 102 writeb(readb(FLASHCTL) | (FLCE0 | FLCE1), FLASHCTL);
105 break; 103 break;
106 } 104 }
107} 105}
@@ -126,27 +124,23 @@ static struct nand_oobinfo akita_oobinfo = {
126 .useecc = MTD_NANDECC_AUTOPLACE, 124 .useecc = MTD_NANDECC_AUTOPLACE,
127 .eccbytes = 24, 125 .eccbytes = 24,
128 .eccpos = { 126 .eccpos = {
129 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11, 127 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
130 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23, 128 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
131 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37}, 129 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
132 .oobfree = { {0x08, 0x09} } 130 .oobfree = {{0x08, 0x09}}
133}; 131};
134 132
135static int 133static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
136sharpsl_nand_dev_ready(struct mtd_info* mtd)
137{ 134{
138 return !((readb(FLASHCTL) & FLRYBY) == 0); 135 return !((readb(FLASHCTL) & FLRYBY) == 0);
139} 136}
140 137
141static void 138static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
142sharpsl_nand_enable_hwecc(struct mtd_info* mtd, int mode)
143{ 139{
144 writeb(0 ,ECCCLRR); 140 writeb(0, ECCCLRR);
145} 141}
146 142
147static int 143static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
148sharpsl_nand_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
149 u_char* ecc_code)
150{ 144{
151 ecc_code[0] = ~readb(ECCLPUB); 145 ecc_code[0] = ~readb(ECCLPUB);
152 ecc_code[1] = ~readb(ECCLPLB); 146 ecc_code[1] = ~readb(ECCLPLB);
@@ -154,47 +148,44 @@ sharpsl_nand_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
154 return readb(ECCCNTR) != 0; 148 return readb(ECCCNTR) != 0;
155} 149}
156 150
157
158#ifdef CONFIG_MTD_PARTITIONS 151#ifdef CONFIG_MTD_PARTITIONS
159const char *part_probes[] = { "cmdlinepart", NULL }; 152const char *part_probes[] = { "cmdlinepart", NULL };
160#endif 153#endif
161 154
162
163/* 155/*
164 * Main initialization routine 156 * Main initialization routine
165 */ 157 */
166int __init 158static int __init sharpsl_nand_init(void)
167sharpsl_nand_init(void)
168{ 159{
169 struct nand_chip *this; 160 struct nand_chip *this;
170 struct mtd_partition* sharpsl_partition_info; 161 struct mtd_partition *sharpsl_partition_info;
171 int err = 0; 162 int err = 0;
172 163
173 /* Allocate memory for MTD device structure and private data */ 164 /* Allocate memory for MTD device structure and private data */
174 sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), 165 sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
175 GFP_KERNEL);
176 if (!sharpsl_mtd) { 166 if (!sharpsl_mtd) {
177 printk ("Unable to allocate SharpSL NAND MTD device structure.\n"); 167 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
178 return -ENOMEM; 168 return -ENOMEM;
179 } 169 }
180 170
181 /* map physical adress */ 171 /* map physical adress */
182 sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000); 172 sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000);
183 if(!sharpsl_io_base){ 173 if (!sharpsl_io_base) {
184 printk("ioremap to access Sharp SL NAND chip failed\n"); 174 printk("ioremap to access Sharp SL NAND chip failed\n");
185 kfree(sharpsl_mtd); 175 kfree(sharpsl_mtd);
186 return -EIO; 176 return -EIO;
187 } 177 }
188 178
189 /* Get pointer to private data */ 179 /* Get pointer to private data */
190 this = (struct nand_chip *) (&sharpsl_mtd[1]); 180 this = (struct nand_chip *)(&sharpsl_mtd[1]);
191 181
192 /* Initialize structures */ 182 /* Initialize structures */
193 memset((char *) sharpsl_mtd, 0, sizeof(struct mtd_info)); 183 memset(sharpsl_mtd, 0, sizeof(struct mtd_info));
194 memset((char *) this, 0, sizeof(struct nand_chip)); 184 memset(this, 0, sizeof(struct nand_chip));
195 185
196 /* Link the private data with the MTD structure */ 186 /* Link the private data with the MTD structure */
197 sharpsl_mtd->priv = this; 187 sharpsl_mtd->priv = this;
188 sharpsl_mtd->owner = THIS_MODULE;
198 189
199 /* 190 /*
200 * PXA initialize 191 * PXA initialize
@@ -221,7 +212,7 @@ sharpsl_nand_init(void)
221 this->correct_data = nand_correct_data; 212 this->correct_data = nand_correct_data;
222 213
223 /* Scan to find existence of the device */ 214 /* Scan to find existence of the device */
224 err=nand_scan(sharpsl_mtd,1); 215 err = nand_scan(sharpsl_mtd, 1);
225 if (err) { 216 if (err) {
226 iounmap(sharpsl_io_base); 217 iounmap(sharpsl_io_base);
227 kfree(sharpsl_mtd); 218 kfree(sharpsl_mtd);
@@ -230,24 +221,23 @@ sharpsl_nand_init(void)
230 221
231 /* Register the partitions */ 222 /* Register the partitions */
232 sharpsl_mtd->name = "sharpsl-nand"; 223 sharpsl_mtd->name = "sharpsl-nand";
233 nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes, 224 nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes, &sharpsl_partition_info, 0);
234 &sharpsl_partition_info, 0);
235 225
236 if (nr_partitions <= 0) { 226 if (nr_partitions <= 0) {
237 nr_partitions = DEFAULT_NUM_PARTITIONS; 227 nr_partitions = DEFAULT_NUM_PARTITIONS;
238 sharpsl_partition_info = sharpsl_nand_default_partition_info; 228 sharpsl_partition_info = sharpsl_nand_default_partition_info;
239 if (machine_is_poodle()) { 229 if (machine_is_poodle()) {
240 sharpsl_partition_info[1].size=22 * 1024 * 1024; 230 sharpsl_partition_info[1].size = 22 * 1024 * 1024;
241 } else if (machine_is_corgi() || machine_is_shepherd()) { 231 } else if (machine_is_corgi() || machine_is_shepherd()) {
242 sharpsl_partition_info[1].size=25 * 1024 * 1024; 232 sharpsl_partition_info[1].size = 25 * 1024 * 1024;
243 } else if (machine_is_husky()) { 233 } else if (machine_is_husky()) {
244 sharpsl_partition_info[1].size=53 * 1024 * 1024; 234 sharpsl_partition_info[1].size = 53 * 1024 * 1024;
245 } else if (machine_is_spitz()) { 235 } else if (machine_is_spitz()) {
246 sharpsl_partition_info[1].size=5 * 1024 * 1024; 236 sharpsl_partition_info[1].size = 5 * 1024 * 1024;
247 } else if (machine_is_akita()) { 237 } else if (machine_is_akita()) {
248 sharpsl_partition_info[1].size=58 * 1024 * 1024; 238 sharpsl_partition_info[1].size = 58 * 1024 * 1024;
249 } else if (machine_is_borzoi()) { 239 } else if (machine_is_borzoi()) {
250 sharpsl_partition_info[1].size=32 * 1024 * 1024; 240 sharpsl_partition_info[1].size = 32 * 1024 * 1024;
251 } 241 }
252 } 242 }
253 243
@@ -261,15 +251,15 @@ sharpsl_nand_init(void)
261 /* Return happy */ 251 /* Return happy */
262 return 0; 252 return 0;
263} 253}
254
264module_init(sharpsl_nand_init); 255module_init(sharpsl_nand_init);
265 256
266/* 257/*
267 * Clean up routine 258 * Clean up routine
268 */ 259 */
269#ifdef MODULE
270static void __exit sharpsl_nand_cleanup(void) 260static void __exit sharpsl_nand_cleanup(void)
271{ 261{
272 struct nand_chip *this = (struct nand_chip *) &sharpsl_mtd[1]; 262 struct nand_chip *this = (struct nand_chip *)&sharpsl_mtd[1];
273 263
274 /* Release resources, unregister device */ 264 /* Release resources, unregister device */
275 nand_release(sharpsl_mtd); 265 nand_release(sharpsl_mtd);
@@ -279,8 +269,8 @@ static void __exit sharpsl_nand_cleanup(void)
279 /* Free the MTD device structure */ 269 /* Free the MTD device structure */
280 kfree(sharpsl_mtd); 270 kfree(sharpsl_mtd);
281} 271}
272
282module_exit(sharpsl_nand_cleanup); 273module_exit(sharpsl_nand_cleanup);
283#endif
284 274
285MODULE_LICENSE("GPL"); 275MODULE_LICENSE("GPL");
286MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 276MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
diff --git a/drivers/mtd/nand/spia.c b/drivers/mtd/nand/spia.c
index 9cf1ce718ec1..9737f1d67c3c 100644
--- a/drivers/mtd/nand/spia.c
+++ b/drivers/mtd/nand/spia.c
@@ -39,16 +39,16 @@ static struct mtd_info *spia_mtd = NULL;
39 */ 39 */
40#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ 40#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
41#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ 41#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
42#define SPIA_PEDR 0x0080 /* 42#define SPIA_PEDR 0x0080 /*
43 * IO offset to Port E data register 43 * IO offset to Port E data register
44 * where the CLE, ALE and NCE pins 44 * where the CLE, ALE and NCE pins
45 * are wired to. 45 * are wired to.
46 */ 46 */
47#define SPIA_PEDDR 0x00c0 /* 47#define SPIA_PEDDR 0x00c0 /*
48 * IO offset to Port E data direction 48 * IO offset to Port E data direction
49 * register so we can control the IO 49 * register so we can control the IO
50 * lines. 50 * lines.
51 */ 51 */
52 52
53/* 53/*
54 * Module stuff 54 * Module stuff
@@ -69,25 +69,23 @@ module_param(spia_peddr, int, 0);
69 */ 69 */
70static const struct mtd_partition partition_info[] = { 70static const struct mtd_partition partition_info[] = {
71 { 71 {
72 .name = "SPIA flash partition 1", 72 .name = "SPIA flash partition 1",
73 .offset = 0, 73 .offset = 0,
74 .size = 2*1024*1024 74 .size = 2 * 1024 * 1024},
75 },
76 { 75 {
77 .name = "SPIA flash partition 2", 76 .name = "SPIA flash partition 2",
78 .offset = 2*1024*1024, 77 .offset = 2 * 1024 * 1024,
79 .size = 6*1024*1024 78 .size = 6 * 1024 * 1024}
80 }
81}; 79};
82#define NUM_PARTITIONS 2
83 80
81#define NUM_PARTITIONS 2
84 82
85/* 83/*
86 * hardware specific access to control-lines 84 * hardware specific access to control-lines
87*/ 85*/
88static void spia_hwcontrol(struct mtd_info *mtd, int cmd){ 86static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
89 87{
90 switch(cmd){ 88 switch (cmd) {
91 89
92 case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break; 90 case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break;
93 case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break; 91 case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break;
@@ -97,51 +95,51 @@ static void spia_hwcontrol(struct mtd_info *mtd, int cmd){
97 95
98 case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break; 96 case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break;
99 case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break; 97 case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break;
100 } 98 }
101} 99}
102 100
103/* 101/*
104 * Main initialization routine 102 * Main initialization routine
105 */ 103 */
106int __init spia_init (void) 104static int __init spia_init(void)
107{ 105{
108 struct nand_chip *this; 106 struct nand_chip *this;
109 107
110 /* Allocate memory for MTD device structure and private data */ 108 /* Allocate memory for MTD device structure and private data */
111 spia_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), 109 spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
112 GFP_KERNEL);
113 if (!spia_mtd) { 110 if (!spia_mtd) {
114 printk ("Unable to allocate SPIA NAND MTD device structure.\n"); 111 printk("Unable to allocate SPIA NAND MTD device structure.\n");
115 return -ENOMEM; 112 return -ENOMEM;
116 } 113 }
117 114
118 /* Get pointer to private data */ 115 /* Get pointer to private data */
119 this = (struct nand_chip *) (&spia_mtd[1]); 116 this = (struct nand_chip *)(&spia_mtd[1]);
120 117
121 /* Initialize structures */ 118 /* Initialize structures */
122 memset((char *) spia_mtd, 0, sizeof(struct mtd_info)); 119 memset(spia_mtd, 0, sizeof(struct mtd_info));
123 memset((char *) this, 0, sizeof(struct nand_chip)); 120 memset(this, 0, sizeof(struct nand_chip));
124 121
125 /* Link the private data with the MTD structure */ 122 /* Link the private data with the MTD structure */
126 spia_mtd->priv = this; 123 spia_mtd->priv = this;
124 spia_mtd->owner = THIS_MODULE;
127 125
128 /* 126 /*
129 * Set GPIO Port E control register so that the pins are configured 127 * Set GPIO Port E control register so that the pins are configured
130 * to be outputs for controlling the NAND flash. 128 * to be outputs for controlling the NAND flash.
131 */ 129 */
132 (*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07; 130 (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
133 131
134 /* Set address of NAND IO lines */ 132 /* Set address of NAND IO lines */
135 this->IO_ADDR_R = (void __iomem *) spia_fio_base; 133 this->IO_ADDR_R = (void __iomem *)spia_fio_base;
136 this->IO_ADDR_W = (void __iomem *) spia_fio_base; 134 this->IO_ADDR_W = (void __iomem *)spia_fio_base;
137 /* Set address of hardware control function */ 135 /* Set address of hardware control function */
138 this->hwcontrol = spia_hwcontrol; 136 this->hwcontrol = spia_hwcontrol;
139 /* 15 us command delay time */ 137 /* 15 us command delay time */
140 this->chip_delay = 15; 138 this->chip_delay = 15;
141 139
142 /* Scan to find existence of the device */ 140 /* Scan to find existence of the device */
143 if (nand_scan (spia_mtd, 1)) { 141 if (nand_scan(spia_mtd, 1)) {
144 kfree (spia_mtd); 142 kfree(spia_mtd);
145 return -ENXIO; 143 return -ENXIO;
146 } 144 }
147 145
@@ -151,22 +149,22 @@ int __init spia_init (void)
151 /* Return happy */ 149 /* Return happy */
152 return 0; 150 return 0;
153} 151}
152
154module_init(spia_init); 153module_init(spia_init);
155 154
156/* 155/*
157 * Clean up routine 156 * Clean up routine
158 */ 157 */
159#ifdef MODULE 158static void __exit spia_cleanup(void)
160static void __exit spia_cleanup (void)
161{ 159{
162 /* Release resources, unregister device */ 160 /* Release resources, unregister device */
163 nand_release (spia_mtd); 161 nand_release(spia_mtd);
164 162
165 /* Free the MTD device structure */ 163 /* Free the MTD device structure */
166 kfree (spia_mtd); 164 kfree(spia_mtd);
167} 165}
166
168module_exit(spia_cleanup); 167module_exit(spia_cleanup);
169#endif
170 168
171MODULE_LICENSE("GPL"); 169MODULE_LICENSE("GPL");
172MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); 170MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com");
diff --git a/drivers/mtd/nand/toto.c b/drivers/mtd/nand/toto.c
index 7609c43cb3ec..c51c89559514 100644
--- a/drivers/mtd/nand/toto.c
+++ b/drivers/mtd/nand/toto.c
@@ -48,7 +48,7 @@ static unsigned long toto_io_base = OMAP_FLASH_1_BASE;
48 48
49#define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0) 49#define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0)
50#define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE) 50#define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE)
51#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */ 51#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */
52#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2) 52#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2)
53#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0) 53#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0)
54#else 54#else
@@ -98,9 +98,8 @@ static struct mtd_partition partition_info32M[] = {
98static void toto_hwcontrol(struct mtd_info *mtd, int cmd) 98static void toto_hwcontrol(struct mtd_info *mtd, int cmd)
99{ 99{
100 100
101 udelay(1); /* hopefully enough time for tc make proceding write to clear */ 101 udelay(1); /* hopefully enough time for tc make proceding write to clear */
102 switch(cmd){ 102 switch (cmd) {
103
104 case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break; 103 case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break;
105 case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break; 104 case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break;
106 105
@@ -110,35 +109,35 @@ static void toto_hwcontrol(struct mtd_info *mtd, int cmd)
110 case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break; 109 case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break;
111 case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break; 110 case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break;
112 } 111 }
113 udelay(1); /* allow time to ensure gpio state to over take memory write */ 112 udelay(1); /* allow time to ensure gpio state to over take memory write */
114} 113}
115 114
116/* 115/*
117 * Main initialization routine 116 * Main initialization routine
118 */ 117 */
119int __init toto_init (void) 118static int __init toto_init(void)
120{ 119{
121 struct nand_chip *this; 120 struct nand_chip *this;
122 int err = 0; 121 int err = 0;
123 122
124 /* Allocate memory for MTD device structure and private data */ 123 /* Allocate memory for MTD device structure and private data */
125 toto_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), 124 toto_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
126 GFP_KERNEL);
127 if (!toto_mtd) { 125 if (!toto_mtd) {
128 printk (KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n"); 126 printk(KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n");
129 err = -ENOMEM; 127 err = -ENOMEM;
130 goto out; 128 goto out;
131 } 129 }
132 130
133 /* Get pointer to private data */ 131 /* Get pointer to private data */
134 this = (struct nand_chip *) (&toto_mtd[1]); 132 this = (struct nand_chip *)(&toto_mtd[1]);
135 133
136 /* Initialize structures */ 134 /* Initialize structures */
137 memset((char *) toto_mtd, 0, sizeof(struct mtd_info)); 135 memset(toto_mtd, 0, sizeof(struct mtd_info));
138 memset((char *) this, 0, sizeof(struct nand_chip)); 136 memset(this, 0, sizeof(struct nand_chip));
139 137
140 /* Link the private data with the MTD structure */ 138 /* Link the private data with the MTD structure */
141 toto_mtd->priv = this; 139 toto_mtd->priv = this;
140 toto_mtd->owner = THIS_MODULE;
142 141
143 /* Set address of NAND IO lines */ 142 /* Set address of NAND IO lines */
144 this->IO_ADDR_R = toto_io_base; 143 this->IO_ADDR_R = toto_io_base;
@@ -149,33 +148,37 @@ int __init toto_init (void)
149 this->chip_delay = 30; 148 this->chip_delay = 30;
150 this->eccmode = NAND_ECC_SOFT; 149 this->eccmode = NAND_ECC_SOFT;
151 150
152 /* Scan to find existance of the device */ 151 /* Scan to find existance of the device */
153 if (nand_scan (toto_mtd, 1)) { 152 if (nand_scan(toto_mtd, 1)) {
154 err = -ENXIO; 153 err = -ENXIO;
155 goto out_mtd; 154 goto out_mtd;
156 } 155 }
157 156
158 /* Register the partitions */ 157 /* Register the partitions */
159 switch(toto_mtd->size){ 158 switch (toto_mtd->size) {
160 case SZ_64M: add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); break; 159 case SZ_64M:
161 case SZ_32M: add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); break; 160 add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M);
162 default: { 161 break;
163 printk (KERN_WARNING "Unsupported Nand device\n"); 162 case SZ_32M:
163 add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M);
164 break;
165 default:{
166 printk(KERN_WARNING "Unsupported Nand device\n");
164 err = -ENXIO; 167 err = -ENXIO;
165 goto out_buf; 168 goto out_buf;
166 } 169 }
167 } 170 }
168 171
169 gpioreserve(NAND_MASK); /* claim our gpios */ 172 gpioreserve(NAND_MASK); /* claim our gpios */
170 archflashwp(0,0); /* open up flash for writing */ 173 archflashwp(0, 0); /* open up flash for writing */
171 174
172 goto out; 175 goto out;
173 176
174out_buf: 177 out_buf:
175 kfree (this->data_buf); 178 kfree(this->data_buf);
176out_mtd: 179 out_mtd:
177 kfree (toto_mtd); 180 kfree(toto_mtd);
178out: 181 out:
179 return err; 182 return err;
180} 183}
181 184
@@ -184,20 +187,21 @@ module_init(toto_init);
184/* 187/*
185 * Clean up routine 188 * Clean up routine
186 */ 189 */
187static void __exit toto_cleanup (void) 190static void __exit toto_cleanup(void)
188{ 191{
189 /* Release resources, unregister device */ 192 /* Release resources, unregister device */
190 nand_release (toto_mtd); 193 nand_release(toto_mtd);
191 194
192 /* Free the MTD device structure */ 195 /* Free the MTD device structure */
193 kfree (toto_mtd); 196 kfree(toto_mtd);
194 197
195 /* stop flash writes */ 198 /* stop flash writes */
196 archflashwp(0,1); 199 archflashwp(0, 1);
197 200
198 /* release gpios to system */ 201 /* release gpios to system */
199 gpiorelease(NAND_MASK); 202 gpiorelease(NAND_MASK);
200} 203}
204
201module_exit(toto_cleanup); 205module_exit(toto_cleanup);
202 206
203MODULE_LICENSE("GPL"); 207MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/nand/ts7250.c b/drivers/mtd/nand/ts7250.c
index 643633d91a8b..622db3127f7c 100644
--- a/drivers/mtd/nand/ts7250.c
+++ b/drivers/mtd/nand/ts7250.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 2004 Technologic Systems (support@embeddedARM.com) 4 * Copyright (C) 2004 Technologic Systems (support@embeddedARM.com)
5 * 5 *
6 * Derived from drivers/mtd/nand/edb7312.c 6 * Derived from drivers/mtd/nand/edb7312.c
7 * Copyright (C) 2004 Marius Gröger (mag@sysgo.de) 7 * Copyright (C) 2004 Marius Gröger (mag@sysgo.de)
8 * 8 *
9 * Derived from drivers/mtd/nand/autcpu12.c 9 * Derived from drivers/mtd/nand/autcpu12.c
10 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) 10 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
@@ -88,7 +88,7 @@ static void ts7250_hwcontrol(struct mtd_info *mtd, int cmd)
88{ 88{
89 unsigned long ctrl = TS72XX_NAND_CONTROL_VIRT_BASE; 89 unsigned long ctrl = TS72XX_NAND_CONTROL_VIRT_BASE;
90 90
91 switch(cmd) { 91 switch (cmd) {
92 case NAND_CTL_SETCLE: 92 case NAND_CTL_SETCLE:
93 __raw_writeb(__raw_readb(ctrl) | 0x2, ctrl); 93 __raw_writeb(__raw_readb(ctrl) | 0x2, ctrl);
94 break; 94 break;
@@ -132,8 +132,7 @@ static int __init ts7250_init(void)
132 return -ENXIO; 132 return -ENXIO;
133 133
134 /* Allocate memory for MTD device structure and private data */ 134 /* Allocate memory for MTD device structure and private data */
135 ts7250_mtd = kmalloc(sizeof(struct mtd_info) + 135 ts7250_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
136 sizeof(struct nand_chip), GFP_KERNEL);
137 if (!ts7250_mtd) { 136 if (!ts7250_mtd) {
138 printk("Unable to allocate TS7250 NAND MTD device structure.\n"); 137 printk("Unable to allocate TS7250 NAND MTD device structure.\n");
139 return -ENOMEM; 138 return -ENOMEM;
@@ -148,6 +147,7 @@ static int __init ts7250_init(void)
148 147
149 /* Link the private data with the MTD structure */ 148 /* Link the private data with the MTD structure */
150 ts7250_mtd->priv = this; 149 ts7250_mtd->priv = this;
150 ts7250_mtd->owner = THIS_MODULE;
151 151
152 /* insert callbacks */ 152 /* insert callbacks */
153 this->IO_ADDR_R = (void *)TS72XX_NAND_DATA_VIRT_BASE; 153 this->IO_ADDR_R = (void *)TS72XX_NAND_DATA_VIRT_BASE;
@@ -163,11 +163,9 @@ static int __init ts7250_init(void)
163 kfree(ts7250_mtd); 163 kfree(ts7250_mtd);
164 return -ENXIO; 164 return -ENXIO;
165 } 165 }
166
167#ifdef CONFIG_MTD_PARTITIONS 166#ifdef CONFIG_MTD_PARTITIONS
168 ts7250_mtd->name = "ts7250-nand"; 167 ts7250_mtd->name = "ts7250-nand";
169 mtd_parts_nb = parse_mtd_partitions(ts7250_mtd, part_probes, 168 mtd_parts_nb = parse_mtd_partitions(ts7250_mtd, part_probes, &mtd_parts, 0);
170 &mtd_parts, 0);
171 if (mtd_parts_nb > 0) 169 if (mtd_parts_nb > 0)
172 part_type = "command line"; 170 part_type = "command line";
173 else 171 else
@@ -188,6 +186,7 @@ static int __init ts7250_init(void)
188 /* Return happy */ 186 /* Return happy */
189 return 0; 187 return 0;
190} 188}
189
191module_init(ts7250_init); 190module_init(ts7250_init);
192 191
193/* 192/*
@@ -201,6 +200,7 @@ static void __exit ts7250_cleanup(void)
201 /* Free the MTD device structure */ 200 /* Free the MTD device structure */
202 kfree(ts7250_mtd); 201 kfree(ts7250_mtd);
203} 202}
203
204module_exit(ts7250_cleanup); 204module_exit(ts7250_cleanup);
205 205
206MODULE_LICENSE("GPL"); 206MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/redboot.c b/drivers/mtd/redboot.c
index c077d2ec9cdd..5b58523e4d4e 100644
--- a/drivers/mtd/redboot.c
+++ b/drivers/mtd/redboot.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: redboot.c,v 1.19 2005/12/01 10:03:51 dwmw2 Exp $ 2 * $Id: redboot.c,v 1.21 2006/03/30 18:34:37 bjd Exp $
3 * 3 *
4 * Parse RedBoot-style Flash Image System (FIS) tables and 4 * Parse RedBoot-style Flash Image System (FIS) tables and
5 * produce a Linux partition array to match. 5 * produce a Linux partition array to match.
@@ -15,14 +15,14 @@
15 15
16struct fis_image_desc { 16struct fis_image_desc {
17 unsigned char name[16]; // Null terminated name 17 unsigned char name[16]; // Null terminated name
18 unsigned long flash_base; // Address within FLASH of image 18 uint32_t flash_base; // Address within FLASH of image
19 unsigned long mem_base; // Address in memory where it executes 19 uint32_t mem_base; // Address in memory where it executes
20 unsigned long size; // Length of image 20 uint32_t size; // Length of image
21 unsigned long entry_point; // Execution entry point 21 uint32_t entry_point; // Execution entry point
22 unsigned long data_length; // Length of actual data 22 uint32_t data_length; // Length of actual data
23 unsigned char _pad[256-(16+7*sizeof(unsigned long))]; 23 unsigned char _pad[256-(16+7*sizeof(uint32_t))];
24 unsigned long desc_cksum; // Checksum over image descriptor 24 uint32_t desc_cksum; // Checksum over image descriptor
25 unsigned long file_cksum; // Checksum over image data 25 uint32_t file_cksum; // Checksum over image data
26}; 26};
27 27
28struct fis_list { 28struct fis_list {
diff --git a/drivers/mtd/rfd_ftl.c b/drivers/mtd/rfd_ftl.c
index a3e00a4635a5..fa4362fb4dd8 100644
--- a/drivers/mtd/rfd_ftl.c
+++ b/drivers/mtd/rfd_ftl.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2005 Sean Young <sean@mess.org> 4 * Copyright (C) 2005 Sean Young <sean@mess.org>
5 * 5 *
6 * $Id: rfd_ftl.c,v 1.5 2005/11/07 11:14:21 gleixner Exp $ 6 * $Id: rfd_ftl.c,v 1.8 2006/01/15 12:51:44 sean Exp $
7 * 7 *
8 * This type of flash translation layer (FTL) is used by the Embedded BIOS 8 * This type of flash translation layer (FTL) is used by the Embedded BIOS
9 * by General Software. It is known as the Resident Flash Disk (RFD), see: 9 * by General Software. It is known as the Resident Flash Disk (RFD), see:
@@ -61,6 +61,7 @@ struct block {
61 BLOCK_OK, 61 BLOCK_OK,
62 BLOCK_ERASING, 62 BLOCK_ERASING,
63 BLOCK_ERASED, 63 BLOCK_ERASED,
64 BLOCK_UNUSED,
64 BLOCK_FAILED 65 BLOCK_FAILED
65 } state; 66 } state;
66 int free_sectors; 67 int free_sectors;
@@ -99,10 +100,8 @@ static int build_block_map(struct partition *part, int block_no)
99 block->offset = part->block_size * block_no; 100 block->offset = part->block_size * block_no;
100 101
101 if (le16_to_cpu(part->header_cache[0]) != RFD_MAGIC) { 102 if (le16_to_cpu(part->header_cache[0]) != RFD_MAGIC) {
102 block->state = BLOCK_ERASED; /* assumption */ 103 block->state = BLOCK_UNUSED;
103 block->free_sectors = part->data_sectors_per_block; 104 return -ENOENT;
104 part->reserved_block = block_no;
105 return 1;
106 } 105 }
107 106
108 block->state = BLOCK_OK; 107 block->state = BLOCK_OK;
@@ -124,7 +123,7 @@ static int build_block_map(struct partition *part, int block_no)
124 entry = 0; 123 entry = 0;
125 124
126 if (entry >= part->sector_count) { 125 if (entry >= part->sector_count) {
127 printk(KERN_NOTICE PREFIX 126 printk(KERN_WARNING PREFIX
128 "'%s': unit #%d: entry %d corrupt, " 127 "'%s': unit #%d: entry %d corrupt, "
129 "sector %d out of range\n", 128 "sector %d out of range\n",
130 part->mbd.mtd->name, block_no, i, entry); 129 part->mbd.mtd->name, block_no, i, entry);
@@ -132,7 +131,7 @@ static int build_block_map(struct partition *part, int block_no)
132 } 131 }
133 132
134 if (part->sector_map[entry] != -1) { 133 if (part->sector_map[entry] != -1) {
135 printk(KERN_NOTICE PREFIX 134 printk(KERN_WARNING PREFIX
136 "'%s': more than one entry for sector %d\n", 135 "'%s': more than one entry for sector %d\n",
137 part->mbd.mtd->name, entry); 136 part->mbd.mtd->name, entry);
138 part->errors = 1; 137 part->errors = 1;
@@ -167,7 +166,7 @@ static int scan_header(struct partition *part)
167 /* each erase block has three bytes header, followed by the map */ 166 /* each erase block has three bytes header, followed by the map */
168 part->header_sectors_per_block = 167 part->header_sectors_per_block =
169 ((HEADER_MAP_OFFSET + sectors_per_block) * 168 ((HEADER_MAP_OFFSET + sectors_per_block) *
170 sizeof(u16) + SECTOR_SIZE - 1) / SECTOR_SIZE; 169 sizeof(u16) + SECTOR_SIZE - 1) / SECTOR_SIZE;
171 170
172 part->data_sectors_per_block = sectors_per_block - 171 part->data_sectors_per_block = sectors_per_block -
173 part->header_sectors_per_block; 172 part->header_sectors_per_block;
@@ -226,7 +225,7 @@ static int scan_header(struct partition *part)
226 } 225 }
227 226
228 if (part->reserved_block == -1) { 227 if (part->reserved_block == -1) {
229 printk(KERN_NOTICE PREFIX "'%s': no empty erase unit found\n", 228 printk(KERN_WARNING PREFIX "'%s': no empty erase unit found\n",
230 part->mbd.mtd->name); 229 part->mbd.mtd->name);
231 230
232 part->errors = 1; 231 part->errors = 1;
@@ -315,7 +314,7 @@ static void erase_callback(struct erase_info *erase)
315 rc = -EIO; 314 rc = -EIO;
316 315
317 if (rc) { 316 if (rc) {
318 printk(KERN_NOTICE PREFIX "'%s': unable to write RFD " 317 printk(KERN_ERR PREFIX "'%s': unable to write RFD "
319 "header at 0x%lx\n", 318 "header at 0x%lx\n",
320 part->mbd.mtd->name, 319 part->mbd.mtd->name,
321 part->blocks[i].offset); 320 part->blocks[i].offset);
@@ -348,7 +347,7 @@ static int erase_block(struct partition *part, int block)
348 rc = part->mbd.mtd->erase(part->mbd.mtd, erase); 347 rc = part->mbd.mtd->erase(part->mbd.mtd, erase);
349 348
350 if (rc) { 349 if (rc) {
351 printk(KERN_WARNING PREFIX "erase of region %x,%x on '%s' " 350 printk(KERN_ERR PREFIX "erase of region %x,%x on '%s' "
352 "failed\n", erase->addr, erase->len, 351 "failed\n", erase->addr, erase->len,
353 part->mbd.mtd->name); 352 part->mbd.mtd->name);
354 kfree(erase); 353 kfree(erase);
@@ -383,7 +382,7 @@ static int move_block_contents(struct partition *part, int block_no, u_long *old
383 rc = -EIO; 382 rc = -EIO;
384 383
385 if (rc) { 384 if (rc) {
386 printk(KERN_NOTICE PREFIX "error reading '%s' at " 385 printk(KERN_ERR PREFIX "error reading '%s' at "
387 "0x%lx\n", part->mbd.mtd->name, 386 "0x%lx\n", part->mbd.mtd->name,
388 part->blocks[block_no].offset); 387 part->blocks[block_no].offset);
389 388
@@ -423,7 +422,7 @@ static int move_block_contents(struct partition *part, int block_no, u_long *old
423 rc = -EIO; 422 rc = -EIO;
424 423
425 if (rc) { 424 if (rc) {
426 printk(KERN_NOTICE PREFIX "'%s': Unable to " 425 printk(KERN_ERR PREFIX "'%s': Unable to "
427 "read sector for relocation\n", 426 "read sector for relocation\n",
428 part->mbd.mtd->name); 427 part->mbd.mtd->name);
429 428
@@ -520,7 +519,7 @@ static int reclaim_block(struct partition *part, u_long *old_sector)
520 * because if we fill that one up first it'll have the most chance of having 519 * because if we fill that one up first it'll have the most chance of having
521 * the least live sectors at reclaim. 520 * the least live sectors at reclaim.
522 */ 521 */
523static int find_free_block(const struct partition *part) 522static int find_free_block(struct partition *part)
524{ 523{
525 int block, stop; 524 int block, stop;
526 525
@@ -533,6 +532,9 @@ static int find_free_block(const struct partition *part)
533 block != part->reserved_block) 532 block != part->reserved_block)
534 return block; 533 return block;
535 534
535 if (part->blocks[block].state == BLOCK_UNUSED)
536 erase_block(part, block);
537
536 if (++block >= part->total_blocks) 538 if (++block >= part->total_blocks)
537 block = 0; 539 block = 0;
538 540
@@ -541,7 +543,7 @@ static int find_free_block(const struct partition *part)
541 return -1; 543 return -1;
542} 544}
543 545
544static int find_writeable_block(struct partition *part, u_long *old_sector) 546static int find_writable_block(struct partition *part, u_long *old_sector)
545{ 547{
546 int rc, block; 548 int rc, block;
547 size_t retlen; 549 size_t retlen;
@@ -570,7 +572,7 @@ static int find_writeable_block(struct partition *part, u_long *old_sector)
570 rc = -EIO; 572 rc = -EIO;
571 573
572 if (rc) { 574 if (rc) {
573 printk(KERN_NOTICE PREFIX "'%s': unable to read header at " 575 printk(KERN_ERR PREFIX "'%s': unable to read header at "
574 "0x%lx\n", part->mbd.mtd->name, 576 "0x%lx\n", part->mbd.mtd->name,
575 part->blocks[block].offset); 577 part->blocks[block].offset);
576 goto err; 578 goto err;
@@ -602,7 +604,7 @@ static int mark_sector_deleted(struct partition *part, u_long old_addr)
602 rc = -EIO; 604 rc = -EIO;
603 605
604 if (rc) { 606 if (rc) {
605 printk(KERN_WARNING PREFIX "error writing '%s' at " 607 printk(KERN_ERR PREFIX "error writing '%s' at "
606 "0x%lx\n", part->mbd.mtd->name, addr); 608 "0x%lx\n", part->mbd.mtd->name, addr);
607 if (rc) 609 if (rc)
608 goto err; 610 goto err;
@@ -652,7 +654,7 @@ static int do_writesect(struct mtd_blktrans_dev *dev, u_long sector, char *buf,
652 if (part->current_block == -1 || 654 if (part->current_block == -1 ||
653 !part->blocks[part->current_block].free_sectors) { 655 !part->blocks[part->current_block].free_sectors) {
654 656
655 rc = find_writeable_block(part, old_addr); 657 rc = find_writable_block(part, old_addr);
656 if (rc) 658 if (rc)
657 goto err; 659 goto err;
658 } 660 }
@@ -675,7 +677,7 @@ static int do_writesect(struct mtd_blktrans_dev *dev, u_long sector, char *buf,
675 rc = -EIO; 677 rc = -EIO;
676 678
677 if (rc) { 679 if (rc) {
678 printk(KERN_WARNING PREFIX "error writing '%s' at 0x%lx\n", 680 printk(KERN_ERR PREFIX "error writing '%s' at 0x%lx\n",
679 part->mbd.mtd->name, addr); 681 part->mbd.mtd->name, addr);
680 if (rc) 682 if (rc)
681 goto err; 683 goto err;
@@ -695,7 +697,7 @@ static int do_writesect(struct mtd_blktrans_dev *dev, u_long sector, char *buf,
695 rc = -EIO; 697 rc = -EIO;
696 698
697 if (rc) { 699 if (rc) {
698 printk(KERN_WARNING PREFIX "error writing '%s' at 0x%lx\n", 700 printk(KERN_ERR PREFIX "error writing '%s' at 0x%lx\n",
699 part->mbd.mtd->name, addr); 701 part->mbd.mtd->name, addr);
700 if (rc) 702 if (rc)
701 goto err; 703 goto err;
@@ -776,7 +778,7 @@ static void rfd_ftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd)
776 part->block_size = block_size; 778 part->block_size = block_size;
777 else { 779 else {
778 if (!mtd->erasesize) { 780 if (!mtd->erasesize) {
779 printk(KERN_NOTICE PREFIX "please provide block_size"); 781 printk(KERN_WARNING PREFIX "please provide block_size");
780 return; 782 return;
781 } 783 }
782 else 784 else
@@ -791,8 +793,8 @@ static void rfd_ftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd)
791 if (!(mtd->flags & MTD_WRITEABLE)) 793 if (!(mtd->flags & MTD_WRITEABLE))
792 part->mbd.readonly = 1; 794 part->mbd.readonly = 1;
793 else if (part->errors) { 795 else if (part->errors) {
794 printk(KERN_NOTICE PREFIX "'%s': errors found, " 796 printk(KERN_WARNING PREFIX "'%s': errors found, "
795 "setting read-only", mtd->name); 797 "setting read-only\n", mtd->name);
796 part->mbd.readonly = 1; 798 part->mbd.readonly = 1;
797 } 799 }
798 800
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 02:17:10 -0500