diff options
Diffstat (limited to 'drivers/mtd')
40 files changed, 940 insertions, 212 deletions
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c index dbba5abf0db8..f84ab6182148 100644 --- a/drivers/mtd/chips/jedec_probe.c +++ b/drivers/mtd/chips/jedec_probe.c | |||
@@ -41,7 +41,7 @@ | |||
41 | 41 | ||
42 | 42 | ||
43 | /* AMD */ | 43 | /* AMD */ |
44 | #define AM29DL800BB 0x22C8 | 44 | #define AM29DL800BB 0x22CB |
45 | #define AM29DL800BT 0x224A | 45 | #define AM29DL800BT 0x224A |
46 | 46 | ||
47 | #define AM29F800BB 0x2258 | 47 | #define AM29F800BB 0x2258 |
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c index 54e36bfc2c3b..8bd0dea6885f 100644 --- a/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/device.h> | 16 | #include <linux/device.h> |
17 | #include <linux/mutex.h> | 17 | #include <linux/mutex.h> |
18 | #include <linux/err.h> | ||
19 | |||
18 | #include <linux/spi/spi.h> | 20 | #include <linux/spi/spi.h> |
19 | #include <linux/spi/flash.h> | 21 | #include <linux/spi/flash.h> |
20 | 22 | ||
@@ -487,9 +489,8 @@ add_dataflash(struct spi_device *spi, char *name, | |||
487 | device->write = dataflash_write; | 489 | device->write = dataflash_write; |
488 | device->priv = priv; | 490 | device->priv = priv; |
489 | 491 | ||
490 | dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes, " | 492 | dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes\n", |
491 | "erasesize %d bytes\n", name, device->size/1024, | 493 | name, DIV_ROUND_UP(device->size, 1024), pagesize); |
492 | pagesize, pagesize * 8); /* 8 pages = 1 block */ | ||
493 | dev_set_drvdata(&spi->dev, priv); | 494 | dev_set_drvdata(&spi->dev, priv); |
494 | 495 | ||
495 | if (mtd_has_partitions()) { | 496 | if (mtd_has_partitions()) { |
@@ -518,65 +519,57 @@ add_dataflash(struct spi_device *spi, char *name, | |||
518 | return add_mtd_device(device) == 1 ? -ENODEV : 0; | 519 | return add_mtd_device(device) == 1 ? -ENODEV : 0; |
519 | } | 520 | } |
520 | 521 | ||
521 | /* | ||
522 | * Detect and initialize DataFlash device: | ||
523 | * | ||
524 | * Device Density ID code #Pages PageSize Offset | ||
525 | * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 | ||
526 | * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 | ||
527 | * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 | ||
528 | * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 | ||
529 | * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 | ||
530 | * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 | ||
531 | * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 | ||
532 | * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 | ||
533 | */ | ||
534 | |||
535 | struct flash_info { | 522 | struct flash_info { |
536 | char *name; | 523 | char *name; |
537 | 524 | ||
538 | /* JEDEC id zero means "no ID" (most older chips); otherwise it has | 525 | /* JEDEC id has a high byte of zero plus three data bytes: |
539 | * a high byte of zero plus three data bytes: the manufacturer id, | 526 | * the manufacturer id, then a two byte device id. |
540 | * then a two byte device id. | ||
541 | */ | 527 | */ |
542 | uint32_t jedec_id; | 528 | uint32_t jedec_id; |
543 | 529 | ||
544 | /* The size listed here is what works with OPCODE_SE, which isn't | 530 | /* The size listed here is what works with OP_ERASE_PAGE. */ |
545 | * necessarily called a "sector" by the vendor. | ||
546 | */ | ||
547 | unsigned nr_pages; | 531 | unsigned nr_pages; |
548 | uint16_t pagesize; | 532 | uint16_t pagesize; |
549 | uint16_t pageoffset; | 533 | uint16_t pageoffset; |
550 | 534 | ||
551 | uint16_t flags; | 535 | uint16_t flags; |
552 | #define SUP_POW2PS 0x02 | 536 | #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ |
553 | #define IS_POW2PS 0x01 | 537 | #define IS_POW2PS 0x0001 /* uses 2^N byte pages */ |
554 | }; | 538 | }; |
555 | 539 | ||
556 | static struct flash_info __devinitdata dataflash_data [] = { | 540 | static struct flash_info __devinitdata dataflash_data [] = { |
557 | 541 | ||
558 | { "at45db011d", 0x1f2200, 512, 264, 9, SUP_POW2PS}, | 542 | /* |
543 | * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, | ||
544 | * one with IS_POW2PS and the other without. The entry with the | ||
545 | * non-2^N byte page size can't name exact chip revisions without | ||
546 | * losing backwards compatibility for cmdlinepart. | ||
547 | * | ||
548 | * These newer chips also support 128-byte security registers (with | ||
549 | * 64 bytes one-time-programmable) and software write-protection. | ||
550 | */ | ||
551 | { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, | ||
559 | { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, | 552 | { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, |
560 | 553 | ||
561 | { "at45db021d", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, | 554 | { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, |
562 | { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, | 555 | { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, |
563 | 556 | ||
564 | { "at45db041d", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, | 557 | { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, |
565 | { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, | 558 | { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, |
566 | 559 | ||
567 | { "at45db081d", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, | 560 | { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, |
568 | { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, | 561 | { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, |
569 | 562 | ||
570 | { "at45db161d", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, | 563 | { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, |
571 | { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, | 564 | { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, |
572 | 565 | ||
573 | { "at45db321c", 0x1f2700, 8192, 528, 10, }, | 566 | { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ |
574 | 567 | ||
575 | { "at45db321d", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, | 568 | { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, |
576 | { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, | 569 | { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, |
577 | 570 | ||
578 | { "at45db641d", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, | 571 | { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, |
579 | { "at45db641d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, | 572 | { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, |
580 | }; | 573 | }; |
581 | 574 | ||
582 | static struct flash_info *__devinit jedec_probe(struct spi_device *spi) | 575 | static struct flash_info *__devinit jedec_probe(struct spi_device *spi) |
@@ -588,17 +581,23 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi) | |||
588 | struct flash_info *info; | 581 | struct flash_info *info; |
589 | int status; | 582 | int status; |
590 | 583 | ||
591 | |||
592 | /* JEDEC also defines an optional "extended device information" | 584 | /* JEDEC also defines an optional "extended device information" |
593 | * string for after vendor-specific data, after the three bytes | 585 | * string for after vendor-specific data, after the three bytes |
594 | * we use here. Supporting some chips might require using it. | 586 | * we use here. Supporting some chips might require using it. |
587 | * | ||
588 | * If the vendor ID isn't Atmel's (0x1f), assume this call failed. | ||
589 | * That's not an error; only rev C and newer chips handle it, and | ||
590 | * only Atmel sells these chips. | ||
595 | */ | 591 | */ |
596 | tmp = spi_write_then_read(spi, &code, 1, id, 3); | 592 | tmp = spi_write_then_read(spi, &code, 1, id, 3); |
597 | if (tmp < 0) { | 593 | if (tmp < 0) { |
598 | DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", | 594 | DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", |
599 | spi->dev.bus_id, tmp); | 595 | spi->dev.bus_id, tmp); |
600 | return NULL; | 596 | return ERR_PTR(tmp); |
601 | } | 597 | } |
598 | if (id[0] != 0x1f) | ||
599 | return NULL; | ||
600 | |||
602 | jedec = id[0]; | 601 | jedec = id[0]; |
603 | jedec = jedec << 8; | 602 | jedec = jedec << 8; |
604 | jedec |= id[1]; | 603 | jedec |= id[1]; |
@@ -609,19 +608,53 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi) | |||
609 | tmp < ARRAY_SIZE(dataflash_data); | 608 | tmp < ARRAY_SIZE(dataflash_data); |
610 | tmp++, info++) { | 609 | tmp++, info++) { |
611 | if (info->jedec_id == jedec) { | 610 | if (info->jedec_id == jedec) { |
611 | DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n", | ||
612 | dev_name(&spi->dev), | ||
613 | (info->flags & SUP_POW2PS) | ||
614 | ? ", binary pagesize" : "" | ||
615 | ); | ||
612 | if (info->flags & SUP_POW2PS) { | 616 | if (info->flags & SUP_POW2PS) { |
613 | status = dataflash_status(spi); | 617 | status = dataflash_status(spi); |
614 | if (status & 0x1) | 618 | if (status < 0) { |
615 | /* return power of 2 pagesize */ | 619 | DEBUG(MTD_DEBUG_LEVEL1, |
616 | return ++info; | 620 | "%s: status error %d\n", |
617 | else | 621 | dev_name(&spi->dev), status); |
618 | return info; | 622 | return ERR_PTR(status); |
623 | } | ||
624 | if (status & 0x1) { | ||
625 | if (info->flags & IS_POW2PS) | ||
626 | return info; | ||
627 | } else { | ||
628 | if (!(info->flags & IS_POW2PS)) | ||
629 | return info; | ||
630 | } | ||
619 | } | 631 | } |
620 | } | 632 | } |
621 | } | 633 | } |
622 | return NULL; | 634 | |
635 | /* | ||
636 | * Treat other chips as errors ... we won't know the right page | ||
637 | * size (it might be binary) even when we can tell which density | ||
638 | * class is involved (legacy chip id scheme). | ||
639 | */ | ||
640 | dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec); | ||
641 | return ERR_PTR(-ENODEV); | ||
623 | } | 642 | } |
624 | 643 | ||
644 | /* | ||
645 | * Detect and initialize DataFlash device, using JEDEC IDs on newer chips | ||
646 | * or else the ID code embedded in the status bits: | ||
647 | * | ||
648 | * Device Density ID code #Pages PageSize Offset | ||
649 | * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 | ||
650 | * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 | ||
651 | * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 | ||
652 | * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 | ||
653 | * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 | ||
654 | * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 | ||
655 | * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 | ||
656 | * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 | ||
657 | */ | ||
625 | static int __devinit dataflash_probe(struct spi_device *spi) | 658 | static int __devinit dataflash_probe(struct spi_device *spi) |
626 | { | 659 | { |
627 | int status; | 660 | int status; |
@@ -632,14 +665,17 @@ static int __devinit dataflash_probe(struct spi_device *spi) | |||
632 | * If it succeeds we know we have either a C or D part. | 665 | * If it succeeds we know we have either a C or D part. |
633 | * D will support power of 2 pagesize option. | 666 | * D will support power of 2 pagesize option. |
634 | */ | 667 | */ |
635 | |||
636 | info = jedec_probe(spi); | 668 | info = jedec_probe(spi); |
637 | 669 | if (IS_ERR(info)) | |
670 | return PTR_ERR(info); | ||
638 | if (info != NULL) | 671 | if (info != NULL) |
639 | return add_dataflash(spi, info->name, info->nr_pages, | 672 | return add_dataflash(spi, info->name, info->nr_pages, |
640 | info->pagesize, info->pageoffset); | 673 | info->pagesize, info->pageoffset); |
641 | 674 | ||
642 | 675 | /* | |
676 | * Older chips support only legacy commands, identifing | ||
677 | * capacity using bits in the status byte. | ||
678 | */ | ||
643 | status = dataflash_status(spi); | 679 | status = dataflash_status(spi); |
644 | if (status <= 0 || status == 0xff) { | 680 | if (status <= 0 || status == 0xff) { |
645 | DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", | 681 | DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", |
@@ -661,13 +697,13 @@ static int __devinit dataflash_probe(struct spi_device *spi) | |||
661 | status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); | 697 | status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); |
662 | break; | 698 | break; |
663 | case 0x1c: /* 0 1 1 1 x x */ | 699 | case 0x1c: /* 0 1 1 1 x x */ |
664 | status = add_dataflash(spi, "AT45DB041B", 2048, 264, 9); | 700 | status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); |
665 | break; | 701 | break; |
666 | case 0x24: /* 1 0 0 1 x x */ | 702 | case 0x24: /* 1 0 0 1 x x */ |
667 | status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); | 703 | status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); |
668 | break; | 704 | break; |
669 | case 0x2c: /* 1 0 1 1 x x */ | 705 | case 0x2c: /* 1 0 1 1 x x */ |
670 | status = add_dataflash(spi, "AT45DB161B", 4096, 528, 10); | 706 | status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); |
671 | break; | 707 | break; |
672 | case 0x34: /* 1 1 0 1 x x */ | 708 | case 0x34: /* 1 1 0 1 x x */ |
673 | status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); | 709 | status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); |
diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c index f34f20c78911..9bf581c4f740 100644 --- a/drivers/mtd/ftl.c +++ b/drivers/mtd/ftl.c | |||
@@ -1005,6 +1005,29 @@ static int ftl_writesect(struct mtd_blktrans_dev *dev, | |||
1005 | return ftl_write((void *)dev, buf, block, 1); | 1005 | return ftl_write((void *)dev, buf, block, 1); |
1006 | } | 1006 | } |
1007 | 1007 | ||
1008 | static int ftl_discardsect(struct mtd_blktrans_dev *dev, | ||
1009 | unsigned long sector, unsigned nr_sects) | ||
1010 | { | ||
1011 | partition_t *part = (void *)dev; | ||
1012 | uint32_t bsize = 1 << part->header.EraseUnitSize; | ||
1013 | |||
1014 | DEBUG(1, "FTL erase sector %ld for %d sectors\n", | ||
1015 | sector, nr_sects); | ||
1016 | |||
1017 | while (nr_sects) { | ||
1018 | uint32_t old_addr = part->VirtualBlockMap[sector]; | ||
1019 | if (old_addr != 0xffffffff) { | ||
1020 | part->VirtualBlockMap[sector] = 0xffffffff; | ||
1021 | part->EUNInfo[old_addr/bsize].Deleted++; | ||
1022 | if (set_bam_entry(part, old_addr, 0)) | ||
1023 | return -EIO; | ||
1024 | } | ||
1025 | nr_sects--; | ||
1026 | sector++; | ||
1027 | } | ||
1028 | |||
1029 | return 0; | ||
1030 | } | ||
1008 | /*====================================================================*/ | 1031 | /*====================================================================*/ |
1009 | 1032 | ||
1010 | static void ftl_freepart(partition_t *part) | 1033 | static void ftl_freepart(partition_t *part) |
@@ -1069,6 +1092,7 @@ static struct mtd_blktrans_ops ftl_tr = { | |||
1069 | .blksize = SECTOR_SIZE, | 1092 | .blksize = SECTOR_SIZE, |
1070 | .readsect = ftl_readsect, | 1093 | .readsect = ftl_readsect, |
1071 | .writesect = ftl_writesect, | 1094 | .writesect = ftl_writesect, |
1095 | .discard = ftl_discardsect, | ||
1072 | .getgeo = ftl_getgeo, | 1096 | .getgeo = ftl_getgeo, |
1073 | .add_mtd = ftl_add_mtd, | 1097 | .add_mtd = ftl_add_mtd, |
1074 | .remove_dev = ftl_remove_dev, | 1098 | .remove_dev = ftl_remove_dev, |
diff --git a/drivers/mtd/maps/amd76xrom.c b/drivers/mtd/maps/amd76xrom.c index 948b86f35ef4..d1eec7d3243f 100644 --- a/drivers/mtd/maps/amd76xrom.c +++ b/drivers/mtd/maps/amd76xrom.c | |||
@@ -6,7 +6,6 @@ | |||
6 | 6 | ||
7 | #include <linux/module.h> | 7 | #include <linux/module.h> |
8 | #include <linux/types.h> | 8 | #include <linux/types.h> |
9 | #include <linux/version.h> | ||
10 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
11 | #include <linux/init.h> | 10 | #include <linux/init.h> |
12 | #include <asm/io.h> | 11 | #include <asm/io.h> |
diff --git a/drivers/mtd/maps/autcpu12-nvram.c b/drivers/mtd/maps/autcpu12-nvram.c index cf32267263df..53664188fc47 100644 --- a/drivers/mtd/maps/autcpu12-nvram.c +++ b/drivers/mtd/maps/autcpu12-nvram.c | |||
@@ -25,8 +25,8 @@ | |||
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <asm/io.h> | 26 | #include <asm/io.h> |
27 | #include <asm/sizes.h> | 27 | #include <asm/sizes.h> |
28 | #include <asm/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <asm/arch/autcpu12.h> | 29 | #include <mach/autcpu12.h> |
30 | #include <linux/mtd/mtd.h> | 30 | #include <linux/mtd/mtd.h> |
31 | #include <linux/mtd/map.h> | 31 | #include <linux/mtd/map.h> |
32 | #include <linux/mtd/partitions.h> | 32 | #include <linux/mtd/partitions.h> |
diff --git a/drivers/mtd/maps/cdb89712.c b/drivers/mtd/maps/cdb89712.c index cb507da0a87d..e5059aa3c724 100644 --- a/drivers/mtd/maps/cdb89712.c +++ b/drivers/mtd/maps/cdb89712.c | |||
@@ -9,7 +9,7 @@ | |||
9 | #include <linux/ioport.h> | 9 | #include <linux/ioport.h> |
10 | #include <linux/init.h> | 10 | #include <linux/init.h> |
11 | #include <asm/io.h> | 11 | #include <asm/io.h> |
12 | #include <asm/arch/hardware.h> | 12 | #include <mach/hardware.h> |
13 | #include <linux/mtd/mtd.h> | 13 | #include <linux/mtd/mtd.h> |
14 | #include <linux/mtd/map.h> | 14 | #include <linux/mtd/map.h> |
15 | #include <linux/mtd/partitions.h> | 15 | #include <linux/mtd/partitions.h> |
diff --git a/drivers/mtd/maps/ceiva.c b/drivers/mtd/maps/ceiva.c index 6464d487eb1a..60e68bde0fea 100644 --- a/drivers/mtd/maps/ceiva.c +++ b/drivers/mtd/maps/ceiva.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <linux/mtd/concat.h> | 26 | #include <linux/mtd/concat.h> |
27 | 27 | ||
28 | #include <asm/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
30 | #include <asm/io.h> | 30 | #include <asm/io.h> |
31 | #include <asm/sizes.h> | 31 | #include <asm/sizes.h> |
diff --git a/drivers/mtd/maps/ck804xrom.c b/drivers/mtd/maps/ck804xrom.c index effaf7cdefab..1a6feb4474de 100644 --- a/drivers/mtd/maps/ck804xrom.c +++ b/drivers/mtd/maps/ck804xrom.c | |||
@@ -9,7 +9,6 @@ | |||
9 | 9 | ||
10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
11 | #include <linux/types.h> | 11 | #include <linux/types.h> |
12 | #include <linux/version.h> | ||
13 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 13 | #include <linux/init.h> |
15 | #include <asm/io.h> | 14 | #include <asm/io.h> |
diff --git a/drivers/mtd/maps/esb2rom.c b/drivers/mtd/maps/esb2rom.c index aa64a4752781..bbbcdd4c8d13 100644 --- a/drivers/mtd/maps/esb2rom.c +++ b/drivers/mtd/maps/esb2rom.c | |||
@@ -12,7 +12,6 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/version.h> | ||
16 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 16 | #include <linux/init.h> |
18 | #include <asm/io.h> | 17 | #include <asm/io.h> |
diff --git a/drivers/mtd/maps/h720x-flash.c b/drivers/mtd/maps/h720x-flash.c index ef8915474462..35fef655ccc4 100644 --- a/drivers/mtd/maps/h720x-flash.c +++ b/drivers/mtd/maps/h720x-flash.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <linux/mtd/mtd.h> | 16 | #include <linux/mtd/mtd.h> |
17 | #include <linux/mtd/map.h> | 17 | #include <linux/mtd/map.h> |
18 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
19 | #include <asm/hardware.h> | 19 | #include <mach/hardware.h> |
20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
21 | 21 | ||
22 | static struct mtd_info *mymtd; | 22 | static struct mtd_info *mymtd; |
diff --git a/drivers/mtd/maps/integrator-flash.c b/drivers/mtd/maps/integrator-flash.c index ee361aaadb1e..7100ee3c7b01 100644 --- a/drivers/mtd/maps/integrator-flash.c +++ b/drivers/mtd/maps/integrator-flash.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #include <linux/mtd/partitions.h> | 37 | #include <linux/mtd/partitions.h> |
38 | 38 | ||
39 | #include <asm/mach/flash.h> | 39 | #include <asm/mach/flash.h> |
40 | #include <asm/hardware.h> | 40 | #include <mach/hardware.h> |
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include <asm/system.h> | 42 | #include <asm/system.h> |
43 | 43 | ||
diff --git a/drivers/mtd/maps/ipaq-flash.c b/drivers/mtd/maps/ipaq-flash.c index a806119797e0..ed58f6a77bd9 100644 --- a/drivers/mtd/maps/ipaq-flash.c +++ b/drivers/mtd/maps/ipaq-flash.c | |||
@@ -24,8 +24,8 @@ | |||
24 | #include <linux/mtd/concat.h> | 24 | #include <linux/mtd/concat.h> |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | #include <asm/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <asm/arch-sa1100/h3600.h> | 28 | #include <mach/h3600.h> |
29 | #include <asm/io.h> | 29 | #include <asm/io.h> |
30 | 30 | ||
31 | 31 | ||
diff --git a/drivers/mtd/maps/ixp2000.c b/drivers/mtd/maps/ixp2000.c index c2264792a20b..dcdb1f17577d 100644 --- a/drivers/mtd/maps/ixp2000.c +++ b/drivers/mtd/maps/ixp2000.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include <linux/mtd/partitions.h> | 30 | #include <linux/mtd/partitions.h> |
31 | 31 | ||
32 | #include <asm/io.h> | 32 | #include <asm/io.h> |
33 | #include <asm/hardware.h> | 33 | #include <mach/hardware.h> |
34 | #include <asm/mach/flash.h> | 34 | #include <asm/mach/flash.h> |
35 | 35 | ||
36 | #include <linux/reboot.h> | 36 | #include <linux/reboot.h> |
diff --git a/drivers/mtd/maps/omap_nor.c b/drivers/mtd/maps/omap_nor.c index 68eec6c6c517..05f276af15da 100644 --- a/drivers/mtd/maps/omap_nor.c +++ b/drivers/mtd/maps/omap_nor.c | |||
@@ -43,9 +43,9 @@ | |||
43 | #include <linux/mtd/partitions.h> | 43 | #include <linux/mtd/partitions.h> |
44 | 44 | ||
45 | #include <asm/io.h> | 45 | #include <asm/io.h> |
46 | #include <asm/hardware.h> | 46 | #include <mach/hardware.h> |
47 | #include <asm/mach/flash.h> | 47 | #include <asm/mach/flash.h> |
48 | #include <asm/arch/tc.h> | 48 | #include <mach/tc.h> |
49 | 49 | ||
50 | #ifdef CONFIG_MTD_PARTITIONS | 50 | #ifdef CONFIG_MTD_PARTITIONS |
51 | static const char *part_probes[] = { /* "RedBoot", */ "cmdlinepart", NULL }; | 51 | static const char *part_probes[] = { /* "RedBoot", */ "cmdlinepart", NULL }; |
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index 82113295c266..771139c5bf87 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/mtd/partitions.h> | 19 | #include <linux/mtd/partitions.h> |
20 | 20 | ||
21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
22 | #include <asm/hardware.h> | 22 | #include <mach/hardware.h> |
23 | #include <asm/cacheflush.h> | 23 | #include <asm/cacheflush.h> |
24 | 24 | ||
25 | #include <asm/mach/flash.h> | 25 | #include <asm/mach/flash.h> |
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c index e177a43dfff0..7df6bbf0e4d9 100644 --- a/drivers/mtd/maps/sa1100-flash.c +++ b/drivers/mtd/maps/sa1100-flash.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
19 | #include <linux/mtd/concat.h> | 19 | #include <linux/mtd/concat.h> |
20 | 20 | ||
21 | #include <asm/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <asm/io.h> | 22 | #include <asm/io.h> |
23 | #include <asm/sizes.h> | 23 | #include <asm/sizes.h> |
24 | #include <asm/mach/flash.h> | 24 | #include <asm/mach/flash.h> |
diff --git a/drivers/mtd/maps/sun_uflash.c b/drivers/mtd/maps/sun_uflash.c index 0d7c88396c88..fd7a1017399a 100644 --- a/drivers/mtd/maps/sun_uflash.c +++ b/drivers/mtd/maps/sun_uflash.c | |||
@@ -1,13 +1,10 @@ | |||
1 | /* | 1 | /* sun_uflash.c - Driver for user-programmable flash on |
2 | * | 2 | * Sun Microsystems SME boardsets. |
3 | * sun_uflash - Driver implementation for user-programmable flash | ||
4 | * present on many Sun Microsystems SME boardsets. | ||
5 | * | 3 | * |
6 | * This driver does NOT provide access to the OBP-flash for | 4 | * This driver does NOT provide access to the OBP-flash for |
7 | * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead. | 5 | * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead. |
8 | * | 6 | * |
9 | * Copyright (c) 2001 Eric Brower (ebrower@usa.net) | 7 | * Copyright (c) 2001 Eric Brower (ebrower@usa.net) |
10 | * | ||
11 | */ | 8 | */ |
12 | 9 | ||
13 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
@@ -16,8 +13,8 @@ | |||
16 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
17 | #include <linux/init.h> | 14 | #include <linux/init.h> |
18 | #include <linux/ioport.h> | 15 | #include <linux/ioport.h> |
19 | #include <asm/ebus.h> | 16 | #include <linux/of.h> |
20 | #include <asm/oplib.h> | 17 | #include <linux/of_device.h> |
21 | #include <asm/prom.h> | 18 | #include <asm/prom.h> |
22 | #include <asm/uaccess.h> | 19 | #include <asm/uaccess.h> |
23 | #include <asm/io.h> | 20 | #include <asm/io.h> |
@@ -26,67 +23,65 @@ | |||
26 | #include <linux/mtd/map.h> | 23 | #include <linux/mtd/map.h> |
27 | 24 | ||
28 | #define UFLASH_OBPNAME "flashprom" | 25 | #define UFLASH_OBPNAME "flashprom" |
29 | #define UFLASH_DEVNAME "userflash" | 26 | #define DRIVER_NAME "sun_uflash" |
27 | #define PFX DRIVER_NAME ": " | ||
30 | 28 | ||
31 | #define UFLASH_WINDOW_SIZE 0x200000 | 29 | #define UFLASH_WINDOW_SIZE 0x200000 |
32 | #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */ | 30 | #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */ |
33 | 31 | ||
34 | MODULE_AUTHOR("Eric Brower <ebrower@usa.net>"); | 32 | MODULE_AUTHOR("Eric Brower <ebrower@usa.net>"); |
35 | MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets"); | 33 | MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets"); |
36 | MODULE_SUPPORTED_DEVICE("userflash"); | 34 | MODULE_SUPPORTED_DEVICE(DRIVER_NAME); |
37 | MODULE_LICENSE("GPL"); | 35 | MODULE_LICENSE("GPL"); |
38 | MODULE_VERSION("2.0"); | 36 | MODULE_VERSION("2.1"); |
39 | 37 | ||
40 | static LIST_HEAD(device_list); | ||
41 | struct uflash_dev { | 38 | struct uflash_dev { |
42 | const char *name; /* device name */ | 39 | const char *name; /* device name */ |
43 | struct map_info map; /* mtd map info */ | 40 | struct map_info map; /* mtd map info */ |
44 | struct mtd_info *mtd; /* mtd info */ | 41 | struct mtd_info *mtd; /* mtd info */ |
45 | }; | 42 | }; |
46 | 43 | ||
47 | |||
48 | struct map_info uflash_map_templ = { | 44 | struct map_info uflash_map_templ = { |
49 | .name = "SUNW,???-????", | 45 | .name = "SUNW,???-????", |
50 | .size = UFLASH_WINDOW_SIZE, | 46 | .size = UFLASH_WINDOW_SIZE, |
51 | .bankwidth = UFLASH_BUSWIDTH, | 47 | .bankwidth = UFLASH_BUSWIDTH, |
52 | }; | 48 | }; |
53 | 49 | ||
54 | int uflash_devinit(struct linux_ebus_device *edev, struct device_node *dp) | 50 | int uflash_devinit(struct of_device *op, struct device_node *dp) |
55 | { | 51 | { |
56 | struct uflash_dev *up; | 52 | struct uflash_dev *up; |
57 | struct resource *res; | ||
58 | 53 | ||
59 | res = &edev->resource[0]; | 54 | if (op->resource[1].flags) { |
60 | |||
61 | if (edev->num_addrs != 1) { | ||
62 | /* Non-CFI userflash device-- once I find one we | 55 | /* Non-CFI userflash device-- once I find one we |
63 | * can work on supporting it. | 56 | * can work on supporting it. |
64 | */ | 57 | */ |
65 | printk("%s: unsupported device at 0x%llx (%d regs): " \ | 58 | printk(KERN_ERR PFX "Unsupported device at %s, 0x%llx\n", |
66 | "email ebrower@usa.net\n", | 59 | dp->full_name, (unsigned long long)op->resource[0].start); |
67 | dp->full_name, (unsigned long long)res->start, | ||
68 | edev->num_addrs); | ||
69 | 60 | ||
70 | return -ENODEV; | 61 | return -ENODEV; |
71 | } | 62 | } |
72 | 63 | ||
73 | up = kzalloc(sizeof(struct uflash_dev), GFP_KERNEL); | 64 | up = kzalloc(sizeof(struct uflash_dev), GFP_KERNEL); |
74 | if (!up) | 65 | if (!up) { |
66 | printk(KERN_ERR PFX "Cannot allocate struct uflash_dev\n"); | ||
75 | return -ENOMEM; | 67 | return -ENOMEM; |
68 | } | ||
76 | 69 | ||
77 | /* copy defaults and tweak parameters */ | 70 | /* copy defaults and tweak parameters */ |
78 | memcpy(&up->map, &uflash_map_templ, sizeof(uflash_map_templ)); | 71 | memcpy(&up->map, &uflash_map_templ, sizeof(uflash_map_templ)); |
79 | up->map.size = (res->end - res->start) + 1UL; | 72 | |
73 | up->map.size = resource_size(&op->resource[0]); | ||
80 | 74 | ||
81 | up->name = of_get_property(dp, "model", NULL); | 75 | up->name = of_get_property(dp, "model", NULL); |
82 | if (up->name && 0 < strlen(up->name)) | 76 | if (up->name && 0 < strlen(up->name)) |
83 | up->map.name = (char *)up->name; | 77 | up->map.name = (char *)up->name; |
84 | 78 | ||
85 | up->map.phys = res->start; | 79 | up->map.phys = op->resource[0].start; |
86 | 80 | ||
87 | up->map.virt = ioremap_nocache(res->start, up->map.size); | 81 | up->map.virt = of_ioremap(&op->resource[0], 0, up->map.size, |
82 | DRIVER_NAME); | ||
88 | if (!up->map.virt) { | 83 | if (!up->map.virt) { |
89 | printk("%s: Failed to map device.\n", dp->full_name); | 84 | printk(KERN_ERR PFX "Failed to map device.\n"); |
90 | kfree(up); | 85 | kfree(up); |
91 | 86 | ||
92 | return -EINVAL; | 87 | return -EINVAL; |
@@ -97,7 +92,7 @@ int uflash_devinit(struct linux_ebus_device *edev, struct device_node *dp) | |||
97 | /* MTD registration */ | 92 | /* MTD registration */ |
98 | up->mtd = do_map_probe("cfi_probe", &up->map); | 93 | up->mtd = do_map_probe("cfi_probe", &up->map); |
99 | if (!up->mtd) { | 94 | if (!up->mtd) { |
100 | iounmap(up->map.virt); | 95 | of_iounmap(&op->resource[0], up->map.virt, up->map.size); |
101 | kfree(up); | 96 | kfree(up); |
102 | 97 | ||
103 | return -ENXIO; | 98 | return -ENXIO; |
@@ -107,32 +102,34 @@ int uflash_devinit(struct linux_ebus_device *edev, struct device_node *dp) | |||
107 | 102 | ||
108 | add_mtd_device(up->mtd); | 103 | add_mtd_device(up->mtd); |
109 | 104 | ||
110 | dev_set_drvdata(&edev->ofdev.dev, up); | 105 | dev_set_drvdata(&op->dev, up); |
111 | 106 | ||
112 | return 0; | 107 | return 0; |
113 | } | 108 | } |
114 | 109 | ||
115 | static int __devinit uflash_probe(struct of_device *dev, const struct of_device_id *match) | 110 | static int __devinit uflash_probe(struct of_device *op, const struct of_device_id *match) |
116 | { | 111 | { |
117 | struct linux_ebus_device *edev = to_ebus_device(&dev->dev); | 112 | struct device_node *dp = op->node; |
118 | struct device_node *dp = dev->node; | ||
119 | 113 | ||
120 | if (of_find_property(dp, "user", NULL)) | 114 | /* Flashprom must have the "user" property in order to |
115 | * be used by this driver. | ||
116 | */ | ||
117 | if (!of_find_property(dp, "user", NULL)) | ||
121 | return -ENODEV; | 118 | return -ENODEV; |
122 | 119 | ||
123 | return uflash_devinit(edev, dp); | 120 | return uflash_devinit(op, dp); |
124 | } | 121 | } |
125 | 122 | ||
126 | static int __devexit uflash_remove(struct of_device *dev) | 123 | static int __devexit uflash_remove(struct of_device *op) |
127 | { | 124 | { |
128 | struct uflash_dev *up = dev_get_drvdata(&dev->dev); | 125 | struct uflash_dev *up = dev_get_drvdata(&op->dev); |
129 | 126 | ||
130 | if (up->mtd) { | 127 | if (up->mtd) { |
131 | del_mtd_device(up->mtd); | 128 | del_mtd_device(up->mtd); |
132 | map_destroy(up->mtd); | 129 | map_destroy(up->mtd); |
133 | } | 130 | } |
134 | if (up->map.virt) { | 131 | if (up->map.virt) { |
135 | iounmap(up->map.virt); | 132 | of_iounmap(&op->resource[0], up->map.virt, up->map.size); |
136 | up->map.virt = NULL; | 133 | up->map.virt = NULL; |
137 | } | 134 | } |
138 | 135 | ||
@@ -141,7 +138,7 @@ static int __devexit uflash_remove(struct of_device *dev) | |||
141 | return 0; | 138 | return 0; |
142 | } | 139 | } |
143 | 140 | ||
144 | static struct of_device_id uflash_match[] = { | 141 | static const struct of_device_id uflash_match[] = { |
145 | { | 142 | { |
146 | .name = UFLASH_OBPNAME, | 143 | .name = UFLASH_OBPNAME, |
147 | }, | 144 | }, |
@@ -151,7 +148,7 @@ static struct of_device_id uflash_match[] = { | |||
151 | MODULE_DEVICE_TABLE(of, uflash_match); | 148 | MODULE_DEVICE_TABLE(of, uflash_match); |
152 | 149 | ||
153 | static struct of_platform_driver uflash_driver = { | 150 | static struct of_platform_driver uflash_driver = { |
154 | .name = UFLASH_DEVNAME, | 151 | .name = DRIVER_NAME, |
155 | .match_table = uflash_match, | 152 | .match_table = uflash_match, |
156 | .probe = uflash_probe, | 153 | .probe = uflash_probe, |
157 | .remove = __devexit_p(uflash_remove), | 154 | .remove = __devexit_p(uflash_remove), |
@@ -159,7 +156,7 @@ static struct of_platform_driver uflash_driver = { | |||
159 | 156 | ||
160 | static int __init uflash_init(void) | 157 | static int __init uflash_init(void) |
161 | { | 158 | { |
162 | return of_register_driver(&uflash_driver, &ebus_bus_type); | 159 | return of_register_driver(&uflash_driver, &of_bus_type); |
163 | } | 160 | } |
164 | 161 | ||
165 | static void __exit uflash_exit(void) | 162 | static void __exit uflash_exit(void) |
diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c index 9ff007c4962c..681d5aca2af4 100644 --- a/drivers/mtd/mtd_blkdevs.c +++ b/drivers/mtd/mtd_blkdevs.c | |||
@@ -32,6 +32,14 @@ struct mtd_blkcore_priv { | |||
32 | spinlock_t queue_lock; | 32 | spinlock_t queue_lock; |
33 | }; | 33 | }; |
34 | 34 | ||
35 | static int blktrans_discard_request(struct request_queue *q, | ||
36 | struct request *req) | ||
37 | { | ||
38 | req->cmd_type = REQ_TYPE_LINUX_BLOCK; | ||
39 | req->cmd[0] = REQ_LB_OP_DISCARD; | ||
40 | return 0; | ||
41 | } | ||
42 | |||
35 | static int do_blktrans_request(struct mtd_blktrans_ops *tr, | 43 | static int do_blktrans_request(struct mtd_blktrans_ops *tr, |
36 | struct mtd_blktrans_dev *dev, | 44 | struct mtd_blktrans_dev *dev, |
37 | struct request *req) | 45 | struct request *req) |
@@ -44,6 +52,10 @@ static int do_blktrans_request(struct mtd_blktrans_ops *tr, | |||
44 | 52 | ||
45 | buf = req->buffer; | 53 | buf = req->buffer; |
46 | 54 | ||
55 | if (req->cmd_type == REQ_TYPE_LINUX_BLOCK && | ||
56 | req->cmd[0] == REQ_LB_OP_DISCARD) | ||
57 | return !tr->discard(dev, block, nsect); | ||
58 | |||
47 | if (!blk_fs_request(req)) | 59 | if (!blk_fs_request(req)) |
48 | return 0; | 60 | return 0; |
49 | 61 | ||
@@ -367,6 +379,10 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr) | |||
367 | 379 | ||
368 | tr->blkcore_priv->rq->queuedata = tr; | 380 | tr->blkcore_priv->rq->queuedata = tr; |
369 | blk_queue_hardsect_size(tr->blkcore_priv->rq, tr->blksize); | 381 | blk_queue_hardsect_size(tr->blkcore_priv->rq, tr->blksize); |
382 | if (tr->discard) | ||
383 | blk_queue_set_discard(tr->blkcore_priv->rq, | ||
384 | blktrans_discard_request); | ||
385 | |||
370 | tr->blkshift = ffs(tr->blksize) - 1; | 386 | tr->blkshift = ffs(tr->blksize) - 1; |
371 | 387 | ||
372 | tr->blkcore_priv->thread = kthread_run(mtd_blktrans_thread, tr, | 388 | tr->blkcore_priv->thread = kthread_run(mtd_blktrans_thread, tr, |
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index d2f331876e4c..e00d424e6575 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c | |||
@@ -410,16 +410,20 @@ static int mtd_ioctl(struct inode *inode, struct file *file, | |||
410 | 410 | ||
411 | case MEMGETREGIONINFO: | 411 | case MEMGETREGIONINFO: |
412 | { | 412 | { |
413 | struct region_info_user ur; | 413 | uint32_t ur_idx; |
414 | struct mtd_erase_region_info *kr; | ||
415 | struct region_info_user *ur = (struct region_info_user *) argp; | ||
414 | 416 | ||
415 | if (copy_from_user(&ur, argp, sizeof(struct region_info_user))) | 417 | if (get_user(ur_idx, &(ur->regionindex))) |
416 | return -EFAULT; | 418 | return -EFAULT; |
417 | 419 | ||
418 | if (ur.regionindex >= mtd->numeraseregions) | 420 | kr = &(mtd->eraseregions[ur_idx]); |
419 | return -EINVAL; | 421 | |
420 | if (copy_to_user(argp, &(mtd->eraseregions[ur.regionindex]), | 422 | if (put_user(kr->offset, &(ur->offset)) |
421 | sizeof(struct mtd_erase_region_info))) | 423 | || put_user(kr->erasesize, &(ur->erasesize)) |
424 | || put_user(kr->numblocks, &(ur->numblocks))) | ||
422 | return -EFAULT; | 425 | return -EFAULT; |
426 | |||
423 | break; | 427 | break; |
424 | } | 428 | } |
425 | 429 | ||
diff --git a/drivers/mtd/mtdsuper.c b/drivers/mtd/mtdsuper.c index 28cc6787a800..00d46e137b2a 100644 --- a/drivers/mtd/mtdsuper.c +++ b/drivers/mtd/mtdsuper.c | |||
@@ -125,8 +125,11 @@ int get_sb_mtd(struct file_system_type *fs_type, int flags, | |||
125 | int (*fill_super)(struct super_block *, void *, int), | 125 | int (*fill_super)(struct super_block *, void *, int), |
126 | struct vfsmount *mnt) | 126 | struct vfsmount *mnt) |
127 | { | 127 | { |
128 | struct nameidata nd; | 128 | #ifdef CONFIG_BLOCK |
129 | int mtdnr, ret; | 129 | struct block_device *bdev; |
130 | int ret, major; | ||
131 | #endif | ||
132 | int mtdnr; | ||
130 | 133 | ||
131 | if (!dev_name) | 134 | if (!dev_name) |
132 | return -EINVAL; | 135 | return -EINVAL; |
@@ -178,45 +181,38 @@ int get_sb_mtd(struct file_system_type *fs_type, int flags, | |||
178 | } | 181 | } |
179 | } | 182 | } |
180 | 183 | ||
184 | #ifdef CONFIG_BLOCK | ||
181 | /* try the old way - the hack where we allowed users to mount | 185 | /* try the old way - the hack where we allowed users to mount |
182 | * /dev/mtdblock$(n) but didn't actually _use_ the blockdev | 186 | * /dev/mtdblock$(n) but didn't actually _use_ the blockdev |
183 | */ | 187 | */ |
184 | ret = path_lookup(dev_name, LOOKUP_FOLLOW, &nd); | 188 | bdev = lookup_bdev(dev_name); |
185 | 189 | if (IS_ERR(bdev)) { | |
186 | DEBUG(1, "MTDSB: path_lookup() returned %d, inode %p\n", | 190 | ret = PTR_ERR(bdev); |
187 | ret, nd.path.dentry ? nd.path.dentry->d_inode : NULL); | 191 | DEBUG(1, "MTDSB: lookup_bdev() returned %d\n", ret); |
188 | |||
189 | if (ret) | ||
190 | return ret; | 192 | return ret; |
193 | } | ||
194 | DEBUG(1, "MTDSB: lookup_bdev() returned 0\n"); | ||
191 | 195 | ||
192 | ret = -EINVAL; | 196 | ret = -EINVAL; |
193 | 197 | ||
194 | if (!S_ISBLK(nd.path.dentry->d_inode->i_mode)) | 198 | major = MAJOR(bdev->bd_dev); |
195 | goto out; | 199 | mtdnr = MINOR(bdev->bd_dev); |
196 | 200 | bdput(bdev); | |
197 | if (nd.path.mnt->mnt_flags & MNT_NODEV) { | ||
198 | ret = -EACCES; | ||
199 | goto out; | ||
200 | } | ||
201 | 201 | ||
202 | if (imajor(nd.path.dentry->d_inode) != MTD_BLOCK_MAJOR) | 202 | if (major != MTD_BLOCK_MAJOR) |
203 | goto not_an_MTD_device; | 203 | goto not_an_MTD_device; |
204 | 204 | ||
205 | mtdnr = iminor(nd.path.dentry->d_inode); | ||
206 | path_put(&nd.path); | ||
207 | |||
208 | return get_sb_mtd_nr(fs_type, flags, dev_name, data, mtdnr, fill_super, | 205 | return get_sb_mtd_nr(fs_type, flags, dev_name, data, mtdnr, fill_super, |
209 | mnt); | 206 | mnt); |
210 | 207 | ||
211 | not_an_MTD_device: | 208 | not_an_MTD_device: |
209 | #endif /* CONFIG_BLOCK */ | ||
210 | |||
212 | if (!(flags & MS_SILENT)) | 211 | if (!(flags & MS_SILENT)) |
213 | printk(KERN_NOTICE | 212 | printk(KERN_NOTICE |
214 | "MTD: Attempt to mount non-MTD device \"%s\"\n", | 213 | "MTD: Attempt to mount non-MTD device \"%s\"\n", |
215 | dev_name); | 214 | dev_name); |
216 | out: | 215 | return -EINVAL; |
217 | path_put(&nd.path); | ||
218 | return ret; | ||
219 | |||
220 | } | 216 | } |
221 | 217 | ||
222 | EXPORT_SYMBOL_GPL(get_sb_mtd); | 218 | EXPORT_SYMBOL_GPL(get_sb_mtd); |
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 71406e517857..41f361c49b32 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig | |||
@@ -104,11 +104,24 @@ config MTD_NAND_BF5XX | |||
104 | 104 | ||
105 | config MTD_NAND_BF5XX_HWECC | 105 | config MTD_NAND_BF5XX_HWECC |
106 | bool "BF5XX NAND Hardware ECC" | 106 | bool "BF5XX NAND Hardware ECC" |
107 | default y | ||
107 | depends on MTD_NAND_BF5XX | 108 | depends on MTD_NAND_BF5XX |
108 | help | 109 | help |
109 | Enable the use of the BF5XX's internal ECC generator when | 110 | Enable the use of the BF5XX's internal ECC generator when |
110 | using NAND. | 111 | using NAND. |
111 | 112 | ||
113 | config MTD_NAND_BF5XX_BOOTROM_ECC | ||
114 | bool "Use Blackfin BootROM ECC Layout" | ||
115 | default n | ||
116 | depends on MTD_NAND_BF5XX_HWECC | ||
117 | help | ||
118 | If you wish to modify NAND pages and allow the Blackfin on-chip | ||
119 | BootROM to boot from them, say Y here. This is only necessary | ||
120 | if you are booting U-Boot out of NAND and you wish to update | ||
121 | U-Boot from Linux' userspace. Otherwise, you should say N here. | ||
122 | |||
123 | If unsure, say N. | ||
124 | |||
112 | config MTD_NAND_RTC_FROM4 | 125 | config MTD_NAND_RTC_FROM4 |
113 | tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" | 126 | tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" |
114 | depends on SH_SOLUTION_ENGINE | 127 | depends on SH_SOLUTION_ENGINE |
@@ -338,6 +351,13 @@ config MTD_NAND_PASEMI | |||
338 | Enables support for NAND Flash interface on PA Semi PWRficient | 351 | Enables support for NAND Flash interface on PA Semi PWRficient |
339 | based boards | 352 | based boards |
340 | 353 | ||
354 | config MTD_NAND_TMIO | ||
355 | tristate "NAND Flash device on Toshiba Mobile IO Controller" | ||
356 | depends on MTD_NAND && MFD_TMIO | ||
357 | help | ||
358 | Support for NAND flash connected to a Toshiba Mobile IO | ||
359 | Controller in some PDAs, including the Sharp SL6000x. | ||
360 | |||
341 | config MTD_NAND_NANDSIM | 361 | config MTD_NAND_NANDSIM |
342 | tristate "Support for NAND Flash Simulator" | 362 | tristate "Support for NAND Flash Simulator" |
343 | depends on MTD_PARTITIONS | 363 | depends on MTD_PARTITIONS |
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index d772581de573..b786c5da82da 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile | |||
@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_NAND_ATMEL) += atmel_nand.o | |||
27 | obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o | 27 | obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o |
28 | obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o | 28 | obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o |
29 | obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o | 29 | obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o |
30 | obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o | ||
30 | obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o | 31 | obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o |
31 | obj-$(CONFIG_MTD_ALAUDA) += alauda.o | 32 | obj-$(CONFIG_MTD_ALAUDA) += alauda.o |
32 | obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o | 33 | obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o |
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c index a0ba07c36ee9..26d42987971f 100644 --- a/drivers/mtd/nand/ams-delta.c +++ b/drivers/mtd/nand/ams-delta.c | |||
@@ -22,10 +22,10 @@ | |||
22 | #include <linux/mtd/nand.h> | 22 | #include <linux/mtd/nand.h> |
23 | #include <linux/mtd/partitions.h> | 23 | #include <linux/mtd/partitions.h> |
24 | #include <asm/io.h> | 24 | #include <asm/io.h> |
25 | #include <asm/arch/hardware.h> | 25 | #include <mach/hardware.h> |
26 | #include <asm/sizes.h> | 26 | #include <asm/sizes.h> |
27 | #include <asm/arch/gpio.h> | 27 | #include <mach/gpio.h> |
28 | #include <asm/arch/board-ams-delta.h> | 28 | #include <mach/board-ams-delta.h> |
29 | 29 | ||
30 | /* | 30 | /* |
31 | * MTD structure for E3 (Delta) | 31 | * MTD structure for E3 (Delta) |
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 99aec46e2145..3387e0d5076b 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c | |||
@@ -32,8 +32,8 @@ | |||
32 | #include <linux/gpio.h> | 32 | #include <linux/gpio.h> |
33 | #include <linux/io.h> | 33 | #include <linux/io.h> |
34 | 34 | ||
35 | #include <asm/arch/board.h> | 35 | #include <mach/board.h> |
36 | #include <asm/arch/cpu.h> | 36 | #include <mach/cpu.h> |
37 | 37 | ||
38 | #ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW | 38 | #ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW |
39 | #define hard_ecc 1 | 39 | #define hard_ecc 1 |
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h index 1ee7f993db1c..578c776e1356 100644 --- a/drivers/mtd/nand/atmel_nand_ecc.h +++ b/drivers/mtd/nand/atmel_nand_ecc.h | |||
@@ -2,6 +2,9 @@ | |||
2 | * Error Corrected Code Controller (ECC) - System peripherals regsters. | 2 | * Error Corrected Code Controller (ECC) - System peripherals regsters. |
3 | * Based on AT91SAM9260 datasheet revision B. | 3 | * Based on AT91SAM9260 datasheet revision B. |
4 | * | 4 | * |
5 | * Copyright (C) 2007 Andrew Victor | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the | 9 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2 of the License, or (at your | 10 | * Free Software Foundation; either version 2 of the License, or (at your |
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index 761946ea45b1..92c334ff4508 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/mtd/mtd.h> | 16 | #include <linux/mtd/mtd.h> |
17 | #include <linux/mtd/nand.h> | 17 | #include <linux/mtd/nand.h> |
18 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
19 | #include <linux/version.h> | ||
20 | #include <asm/io.h> | 19 | #include <asm/io.h> |
21 | 20 | ||
22 | #include <asm/mach-au1x00/au1xxx.h> | 21 | #include <asm/mach-au1x00/au1xxx.h> |
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c index 553dd7e9b41c..7c95da1f612c 100644 --- a/drivers/mtd/nand/autcpu12.c +++ b/drivers/mtd/nand/autcpu12.c | |||
@@ -32,9 +32,9 @@ | |||
32 | #include <linux/mtd/nand.h> | 32 | #include <linux/mtd/nand.h> |
33 | #include <linux/mtd/partitions.h> | 33 | #include <linux/mtd/partitions.h> |
34 | #include <asm/io.h> | 34 | #include <asm/io.h> |
35 | #include <asm/arch/hardware.h> | 35 | #include <mach/hardware.h> |
36 | #include <asm/sizes.h> | 36 | #include <asm/sizes.h> |
37 | #include <asm/arch/autcpu12.h> | 37 | #include <mach/autcpu12.h> |
38 | 38 | ||
39 | /* | 39 | /* |
40 | * MTD structure for AUTCPU12 board | 40 | * MTD structure for AUTCPU12 board |
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index e87a57297328..9af2a2cc1153 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c | |||
@@ -91,6 +91,41 @@ static const unsigned short bfin_nfc_pin_req[] = | |||
91 | P_NAND_ALE, | 91 | P_NAND_ALE, |
92 | 0}; | 92 | 0}; |
93 | 93 | ||
94 | #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC | ||
95 | static uint8_t bbt_pattern[] = { 0xff }; | ||
96 | |||
97 | static struct nand_bbt_descr bootrom_bbt = { | ||
98 | .options = 0, | ||
99 | .offs = 63, | ||
100 | .len = 1, | ||
101 | .pattern = bbt_pattern, | ||
102 | }; | ||
103 | |||
104 | static struct nand_ecclayout bootrom_ecclayout = { | ||
105 | .eccbytes = 24, | ||
106 | .eccpos = { | ||
107 | 0x8 * 0, 0x8 * 0 + 1, 0x8 * 0 + 2, | ||
108 | 0x8 * 1, 0x8 * 1 + 1, 0x8 * 1 + 2, | ||
109 | 0x8 * 2, 0x8 * 2 + 1, 0x8 * 2 + 2, | ||
110 | 0x8 * 3, 0x8 * 3 + 1, 0x8 * 3 + 2, | ||
111 | 0x8 * 4, 0x8 * 4 + 1, 0x8 * 4 + 2, | ||
112 | 0x8 * 5, 0x8 * 5 + 1, 0x8 * 5 + 2, | ||
113 | 0x8 * 6, 0x8 * 6 + 1, 0x8 * 6 + 2, | ||
114 | 0x8 * 7, 0x8 * 7 + 1, 0x8 * 7 + 2 | ||
115 | }, | ||
116 | .oobfree = { | ||
117 | { 0x8 * 0 + 3, 5 }, | ||
118 | { 0x8 * 1 + 3, 5 }, | ||
119 | { 0x8 * 2 + 3, 5 }, | ||
120 | { 0x8 * 3 + 3, 5 }, | ||
121 | { 0x8 * 4 + 3, 5 }, | ||
122 | { 0x8 * 5 + 3, 5 }, | ||
123 | { 0x8 * 6 + 3, 5 }, | ||
124 | { 0x8 * 7 + 3, 5 }, | ||
125 | } | ||
126 | }; | ||
127 | #endif | ||
128 | |||
94 | /* | 129 | /* |
95 | * Data structures for bf5xx nand flash controller driver | 130 | * Data structures for bf5xx nand flash controller driver |
96 | */ | 131 | */ |
@@ -273,7 +308,7 @@ static int bf5xx_nand_correct_data(struct mtd_info *mtd, u_char *dat, | |||
273 | dat += 256; | 308 | dat += 256; |
274 | read_ecc += 8; | 309 | read_ecc += 8; |
275 | calc_ecc += 8; | 310 | calc_ecc += 8; |
276 | ret = bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc); | 311 | ret |= bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc); |
277 | } | 312 | } |
278 | 313 | ||
279 | return ret; | 314 | return ret; |
@@ -298,7 +333,7 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd, | |||
298 | ecc0 = bfin_read_NFC_ECC0(); | 333 | ecc0 = bfin_read_NFC_ECC0(); |
299 | ecc1 = bfin_read_NFC_ECC1(); | 334 | ecc1 = bfin_read_NFC_ECC1(); |
300 | 335 | ||
301 | code[0] = (ecc0 & 0x3FF) | ((ecc1 & 0x3FF) << 11); | 336 | code[0] = (ecc0 & 0x7ff) | ((ecc1 & 0x7ff) << 11); |
302 | 337 | ||
303 | dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]); | 338 | dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]); |
304 | 339 | ||
@@ -310,7 +345,7 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd, | |||
310 | if (page_size == 512) { | 345 | if (page_size == 512) { |
311 | ecc0 = bfin_read_NFC_ECC2(); | 346 | ecc0 = bfin_read_NFC_ECC2(); |
312 | ecc1 = bfin_read_NFC_ECC3(); | 347 | ecc1 = bfin_read_NFC_ECC3(); |
313 | code[1] = (ecc0 & 0x3FF) | ((ecc1 & 0x3FF) << 11); | 348 | code[1] = (ecc0 & 0x7ff) | ((ecc1 & 0x7ff) << 11); |
314 | 349 | ||
315 | /* second 3 bytes in ecc_code for second 256 | 350 | /* second 3 bytes in ecc_code for second 256 |
316 | * bytes of 512 page size | 351 | * bytes of 512 page size |
@@ -514,7 +549,6 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd, | |||
514 | /* | 549 | /* |
515 | * System initialization functions | 550 | * System initialization functions |
516 | */ | 551 | */ |
517 | |||
518 | static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info) | 552 | static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info) |
519 | { | 553 | { |
520 | int ret; | 554 | int ret; |
@@ -547,6 +581,13 @@ static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info) | |||
547 | return 0; | 581 | return 0; |
548 | } | 582 | } |
549 | 583 | ||
584 | static void bf5xx_nand_dma_remove(struct bf5xx_nand_info *info) | ||
585 | { | ||
586 | /* Free NFC DMA channel */ | ||
587 | if (hardware_ecc) | ||
588 | free_dma(CH_NFC); | ||
589 | } | ||
590 | |||
550 | /* | 591 | /* |
551 | * BF5XX NFC hardware initialization | 592 | * BF5XX NFC hardware initialization |
552 | * - pin mux setup | 593 | * - pin mux setup |
@@ -605,7 +646,7 @@ static int bf5xx_nand_add_partition(struct bf5xx_nand_info *info) | |||
605 | #endif | 646 | #endif |
606 | } | 647 | } |
607 | 648 | ||
608 | static int bf5xx_nand_remove(struct platform_device *pdev) | 649 | static int __devexit bf5xx_nand_remove(struct platform_device *pdev) |
609 | { | 650 | { |
610 | struct bf5xx_nand_info *info = to_nand_info(pdev); | 651 | struct bf5xx_nand_info *info = to_nand_info(pdev); |
611 | struct mtd_info *mtd = NULL; | 652 | struct mtd_info *mtd = NULL; |
@@ -623,6 +664,7 @@ static int bf5xx_nand_remove(struct platform_device *pdev) | |||
623 | } | 664 | } |
624 | 665 | ||
625 | peripheral_free_list(bfin_nfc_pin_req); | 666 | peripheral_free_list(bfin_nfc_pin_req); |
667 | bf5xx_nand_dma_remove(info); | ||
626 | 668 | ||
627 | /* free the common resources */ | 669 | /* free the common resources */ |
628 | kfree(info); | 670 | kfree(info); |
@@ -638,7 +680,7 @@ static int bf5xx_nand_remove(struct platform_device *pdev) | |||
638 | * it can allocate all necessary resources then calls the | 680 | * it can allocate all necessary resources then calls the |
639 | * nand layer to look for devices | 681 | * nand layer to look for devices |
640 | */ | 682 | */ |
641 | static int bf5xx_nand_probe(struct platform_device *pdev) | 683 | static int __devinit bf5xx_nand_probe(struct platform_device *pdev) |
642 | { | 684 | { |
643 | struct bf5xx_nand_platform *plat = to_nand_plat(pdev); | 685 | struct bf5xx_nand_platform *plat = to_nand_plat(pdev); |
644 | struct bf5xx_nand_info *info = NULL; | 686 | struct bf5xx_nand_info *info = NULL; |
@@ -648,22 +690,21 @@ static int bf5xx_nand_probe(struct platform_device *pdev) | |||
648 | 690 | ||
649 | dev_dbg(&pdev->dev, "(%p)\n", pdev); | 691 | dev_dbg(&pdev->dev, "(%p)\n", pdev); |
650 | 692 | ||
651 | if (peripheral_request_list(bfin_nfc_pin_req, DRV_NAME)) { | ||
652 | printk(KERN_ERR DRV_NAME | ||
653 | ": Requesting Peripherals failed\n"); | ||
654 | return -EFAULT; | ||
655 | } | ||
656 | |||
657 | if (!plat) { | 693 | if (!plat) { |
658 | dev_err(&pdev->dev, "no platform specific information\n"); | 694 | dev_err(&pdev->dev, "no platform specific information\n"); |
659 | goto exit_error; | 695 | return -EINVAL; |
696 | } | ||
697 | |||
698 | if (peripheral_request_list(bfin_nfc_pin_req, DRV_NAME)) { | ||
699 | dev_err(&pdev->dev, "requesting Peripherals failed\n"); | ||
700 | return -EFAULT; | ||
660 | } | 701 | } |
661 | 702 | ||
662 | info = kzalloc(sizeof(*info), GFP_KERNEL); | 703 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
663 | if (info == NULL) { | 704 | if (info == NULL) { |
664 | dev_err(&pdev->dev, "no memory for flash info\n"); | 705 | dev_err(&pdev->dev, "no memory for flash info\n"); |
665 | err = -ENOMEM; | 706 | err = -ENOMEM; |
666 | goto exit_error; | 707 | goto out_err_kzalloc; |
667 | } | 708 | } |
668 | 709 | ||
669 | platform_set_drvdata(pdev, info); | 710 | platform_set_drvdata(pdev, info); |
@@ -707,11 +748,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev) | |||
707 | 748 | ||
708 | /* initialise the hardware */ | 749 | /* initialise the hardware */ |
709 | err = bf5xx_nand_hw_init(info); | 750 | err = bf5xx_nand_hw_init(info); |
710 | if (err != 0) | 751 | if (err) |
711 | goto exit_error; | 752 | goto out_err_hw_init; |
712 | 753 | ||
713 | /* setup hardware ECC data struct */ | 754 | /* setup hardware ECC data struct */ |
714 | if (hardware_ecc) { | 755 | if (hardware_ecc) { |
756 | #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC | ||
757 | chip->badblock_pattern = &bootrom_bbt; | ||
758 | chip->ecc.layout = &bootrom_ecclayout; | ||
759 | #endif | ||
760 | |||
715 | if (plat->page_size == NFC_PG_SIZE_256) { | 761 | if (plat->page_size == NFC_PG_SIZE_256) { |
716 | chip->ecc.bytes = 3; | 762 | chip->ecc.bytes = 3; |
717 | chip->ecc.size = 256; | 763 | chip->ecc.size = 256; |
@@ -733,7 +779,7 @@ static int bf5xx_nand_probe(struct platform_device *pdev) | |||
733 | /* scan hardware nand chip and setup mtd info data struct */ | 779 | /* scan hardware nand chip and setup mtd info data struct */ |
734 | if (nand_scan(mtd, 1)) { | 780 | if (nand_scan(mtd, 1)) { |
735 | err = -ENXIO; | 781 | err = -ENXIO; |
736 | goto exit_error; | 782 | goto out_err_nand_scan; |
737 | } | 783 | } |
738 | 784 | ||
739 | /* add NAND partition */ | 785 | /* add NAND partition */ |
@@ -742,11 +788,14 @@ static int bf5xx_nand_probe(struct platform_device *pdev) | |||
742 | dev_dbg(&pdev->dev, "initialised ok\n"); | 788 | dev_dbg(&pdev->dev, "initialised ok\n"); |
743 | return 0; | 789 | return 0; |
744 | 790 | ||
745 | exit_error: | 791 | out_err_nand_scan: |
746 | bf5xx_nand_remove(pdev); | 792 | bf5xx_nand_dma_remove(info); |
793 | out_err_hw_init: | ||
794 | platform_set_drvdata(pdev, NULL); | ||
795 | kfree(info); | ||
796 | out_err_kzalloc: | ||
797 | peripheral_free_list(bfin_nfc_pin_req); | ||
747 | 798 | ||
748 | if (err == 0) | ||
749 | err = -EINVAL; | ||
750 | return err; | 799 | return err; |
751 | } | 800 | } |
752 | 801 | ||
@@ -775,7 +824,7 @@ static int bf5xx_nand_resume(struct platform_device *dev) | |||
775 | /* driver device registration */ | 824 | /* driver device registration */ |
776 | static struct platform_driver bf5xx_nand_driver = { | 825 | static struct platform_driver bf5xx_nand_driver = { |
777 | .probe = bf5xx_nand_probe, | 826 | .probe = bf5xx_nand_probe, |
778 | .remove = bf5xx_nand_remove, | 827 | .remove = __devexit_p(bf5xx_nand_remove), |
779 | .suspend = bf5xx_nand_suspend, | 828 | .suspend = bf5xx_nand_suspend, |
780 | .resume = bf5xx_nand_resume, | 829 | .resume = bf5xx_nand_resume, |
781 | .driver = { | 830 | .driver = { |
diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c index 95345d051579..b8064bf3aee4 100644 --- a/drivers/mtd/nand/cafe_nand.c +++ b/drivers/mtd/nand/cafe_nand.c | |||
@@ -1,6 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for One Laptop Per Child ‘CAFÉ’ controller, aka Marvell 88ALP01 | 2 | * Driver for One Laptop Per Child ‘CAFÉ’ controller, aka Marvell 88ALP01 |
3 | * | 3 | * |
4 | * The data sheet for this device can be found at: | ||
5 | * http://www.marvell.com/products/pcconn/88ALP01.jsp | ||
6 | * | ||
4 | * Copyright © 2006 Red Hat, Inc. | 7 | * Copyright © 2006 Red Hat, Inc. |
5 | * Copyright © 2006 David Woodhouse <dwmw2@infradead.org> | 8 | * Copyright © 2006 David Woodhouse <dwmw2@infradead.org> |
6 | */ | 9 | */ |
@@ -842,7 +845,8 @@ static void __devexit cafe_nand_remove(struct pci_dev *pdev) | |||
842 | } | 845 | } |
843 | 846 | ||
844 | static struct pci_device_id cafe_nand_tbl[] = { | 847 | static struct pci_device_id cafe_nand_tbl[] = { |
845 | { 0x11ab, 0x4100, PCI_ANY_ID, PCI_ANY_ID }, | 848 | { PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_88ALP01_NAND, |
849 | PCI_ANY_ID, PCI_ANY_ID }, | ||
846 | { } | 850 | { } |
847 | }; | 851 | }; |
848 | 852 | ||
diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c index fc8529bedfdf..fa129c09bca8 100644 --- a/drivers/mtd/nand/cmx270_nand.c +++ b/drivers/mtd/nand/cmx270_nand.c | |||
@@ -26,8 +26,8 @@ | |||
26 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
27 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
28 | 28 | ||
29 | #include <asm/arch/hardware.h> | 29 | #include <mach/hardware.h> |
30 | #include <asm/arch/pxa-regs.h> | 30 | #include <mach/pxa-regs.h> |
31 | 31 | ||
32 | #define GPIO_NAND_CS (11) | 32 | #define GPIO_NAND_CS (11) |
33 | #define GPIO_NAND_RB (89) | 33 | #define GPIO_NAND_RB (89) |
@@ -156,7 +156,7 @@ static int cmx270_init(void) | |||
156 | int mtd_parts_nb = 0; | 156 | int mtd_parts_nb = 0; |
157 | int ret; | 157 | int ret; |
158 | 158 | ||
159 | if (!machine_is_armcore()) | 159 | if (!(machine_is_armcore() && cpu_is_pxa27x())) |
160 | return -ENODEV; | 160 | return -ENODEV; |
161 | 161 | ||
162 | ret = gpio_request(GPIO_NAND_CS, "NAND CS"); | 162 | ret = gpio_request(GPIO_NAND_CS, "NAND CS"); |
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c index 765d4f0f7c86..e4226e02d63e 100644 --- a/drivers/mtd/nand/diskonchip.c +++ b/drivers/mtd/nand/diskonchip.c | |||
@@ -1125,9 +1125,9 @@ static inline int __init nftl_partscan(struct mtd_info *mtd, struct mtd_partitio | |||
1125 | goto out; | 1125 | goto out; |
1126 | mh = (struct NFTLMediaHeader *)buf; | 1126 | mh = (struct NFTLMediaHeader *)buf; |
1127 | 1127 | ||
1128 | mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits); | 1128 | le16_to_cpus(&mh->NumEraseUnits); |
1129 | mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN); | 1129 | le16_to_cpus(&mh->FirstPhysicalEUN); |
1130 | mh->FormattedSize = le32_to_cpu(mh->FormattedSize); | 1130 | le32_to_cpus(&mh->FormattedSize); |
1131 | 1131 | ||
1132 | printk(KERN_INFO " DataOrgID = %s\n" | 1132 | printk(KERN_INFO " DataOrgID = %s\n" |
1133 | " NumEraseUnits = %d\n" | 1133 | " NumEraseUnits = %d\n" |
@@ -1235,12 +1235,12 @@ static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partiti | |||
1235 | doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift); | 1235 | doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift); |
1236 | mh = (struct INFTLMediaHeader *)buf; | 1236 | mh = (struct INFTLMediaHeader *)buf; |
1237 | 1237 | ||
1238 | mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks); | 1238 | le32_to_cpus(&mh->NoOfBootImageBlocks); |
1239 | mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions); | 1239 | le32_to_cpus(&mh->NoOfBinaryPartitions); |
1240 | mh->NoOfBDTLPartitions = le32_to_cpu(mh->NoOfBDTLPartitions); | 1240 | le32_to_cpus(&mh->NoOfBDTLPartitions); |
1241 | mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits); | 1241 | le32_to_cpus(&mh->BlockMultiplierBits); |
1242 | mh->FormatFlags = le32_to_cpu(mh->FormatFlags); | 1242 | le32_to_cpus(&mh->FormatFlags); |
1243 | mh->PercentUsed = le32_to_cpu(mh->PercentUsed); | 1243 | le32_to_cpus(&mh->PercentUsed); |
1244 | 1244 | ||
1245 | printk(KERN_INFO " bootRecordID = %s\n" | 1245 | printk(KERN_INFO " bootRecordID = %s\n" |
1246 | " NoOfBootImageBlocks = %d\n" | 1246 | " NoOfBootImageBlocks = %d\n" |
@@ -1277,12 +1277,12 @@ static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partiti | |||
1277 | /* Scan the partitions */ | 1277 | /* Scan the partitions */ |
1278 | for (i = 0; (i < 4); i++) { | 1278 | for (i = 0; (i < 4); i++) { |
1279 | ip = &(mh->Partitions[i]); | 1279 | ip = &(mh->Partitions[i]); |
1280 | ip->virtualUnits = le32_to_cpu(ip->virtualUnits); | 1280 | le32_to_cpus(&ip->virtualUnits); |
1281 | ip->firstUnit = le32_to_cpu(ip->firstUnit); | 1281 | le32_to_cpus(&ip->firstUnit); |
1282 | ip->lastUnit = le32_to_cpu(ip->lastUnit); | 1282 | le32_to_cpus(&ip->lastUnit); |
1283 | ip->flags = le32_to_cpu(ip->flags); | 1283 | le32_to_cpus(&ip->flags); |
1284 | ip->spareUnits = le32_to_cpu(ip->spareUnits); | 1284 | le32_to_cpus(&ip->spareUnits); |
1285 | ip->Reserved0 = le32_to_cpu(ip->Reserved0); | 1285 | le32_to_cpus(&ip->Reserved0); |
1286 | 1286 | ||
1287 | printk(KERN_INFO " PARTITION[%d] ->\n" | 1287 | printk(KERN_INFO " PARTITION[%d] ->\n" |
1288 | " virtualUnits = %d\n" | 1288 | " virtualUnits = %d\n" |
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c index 387e4352903e..86366bfba9f8 100644 --- a/drivers/mtd/nand/edb7312.c +++ b/drivers/mtd/nand/edb7312.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/mtd/nand.h> | 23 | #include <linux/mtd/nand.h> |
24 | #include <linux/mtd/partitions.h> | 24 | #include <linux/mtd/partitions.h> |
25 | #include <asm/io.h> | 25 | #include <asm/io.h> |
26 | #include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */ | 26 | #include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */ |
27 | #include <asm/sizes.h> | 27 | #include <asm/sizes.h> |
28 | #include <asm/hardware/clps7111.h> | 28 | #include <asm/hardware/clps7111.h> |
29 | 29 | ||
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 9dff51351f4f..98ad3cefcaf4 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c | |||
@@ -887,7 +887,7 @@ static int __devinit fsl_elbc_chip_probe(struct fsl_elbc_ctrl *ctrl, | |||
887 | goto err; | 887 | goto err; |
888 | } | 888 | } |
889 | 889 | ||
890 | priv->mtd.name = kasprintf(GFP_KERNEL, "%x.flash", res.start); | 890 | priv->mtd.name = kasprintf(GFP_KERNEL, "%x.flash", (unsigned)res.start); |
891 | if (!priv->mtd.name) { | 891 | if (!priv->mtd.name) { |
892 | ret = -ENOMEM; | 892 | ret = -ENOMEM; |
893 | goto err; | 893 | goto err; |
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c index 9e59de501c2e..f8ce79b446ed 100644 --- a/drivers/mtd/nand/h1910.c +++ b/drivers/mtd/nand/h1910.c | |||
@@ -24,10 +24,10 @@ | |||
24 | #include <linux/mtd/nand.h> | 24 | #include <linux/mtd/nand.h> |
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <asm/io.h> | 26 | #include <asm/io.h> |
27 | #include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */ | 27 | #include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */ |
28 | #include <asm/sizes.h> | 28 | #include <asm/sizes.h> |
29 | #include <asm/arch/h1900-gpio.h> | 29 | #include <mach/h1900-gpio.h> |
30 | #include <asm/arch/ipaq.h> | 30 | #include <mach/ipaq.h> |
31 | 31 | ||
32 | /* | 32 | /* |
33 | * MTD structure for EDB7312 board | 33 | * MTD structure for EDB7312 board |
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c index ecd70e2504f6..556e8131ecdc 100644 --- a/drivers/mtd/nand/nandsim.c +++ b/drivers/mtd/nand/nandsim.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/module.h> | 28 | #include <linux/module.h> |
29 | #include <linux/moduleparam.h> | 29 | #include <linux/moduleparam.h> |
30 | #include <linux/vmalloc.h> | 30 | #include <linux/vmalloc.h> |
31 | #include <asm/div64.h> | ||
31 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
32 | #include <linux/errno.h> | 33 | #include <linux/errno.h> |
33 | #include <linux/string.h> | 34 | #include <linux/string.h> |
@@ -207,13 +208,16 @@ MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the I | |||
207 | #define STATE_CMD_READID 0x0000000A /* read ID */ | 208 | #define STATE_CMD_READID 0x0000000A /* read ID */ |
208 | #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ | 209 | #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ |
209 | #define STATE_CMD_RESET 0x0000000C /* reset */ | 210 | #define STATE_CMD_RESET 0x0000000C /* reset */ |
211 | #define STATE_CMD_RNDOUT 0x0000000D /* random output command */ | ||
212 | #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */ | ||
210 | #define STATE_CMD_MASK 0x0000000F /* command states mask */ | 213 | #define STATE_CMD_MASK 0x0000000F /* command states mask */ |
211 | 214 | ||
212 | /* After an address is input, the simulator goes to one of these states */ | 215 | /* After an address is input, the simulator goes to one of these states */ |
213 | #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */ | 216 | #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */ |
214 | #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */ | 217 | #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */ |
215 | #define STATE_ADDR_ZERO 0x00000030 /* one byte zero address was accepted */ | 218 | #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */ |
216 | #define STATE_ADDR_MASK 0x00000030 /* address states mask */ | 219 | #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ |
220 | #define STATE_ADDR_MASK 0x00000070 /* address states mask */ | ||
217 | 221 | ||
218 | /* Durind data input/output the simulator is in these states */ | 222 | /* Durind data input/output the simulator is in these states */ |
219 | #define STATE_DATAIN 0x00000100 /* waiting for data input */ | 223 | #define STATE_DATAIN 0x00000100 /* waiting for data input */ |
@@ -240,7 +244,7 @@ MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the I | |||
240 | #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */ | 244 | #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */ |
241 | #define ACTION_MASK 0x00700000 /* action mask */ | 245 | #define ACTION_MASK 0x00700000 /* action mask */ |
242 | 246 | ||
243 | #define NS_OPER_NUM 12 /* Number of operations supported by the simulator */ | 247 | #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */ |
244 | #define NS_OPER_STATES 6 /* Maximum number of states in operation */ | 248 | #define NS_OPER_STATES 6 /* Maximum number of states in operation */ |
245 | 249 | ||
246 | #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ | 250 | #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ |
@@ -373,7 +377,10 @@ static struct nandsim_operations { | |||
373 | {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, | 377 | {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, |
374 | /* Large page devices read page */ | 378 | /* Large page devices read page */ |
375 | {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY, | 379 | {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY, |
376 | STATE_DATAOUT, STATE_READY}} | 380 | STATE_DATAOUT, STATE_READY}}, |
381 | /* Large page devices random page read */ | ||
382 | {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY, | ||
383 | STATE_DATAOUT, STATE_READY}}, | ||
377 | }; | 384 | }; |
378 | 385 | ||
379 | struct weak_block { | 386 | struct weak_block { |
@@ -579,7 +586,8 @@ static int init_nandsim(struct mtd_info *mtd) | |||
579 | if (ns->busw == 16) | 586 | if (ns->busw == 16) |
580 | NS_WARN("16-bit flashes support wasn't tested\n"); | 587 | NS_WARN("16-bit flashes support wasn't tested\n"); |
581 | 588 | ||
582 | printk("flash size: %llu MiB\n", ns->geom.totsz >> 20); | 589 | printk("flash size: %llu MiB\n", |
590 | (unsigned long long)ns->geom.totsz >> 20); | ||
583 | printk("page size: %u bytes\n", ns->geom.pgsz); | 591 | printk("page size: %u bytes\n", ns->geom.pgsz); |
584 | printk("OOB area size: %u bytes\n", ns->geom.oobsz); | 592 | printk("OOB area size: %u bytes\n", ns->geom.oobsz); |
585 | printk("sector size: %u KiB\n", ns->geom.secsz >> 10); | 593 | printk("sector size: %u KiB\n", ns->geom.secsz >> 10); |
@@ -588,8 +596,9 @@ static int init_nandsim(struct mtd_info *mtd) | |||
588 | printk("bus width: %u\n", ns->busw); | 596 | printk("bus width: %u\n", ns->busw); |
589 | printk("bits in sector size: %u\n", ns->geom.secshift); | 597 | printk("bits in sector size: %u\n", ns->geom.secshift); |
590 | printk("bits in page size: %u\n", ns->geom.pgshift); | 598 | printk("bits in page size: %u\n", ns->geom.pgshift); |
591 | printk("bits in OOB size: %u\n", ns->geom.oobshift); | 599 | printk("bits in OOB size: %u\n", ns->geom.oobshift); |
592 | printk("flash size with OOB: %llu KiB\n", ns->geom.totszoob >> 10); | 600 | printk("flash size with OOB: %llu KiB\n", |
601 | (unsigned long long)ns->geom.totszoob >> 10); | ||
593 | printk("page address bytes: %u\n", ns->geom.pgaddrbytes); | 602 | printk("page address bytes: %u\n", ns->geom.pgaddrbytes); |
594 | printk("sector address bytes: %u\n", ns->geom.secaddrbytes); | 603 | printk("sector address bytes: %u\n", ns->geom.secaddrbytes); |
595 | printk("options: %#x\n", ns->options); | 604 | printk("options: %#x\n", ns->options); |
@@ -937,12 +946,18 @@ static char *get_state_name(uint32_t state) | |||
937 | return "STATE_CMD_ERASE2"; | 946 | return "STATE_CMD_ERASE2"; |
938 | case STATE_CMD_RESET: | 947 | case STATE_CMD_RESET: |
939 | return "STATE_CMD_RESET"; | 948 | return "STATE_CMD_RESET"; |
949 | case STATE_CMD_RNDOUT: | ||
950 | return "STATE_CMD_RNDOUT"; | ||
951 | case STATE_CMD_RNDOUTSTART: | ||
952 | return "STATE_CMD_RNDOUTSTART"; | ||
940 | case STATE_ADDR_PAGE: | 953 | case STATE_ADDR_PAGE: |
941 | return "STATE_ADDR_PAGE"; | 954 | return "STATE_ADDR_PAGE"; |
942 | case STATE_ADDR_SEC: | 955 | case STATE_ADDR_SEC: |
943 | return "STATE_ADDR_SEC"; | 956 | return "STATE_ADDR_SEC"; |
944 | case STATE_ADDR_ZERO: | 957 | case STATE_ADDR_ZERO: |
945 | return "STATE_ADDR_ZERO"; | 958 | return "STATE_ADDR_ZERO"; |
959 | case STATE_ADDR_COLUMN: | ||
960 | return "STATE_ADDR_COLUMN"; | ||
946 | case STATE_DATAIN: | 961 | case STATE_DATAIN: |
947 | return "STATE_DATAIN"; | 962 | return "STATE_DATAIN"; |
948 | case STATE_DATAOUT: | 963 | case STATE_DATAOUT: |
@@ -973,6 +988,7 @@ static int check_command(int cmd) | |||
973 | switch (cmd) { | 988 | switch (cmd) { |
974 | 989 | ||
975 | case NAND_CMD_READ0: | 990 | case NAND_CMD_READ0: |
991 | case NAND_CMD_READ1: | ||
976 | case NAND_CMD_READSTART: | 992 | case NAND_CMD_READSTART: |
977 | case NAND_CMD_PAGEPROG: | 993 | case NAND_CMD_PAGEPROG: |
978 | case NAND_CMD_READOOB: | 994 | case NAND_CMD_READOOB: |
@@ -982,7 +998,8 @@ static int check_command(int cmd) | |||
982 | case NAND_CMD_READID: | 998 | case NAND_CMD_READID: |
983 | case NAND_CMD_ERASE2: | 999 | case NAND_CMD_ERASE2: |
984 | case NAND_CMD_RESET: | 1000 | case NAND_CMD_RESET: |
985 | case NAND_CMD_READ1: | 1001 | case NAND_CMD_RNDOUT: |
1002 | case NAND_CMD_RNDOUTSTART: | ||
986 | return 0; | 1003 | return 0; |
987 | 1004 | ||
988 | case NAND_CMD_STATUS_MULTI: | 1005 | case NAND_CMD_STATUS_MULTI: |
@@ -1021,6 +1038,10 @@ static uint32_t get_state_by_command(unsigned command) | |||
1021 | return STATE_CMD_ERASE2; | 1038 | return STATE_CMD_ERASE2; |
1022 | case NAND_CMD_RESET: | 1039 | case NAND_CMD_RESET: |
1023 | return STATE_CMD_RESET; | 1040 | return STATE_CMD_RESET; |
1041 | case NAND_CMD_RNDOUT: | ||
1042 | return STATE_CMD_RNDOUT; | ||
1043 | case NAND_CMD_RNDOUTSTART: | ||
1044 | return STATE_CMD_RNDOUTSTART; | ||
1024 | } | 1045 | } |
1025 | 1046 | ||
1026 | NS_ERR("get_state_by_command: unknown command, BUG\n"); | 1047 | NS_ERR("get_state_by_command: unknown command, BUG\n"); |
@@ -1582,6 +1603,11 @@ static void switch_state(struct nandsim *ns) | |||
1582 | ns->regs.num = 1; | 1603 | ns->regs.num = 1; |
1583 | break; | 1604 | break; |
1584 | 1605 | ||
1606 | case STATE_ADDR_COLUMN: | ||
1607 | /* Column address is always 2 bytes */ | ||
1608 | ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes; | ||
1609 | break; | ||
1610 | |||
1585 | default: | 1611 | default: |
1586 | NS_ERR("switch_state: BUG! unknown address state\n"); | 1612 | NS_ERR("switch_state: BUG! unknown address state\n"); |
1587 | } | 1613 | } |
@@ -1693,15 +1719,21 @@ static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte) | |||
1693 | return; | 1719 | return; |
1694 | } | 1720 | } |
1695 | 1721 | ||
1696 | /* | 1722 | /* Check that the command byte is correct */ |
1697 | * Chip might still be in STATE_DATAOUT | 1723 | if (check_command(byte)) { |
1698 | * (if OPT_AUTOINCR feature is supported), STATE_DATAOUT_STATUS or | 1724 | NS_ERR("write_byte: unknown command %#x\n", (uint)byte); |
1699 | * STATE_DATAOUT_STATUS_M state. If so, switch state. | 1725 | return; |
1700 | */ | 1726 | } |
1727 | |||
1701 | if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS | 1728 | if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS |
1702 | || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M | 1729 | || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M |
1703 | || ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT)) | 1730 | || NS_STATE(ns->state) == STATE_DATAOUT) { |
1731 | int row = ns->regs.row; | ||
1732 | |||
1704 | switch_state(ns); | 1733 | switch_state(ns); |
1734 | if (byte == NAND_CMD_RNDOUT) | ||
1735 | ns->regs.row = row; | ||
1736 | } | ||
1705 | 1737 | ||
1706 | /* Check if chip is expecting command */ | 1738 | /* Check if chip is expecting command */ |
1707 | if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) { | 1739 | if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) { |
@@ -1715,12 +1747,6 @@ static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte) | |||
1715 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); | 1747 | switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); |
1716 | } | 1748 | } |
1717 | 1749 | ||
1718 | /* Check that the command byte is correct */ | ||
1719 | if (check_command(byte)) { | ||
1720 | NS_ERR("write_byte: unknown command %#x\n", (uint)byte); | ||
1721 | return; | ||
1722 | } | ||
1723 | |||
1724 | NS_DBG("command byte corresponding to %s state accepted\n", | 1750 | NS_DBG("command byte corresponding to %s state accepted\n", |
1725 | get_state_name(get_state_by_command(byte))); | 1751 | get_state_name(get_state_by_command(byte))); |
1726 | ns->regs.command = byte; | 1752 | ns->regs.command = byte; |
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index ee2ac3948cd8..917cf8d3ae95 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c | |||
@@ -18,8 +18,8 @@ | |||
18 | #include <linux/mtd/partitions.h> | 18 | #include <linux/mtd/partitions.h> |
19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
20 | #include <asm/sizes.h> | 20 | #include <asm/sizes.h> |
21 | #include <asm/arch/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <asm/plat-orion/orion_nand.h> | 22 | #include <plat/orion_nand.h> |
23 | 23 | ||
24 | #ifdef CONFIG_MTD_CMDLINE_PARTS | 24 | #ifdef CONFIG_MTD_CMDLINE_PARTS |
25 | static const char *part_probes[] = { "cmdlinepart", NULL }; | 25 | static const char *part_probes[] = { "cmdlinepart", NULL }; |
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index fe2bc7e42119..a64ad15b8fdd 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c | |||
@@ -22,8 +22,8 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <asm/dma.h> | 23 | #include <asm/dma.h> |
24 | 24 | ||
25 | #include <asm/arch/pxa-regs.h> | 25 | #include <mach/pxa-regs.h> |
26 | #include <asm/arch/pxa3xx_nand.h> | 26 | #include <mach/pxa3xx_nand.h> |
27 | 27 | ||
28 | #define CHIP_DELAY_TIMEOUT (2 * HZ/10) | 28 | #define CHIP_DELAY_TIMEOUT (2 * HZ/10) |
29 | 29 | ||
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c index 6dba2fb66ae5..30a518e211bd 100644 --- a/drivers/mtd/nand/sharpsl.c +++ b/drivers/mtd/nand/sharpsl.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/mtd/partitions.h> | 21 | #include <linux/mtd/partitions.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | #include <asm/hardware.h> | 24 | #include <mach/hardware.h> |
25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
26 | 26 | ||
27 | static void __iomem *sharpsl_io_base; | 27 | static void __iomem *sharpsl_io_base; |
diff --git a/drivers/mtd/nand/tmio_nand.c b/drivers/mtd/nand/tmio_nand.c new file mode 100644 index 000000000000..edb1e322113d --- /dev/null +++ b/drivers/mtd/nand/tmio_nand.c | |||
@@ -0,0 +1,556 @@ | |||
1 | /* | ||
2 | * Toshiba TMIO NAND flash controller driver | ||
3 | * | ||
4 | * Slightly murky pre-git history of the driver: | ||
5 | * | ||
6 | * Copyright (c) Ian Molton 2004, 2005, 2008 | ||
7 | * Original work, independant of sharps code. Included hardware ECC support. | ||
8 | * Hard ECC did not work for writes in the early revisions. | ||
9 | * Copyright (c) Dirk Opfer 2005. | ||
10 | * Modifications developed from sharps code but | ||
11 | * NOT containing any, ported onto Ians base. | ||
12 | * Copyright (c) Chris Humbert 2005 | ||
13 | * Copyright (c) Dmitry Baryshkov 2008 | ||
14 | * Minor fixes | ||
15 | * | ||
16 | * Parts copyright Sebastian Carlier | ||
17 | * | ||
18 | * This file is licensed under | ||
19 | * the terms of the GNU General Public License version 2. This program | ||
20 | * is licensed "as is" without any warranty of any kind, whether express | ||
21 | * or implied. | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/module.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | #include <linux/mfd/core.h> | ||
30 | #include <linux/mfd/tmio.h> | ||
31 | #include <linux/delay.h> | ||
32 | #include <linux/io.h> | ||
33 | #include <linux/irq.h> | ||
34 | #include <linux/interrupt.h> | ||
35 | #include <linux/ioport.h> | ||
36 | #include <linux/mtd/mtd.h> | ||
37 | #include <linux/mtd/nand.h> | ||
38 | #include <linux/mtd/nand_ecc.h> | ||
39 | #include <linux/mtd/partitions.h> | ||
40 | |||
41 | /*--------------------------------------------------------------------------*/ | ||
42 | |||
43 | /* | ||
44 | * NAND Flash Host Controller Configuration Register | ||
45 | */ | ||
46 | #define CCR_COMMAND 0x04 /* w Command */ | ||
47 | #define CCR_BASE 0x10 /* l NAND Flash Control Reg Base Addr */ | ||
48 | #define CCR_INTP 0x3d /* b Interrupt Pin */ | ||
49 | #define CCR_INTE 0x48 /* b Interrupt Enable */ | ||
50 | #define CCR_EC 0x4a /* b Event Control */ | ||
51 | #define CCR_ICC 0x4c /* b Internal Clock Control */ | ||
52 | #define CCR_ECCC 0x5b /* b ECC Control */ | ||
53 | #define CCR_NFTC 0x60 /* b NAND Flash Transaction Control */ | ||
54 | #define CCR_NFM 0x61 /* b NAND Flash Monitor */ | ||
55 | #define CCR_NFPSC 0x62 /* b NAND Flash Power Supply Control */ | ||
56 | #define CCR_NFDC 0x63 /* b NAND Flash Detect Control */ | ||
57 | |||
58 | /* | ||
59 | * NAND Flash Control Register | ||
60 | */ | ||
61 | #define FCR_DATA 0x00 /* bwl Data Register */ | ||
62 | #define FCR_MODE 0x04 /* b Mode Register */ | ||
63 | #define FCR_STATUS 0x05 /* b Status Register */ | ||
64 | #define FCR_ISR 0x06 /* b Interrupt Status Register */ | ||
65 | #define FCR_IMR 0x07 /* b Interrupt Mask Register */ | ||
66 | |||
67 | /* FCR_MODE Register Command List */ | ||
68 | #define FCR_MODE_DATA 0x94 /* Data Data_Mode */ | ||
69 | #define FCR_MODE_COMMAND 0x95 /* Data Command_Mode */ | ||
70 | #define FCR_MODE_ADDRESS 0x96 /* Data Address_Mode */ | ||
71 | |||
72 | #define FCR_MODE_HWECC_CALC 0xB4 /* HW-ECC Data */ | ||
73 | #define FCR_MODE_HWECC_RESULT 0xD4 /* HW-ECC Calc result Read_Mode */ | ||
74 | #define FCR_MODE_HWECC_RESET 0xF4 /* HW-ECC Reset */ | ||
75 | |||
76 | #define FCR_MODE_POWER_ON 0x0C /* Power Supply ON to SSFDC card */ | ||
77 | #define FCR_MODE_POWER_OFF 0x08 /* Power Supply OFF to SSFDC card */ | ||
78 | |||
79 | #define FCR_MODE_LED_OFF 0x00 /* LED OFF */ | ||
80 | #define FCR_MODE_LED_ON 0x04 /* LED ON */ | ||
81 | |||
82 | #define FCR_MODE_EJECT_ON 0x68 /* Ejection events active */ | ||
83 | #define FCR_MODE_EJECT_OFF 0x08 /* Ejection events ignored */ | ||
84 | |||
85 | #define FCR_MODE_LOCK 0x6C /* Lock_Mode. Eject Switch Invalid */ | ||
86 | #define FCR_MODE_UNLOCK 0x0C /* UnLock_Mode. Eject Switch is valid */ | ||
87 | |||
88 | #define FCR_MODE_CONTROLLER_ID 0x40 /* Controller ID Read */ | ||
89 | #define FCR_MODE_STANDBY 0x00 /* SSFDC card Changes Standby State */ | ||
90 | |||
91 | #define FCR_MODE_WE 0x80 | ||
92 | #define FCR_MODE_ECC1 0x40 | ||
93 | #define FCR_MODE_ECC0 0x20 | ||
94 | #define FCR_MODE_CE 0x10 | ||
95 | #define FCR_MODE_PCNT1 0x08 | ||
96 | #define FCR_MODE_PCNT0 0x04 | ||
97 | #define FCR_MODE_ALE 0x02 | ||
98 | #define FCR_MODE_CLE 0x01 | ||
99 | |||
100 | #define FCR_STATUS_BUSY 0x80 | ||
101 | |||
102 | /*--------------------------------------------------------------------------*/ | ||
103 | |||
104 | struct tmio_nand { | ||
105 | struct mtd_info mtd; | ||
106 | struct nand_chip chip; | ||
107 | |||
108 | struct platform_device *dev; | ||
109 | |||
110 | void __iomem *ccr; | ||
111 | void __iomem *fcr; | ||
112 | unsigned long fcr_base; | ||
113 | |||
114 | unsigned int irq; | ||
115 | |||
116 | /* for tmio_nand_read_byte */ | ||
117 | u8 read; | ||
118 | unsigned read_good:1; | ||
119 | }; | ||
120 | |||
121 | #define mtd_to_tmio(m) container_of(m, struct tmio_nand, mtd) | ||
122 | |||
123 | #ifdef CONFIG_MTD_CMDLINE_PARTS | ||
124 | static const char *part_probes[] = { "cmdlinepart", NULL }; | ||
125 | #endif | ||
126 | |||
127 | /*--------------------------------------------------------------------------*/ | ||
128 | |||
129 | static void tmio_nand_hwcontrol(struct mtd_info *mtd, int cmd, | ||
130 | unsigned int ctrl) | ||
131 | { | ||
132 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
133 | struct nand_chip *chip = mtd->priv; | ||
134 | |||
135 | if (ctrl & NAND_CTRL_CHANGE) { | ||
136 | u8 mode; | ||
137 | |||
138 | if (ctrl & NAND_NCE) { | ||
139 | mode = FCR_MODE_DATA; | ||
140 | |||
141 | if (ctrl & NAND_CLE) | ||
142 | mode |= FCR_MODE_CLE; | ||
143 | else | ||
144 | mode &= ~FCR_MODE_CLE; | ||
145 | |||
146 | if (ctrl & NAND_ALE) | ||
147 | mode |= FCR_MODE_ALE; | ||
148 | else | ||
149 | mode &= ~FCR_MODE_ALE; | ||
150 | } else { | ||
151 | mode = FCR_MODE_STANDBY; | ||
152 | } | ||
153 | |||
154 | tmio_iowrite8(mode, tmio->fcr + FCR_MODE); | ||
155 | tmio->read_good = 0; | ||
156 | } | ||
157 | |||
158 | if (cmd != NAND_CMD_NONE) | ||
159 | tmio_iowrite8(cmd, chip->IO_ADDR_W); | ||
160 | } | ||
161 | |||
162 | static int tmio_nand_dev_ready(struct mtd_info *mtd) | ||
163 | { | ||
164 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
165 | |||
166 | return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY); | ||
167 | } | ||
168 | |||
169 | static irqreturn_t tmio_irq(int irq, void *__tmio) | ||
170 | { | ||
171 | struct tmio_nand *tmio = __tmio; | ||
172 | struct nand_chip *nand_chip = &tmio->chip; | ||
173 | |||
174 | /* disable RDYREQ interrupt */ | ||
175 | tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); | ||
176 | |||
177 | if (unlikely(!waitqueue_active(&nand_chip->controller->wq))) | ||
178 | dev_warn(&tmio->dev->dev, "spurious interrupt\n"); | ||
179 | |||
180 | wake_up(&nand_chip->controller->wq); | ||
181 | return IRQ_HANDLED; | ||
182 | } | ||
183 | |||
184 | /* | ||
185 | *The TMIO core has a RDYREQ interrupt on the posedge of #SMRB. | ||
186 | *This interrupt is normally disabled, but for long operations like | ||
187 | *erase and write, we enable it to wake us up. The irq handler | ||
188 | *disables the interrupt. | ||
189 | */ | ||
190 | static int | ||
191 | tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip) | ||
192 | { | ||
193 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
194 | long timeout; | ||
195 | |||
196 | /* enable RDYREQ interrupt */ | ||
197 | tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR); | ||
198 | tmio_iowrite8(0x81, tmio->fcr + FCR_IMR); | ||
199 | |||
200 | timeout = wait_event_timeout(nand_chip->controller->wq, | ||
201 | tmio_nand_dev_ready(mtd), | ||
202 | msecs_to_jiffies(nand_chip->state == FL_ERASING ? 400 : 20)); | ||
203 | |||
204 | if (unlikely(!tmio_nand_dev_ready(mtd))) { | ||
205 | tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); | ||
206 | dev_warn(&tmio->dev->dev, "still busy with %s after %d ms\n", | ||
207 | nand_chip->state == FL_ERASING ? "erase" : "program", | ||
208 | nand_chip->state == FL_ERASING ? 400 : 20); | ||
209 | |||
210 | } else if (unlikely(!timeout)) { | ||
211 | tmio_iowrite8(0x00, tmio->fcr + FCR_IMR); | ||
212 | dev_warn(&tmio->dev->dev, "timeout waiting for interrupt\n"); | ||
213 | } | ||
214 | |||
215 | nand_chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); | ||
216 | return nand_chip->read_byte(mtd); | ||
217 | } | ||
218 | |||
219 | /* | ||
220 | *The TMIO controller combines two 8-bit data bytes into one 16-bit | ||
221 | *word. This function separates them so nand_base.c works as expected, | ||
222 | *especially its NAND_CMD_READID routines. | ||
223 | * | ||
224 | *To prevent stale data from being read, tmio_nand_hwcontrol() clears | ||
225 | *tmio->read_good. | ||
226 | */ | ||
227 | static u_char tmio_nand_read_byte(struct mtd_info *mtd) | ||
228 | { | ||
229 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
230 | unsigned int data; | ||
231 | |||
232 | if (tmio->read_good--) | ||
233 | return tmio->read; | ||
234 | |||
235 | data = tmio_ioread16(tmio->fcr + FCR_DATA); | ||
236 | tmio->read = data >> 8; | ||
237 | return data; | ||
238 | } | ||
239 | |||
240 | /* | ||
241 | *The TMIO controller converts an 8-bit NAND interface to a 16-bit | ||
242 | *bus interface, so all data reads and writes must be 16-bit wide. | ||
243 | *Thus, we implement 16-bit versions of the read, write, and verify | ||
244 | *buffer functions. | ||
245 | */ | ||
246 | static void | ||
247 | tmio_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) | ||
248 | { | ||
249 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
250 | |||
251 | tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1); | ||
252 | } | ||
253 | |||
254 | static void tmio_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) | ||
255 | { | ||
256 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
257 | |||
258 | tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1); | ||
259 | } | ||
260 | |||
261 | static int | ||
262 | tmio_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) | ||
263 | { | ||
264 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
265 | u16 *p = (u16 *) buf; | ||
266 | |||
267 | for (len >>= 1; len; len--) | ||
268 | if (*(p++) != tmio_ioread16(tmio->fcr + FCR_DATA)) | ||
269 | return -EFAULT; | ||
270 | return 0; | ||
271 | } | ||
272 | |||
273 | static void tmio_nand_enable_hwecc(struct mtd_info *mtd, int mode) | ||
274 | { | ||
275 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
276 | |||
277 | tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE); | ||
278 | tmio_ioread8(tmio->fcr + FCR_DATA); /* dummy read */ | ||
279 | tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE); | ||
280 | } | ||
281 | |||
282 | static int tmio_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, | ||
283 | u_char *ecc_code) | ||
284 | { | ||
285 | struct tmio_nand *tmio = mtd_to_tmio(mtd); | ||
286 | unsigned int ecc; | ||
287 | |||
288 | tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE); | ||
289 | |||
290 | ecc = tmio_ioread16(tmio->fcr + FCR_DATA); | ||
291 | ecc_code[1] = ecc; /* 000-255 LP7-0 */ | ||
292 | ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */ | ||
293 | ecc = tmio_ioread16(tmio->fcr + FCR_DATA); | ||
294 | ecc_code[2] = ecc; /* 000-255 CP5-0,11b */ | ||
295 | ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */ | ||
296 | ecc = tmio_ioread16(tmio->fcr + FCR_DATA); | ||
297 | ecc_code[3] = ecc; /* 256-511 LP15-8 */ | ||
298 | ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */ | ||
299 | |||
300 | tmio_iowrite8(FCR_MODE_DATA, tmio->fcr + FCR_MODE); | ||
301 | return 0; | ||
302 | } | ||
303 | |||
304 | static int tmio_hw_init(struct platform_device *dev, struct tmio_nand *tmio) | ||
305 | { | ||
306 | struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; | ||
307 | int ret; | ||
308 | |||
309 | if (cell->enable) { | ||
310 | ret = cell->enable(dev); | ||
311 | if (ret) | ||
312 | return ret; | ||
313 | } | ||
314 | |||
315 | /* (4Ch) CLKRUN Enable 1st spcrunc */ | ||
316 | tmio_iowrite8(0x81, tmio->ccr + CCR_ICC); | ||
317 | |||
318 | /* (10h)BaseAddress 0x1000 spba.spba2 */ | ||
319 | tmio_iowrite16(tmio->fcr_base, tmio->ccr + CCR_BASE); | ||
320 | tmio_iowrite16(tmio->fcr_base >> 16, tmio->ccr + CCR_BASE + 2); | ||
321 | |||
322 | /* (04h)Command Register I/O spcmd */ | ||
323 | tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND); | ||
324 | |||
325 | /* (62h) Power Supply Control ssmpwc */ | ||
326 | /* HardPowerOFF - SuspendOFF - PowerSupplyWait_4MS */ | ||
327 | tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC); | ||
328 | |||
329 | /* (63h) Detect Control ssmdtc */ | ||
330 | tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC); | ||
331 | |||
332 | /* Interrupt status register clear sintst */ | ||
333 | tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR); | ||
334 | |||
335 | /* After power supply, Media are reset smode */ | ||
336 | tmio_iowrite8(FCR_MODE_POWER_ON, tmio->fcr + FCR_MODE); | ||
337 | tmio_iowrite8(FCR_MODE_COMMAND, tmio->fcr + FCR_MODE); | ||
338 | tmio_iowrite8(NAND_CMD_RESET, tmio->fcr + FCR_DATA); | ||
339 | |||
340 | /* Standby Mode smode */ | ||
341 | tmio_iowrite8(FCR_MODE_STANDBY, tmio->fcr + FCR_MODE); | ||
342 | |||
343 | mdelay(5); | ||
344 | |||
345 | return 0; | ||
346 | } | ||
347 | |||
348 | static void tmio_hw_stop(struct platform_device *dev, struct tmio_nand *tmio) | ||
349 | { | ||
350 | struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; | ||
351 | |||
352 | tmio_iowrite8(FCR_MODE_POWER_OFF, tmio->fcr + FCR_MODE); | ||
353 | if (cell->disable) | ||
354 | cell->disable(dev); | ||
355 | } | ||
356 | |||
357 | static int tmio_probe(struct platform_device *dev) | ||
358 | { | ||
359 | struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; | ||
360 | struct tmio_nand_data *data = cell->driver_data; | ||
361 | struct resource *fcr = platform_get_resource(dev, | ||
362 | IORESOURCE_MEM, 0); | ||
363 | struct resource *ccr = platform_get_resource(dev, | ||
364 | IORESOURCE_MEM, 1); | ||
365 | int irq = platform_get_irq(dev, 0); | ||
366 | struct tmio_nand *tmio; | ||
367 | struct mtd_info *mtd; | ||
368 | struct nand_chip *nand_chip; | ||
369 | #ifdef CONFIG_MTD_PARTITIONS | ||
370 | struct mtd_partition *parts; | ||
371 | int nbparts = 0; | ||
372 | #endif | ||
373 | int retval; | ||
374 | |||
375 | if (data == NULL) | ||
376 | dev_warn(&dev->dev, "NULL platform data!\n"); | ||
377 | |||
378 | tmio = kzalloc(sizeof *tmio, GFP_KERNEL); | ||
379 | if (!tmio) { | ||
380 | retval = -ENOMEM; | ||
381 | goto err_kzalloc; | ||
382 | } | ||
383 | |||
384 | tmio->dev = dev; | ||
385 | |||
386 | platform_set_drvdata(dev, tmio); | ||
387 | mtd = &tmio->mtd; | ||
388 | nand_chip = &tmio->chip; | ||
389 | mtd->priv = nand_chip; | ||
390 | mtd->name = "tmio-nand"; | ||
391 | |||
392 | tmio->ccr = ioremap(ccr->start, ccr->end - ccr->start + 1); | ||
393 | if (!tmio->ccr) { | ||
394 | retval = -EIO; | ||
395 | goto err_iomap_ccr; | ||
396 | } | ||
397 | |||
398 | tmio->fcr_base = fcr->start & 0xfffff; | ||
399 | tmio->fcr = ioremap(fcr->start, fcr->end - fcr->start + 1); | ||
400 | if (!tmio->fcr) { | ||
401 | retval = -EIO; | ||
402 | goto err_iomap_fcr; | ||
403 | } | ||
404 | |||
405 | retval = tmio_hw_init(dev, tmio); | ||
406 | if (retval) | ||
407 | goto err_hwinit; | ||
408 | |||
409 | /* Set address of NAND IO lines */ | ||
410 | nand_chip->IO_ADDR_R = tmio->fcr; | ||
411 | nand_chip->IO_ADDR_W = tmio->fcr; | ||
412 | |||
413 | /* Set address of hardware control function */ | ||
414 | nand_chip->cmd_ctrl = tmio_nand_hwcontrol; | ||
415 | nand_chip->dev_ready = tmio_nand_dev_ready; | ||
416 | nand_chip->read_byte = tmio_nand_read_byte; | ||
417 | nand_chip->write_buf = tmio_nand_write_buf; | ||
418 | nand_chip->read_buf = tmio_nand_read_buf; | ||
419 | nand_chip->verify_buf = tmio_nand_verify_buf; | ||
420 | |||
421 | /* set eccmode using hardware ECC */ | ||
422 | nand_chip->ecc.mode = NAND_ECC_HW; | ||
423 | nand_chip->ecc.size = 512; | ||
424 | nand_chip->ecc.bytes = 6; | ||
425 | nand_chip->ecc.hwctl = tmio_nand_enable_hwecc; | ||
426 | nand_chip->ecc.calculate = tmio_nand_calculate_ecc; | ||
427 | nand_chip->ecc.correct = nand_correct_data; | ||
428 | |||
429 | if (data) | ||
430 | nand_chip->badblock_pattern = data->badblock_pattern; | ||
431 | |||
432 | /* 15 us command delay time */ | ||
433 | nand_chip->chip_delay = 15; | ||
434 | |||
435 | retval = request_irq(irq, &tmio_irq, | ||
436 | IRQF_DISABLED, dev->dev.bus_id, tmio); | ||
437 | if (retval) { | ||
438 | dev_err(&dev->dev, "request_irq error %d\n", retval); | ||
439 | goto err_irq; | ||
440 | } | ||
441 | |||
442 | tmio->irq = irq; | ||
443 | nand_chip->waitfunc = tmio_nand_wait; | ||
444 | |||
445 | /* Scan to find existence of the device */ | ||
446 | if (nand_scan(mtd, 1)) { | ||
447 | retval = -ENODEV; | ||
448 | goto err_scan; | ||
449 | } | ||
450 | /* Register the partitions */ | ||
451 | #ifdef CONFIG_MTD_PARTITIONS | ||
452 | #ifdef CONFIG_MTD_CMDLINE_PARTS | ||
453 | nbparts = parse_mtd_partitions(mtd, part_probes, &parts, 0); | ||
454 | #endif | ||
455 | if (nbparts <= 0 && data) { | ||
456 | parts = data->partition; | ||
457 | nbparts = data->num_partitions; | ||
458 | } | ||
459 | |||
460 | if (nbparts) | ||
461 | retval = add_mtd_partitions(mtd, parts, nbparts); | ||
462 | else | ||
463 | #endif | ||
464 | retval = add_mtd_device(mtd); | ||
465 | |||
466 | if (!retval) | ||
467 | return retval; | ||
468 | |||
469 | nand_release(mtd); | ||
470 | |||
471 | err_scan: | ||
472 | if (tmio->irq) | ||
473 | free_irq(tmio->irq, tmio); | ||
474 | err_irq: | ||
475 | tmio_hw_stop(dev, tmio); | ||
476 | err_hwinit: | ||
477 | iounmap(tmio->fcr); | ||
478 | err_iomap_fcr: | ||
479 | iounmap(tmio->ccr); | ||
480 | err_iomap_ccr: | ||
481 | kfree(tmio); | ||
482 | err_kzalloc: | ||
483 | return retval; | ||
484 | } | ||
485 | |||
486 | static int tmio_remove(struct platform_device *dev) | ||
487 | { | ||
488 | struct tmio_nand *tmio = platform_get_drvdata(dev); | ||
489 | |||
490 | nand_release(&tmio->mtd); | ||
491 | if (tmio->irq) | ||
492 | free_irq(tmio->irq, tmio); | ||
493 | tmio_hw_stop(dev, tmio); | ||
494 | iounmap(tmio->fcr); | ||
495 | iounmap(tmio->ccr); | ||
496 | kfree(tmio); | ||
497 | return 0; | ||
498 | } | ||
499 | |||
500 | #ifdef CONFIG_PM | ||
501 | static int tmio_suspend(struct platform_device *dev, pm_message_t state) | ||
502 | { | ||
503 | struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; | ||
504 | |||
505 | if (cell->suspend) | ||
506 | cell->suspend(dev); | ||
507 | |||
508 | tmio_hw_stop(dev, platform_get_drvdata(dev)); | ||
509 | return 0; | ||
510 | } | ||
511 | |||
512 | static int tmio_resume(struct platform_device *dev) | ||
513 | { | ||
514 | struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; | ||
515 | |||
516 | /* FIXME - is this required or merely another attack of the broken | ||
517 | * SHARP platform? Looks suspicious. | ||
518 | */ | ||
519 | tmio_hw_init(dev, platform_get_drvdata(dev)); | ||
520 | |||
521 | if (cell->resume) | ||
522 | cell->resume(dev); | ||
523 | |||
524 | return 0; | ||
525 | } | ||
526 | #else | ||
527 | #define tmio_suspend NULL | ||
528 | #define tmio_resume NULL | ||
529 | #endif | ||
530 | |||
531 | static struct platform_driver tmio_driver = { | ||
532 | .driver.name = "tmio-nand", | ||
533 | .driver.owner = THIS_MODULE, | ||
534 | .probe = tmio_probe, | ||
535 | .remove = tmio_remove, | ||
536 | .suspend = tmio_suspend, | ||
537 | .resume = tmio_resume, | ||
538 | }; | ||
539 | |||
540 | static int __init tmio_init(void) | ||
541 | { | ||
542 | return platform_driver_register(&tmio_driver); | ||
543 | } | ||
544 | |||
545 | static void __exit tmio_exit(void) | ||
546 | { | ||
547 | platform_driver_unregister(&tmio_driver); | ||
548 | } | ||
549 | |||
550 | module_init(tmio_init); | ||
551 | module_exit(tmio_exit); | ||
552 | |||
553 | MODULE_LICENSE("GPL v2"); | ||
554 | MODULE_AUTHOR("Ian Molton, Dirk Opfer, Chris Humbert, Dmitry Baryshkov"); | ||
555 | MODULE_DESCRIPTION("NAND flash driver on Toshiba Mobile IO controller"); | ||
556 | MODULE_ALIAS("platform:tmio-nand"); | ||
diff --git a/drivers/mtd/nand/ts7250.c b/drivers/mtd/nand/ts7250.c index 807a72752eeb..2c410a011317 100644 --- a/drivers/mtd/nand/ts7250.c +++ b/drivers/mtd/nand/ts7250.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/mtd/nand.h> | 25 | #include <linux/mtd/nand.h> |
26 | #include <linux/mtd/partitions.h> | 26 | #include <linux/mtd/partitions.h> |
27 | #include <asm/io.h> | 27 | #include <asm/io.h> |
28 | #include <asm/arch/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <asm/sizes.h> | 29 | #include <asm/sizes.h> |
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
31 | 31 | ||