diff options
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r-- | drivers/mtd/nand/sharpsl.c | 247 |
1 files changed, 122 insertions, 125 deletions
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c index 30a518e211bd..54ec7542a7b7 100644 --- a/drivers/mtd/nand/sharpsl.c +++ b/drivers/mtd/nand/sharpsl.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * drivers/mtd/nand/sharpsl.c | 2 | * drivers/mtd/nand/sharpsl.c |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Richard Purdie | 4 | * Copyright (C) 2004 Richard Purdie |
5 | * Copyright (C) 2008 Dmitry Baryshkov | ||
5 | * | 6 | * |
6 | * Based on Sharp's NAND driver sharp_sl.c | 7 | * Based on Sharp's NAND driver sharp_sl.c |
7 | * | 8 | * |
@@ -19,22 +20,31 @@ | |||
19 | #include <linux/mtd/nand.h> | 20 | #include <linux/mtd/nand.h> |
20 | #include <linux/mtd/nand_ecc.h> | 21 | #include <linux/mtd/nand_ecc.h> |
21 | #include <linux/mtd/partitions.h> | 22 | #include <linux/mtd/partitions.h> |
23 | #include <linux/mtd/sharpsl.h> | ||
22 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/platform_device.h> | ||
26 | |||
23 | #include <asm/io.h> | 27 | #include <asm/io.h> |
24 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
25 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
26 | 30 | ||
27 | static void __iomem *sharpsl_io_base; | 31 | struct sharpsl_nand { |
28 | static int sharpsl_phys_base = 0x0C000000; | 32 | struct mtd_info mtd; |
33 | struct nand_chip chip; | ||
34 | |||
35 | void __iomem *io; | ||
36 | }; | ||
37 | |||
38 | #define mtd_to_sharpsl(_mtd) container_of(_mtd, struct sharpsl_nand, mtd) | ||
29 | 39 | ||
30 | /* register offset */ | 40 | /* register offset */ |
31 | #define ECCLPLB sharpsl_io_base+0x00 /* line parity 7 - 0 bit */ | 41 | #define ECCLPLB 0x00 /* line parity 7 - 0 bit */ |
32 | #define ECCLPUB sharpsl_io_base+0x04 /* line parity 15 - 8 bit */ | 42 | #define ECCLPUB 0x04 /* line parity 15 - 8 bit */ |
33 | #define ECCCP sharpsl_io_base+0x08 /* column parity 5 - 0 bit */ | 43 | #define ECCCP 0x08 /* column parity 5 - 0 bit */ |
34 | #define ECCCNTR sharpsl_io_base+0x0C /* ECC byte counter */ | 44 | #define ECCCNTR 0x0C /* ECC byte counter */ |
35 | #define ECCCLRR sharpsl_io_base+0x10 /* cleare ECC */ | 45 | #define ECCCLRR 0x10 /* cleare ECC */ |
36 | #define FLASHIO sharpsl_io_base+0x14 /* Flash I/O */ | 46 | #define FLASHIO 0x14 /* Flash I/O */ |
37 | #define FLASHCTL sharpsl_io_base+0x18 /* Flash Control */ | 47 | #define FLASHCTL 0x18 /* Flash Control */ |
38 | 48 | ||
39 | /* Flash control bit */ | 49 | /* Flash control bit */ |
40 | #define FLRYBY (1 << 5) | 50 | #define FLRYBY (1 << 5) |
@@ -45,35 +55,6 @@ static int sharpsl_phys_base = 0x0C000000; | |||
45 | #define FLCE0 (1 << 0) | 55 | #define FLCE0 (1 << 0) |
46 | 56 | ||
47 | /* | 57 | /* |
48 | * MTD structure for SharpSL | ||
49 | */ | ||
50 | static struct mtd_info *sharpsl_mtd = NULL; | ||
51 | |||
52 | /* | ||
53 | * Define partitions for flash device | ||
54 | */ | ||
55 | #define DEFAULT_NUM_PARTITIONS 3 | ||
56 | |||
57 | static int nr_partitions; | ||
58 | static struct mtd_partition sharpsl_nand_default_partition_info[] = { | ||
59 | { | ||
60 | .name = "System Area", | ||
61 | .offset = 0, | ||
62 | .size = 7 * 1024 * 1024, | ||
63 | }, | ||
64 | { | ||
65 | .name = "Root Filesystem", | ||
66 | .offset = 7 * 1024 * 1024, | ||
67 | .size = 30 * 1024 * 1024, | ||
68 | }, | ||
69 | { | ||
70 | .name = "Home Filesystem", | ||
71 | .offset = MTDPART_OFS_APPEND, | ||
72 | .size = MTDPART_SIZ_FULL, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | /* | ||
77 | * hardware specific access to control-lines | 58 | * hardware specific access to control-lines |
78 | * ctrl: | 59 | * ctrl: |
79 | * NAND_CNE: bit 0 -> ! bit 0 & 4 | 60 | * NAND_CNE: bit 0 -> ! bit 0 & 4 |
@@ -84,6 +65,7 @@ static struct mtd_partition sharpsl_nand_default_partition_info[] = { | |||
84 | static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, | 65 | static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
85 | unsigned int ctrl) | 66 | unsigned int ctrl) |
86 | { | 67 | { |
68 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); | ||
87 | struct nand_chip *chip = mtd->priv; | 69 | struct nand_chip *chip = mtd->priv; |
88 | 70 | ||
89 | if (ctrl & NAND_CTRL_CHANGE) { | 71 | if (ctrl & NAND_CTRL_CHANGE) { |
@@ -93,103 +75,97 @@ static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, | |||
93 | 75 | ||
94 | bits ^= 0x11; | 76 | bits ^= 0x11; |
95 | 77 | ||
96 | writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL); | 78 | writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL); |
97 | } | 79 | } |
98 | 80 | ||
99 | if (cmd != NAND_CMD_NONE) | 81 | if (cmd != NAND_CMD_NONE) |
100 | writeb(cmd, chip->IO_ADDR_W); | 82 | writeb(cmd, chip->IO_ADDR_W); |
101 | } | 83 | } |
102 | 84 | ||
103 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | ||
104 | |||
105 | static struct nand_bbt_descr sharpsl_bbt = { | ||
106 | .options = 0, | ||
107 | .offs = 4, | ||
108 | .len = 2, | ||
109 | .pattern = scan_ff_pattern | ||
110 | }; | ||
111 | |||
112 | static struct nand_bbt_descr sharpsl_akita_bbt = { | ||
113 | .options = 0, | ||
114 | .offs = 4, | ||
115 | .len = 1, | ||
116 | .pattern = scan_ff_pattern | ||
117 | }; | ||
118 | |||
119 | static struct nand_ecclayout akita_oobinfo = { | ||
120 | .eccbytes = 24, | ||
121 | .eccpos = { | ||
122 | 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11, | ||
123 | 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23, | ||
124 | 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37}, | ||
125 | .oobfree = {{0x08, 0x09}} | ||
126 | }; | ||
127 | |||
128 | static int sharpsl_nand_dev_ready(struct mtd_info *mtd) | 85 | static int sharpsl_nand_dev_ready(struct mtd_info *mtd) |
129 | { | 86 | { |
130 | return !((readb(FLASHCTL) & FLRYBY) == 0); | 87 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
88 | return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0); | ||
131 | } | 89 | } |
132 | 90 | ||
133 | static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode) | 91 | static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
134 | { | 92 | { |
135 | writeb(0, ECCCLRR); | 93 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
94 | writeb(0, sharpsl->io + ECCCLRR); | ||
136 | } | 95 | } |
137 | 96 | ||
138 | static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code) | 97 | static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code) |
139 | { | 98 | { |
140 | ecc_code[0] = ~readb(ECCLPUB); | 99 | struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); |
141 | ecc_code[1] = ~readb(ECCLPLB); | 100 | ecc_code[0] = ~readb(sharpsl->io + ECCLPUB); |
142 | ecc_code[2] = (~readb(ECCCP) << 2) | 0x03; | 101 | ecc_code[1] = ~readb(sharpsl->io + ECCLPLB); |
143 | return readb(ECCCNTR) != 0; | 102 | ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03; |
103 | return readb(sharpsl->io + ECCCNTR) != 0; | ||
144 | } | 104 | } |
145 | 105 | ||
146 | #ifdef CONFIG_MTD_PARTITIONS | 106 | #ifdef CONFIG_MTD_PARTITIONS |
147 | const char *part_probes[] = { "cmdlinepart", NULL }; | 107 | static const char *part_probes[] = { "cmdlinepart", NULL }; |
148 | #endif | 108 | #endif |
149 | 109 | ||
150 | /* | 110 | /* |
151 | * Main initialization routine | 111 | * Main initialization routine |
152 | */ | 112 | */ |
153 | static int __init sharpsl_nand_init(void) | 113 | static int __devinit sharpsl_nand_probe(struct platform_device *pdev) |
154 | { | 114 | { |
155 | struct nand_chip *this; | 115 | struct nand_chip *this; |
116 | #ifdef CONFIG_MTD_PARTITIONS | ||
156 | struct mtd_partition *sharpsl_partition_info; | 117 | struct mtd_partition *sharpsl_partition_info; |
118 | int nr_partitions; | ||
119 | #endif | ||
120 | struct resource *r; | ||
157 | int err = 0; | 121 | int err = 0; |
122 | struct sharpsl_nand *sharpsl; | ||
123 | struct sharpsl_nand_platform_data *data = pdev->dev.platform_data; | ||
124 | |||
125 | if (!data) { | ||
126 | dev_err(&pdev->dev, "no platform data!\n"); | ||
127 | return -EINVAL; | ||
128 | } | ||
158 | 129 | ||
159 | /* Allocate memory for MTD device structure and private data */ | 130 | /* Allocate memory for MTD device structure and private data */ |
160 | sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); | 131 | sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL); |
161 | if (!sharpsl_mtd) { | 132 | if (!sharpsl) { |
162 | printk("Unable to allocate SharpSL NAND MTD device structure.\n"); | 133 | printk("Unable to allocate SharpSL NAND MTD device structure.\n"); |
163 | return -ENOMEM; | 134 | return -ENOMEM; |
164 | } | 135 | } |
165 | 136 | ||
137 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
138 | if (!r) { | ||
139 | dev_err(&pdev->dev, "no io memory resource defined!\n"); | ||
140 | err = -ENODEV; | ||
141 | goto err_get_res; | ||
142 | } | ||
143 | |||
166 | /* map physical address */ | 144 | /* map physical address */ |
167 | sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000); | 145 | sharpsl->io = ioremap(r->start, resource_size(r)); |
168 | if (!sharpsl_io_base) { | 146 | if (!sharpsl->io) { |
169 | printk("ioremap to access Sharp SL NAND chip failed\n"); | 147 | printk("ioremap to access Sharp SL NAND chip failed\n"); |
170 | kfree(sharpsl_mtd); | 148 | err = -EIO; |
171 | return -EIO; | 149 | goto err_ioremap; |
172 | } | 150 | } |
173 | 151 | ||
174 | /* Get pointer to private data */ | 152 | /* Get pointer to private data */ |
175 | this = (struct nand_chip *)(&sharpsl_mtd[1]); | 153 | this = (struct nand_chip *)(&sharpsl->chip); |
176 | |||
177 | /* Initialize structures */ | ||
178 | memset(sharpsl_mtd, 0, sizeof(struct mtd_info)); | ||
179 | memset(this, 0, sizeof(struct nand_chip)); | ||
180 | 154 | ||
181 | /* Link the private data with the MTD structure */ | 155 | /* Link the private data with the MTD structure */ |
182 | sharpsl_mtd->priv = this; | 156 | sharpsl->mtd.priv = this; |
183 | sharpsl_mtd->owner = THIS_MODULE; | 157 | sharpsl->mtd.owner = THIS_MODULE; |
158 | |||
159 | platform_set_drvdata(pdev, sharpsl); | ||
184 | 160 | ||
185 | /* | 161 | /* |
186 | * PXA initialize | 162 | * PXA initialize |
187 | */ | 163 | */ |
188 | writeb(readb(FLASHCTL) | FLWP, FLASHCTL); | 164 | writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL); |
189 | 165 | ||
190 | /* Set address of NAND IO lines */ | 166 | /* Set address of NAND IO lines */ |
191 | this->IO_ADDR_R = FLASHIO; | 167 | this->IO_ADDR_R = sharpsl->io + FLASHIO; |
192 | this->IO_ADDR_W = FLASHIO; | 168 | this->IO_ADDR_W = sharpsl->io + FLASHIO; |
193 | /* Set address of hardware control function */ | 169 | /* Set address of hardware control function */ |
194 | this->cmd_ctrl = sharpsl_nand_hwcontrol; | 170 | this->cmd_ctrl = sharpsl_nand_hwcontrol; |
195 | this->dev_ready = sharpsl_nand_dev_ready; | 171 | this->dev_ready = sharpsl_nand_dev_ready; |
@@ -199,68 +175,89 @@ static int __init sharpsl_nand_init(void) | |||
199 | this->ecc.mode = NAND_ECC_HW; | 175 | this->ecc.mode = NAND_ECC_HW; |
200 | this->ecc.size = 256; | 176 | this->ecc.size = 256; |
201 | this->ecc.bytes = 3; | 177 | this->ecc.bytes = 3; |
202 | this->badblock_pattern = &sharpsl_bbt; | 178 | this->badblock_pattern = data->badblock_pattern; |
203 | if (machine_is_akita() || machine_is_borzoi()) { | 179 | this->ecc.layout = data->ecc_layout; |
204 | this->badblock_pattern = &sharpsl_akita_bbt; | ||
205 | this->ecc.layout = &akita_oobinfo; | ||
206 | } | ||
207 | this->ecc.hwctl = sharpsl_nand_enable_hwecc; | 180 | this->ecc.hwctl = sharpsl_nand_enable_hwecc; |
208 | this->ecc.calculate = sharpsl_nand_calculate_ecc; | 181 | this->ecc.calculate = sharpsl_nand_calculate_ecc; |
209 | this->ecc.correct = nand_correct_data; | 182 | this->ecc.correct = nand_correct_data; |
210 | 183 | ||
211 | /* Scan to find existence of the device */ | 184 | /* Scan to find existence of the device */ |
212 | err = nand_scan(sharpsl_mtd, 1); | 185 | err = nand_scan(&sharpsl->mtd, 1); |
213 | if (err) { | 186 | if (err) |
214 | iounmap(sharpsl_io_base); | 187 | goto err_scan; |
215 | kfree(sharpsl_mtd); | ||
216 | return err; | ||
217 | } | ||
218 | 188 | ||
219 | /* Register the partitions */ | 189 | /* Register the partitions */ |
220 | sharpsl_mtd->name = "sharpsl-nand"; | 190 | sharpsl->mtd.name = "sharpsl-nand"; |
221 | nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes, &sharpsl_partition_info, 0); | 191 | #ifdef CONFIG_MTD_PARTITIONS |
222 | 192 | nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0); | |
223 | if (nr_partitions <= 0) { | 193 | if (nr_partitions <= 0) { |
224 | nr_partitions = DEFAULT_NUM_PARTITIONS; | 194 | nr_partitions = data->nr_partitions; |
225 | sharpsl_partition_info = sharpsl_nand_default_partition_info; | 195 | sharpsl_partition_info = data->partitions; |
226 | if (machine_is_poodle()) { | ||
227 | sharpsl_partition_info[1].size = 22 * 1024 * 1024; | ||
228 | } else if (machine_is_corgi() || machine_is_shepherd()) { | ||
229 | sharpsl_partition_info[1].size = 25 * 1024 * 1024; | ||
230 | } else if (machine_is_husky()) { | ||
231 | sharpsl_partition_info[1].size = 53 * 1024 * 1024; | ||
232 | } else if (machine_is_spitz()) { | ||
233 | sharpsl_partition_info[1].size = 5 * 1024 * 1024; | ||
234 | } else if (machine_is_akita()) { | ||
235 | sharpsl_partition_info[1].size = 58 * 1024 * 1024; | ||
236 | } else if (machine_is_borzoi()) { | ||
237 | sharpsl_partition_info[1].size = 32 * 1024 * 1024; | ||
238 | } | ||
239 | } | 196 | } |
240 | 197 | ||
241 | add_mtd_partitions(sharpsl_mtd, sharpsl_partition_info, nr_partitions); | 198 | if (nr_partitions > 0) |
199 | err = add_mtd_partitions(&sharpsl->mtd, sharpsl_partition_info, nr_partitions); | ||
200 | else | ||
201 | #endif | ||
202 | err = add_mtd_device(&sharpsl->mtd); | ||
203 | if (err) | ||
204 | goto err_add; | ||
242 | 205 | ||
243 | /* Return happy */ | 206 | /* Return happy */ |
244 | return 0; | 207 | return 0; |
245 | } | ||
246 | 208 | ||
247 | module_init(sharpsl_nand_init); | 209 | err_add: |
210 | nand_release(&sharpsl->mtd); | ||
211 | |||
212 | err_scan: | ||
213 | platform_set_drvdata(pdev, NULL); | ||
214 | iounmap(sharpsl->io); | ||
215 | err_ioremap: | ||
216 | err_get_res: | ||
217 | kfree(sharpsl); | ||
218 | return err; | ||
219 | } | ||
248 | 220 | ||
249 | /* | 221 | /* |
250 | * Clean up routine | 222 | * Clean up routine |
251 | */ | 223 | */ |
252 | static void __exit sharpsl_nand_cleanup(void) | 224 | static int __devexit sharpsl_nand_remove(struct platform_device *pdev) |
253 | { | 225 | { |
226 | struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev); | ||
227 | |||
254 | /* Release resources, unregister device */ | 228 | /* Release resources, unregister device */ |
255 | nand_release(sharpsl_mtd); | 229 | nand_release(&sharpsl->mtd); |
256 | 230 | ||
257 | iounmap(sharpsl_io_base); | 231 | platform_set_drvdata(pdev, NULL); |
232 | |||
233 | iounmap(sharpsl->io); | ||
258 | 234 | ||
259 | /* Free the MTD device structure */ | 235 | /* Free the MTD device structure */ |
260 | kfree(sharpsl_mtd); | 236 | kfree(sharpsl); |
237 | |||
238 | return 0; | ||
239 | } | ||
240 | |||
241 | static struct platform_driver sharpsl_nand_driver = { | ||
242 | .driver = { | ||
243 | .name = "sharpsl-nand", | ||
244 | .owner = THIS_MODULE, | ||
245 | }, | ||
246 | .probe = sharpsl_nand_probe, | ||
247 | .remove = __devexit_p(sharpsl_nand_remove), | ||
248 | }; | ||
249 | |||
250 | static int __init sharpsl_nand_init(void) | ||
251 | { | ||
252 | return platform_driver_register(&sharpsl_nand_driver); | ||
261 | } | 253 | } |
254 | module_init(sharpsl_nand_init); | ||
262 | 255 | ||
263 | module_exit(sharpsl_nand_cleanup); | 256 | static void __exit sharpsl_nand_exit(void) |
257 | { | ||
258 | platform_driver_unregister(&sharpsl_nand_driver); | ||
259 | } | ||
260 | module_exit(sharpsl_nand_exit); | ||
264 | 261 | ||
265 | MODULE_LICENSE("GPL"); | 262 | MODULE_LICENSE("GPL"); |
266 | MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); | 263 | MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); |