diff options
Diffstat (limited to 'drivers/mtd/nand/toto.c')
| -rw-r--r-- | drivers/mtd/nand/toto.c | 121 |
1 files changed, 62 insertions, 59 deletions
diff --git a/drivers/mtd/nand/toto.c b/drivers/mtd/nand/toto.c index 7609c43cb3ec..f9e2d4a0ab8c 100644 --- a/drivers/mtd/nand/toto.c +++ b/drivers/mtd/nand/toto.c | |||
| @@ -32,6 +32,8 @@ | |||
| 32 | #include <asm/arch-omap1510/hardware.h> | 32 | #include <asm/arch-omap1510/hardware.h> |
| 33 | #include <asm/arch/gpio.h> | 33 | #include <asm/arch/gpio.h> |
| 34 | 34 | ||
| 35 | #define CONFIG_NAND_WORKAROUND 1 | ||
| 36 | |||
| 35 | /* | 37 | /* |
| 36 | * MTD structure for TOTO board | 38 | * MTD structure for TOTO board |
| 37 | */ | 39 | */ |
| @@ -39,25 +41,6 @@ static struct mtd_info *toto_mtd = NULL; | |||
| 39 | 41 | ||
| 40 | static unsigned long toto_io_base = OMAP_FLASH_1_BASE; | 42 | static unsigned long toto_io_base = OMAP_FLASH_1_BASE; |
| 41 | 43 | ||
| 42 | #define CONFIG_NAND_WORKAROUND 1 | ||
| 43 | |||
| 44 | #define NAND_NCE 0x4000 | ||
| 45 | #define NAND_CLE 0x1000 | ||
| 46 | #define NAND_ALE 0x0002 | ||
| 47 | #define NAND_MASK (NAND_CLE | NAND_ALE | NAND_NCE) | ||
| 48 | |||
| 49 | #define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0) | ||
| 50 | #define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE) | ||
| 51 | #ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */ | ||
| 52 | #define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2) | ||
| 53 | #define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0) | ||
| 54 | #else | ||
| 55 | #define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0) | ||
| 56 | #define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE) | ||
| 57 | #endif | ||
| 58 | #define T_NAND_CTL_SETNCE(iob) gpiosetout(NAND_NCE, 0) | ||
| 59 | #define T_NAND_CTL_CLRNCE(iob) gpiosetout(NAND_NCE, NAND_NCE) | ||
| 60 | |||
| 61 | /* | 44 | /* |
| 62 | * Define partitions for flash devices | 45 | * Define partitions for flash devices |
| 63 | */ | 46 | */ |
| @@ -91,91 +74,110 @@ static struct mtd_partition partition_info32M[] = { | |||
| 91 | 74 | ||
| 92 | #define NUM_PARTITIONS32M 3 | 75 | #define NUM_PARTITIONS32M 3 |
| 93 | #define NUM_PARTITIONS64M 4 | 76 | #define NUM_PARTITIONS64M 4 |
| 77 | |||
| 94 | /* | 78 | /* |
| 95 | * hardware specific access to control-lines | 79 | * hardware specific access to control-lines |
| 96 | */ | 80 | * |
| 97 | 81 | * ctrl: | |
| 98 | static void toto_hwcontrol(struct mtd_info *mtd, int cmd) | 82 | * NAND_NCE: bit 0 -> bit 14 (0x4000) |
| 83 | * NAND_CLE: bit 1 -> bit 12 (0x1000) | ||
| 84 | * NAND_ALE: bit 2 -> bit 1 (0x0002) | ||
| 85 | */ | ||
| 86 | static void toto_hwcontrol(struct mtd_info *mtd, int cmd, | ||
| 87 | unsigned int ctrl) | ||
| 99 | { | 88 | { |
| 89 | struct nand_chip *chip = mtd->priv; | ||
| 90 | |||
| 91 | if (ctrl & NAND_CTRL_CHANGE) { | ||
| 92 | unsigned long bits; | ||
| 100 | 93 | ||
| 101 | udelay(1); /* hopefully enough time for tc make proceding write to clear */ | 94 | /* hopefully enough time for tc make proceding write to clear */ |
| 102 | switch(cmd){ | 95 | udelay(1); |
| 103 | 96 | ||
| 104 | case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break; | 97 | bits = (~ctrl & NAND_NCE) << 14; |
| 105 | case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break; | 98 | bits |= (ctrl & NAND_CLE) << 12; |
| 99 | bits |= (ctrl & NAND_ALE) >> 1; | ||
| 106 | 100 | ||
| 107 | case NAND_CTL_SETALE: T_NAND_CTL_SETALE(cmd); break; | 101 | #warning Wild guess as gpiosetout() is nowhere defined in the kernel source - tglx |
| 108 | case NAND_CTL_CLRALE: T_NAND_CTL_CLRALE(cmd); break; | 102 | gpiosetout(0x5002, bits); |
| 109 | 103 | ||
| 110 | case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break; | 104 | #ifdef CONFIG_NAND_WORKAROUND |
| 111 | case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break; | 105 | /* "some" dev boards busted, blue wired to rts2 :( */ |
| 106 | rts2setout(2, (ctrl & NAND_CLE) << 1); | ||
| 107 | #endif | ||
| 108 | /* allow time to ensure gpio state to over take memory write */ | ||
| 109 | udelay(1); | ||
| 112 | } | 110 | } |
| 113 | udelay(1); /* allow time to ensure gpio state to over take memory write */ | 111 | |
| 112 | if (cmd != NAND_CMD_NONE) | ||
| 113 | writeb(cmd, chip->IO_ADDR_W); | ||
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | /* | 116 | /* |
| 117 | * Main initialization routine | 117 | * Main initialization routine |
| 118 | */ | 118 | */ |
| 119 | int __init toto_init (void) | 119 | static int __init toto_init(void) |
| 120 | { | 120 | { |
| 121 | struct nand_chip *this; | 121 | struct nand_chip *this; |
| 122 | int err = 0; | 122 | int err = 0; |
| 123 | 123 | ||
| 124 | /* Allocate memory for MTD device structure and private data */ | 124 | /* Allocate memory for MTD device structure and private data */ |
| 125 | toto_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), | 125 | toto_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
| 126 | GFP_KERNEL); | ||
| 127 | if (!toto_mtd) { | 126 | if (!toto_mtd) { |
| 128 | printk (KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n"); | 127 | printk(KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n"); |
| 129 | err = -ENOMEM; | 128 | err = -ENOMEM; |
| 130 | goto out; | 129 | goto out; |
| 131 | } | 130 | } |
| 132 | 131 | ||
| 133 | /* Get pointer to private data */ | 132 | /* Get pointer to private data */ |
| 134 | this = (struct nand_chip *) (&toto_mtd[1]); | 133 | this = (struct nand_chip *)(&toto_mtd[1]); |
| 135 | 134 | ||
| 136 | /* Initialize structures */ | 135 | /* Initialize structures */ |
| 137 | memset((char *) toto_mtd, 0, sizeof(struct mtd_info)); | 136 | memset(toto_mtd, 0, sizeof(struct mtd_info)); |
| 138 | memset((char *) this, 0, sizeof(struct nand_chip)); | 137 | memset(this, 0, sizeof(struct nand_chip)); |
| 139 | 138 | ||
| 140 | /* Link the private data with the MTD structure */ | 139 | /* Link the private data with the MTD structure */ |
| 141 | toto_mtd->priv = this; | 140 | toto_mtd->priv = this; |
| 141 | toto_mtd->owner = THIS_MODULE; | ||
| 142 | 142 | ||
| 143 | /* Set address of NAND IO lines */ | 143 | /* Set address of NAND IO lines */ |
| 144 | this->IO_ADDR_R = toto_io_base; | 144 | this->IO_ADDR_R = toto_io_base; |
| 145 | this->IO_ADDR_W = toto_io_base; | 145 | this->IO_ADDR_W = toto_io_base; |
| 146 | this->hwcontrol = toto_hwcontrol; | 146 | this->cmd_ctrl = toto_hwcontrol; |
| 147 | this->dev_ready = NULL; | 147 | this->dev_ready = NULL; |
| 148 | /* 25 us command delay time */ | 148 | /* 25 us command delay time */ |
| 149 | this->chip_delay = 30; | 149 | this->chip_delay = 30; |
| 150 | this->eccmode = NAND_ECC_SOFT; | 150 | this->ecc.mode = NAND_ECC_SOFT; |
| 151 | 151 | ||
| 152 | /* Scan to find existance of the device */ | 152 | /* Scan to find existance of the device */ |
| 153 | if (nand_scan (toto_mtd, 1)) { | 153 | if (nand_scan(toto_mtd, 1)) { |
| 154 | err = -ENXIO; | 154 | err = -ENXIO; |
| 155 | goto out_mtd; | 155 | goto out_mtd; |
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | /* Register the partitions */ | 158 | /* Register the partitions */ |
| 159 | switch(toto_mtd->size){ | 159 | switch (toto_mtd->size) { |
| 160 | case SZ_64M: add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); break; | 160 | case SZ_64M: |
| 161 | case SZ_32M: add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); break; | 161 | add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M); |
| 162 | default: { | 162 | break; |
| 163 | printk (KERN_WARNING "Unsupported Nand device\n"); | 163 | case SZ_32M: |
| 164 | add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M); | ||
| 165 | break; | ||
| 166 | default:{ | ||
| 167 | printk(KERN_WARNING "Unsupported Nand device\n"); | ||
| 164 | err = -ENXIO; | 168 | err = -ENXIO; |
| 165 | goto out_buf; | 169 | goto out_buf; |
| 166 | } | 170 | } |
| 167 | } | 171 | } |
| 168 | 172 | ||
| 169 | gpioreserve(NAND_MASK); /* claim our gpios */ | 173 | gpioreserve(NAND_MASK); /* claim our gpios */ |
| 170 | archflashwp(0,0); /* open up flash for writing */ | 174 | archflashwp(0, 0); /* open up flash for writing */ |
| 171 | 175 | ||
| 172 | goto out; | 176 | goto out; |
| 173 | 177 | ||
| 174 | out_buf: | 178 | out_mtd: |
| 175 | kfree (this->data_buf); | 179 | kfree(toto_mtd); |
| 176 | out_mtd: | 180 | out: |
| 177 | kfree (toto_mtd); | ||
| 178 | out: | ||
| 179 | return err; | 181 | return err; |
| 180 | } | 182 | } |
| 181 | 183 | ||
| @@ -184,20 +186,21 @@ module_init(toto_init); | |||
| 184 | /* | 186 | /* |
| 185 | * Clean up routine | 187 | * Clean up routine |
| 186 | */ | 188 | */ |
| 187 | static void __exit toto_cleanup (void) | 189 | static void __exit toto_cleanup(void) |
| 188 | { | 190 | { |
| 189 | /* Release resources, unregister device */ | 191 | /* Release resources, unregister device */ |
| 190 | nand_release (toto_mtd); | 192 | nand_release(toto_mtd); |
| 191 | 193 | ||
| 192 | /* Free the MTD device structure */ | 194 | /* Free the MTD device structure */ |
| 193 | kfree (toto_mtd); | 195 | kfree(toto_mtd); |
| 194 | 196 | ||
| 195 | /* stop flash writes */ | 197 | /* stop flash writes */ |
| 196 | archflashwp(0,1); | 198 | archflashwp(0, 1); |
| 197 | 199 | ||
| 198 | /* release gpios to system */ | 200 | /* release gpios to system */ |
| 199 | gpiorelease(NAND_MASK); | 201 | gpiorelease(NAND_MASK); |
| 200 | } | 202 | } |
| 203 | |||
| 201 | module_exit(toto_cleanup); | 204 | module_exit(toto_cleanup); |
| 202 | 205 | ||
| 203 | MODULE_LICENSE("GPL"); | 206 | MODULE_LICENSE("GPL"); |
