1 files changed, 160 insertions, 23 deletions

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bd39f7b67906..9715a7ba164a 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -29,6 +29,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
@@ -202,6 +204,51 @@ static void nand_select_chip(struct mtd_info *mtd, int chipnr)
 }
 
 /**
+ * nand_write_byte - [DEFAULT] write single byte to chip
+ * @mtd: MTD device structure
+ * @byte: value to write
+ *
+ * Default function to write a byte to I/O[7:0]
+ */
+static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)
+{
+        struct nand_chip *chip = mtd->priv;
+
+        chip->write_buf(mtd, &byte, 1);
+}
+
+/**
+ * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16
+ * @mtd: MTD device structure
+ * @byte: value to write
+ *
+ * Default function to write a byte to I/O[7:0] on a 16-bit wide chip.
+ */
+static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)
+{
+        struct nand_chip *chip = mtd->priv;
+        uint16_t word = byte;
+
+        /*
+         * It's not entirely clear what should happen to I/O[15:8] when writing
+         * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:
+         *
+         *    When the host supports a 16-bit bus width, only data is
+         *    transferred at the 16-bit width. All address and command line
+         *    transfers shall use only the lower 8-bits of the data bus. During
+         *    command transfers, the host may place any value on the upper
+         *    8-bits of the data bus. During address transfers, the host shall
+         *    set the upper 8-bits of the data bus to 00h.
+         *
+         * One user of the write_byte callback is nand_onfi_set_features. The
+         * four parameters are specified to be written to I/O[7:0], but this is
+         * neither an address nor a command transfer. Let's assume a 0 on the
+         * upper I/O lines is OK.
+         */
+        chip->write_buf(mtd, (uint8_t *)&word, 2);
+}
+
+/**
  * nand_write_buf - [DEFAULT] write buffer to chip
  * @mtd: MTD device structure
  * @buf: data buffer
@@ -1408,6 +1455,30 @@ static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
 }
 
 /**
+ * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
+ * @mtd: MTD device structure
+ * @retry_mode: the retry mode to use
+ *
+ * Some vendors supply a special command to shift the Vt threshold, to be used
+ * when there are too many bitflips in a page (i.e., ECC error). After setting
+ * a new threshold, the host should retry reading the page.
+ */
+static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
+{
+        struct nand_chip *chip = mtd->priv;
+
+        pr_debug("setting READ RETRY mode %d\n", retry_mode);
+
+        if (retry_mode >= chip->read_retries)
+                return -EINVAL;
+
+        if (!chip->setup_read_retry)
+                return -EOPNOTSUPP;
+
+        return chip->setup_read_retry(mtd, retry_mode);
+}
+
+/**
  * nand_do_read_ops - [INTERN] Read data with ECC
  * @mtd: MTD device structure
  * @from: offset to read from
@@ -1420,7 +1491,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 {
         int chipnr, page, realpage, col, bytes, aligned, oob_required;
         struct nand_chip *chip = mtd->priv;
-        struct mtd_ecc_stats stats;
         int ret = 0;
         uint32_t readlen = ops->len;
         uint32_t oobreadlen = ops->ooblen;
@@ -1429,8 +1499,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 
         uint8_t *bufpoi, *oob, *buf;
         unsigned int max_bitflips = 0;
-
-        stats = mtd->ecc_stats;
+        int retry_mode = 0;
+        bool ecc_fail = false;
 
         chipnr = (int)(from >> chip->chip_shift);
         chip->select_chip(mtd, chipnr);
@@ -1445,6 +1515,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
         oob_required = oob ? 1 : 0;
 
         while (1) {
+                unsigned int ecc_failures = mtd->ecc_stats.failed;
+
                 bytes = min(mtd->writesize - col, readlen);
                 aligned = (bytes == mtd->writesize);
 
@@ -1452,6 +1524,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
                 if (realpage != chip->pagebuf || oob) {
                         bufpoi = aligned ? buf : chip->buffers->databuf;
 
+read_retry:
                         chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 
                         /*
@@ -1481,7 +1554,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
                         /* Transfer not aligned data */
                         if (!aligned) {
                                 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
-                                    !(mtd->ecc_stats.failed - stats.failed) &&
+                                    !(mtd->ecc_stats.failed - ecc_failures) &&
                                     (ops->mode != MTD_OPS_RAW)) {
                                         chip->pagebuf = realpage;
                                         chip->pagebuf_bitflips = ret;
@@ -1492,8 +1565,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
                                 memcpy(buf, chip->buffers->databuf + col, bytes);
                         }
 
-                        buf += bytes;
-
                         if (unlikely(oob)) {
                                 int toread = min(oobreadlen, max_oobsize);
 
@@ -1511,6 +1582,25 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
                                 else
                                         nand_wait_ready(mtd);
                         }
+
+                        if (mtd->ecc_stats.failed - ecc_failures) {
+                                if (retry_mode + 1 < chip->read_retries) {
+                                        retry_mode++;
+                                        ret = nand_setup_read_retry(mtd,
+                                                        retry_mode);
+                                        if (ret < 0)
+                                                break;
+
+                                        /* Reset failures; retry */
+                                        mtd->ecc_stats.failed = ecc_failures;
+                                        goto read_retry;
+                                } else {
+                                        /* No more retry modes; real failure */
+                                        ecc_fail = true;
+                                }
+                        }
+
+                        buf += bytes;
                 } else {
                         memcpy(buf, chip->buffers->databuf + col, bytes);
                         buf += bytes;
@@ -1520,6 +1610,14 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 
                 readlen -= bytes;
 
+                /* Reset to retry mode 0 */
+                if (retry_mode) {
+                        ret = nand_setup_read_retry(mtd, 0);
+                        if (ret < 0)
+                                break;
+                        retry_mode = 0;
+                }
+
                 if (!readlen)
                         break;
 
@@ -1545,7 +1643,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
         if (ret < 0)
                 return ret;
 
-        if (mtd->ecc_stats.failed - stats.failed)
+        if (ecc_fail)
                 return -EBADMSG;
 
         return max_bitflips;
@@ -2716,6 +2814,7 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
                         int addr, uint8_t *subfeature_param)
 {
         int status;
+        int i;
 
         if (!chip->onfi_version ||
             !(le16_to_cpu(chip->onfi_params.opt_cmd)
@@ -2723,7 +2822,9 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
                 return -EINVAL;
 
         chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
-        chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
+        for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
+                chip->write_byte(mtd, subfeature_param[i]);
+
         status = chip->waitfunc(mtd, chip);
         if (status & NAND_STATUS_FAIL)
                 return -EIO;
@@ -2740,6 +2841,8 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
 static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
                         int addr, uint8_t *subfeature_param)
 {
+        int i;
+
         if (!chip->onfi_version ||
             !(le16_to_cpu(chip->onfi_params.opt_cmd)
               & ONFI_OPT_CMD_SET_GET_FEATURES))
@@ -2749,7 +2852,8 @@ static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
         memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
 
         chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
-        chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
+        for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
+                *subfeature_param++ = chip->read_byte(mtd);
         return 0;
 }
 
@@ -2812,6 +2916,8 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
                 chip->block_markbad = nand_default_block_markbad;
         if (!chip->write_buf || chip->write_buf == nand_write_buf)
                 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
+        if (!chip->write_byte || chip->write_byte == nand_write_byte)
+                chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;
         if (!chip->read_buf || chip->read_buf == nand_read_buf)
                 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
         if (!chip->scan_bbt)
@@ -2926,6 +3032,30 @@ ext_out:
         return ret;
 }
 
+static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode)
+{
+        struct nand_chip *chip = mtd->priv;
+        uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};
+
+        return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY,
+                        feature);
+}
+
+/*
+ * Configure chip properties from Micron vendor-specific ONFI table
+ */
+static void nand_onfi_detect_micron(struct nand_chip *chip,
+                struct nand_onfi_params *p)
+{
+        struct nand_onfi_vendor_micron *micron = (void *)p->vendor;
+
+        if (le16_to_cpu(p->vendor_revision) < 1)
+                return;
+
+        chip->read_retries = micron->read_retry_options;
+        chip->setup_read_retry = nand_setup_read_retry_micron;
+}
+
 /*
  * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
  */
@@ -2979,7 +3109,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
                 chip->onfi_version = 10;
 
         if (!chip->onfi_version) {
-                pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
+                pr_info("unsupported ONFI version: %d\n", val);
                 return 0;
         }
 
@@ -3032,6 +3162,9 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
                 pr_warn("Could not retrieve ONFI ECC requirements\n");
         }
 
+        if (p->jedec_id == NAND_MFR_MICRON)
+                nand_onfi_detect_micron(chip, p);
+
         return 1;
 }
 
@@ -3152,9 +3285,12 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
                         mtd->oobsize = 512;
                         break;
                 case 6:
-                default: /* Other cases are "reserved" (unknown) */
                         mtd->oobsize = 640;
                         break;
+                case 7:
+                default: /* Other cases are "reserved" (unknown) */
+                        mtd->oobsize = 1024;
+                        break;
                 }
                 extid >>= 2;
                 /* Calc blocksize */
@@ -3325,6 +3461,9 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
 
                 *busw = type->options & NAND_BUSWIDTH_16;
 
+                if (!mtd->name)
+                        mtd->name = type->name;
+
                 return true;
         }
         return false;
@@ -3372,8 +3511,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
                 id_data[i] = chip->read_byte(mtd);
 
         if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
-                pr_info("%s: second ID read did not match "
-                        "%02x,%02x against %02x,%02x\n", __func__,
+                pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",
                         *maf_id, *dev_id, id_data[0], id_data[1]);
                 return ERR_PTR(-ENODEV);
         }
@@ -3440,10 +3578,10 @@ ident_done:
                  * Check, if buswidth is correct. Hardware drivers should set
                  * chip correct!
                  */
-                pr_info("NAND device: Manufacturer ID:"
-                        " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
-                        *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
-                pr_warn("NAND bus width %d instead %d bit\n",
+                pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
+                        *maf_id, *dev_id);
+                pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name);
+                pr_warn("bus width %d instead %d bit\n",
                            (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
                            busw ? 16 : 8);
                 return ERR_PTR(-EINVAL);
@@ -3472,14 +3610,13 @@ ident_done:
         if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
                 chip->cmdfunc = nand_command_lp;
 
-        pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)\n",
-                *maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
+        pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
+                *maf_id, *dev_id);
+        pr_info("%s %s\n", nand_manuf_ids[maf_idx].name,
                 chip->onfi_version ? chip->onfi_params.model : type->name);
-
-        pr_info("NAND device: %dMiB, %s, page size: %d, OOB size: %d\n",
+        pr_info("%dMiB, %s, page size: %d, OOB size: %d\n",
                 (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
                 mtd->writesize, mtd->oobsize);
-
         return type;
 }
 
@@ -3535,7 +3672,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
                 chip->select_chip(mtd, -1);
         }
         if (i > 1)
-                pr_info("%d NAND chips detected\n", i);
+                pr_info("%d chips detected\n", i);
 
         /* Store the number of chips and calc total size for mtd */
         chip->numchips = i;