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Diffstat (limited to 'drivers/mtd/nand/nand_base.c')
-rw-r--r--drivers/mtd/nand/nand_base.c529
1 files changed, 328 insertions, 201 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a11253a0fcab..ec6841d8e956 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -243,25 +243,6 @@ static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
243} 243}
244 244
245/** 245/**
246 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
247 * @mtd: MTD device structure
248 * @buf: buffer containing the data to compare
249 * @len: number of bytes to compare
250 *
251 * Default verify function for 8bit buswidth.
252 */
253static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
254{
255 int i;
256 struct nand_chip *chip = mtd->priv;
257
258 for (i = 0; i < len; i++)
259 if (buf[i] != readb(chip->IO_ADDR_R))
260 return -EFAULT;
261 return 0;
262}
263
264/**
265 * nand_write_buf16 - [DEFAULT] write buffer to chip 246 * nand_write_buf16 - [DEFAULT] write buffer to chip
266 * @mtd: MTD device structure 247 * @mtd: MTD device structure
267 * @buf: data buffer 248 * @buf: data buffer
@@ -301,28 +282,6 @@ static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
301} 282}
302 283
303/** 284/**
304 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
305 * @mtd: MTD device structure
306 * @buf: buffer containing the data to compare
307 * @len: number of bytes to compare
308 *
309 * Default verify function for 16bit buswidth.
310 */
311static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
312{
313 int i;
314 struct nand_chip *chip = mtd->priv;
315 u16 *p = (u16 *) buf;
316 len >>= 1;
317
318 for (i = 0; i < len; i++)
319 if (p[i] != readw(chip->IO_ADDR_R))
320 return -EFAULT;
321
322 return 0;
323}
324
325/**
326 * nand_block_bad - [DEFAULT] Read bad block marker from the chip 285 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
327 * @mtd: MTD device structure 286 * @mtd: MTD device structure
328 * @ofs: offset from device start 287 * @ofs: offset from device start
@@ -1525,7 +1484,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1525 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, 1484 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
1526 oob_required, 1485 oob_required,
1527 page); 1486 page);
1528 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) 1487 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
1488 !oob)
1529 ret = chip->ecc.read_subpage(mtd, chip, 1489 ret = chip->ecc.read_subpage(mtd, chip,
1530 col, bytes, bufpoi); 1490 col, bytes, bufpoi);
1531 else 1491 else
@@ -1542,7 +1502,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1542 1502
1543 /* Transfer not aligned data */ 1503 /* Transfer not aligned data */
1544 if (!aligned) { 1504 if (!aligned) {
1545 if (!NAND_SUBPAGE_READ(chip) && !oob && 1505 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
1546 !(mtd->ecc_stats.failed - stats.failed) && 1506 !(mtd->ecc_stats.failed - stats.failed) &&
1547 (ops->mode != MTD_OPS_RAW)) { 1507 (ops->mode != MTD_OPS_RAW)) {
1548 chip->pagebuf = realpage; 1508 chip->pagebuf = realpage;
@@ -1565,14 +1525,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1565 oobreadlen -= toread; 1525 oobreadlen -= toread;
1566 } 1526 }
1567 } 1527 }
1568
1569 if (!(chip->options & NAND_NO_READRDY)) {
1570 /* Apply delay or wait for ready/busy pin */
1571 if (!chip->dev_ready)
1572 udelay(chip->chip_delay);
1573 else
1574 nand_wait_ready(mtd);
1575 }
1576 } else { 1528 } else {
1577 memcpy(buf, chip->buffers->databuf + col, bytes); 1529 memcpy(buf, chip->buffers->databuf + col, bytes);
1578 buf += bytes; 1530 buf += bytes;
@@ -1633,7 +1585,7 @@ static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1633 ops.len = len; 1585 ops.len = len;
1634 ops.datbuf = buf; 1586 ops.datbuf = buf;
1635 ops.oobbuf = NULL; 1587 ops.oobbuf = NULL;
1636 ops.mode = 0; 1588 ops.mode = MTD_OPS_PLACE_OOB;
1637 ret = nand_do_read_ops(mtd, from, &ops); 1589 ret = nand_do_read_ops(mtd, from, &ops);
1638 *retlen = ops.retlen; 1590 *retlen = ops.retlen;
1639 nand_release_device(mtd); 1591 nand_release_device(mtd);
@@ -1837,14 +1789,6 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1837 len = min(len, readlen); 1789 len = min(len, readlen);
1838 buf = nand_transfer_oob(chip, buf, ops, len); 1790 buf = nand_transfer_oob(chip, buf, ops, len);
1839 1791
1840 if (!(chip->options & NAND_NO_READRDY)) {
1841 /* Apply delay or wait for ready/busy pin */
1842 if (!chip->dev_ready)
1843 udelay(chip->chip_delay);
1844 else
1845 nand_wait_ready(mtd);
1846 }
1847
1848 readlen -= len; 1792 readlen -= len;
1849 if (!readlen) 1793 if (!readlen)
1850 break; 1794 break;
@@ -1927,12 +1871,14 @@ out:
1927 * 1871 *
1928 * Not for syndrome calculating ECC controllers, which use a special oob layout. 1872 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1929 */ 1873 */
1930static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, 1874static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1931 const uint8_t *buf, int oob_required) 1875 const uint8_t *buf, int oob_required)
1932{ 1876{
1933 chip->write_buf(mtd, buf, mtd->writesize); 1877 chip->write_buf(mtd, buf, mtd->writesize);
1934 if (oob_required) 1878 if (oob_required)
1935 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); 1879 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1880
1881 return 0;
1936} 1882}
1937 1883
1938/** 1884/**
@@ -1944,7 +1890,7 @@ static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1944 * 1890 *
1945 * We need a special oob layout and handling even when ECC isn't checked. 1891 * We need a special oob layout and handling even when ECC isn't checked.
1946 */ 1892 */
1947static void nand_write_page_raw_syndrome(struct mtd_info *mtd, 1893static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
1948 struct nand_chip *chip, 1894 struct nand_chip *chip,
1949 const uint8_t *buf, int oob_required) 1895 const uint8_t *buf, int oob_required)
1950{ 1896{
@@ -1974,6 +1920,8 @@ static void nand_write_page_raw_syndrome(struct mtd_info *mtd,
1974 size = mtd->oobsize - (oob - chip->oob_poi); 1920 size = mtd->oobsize - (oob - chip->oob_poi);
1975 if (size) 1921 if (size)
1976 chip->write_buf(mtd, oob, size); 1922 chip->write_buf(mtd, oob, size);
1923
1924 return 0;
1977} 1925}
1978/** 1926/**
1979 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function 1927 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
@@ -1982,7 +1930,7 @@ static void nand_write_page_raw_syndrome(struct mtd_info *mtd,
1982 * @buf: data buffer 1930 * @buf: data buffer
1983 * @oob_required: must write chip->oob_poi to OOB 1931 * @oob_required: must write chip->oob_poi to OOB
1984 */ 1932 */
1985static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 1933static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1986 const uint8_t *buf, int oob_required) 1934 const uint8_t *buf, int oob_required)
1987{ 1935{
1988 int i, eccsize = chip->ecc.size; 1936 int i, eccsize = chip->ecc.size;
@@ -1999,7 +1947,7 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1999 for (i = 0; i < chip->ecc.total; i++) 1947 for (i = 0; i < chip->ecc.total; i++)
2000 chip->oob_poi[eccpos[i]] = ecc_calc[i]; 1948 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2001 1949
2002 chip->ecc.write_page_raw(mtd, chip, buf, 1); 1950 return chip->ecc.write_page_raw(mtd, chip, buf, 1);
2003} 1951}
2004 1952
2005/** 1953/**
@@ -2009,7 +1957,7 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
2009 * @buf: data buffer 1957 * @buf: data buffer
2010 * @oob_required: must write chip->oob_poi to OOB 1958 * @oob_required: must write chip->oob_poi to OOB
2011 */ 1959 */
2012static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, 1960static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
2013 const uint8_t *buf, int oob_required) 1961 const uint8_t *buf, int oob_required)
2014{ 1962{
2015 int i, eccsize = chip->ecc.size; 1963 int i, eccsize = chip->ecc.size;
@@ -2029,6 +1977,8 @@ static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
2029 chip->oob_poi[eccpos[i]] = ecc_calc[i]; 1977 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2030 1978
2031 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); 1979 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1980
1981 return 0;
2032} 1982}
2033 1983
2034/** 1984/**
@@ -2041,7 +1991,7 @@ static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
2041 * The hw generator calculates the error syndrome automatically. Therefore we 1991 * The hw generator calculates the error syndrome automatically. Therefore we
2042 * need a special oob layout and handling. 1992 * need a special oob layout and handling.
2043 */ 1993 */
2044static void nand_write_page_syndrome(struct mtd_info *mtd, 1994static int nand_write_page_syndrome(struct mtd_info *mtd,
2045 struct nand_chip *chip, 1995 struct nand_chip *chip,
2046 const uint8_t *buf, int oob_required) 1996 const uint8_t *buf, int oob_required)
2047{ 1997{
@@ -2075,6 +2025,8 @@ static void nand_write_page_syndrome(struct mtd_info *mtd,
2075 i = mtd->oobsize - (oob - chip->oob_poi); 2025 i = mtd->oobsize - (oob - chip->oob_poi);
2076 if (i) 2026 if (i)
2077 chip->write_buf(mtd, oob, i); 2027 chip->write_buf(mtd, oob, i);
2028
2029 return 0;
2078} 2030}
2079 2031
2080/** 2032/**
@@ -2096,9 +2048,12 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2096 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); 2048 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
2097 2049
2098 if (unlikely(raw)) 2050 if (unlikely(raw))
2099 chip->ecc.write_page_raw(mtd, chip, buf, oob_required); 2051 status = chip->ecc.write_page_raw(mtd, chip, buf, oob_required);
2100 else 2052 else
2101 chip->ecc.write_page(mtd, chip, buf, oob_required); 2053 status = chip->ecc.write_page(mtd, chip, buf, oob_required);
2054
2055 if (status < 0)
2056 return status;
2102 2057
2103 /* 2058 /*
2104 * Cached progamming disabled for now. Not sure if it's worth the 2059 * Cached progamming disabled for now. Not sure if it's worth the
@@ -2125,16 +2080,6 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2125 status = chip->waitfunc(mtd, chip); 2080 status = chip->waitfunc(mtd, chip);
2126 } 2081 }
2127 2082
2128#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
2129 /* Send command to read back the data */
2130 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
2131
2132 if (chip->verify_buf(mtd, buf, mtd->writesize))
2133 return -EIO;
2134
2135 /* Make sure the next page prog is preceded by a status read */
2136 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
2137#endif
2138 return 0; 2083 return 0;
2139} 2084}
2140 2085
@@ -2336,7 +2281,7 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2336 ops.len = len; 2281 ops.len = len;
2337 ops.datbuf = (uint8_t *)buf; 2282 ops.datbuf = (uint8_t *)buf;
2338 ops.oobbuf = NULL; 2283 ops.oobbuf = NULL;
2339 ops.mode = 0; 2284 ops.mode = MTD_OPS_PLACE_OOB;
2340 2285
2341 ret = nand_do_write_ops(mtd, to, &ops); 2286 ret = nand_do_write_ops(mtd, to, &ops);
2342 2287
@@ -2365,7 +2310,7 @@ static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2365 ops.len = len; 2310 ops.len = len;
2366 ops.datbuf = (uint8_t *)buf; 2311 ops.datbuf = (uint8_t *)buf;
2367 ops.oobbuf = NULL; 2312 ops.oobbuf = NULL;
2368 ops.mode = 0; 2313 ops.mode = MTD_OPS_PLACE_OOB;
2369 ret = nand_do_write_ops(mtd, to, &ops); 2314 ret = nand_do_write_ops(mtd, to, &ops);
2370 *retlen = ops.retlen; 2315 *retlen = ops.retlen;
2371 nand_release_device(mtd); 2316 nand_release_device(mtd);
@@ -2755,6 +2700,50 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2755} 2700}
2756 2701
2757/** 2702/**
2703 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
2704 * @mtd: MTD device structure
2705 * @chip: nand chip info structure
2706 * @addr: feature address.
2707 * @subfeature_param: the subfeature parameters, a four bytes array.
2708 */
2709static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
2710 int addr, uint8_t *subfeature_param)
2711{
2712 int status;
2713
2714 if (!chip->onfi_version)
2715 return -EINVAL;
2716
2717 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
2718 chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2719 status = chip->waitfunc(mtd, chip);
2720 if (status & NAND_STATUS_FAIL)
2721 return -EIO;
2722 return 0;
2723}
2724
2725/**
2726 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
2727 * @mtd: MTD device structure
2728 * @chip: nand chip info structure
2729 * @addr: feature address.
2730 * @subfeature_param: the subfeature parameters, a four bytes array.
2731 */
2732static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
2733 int addr, uint8_t *subfeature_param)
2734{
2735 if (!chip->onfi_version)
2736 return -EINVAL;
2737
2738 /* clear the sub feature parameters */
2739 memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
2740
2741 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
2742 chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2743 return 0;
2744}
2745
2746/**
2758 * nand_suspend - [MTD Interface] Suspend the NAND flash 2747 * nand_suspend - [MTD Interface] Suspend the NAND flash
2759 * @mtd: MTD device structure 2748 * @mtd: MTD device structure
2760 */ 2749 */
@@ -2809,8 +2798,6 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
2809 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; 2798 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2810 if (!chip->read_buf) 2799 if (!chip->read_buf)
2811 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; 2800 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2812 if (!chip->verify_buf)
2813 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2814 if (!chip->scan_bbt) 2801 if (!chip->scan_bbt)
2815 chip->scan_bbt = nand_default_bbt; 2802 chip->scan_bbt = nand_default_bbt;
2816 2803
@@ -2914,14 +2901,250 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2914 if (le16_to_cpu(p->features) & 1) 2901 if (le16_to_cpu(p->features) & 1)
2915 *busw = NAND_BUSWIDTH_16; 2902 *busw = NAND_BUSWIDTH_16;
2916 2903
2917 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2918 chip->options |= NAND_NO_READRDY & NAND_CHIPOPTIONS_MSK;
2919
2920 pr_info("ONFI flash detected\n"); 2904 pr_info("ONFI flash detected\n");
2921 return 1; 2905 return 1;
2922} 2906}
2923 2907
2924/* 2908/*
2909 * nand_id_has_period - Check if an ID string has a given wraparound period
2910 * @id_data: the ID string
2911 * @arrlen: the length of the @id_data array
2912 * @period: the period of repitition
2913 *
2914 * Check if an ID string is repeated within a given sequence of bytes at
2915 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
2916 * period of 2). This is a helper function for nand_id_len(). Returns non-zero
2917 * if the repetition has a period of @period; otherwise, returns zero.
2918 */
2919static int nand_id_has_period(u8 *id_data, int arrlen, int period)
2920{
2921 int i, j;
2922 for (i = 0; i < period; i++)
2923 for (j = i + period; j < arrlen; j += period)
2924 if (id_data[i] != id_data[j])
2925 return 0;
2926 return 1;
2927}
2928
2929/*
2930 * nand_id_len - Get the length of an ID string returned by CMD_READID
2931 * @id_data: the ID string
2932 * @arrlen: the length of the @id_data array
2933
2934 * Returns the length of the ID string, according to known wraparound/trailing
2935 * zero patterns. If no pattern exists, returns the length of the array.
2936 */
2937static int nand_id_len(u8 *id_data, int arrlen)
2938{
2939 int last_nonzero, period;
2940
2941 /* Find last non-zero byte */
2942 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
2943 if (id_data[last_nonzero])
2944 break;
2945
2946 /* All zeros */
2947 if (last_nonzero < 0)
2948 return 0;
2949
2950 /* Calculate wraparound period */
2951 for (period = 1; period < arrlen; period++)
2952 if (nand_id_has_period(id_data, arrlen, period))
2953 break;
2954
2955 /* There's a repeated pattern */
2956 if (period < arrlen)
2957 return period;
2958
2959 /* There are trailing zeros */
2960 if (last_nonzero < arrlen - 1)
2961 return last_nonzero + 1;
2962
2963 /* No pattern detected */
2964 return arrlen;
2965}
2966
2967/*
2968 * Many new NAND share similar device ID codes, which represent the size of the
2969 * chip. The rest of the parameters must be decoded according to generic or
2970 * manufacturer-specific "extended ID" decoding patterns.
2971 */
2972static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
2973 u8 id_data[8], int *busw)
2974{
2975 int extid, id_len;
2976 /* The 3rd id byte holds MLC / multichip data */
2977 chip->cellinfo = id_data[2];
2978 /* The 4th id byte is the important one */
2979 extid = id_data[3];
2980
2981 id_len = nand_id_len(id_data, 8);
2982
2983 /*
2984 * Field definitions are in the following datasheets:
2985 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
2986 * New style (6 byte ID): Samsung K9GAG08U0F (p.44)
2987 * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
2988 *
2989 * Check for ID length, cell type, and Hynix/Samsung ID to decide what
2990 * to do.
2991 */
2992 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG) {
2993 /* Calc pagesize */
2994 mtd->writesize = 2048 << (extid & 0x03);
2995 extid >>= 2;
2996 /* Calc oobsize */
2997 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
2998 case 1:
2999 mtd->oobsize = 128;
3000 break;
3001 case 2:
3002 mtd->oobsize = 218;
3003 break;
3004 case 3:
3005 mtd->oobsize = 400;
3006 break;
3007 case 4:
3008 mtd->oobsize = 436;
3009 break;
3010 case 5:
3011 mtd->oobsize = 512;
3012 break;
3013 case 6:
3014 default: /* Other cases are "reserved" (unknown) */
3015 mtd->oobsize = 640;
3016 break;
3017 }
3018 extid >>= 2;
3019 /* Calc blocksize */
3020 mtd->erasesize = (128 * 1024) <<
3021 (((extid >> 1) & 0x04) | (extid & 0x03));
3022 *busw = 0;
3023 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
3024 (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
3025 unsigned int tmp;
3026
3027 /* Calc pagesize */
3028 mtd->writesize = 2048 << (extid & 0x03);
3029 extid >>= 2;
3030 /* Calc oobsize */
3031 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
3032 case 0:
3033 mtd->oobsize = 128;
3034 break;
3035 case 1:
3036 mtd->oobsize = 224;
3037 break;
3038 case 2:
3039 mtd->oobsize = 448;
3040 break;
3041 case 3:
3042 mtd->oobsize = 64;
3043 break;
3044 case 4:
3045 mtd->oobsize = 32;
3046 break;
3047 case 5:
3048 mtd->oobsize = 16;
3049 break;
3050 default:
3051 mtd->oobsize = 640;
3052 break;
3053 }
3054 extid >>= 2;
3055 /* Calc blocksize */
3056 tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
3057 if (tmp < 0x03)
3058 mtd->erasesize = (128 * 1024) << tmp;
3059 else if (tmp == 0x03)
3060 mtd->erasesize = 768 * 1024;
3061 else
3062 mtd->erasesize = (64 * 1024) << tmp;
3063 *busw = 0;
3064 } else {
3065 /* Calc pagesize */
3066 mtd->writesize = 1024 << (extid & 0x03);
3067 extid >>= 2;
3068 /* Calc oobsize */
3069 mtd->oobsize = (8 << (extid & 0x01)) *
3070 (mtd->writesize >> 9);
3071 extid >>= 2;
3072 /* Calc blocksize. Blocksize is multiples of 64KiB */
3073 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3074 extid >>= 2;
3075 /* Get buswidth information */
3076 *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
3077 }
3078}
3079
3080/*
3081 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
3082 * decodes a matching ID table entry and assigns the MTD size parameters for
3083 * the chip.
3084 */
3085static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
3086 struct nand_flash_dev *type, u8 id_data[8],
3087 int *busw)
3088{
3089 int maf_id = id_data[0];
3090
3091 mtd->erasesize = type->erasesize;
3092 mtd->writesize = type->pagesize;
3093 mtd->oobsize = mtd->writesize / 32;
3094 *busw = type->options & NAND_BUSWIDTH_16;
3095
3096 /*
3097 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3098 * some Spansion chips have erasesize that conflicts with size
3099 * listed in nand_ids table.
3100 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3101 */
3102 if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
3103 && id_data[6] == 0x00 && id_data[7] == 0x00
3104 && mtd->writesize == 512) {
3105 mtd->erasesize = 128 * 1024;
3106 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3107 }
3108}
3109
3110/*
3111 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
3112 * heuristic patterns using various detected parameters (e.g., manufacturer,
3113 * page size, cell-type information).
3114 */
3115static void nand_decode_bbm_options(struct mtd_info *mtd,
3116 struct nand_chip *chip, u8 id_data[8])
3117{
3118 int maf_id = id_data[0];
3119
3120 /* Set the bad block position */
3121 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
3122 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
3123 else
3124 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
3125
3126 /*
3127 * Bad block marker is stored in the last page of each block on Samsung
3128 * and Hynix MLC devices; stored in first two pages of each block on
3129 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
3130 * AMD/Spansion, and Macronix. All others scan only the first page.
3131 */
3132 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3133 (maf_id == NAND_MFR_SAMSUNG ||
3134 maf_id == NAND_MFR_HYNIX))
3135 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3136 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3137 (maf_id == NAND_MFR_SAMSUNG ||
3138 maf_id == NAND_MFR_HYNIX ||
3139 maf_id == NAND_MFR_TOSHIBA ||
3140 maf_id == NAND_MFR_AMD ||
3141 maf_id == NAND_MFR_MACRONIX)) ||
3142 (mtd->writesize == 2048 &&
3143 maf_id == NAND_MFR_MICRON))
3144 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3145}
3146
3147/*
2925 * Get the flash and manufacturer id and lookup if the type is supported. 3148 * Get the flash and manufacturer id and lookup if the type is supported.
2926 */ 3149 */
2927static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, 3150static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
@@ -2932,7 +3155,6 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2932{ 3155{
2933 int i, maf_idx; 3156 int i, maf_idx;
2934 u8 id_data[8]; 3157 u8 id_data[8];
2935 int ret;
2936 3158
2937 /* Select the device */ 3159 /* Select the device */
2938 chip->select_chip(mtd, 0); 3160 chip->select_chip(mtd, 0);
@@ -2959,7 +3181,8 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2959 3181
2960 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); 3182 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2961 3183
2962 for (i = 0; i < 2; i++) 3184 /* Read entire ID string */
3185 for (i = 0; i < 8; i++)
2963 id_data[i] = chip->read_byte(mtd); 3186 id_data[i] = chip->read_byte(mtd);
2964 3187
2965 if (id_data[0] != *maf_id || id_data[1] != *dev_id) { 3188 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
@@ -2979,18 +3202,10 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2979 chip->onfi_version = 0; 3202 chip->onfi_version = 0;
2980 if (!type->name || !type->pagesize) { 3203 if (!type->name || !type->pagesize) {
2981 /* Check is chip is ONFI compliant */ 3204 /* Check is chip is ONFI compliant */
2982 ret = nand_flash_detect_onfi(mtd, chip, &busw); 3205 if (nand_flash_detect_onfi(mtd, chip, &busw))
2983 if (ret)
2984 goto ident_done; 3206 goto ident_done;
2985 } 3207 }
2986 3208
2987 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2988
2989 /* Read entire ID string */
2990
2991 for (i = 0; i < 8; i++)
2992 id_data[i] = chip->read_byte(mtd);
2993
2994 if (!type->name) 3209 if (!type->name)
2995 return ERR_PTR(-ENODEV); 3210 return ERR_PTR(-ENODEV);
2996 3211
@@ -3003,86 +3218,13 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
3003 /* Set the pagesize, oobsize, erasesize by the driver */ 3218 /* Set the pagesize, oobsize, erasesize by the driver */
3004 busw = chip->init_size(mtd, chip, id_data); 3219 busw = chip->init_size(mtd, chip, id_data);
3005 } else if (!type->pagesize) { 3220 } else if (!type->pagesize) {
3006 int extid; 3221 /* Decode parameters from extended ID */
3007 /* The 3rd id byte holds MLC / multichip data */ 3222 nand_decode_ext_id(mtd, chip, id_data, &busw);
3008 chip->cellinfo = id_data[2];
3009 /* The 4th id byte is the important one */
3010 extid = id_data[3];
3011
3012 /*
3013 * Field definitions are in the following datasheets:
3014 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
3015 * New style (6 byte ID): Samsung K9GBG08U0M (p.40)
3016 *
3017 * Check for wraparound + Samsung ID + nonzero 6th byte
3018 * to decide what to do.
3019 */
3020 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
3021 id_data[0] == NAND_MFR_SAMSUNG &&
3022 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3023 id_data[5] != 0x00) {
3024 /* Calc pagesize */
3025 mtd->writesize = 2048 << (extid & 0x03);
3026 extid >>= 2;
3027 /* Calc oobsize */
3028 switch (extid & 0x03) {
3029 case 1:
3030 mtd->oobsize = 128;
3031 break;
3032 case 2:
3033 mtd->oobsize = 218;
3034 break;
3035 case 3:
3036 mtd->oobsize = 400;
3037 break;
3038 default:
3039 mtd->oobsize = 436;
3040 break;
3041 }
3042 extid >>= 2;
3043 /* Calc blocksize */
3044 mtd->erasesize = (128 * 1024) <<
3045 (((extid >> 1) & 0x04) | (extid & 0x03));
3046 busw = 0;
3047 } else {
3048 /* Calc pagesize */
3049 mtd->writesize = 1024 << (extid & 0x03);
3050 extid >>= 2;
3051 /* Calc oobsize */
3052 mtd->oobsize = (8 << (extid & 0x01)) *
3053 (mtd->writesize >> 9);
3054 extid >>= 2;
3055 /* Calc blocksize. Blocksize is multiples of 64KiB */
3056 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3057 extid >>= 2;
3058 /* Get buswidth information */
3059 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
3060 }
3061 } else { 3223 } else {
3062 /* 3224 nand_decode_id(mtd, chip, type, id_data, &busw);
3063 * Old devices have chip data hardcoded in the device id table.
3064 */
3065 mtd->erasesize = type->erasesize;
3066 mtd->writesize = type->pagesize;
3067 mtd->oobsize = mtd->writesize / 32;
3068 busw = type->options & NAND_BUSWIDTH_16;
3069
3070 /*
3071 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3072 * some Spansion chips have erasesize that conflicts with size
3073 * listed in nand_ids table.
3074 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3075 */
3076 if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
3077 id_data[5] == 0x00 && id_data[6] == 0x00 &&
3078 id_data[7] == 0x00 && mtd->writesize == 512) {
3079 mtd->erasesize = 128 * 1024;
3080 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3081 }
3082 } 3225 }
3083 /* Get chip options, preserve non chip based options */ 3226 /* Get chip options */
3084 chip->options &= ~NAND_CHIPOPTIONS_MSK; 3227 chip->options |= type->options;
3085 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
3086 3228
3087 /* 3229 /*
3088 * Check if chip is not a Samsung device. Do not clear the 3230 * Check if chip is not a Samsung device. Do not clear the
@@ -3112,6 +3254,8 @@ ident_done:
3112 return ERR_PTR(-EINVAL); 3254 return ERR_PTR(-EINVAL);
3113 } 3255 }
3114 3256
3257 nand_decode_bbm_options(mtd, chip, id_data);
3258
3115 /* Calculate the address shift from the page size */ 3259 /* Calculate the address shift from the page size */
3116 chip->page_shift = ffs(mtd->writesize) - 1; 3260 chip->page_shift = ffs(mtd->writesize) - 1;
3117 /* Convert chipsize to number of pages per chip -1 */ 3261 /* Convert chipsize to number of pages per chip -1 */
@@ -3128,33 +3272,6 @@ ident_done:
3128 3272
3129 chip->badblockbits = 8; 3273 chip->badblockbits = 8;
3130 3274
3131 /* Set the bad block position */
3132 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
3133 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
3134 else
3135 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
3136
3137 /*
3138 * Bad block marker is stored in the last page of each block
3139 * on Samsung and Hynix MLC devices; stored in first two pages
3140 * of each block on Micron devices with 2KiB pages and on
3141 * SLC Samsung, Hynix, Toshiba, AMD/Spansion, and Macronix.
3142 * All others scan only the first page.
3143 */
3144 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3145 (*maf_id == NAND_MFR_SAMSUNG ||
3146 *maf_id == NAND_MFR_HYNIX))
3147 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3148 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3149 (*maf_id == NAND_MFR_SAMSUNG ||
3150 *maf_id == NAND_MFR_HYNIX ||
3151 *maf_id == NAND_MFR_TOSHIBA ||
3152 *maf_id == NAND_MFR_AMD ||
3153 *maf_id == NAND_MFR_MACRONIX)) ||
3154 (mtd->writesize == 2048 &&
3155 *maf_id == NAND_MFR_MICRON))
3156 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3157
3158 /* Check for AND chips with 4 page planes */ 3275 /* Check for AND chips with 4 page planes */
3159 if (chip->options & NAND_4PAGE_ARRAY) 3276 if (chip->options & NAND_4PAGE_ARRAY)
3160 chip->erase_cmd = multi_erase_cmd; 3277 chip->erase_cmd = multi_erase_cmd;
@@ -3284,6 +3401,12 @@ int nand_scan_tail(struct mtd_info *mtd)
3284 if (!chip->write_page) 3401 if (!chip->write_page)
3285 chip->write_page = nand_write_page; 3402 chip->write_page = nand_write_page;
3286 3403
3404 /* set for ONFI nand */
3405 if (!chip->onfi_set_features)
3406 chip->onfi_set_features = nand_onfi_set_features;
3407 if (!chip->onfi_get_features)
3408 chip->onfi_get_features = nand_onfi_get_features;
3409
3287 /* 3410 /*
3288 * Check ECC mode, default to software if 3byte/512byte hardware ECC is 3411 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
3289 * selected and we have 256 byte pagesize fallback to software ECC 3412 * selected and we have 256 byte pagesize fallback to software ECC
@@ -3477,6 +3600,10 @@ int nand_scan_tail(struct mtd_info *mtd)
3477 /* Invalidate the pagebuffer reference */ 3600 /* Invalidate the pagebuffer reference */
3478 chip->pagebuf = -1; 3601 chip->pagebuf = -1;
3479 3602
3603 /* Large page NAND with SOFT_ECC should support subpage reads */
3604 if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
3605 chip->options |= NAND_SUBPAGE_READ;
3606
3480 /* Fill in remaining MTD driver data */ 3607 /* Fill in remaining MTD driver data */
3481 mtd->type = MTD_NANDFLASH; 3608 mtd->type = MTD_NANDFLASH;
3482 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : 3609 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 23:38:59 -0500