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path: root/drivers/mtd/nand/fsl_upm.c
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Diffstat (limited to 'drivers/mtd/nand/fsl_upm.c')
-rw-r--r--drivers/mtd/nand/fsl_upm.c119
1 files changed, 94 insertions, 25 deletions
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 7815a404a632..d120cd8d7267 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -23,6 +23,10 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/fsl_lbc.h> 24#include <asm/fsl_lbc.h>
25 25
26#define FSL_UPM_WAIT_RUN_PATTERN 0x1
27#define FSL_UPM_WAIT_WRITE_BYTE 0x2
28#define FSL_UPM_WAIT_WRITE_BUFFER 0x4
29
26struct fsl_upm_nand { 30struct fsl_upm_nand {
27 struct device *dev; 31 struct device *dev;
28 struct mtd_info mtd; 32 struct mtd_info mtd;
@@ -36,8 +40,12 @@ struct fsl_upm_nand {
36 uint8_t upm_addr_offset; 40 uint8_t upm_addr_offset;
37 uint8_t upm_cmd_offset; 41 uint8_t upm_cmd_offset;
38 void __iomem *io_base; 42 void __iomem *io_base;
39 int rnb_gpio; 43 int rnb_gpio[NAND_MAX_CHIPS];
44 uint32_t mchip_offsets[NAND_MAX_CHIPS];
45 uint32_t mchip_count;
46 uint32_t mchip_number;
40 int chip_delay; 47 int chip_delay;
48 uint32_t wait_flags;
41}; 49};
42 50
43#define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd) 51#define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd)
@@ -46,7 +54,7 @@ static int fun_chip_ready(struct mtd_info *mtd)
46{ 54{
47 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd); 55 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
48 56
49 if (gpio_get_value(fun->rnb_gpio)) 57 if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
50 return 1; 58 return 1;
51 59
52 dev_vdbg(fun->dev, "busy\n"); 60 dev_vdbg(fun->dev, "busy\n");
@@ -55,9 +63,9 @@ static int fun_chip_ready(struct mtd_info *mtd)
55 63
56static void fun_wait_rnb(struct fsl_upm_nand *fun) 64static void fun_wait_rnb(struct fsl_upm_nand *fun)
57{ 65{
58 int cnt = 1000000; 66 if (fun->rnb_gpio[fun->mchip_number] >= 0) {
67 int cnt = 1000000;
59 68
60 if (fun->rnb_gpio >= 0) {
61 while (--cnt && !fun_chip_ready(&fun->mtd)) 69 while (--cnt && !fun_chip_ready(&fun->mtd))
62 cpu_relax(); 70 cpu_relax();
63 if (!cnt) 71 if (!cnt)
@@ -69,7 +77,9 @@ static void fun_wait_rnb(struct fsl_upm_nand *fun)
69 77
70static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 78static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
71{ 79{
80 struct nand_chip *chip = mtd->priv;
72 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd); 81 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
82 u32 mar;
73 83
74 if (!(ctrl & fun->last_ctrl)) { 84 if (!(ctrl & fun->last_ctrl)) {
75 fsl_upm_end_pattern(&fun->upm); 85 fsl_upm_end_pattern(&fun->upm);
@@ -87,9 +97,28 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
87 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); 97 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
88 } 98 }
89 99
90 fsl_upm_run_pattern(&fun->upm, fun->io_base, cmd); 100 mar = (cmd << (32 - fun->upm.width)) |
101 fun->mchip_offsets[fun->mchip_number];
102 fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
103
104 if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
105 fun_wait_rnb(fun);
106}
107
108static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
109{
110 struct nand_chip *chip = mtd->priv;
111 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
91 112
92 fun_wait_rnb(fun); 113 if (mchip_nr == -1) {
114 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
115 } else if (mchip_nr >= 0) {
116 fun->mchip_number = mchip_nr;
117 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
118 chip->IO_ADDR_W = chip->IO_ADDR_R;
119 } else {
120 BUG();
121 }
93} 122}
94 123
95static uint8_t fun_read_byte(struct mtd_info *mtd) 124static uint8_t fun_read_byte(struct mtd_info *mtd)
@@ -115,8 +144,11 @@ static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
115 144
116 for (i = 0; i < len; i++) { 145 for (i = 0; i < len; i++) {
117 out_8(fun->chip.IO_ADDR_W, buf[i]); 146 out_8(fun->chip.IO_ADDR_W, buf[i]);
118 fun_wait_rnb(fun); 147 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
148 fun_wait_rnb(fun);
119 } 149 }
150 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
151 fun_wait_rnb(fun);
120} 152}
121 153
122static int __devinit fun_chip_init(struct fsl_upm_nand *fun, 154static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
@@ -137,8 +169,10 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
137 fun->chip.read_buf = fun_read_buf; 169 fun->chip.read_buf = fun_read_buf;
138 fun->chip.write_buf = fun_write_buf; 170 fun->chip.write_buf = fun_write_buf;
139 fun->chip.ecc.mode = NAND_ECC_SOFT; 171 fun->chip.ecc.mode = NAND_ECC_SOFT;
172 if (fun->mchip_count > 1)
173 fun->chip.select_chip = fun_select_chip;
140 174
141 if (fun->rnb_gpio >= 0) 175 if (fun->rnb_gpio[0] >= 0)
142 fun->chip.dev_ready = fun_chip_ready; 176 fun->chip.dev_ready = fun_chip_ready;
143 177
144 fun->mtd.priv = &fun->chip; 178 fun->mtd.priv = &fun->chip;
@@ -155,7 +189,7 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
155 goto err; 189 goto err;
156 } 190 }
157 191
158 ret = nand_scan(&fun->mtd, 1); 192 ret = nand_scan(&fun->mtd, fun->mchip_count);
159 if (ret) 193 if (ret)
160 goto err; 194 goto err;
161 195
@@ -185,8 +219,10 @@ static int __devinit fun_probe(struct of_device *ofdev,
185 struct fsl_upm_nand *fun; 219 struct fsl_upm_nand *fun;
186 struct resource io_res; 220 struct resource io_res;
187 const uint32_t *prop; 221 const uint32_t *prop;
222 int rnb_gpio;
188 int ret; 223 int ret;
189 int size; 224 int size;
225 int i;
190 226
191 fun = kzalloc(sizeof(*fun), GFP_KERNEL); 227 fun = kzalloc(sizeof(*fun), GFP_KERNEL);
192 if (!fun) 228 if (!fun)
@@ -208,7 +244,7 @@ static int __devinit fun_probe(struct of_device *ofdev,
208 if (!prop || size != sizeof(uint32_t)) { 244 if (!prop || size != sizeof(uint32_t)) {
209 dev_err(&ofdev->dev, "can't get UPM address offset\n"); 245 dev_err(&ofdev->dev, "can't get UPM address offset\n");
210 ret = -EINVAL; 246 ret = -EINVAL;
211 goto err2; 247 goto err1;
212 } 248 }
213 fun->upm_addr_offset = *prop; 249 fun->upm_addr_offset = *prop;
214 250
@@ -216,21 +252,40 @@ static int __devinit fun_probe(struct of_device *ofdev,
216 if (!prop || size != sizeof(uint32_t)) { 252 if (!prop || size != sizeof(uint32_t)) {
217 dev_err(&ofdev->dev, "can't get UPM command offset\n"); 253 dev_err(&ofdev->dev, "can't get UPM command offset\n");
218 ret = -EINVAL; 254 ret = -EINVAL;
219 goto err2; 255 goto err1;
220 } 256 }
221 fun->upm_cmd_offset = *prop; 257 fun->upm_cmd_offset = *prop;
222 258
223 fun->rnb_gpio = of_get_gpio(ofdev->node, 0); 259 prop = of_get_property(ofdev->node,
224 if (fun->rnb_gpio >= 0) { 260 "fsl,upm-addr-line-cs-offsets", &size);
225 ret = gpio_request(fun->rnb_gpio, dev_name(&ofdev->dev)); 261 if (prop && (size / sizeof(uint32_t)) > 0) {
226 if (ret) { 262 fun->mchip_count = size / sizeof(uint32_t);
227 dev_err(&ofdev->dev, "can't request RNB gpio\n"); 263 if (fun->mchip_count >= NAND_MAX_CHIPS) {
264 dev_err(&ofdev->dev, "too much multiple chips\n");
265 goto err1;
266 }
267 for (i = 0; i < fun->mchip_count; i++)
268 fun->mchip_offsets[i] = prop[i];
269 } else {
270 fun->mchip_count = 1;
271 }
272
273 for (i = 0; i < fun->mchip_count; i++) {
274 fun->rnb_gpio[i] = -1;
275 rnb_gpio = of_get_gpio(ofdev->node, i);
276 if (rnb_gpio >= 0) {
277 ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
278 if (ret) {
279 dev_err(&ofdev->dev,
280 "can't request RNB gpio #%d\n", i);
281 goto err2;
282 }
283 gpio_direction_input(rnb_gpio);
284 fun->rnb_gpio[i] = rnb_gpio;
285 } else if (rnb_gpio == -EINVAL) {
286 dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
228 goto err2; 287 goto err2;
229 } 288 }
230 gpio_direction_input(fun->rnb_gpio);
231 } else if (fun->rnb_gpio == -EINVAL) {
232 dev_err(&ofdev->dev, "specified RNB gpio is invalid\n");
233 goto err2;
234 } 289 }
235 290
236 prop = of_get_property(ofdev->node, "chip-delay", NULL); 291 prop = of_get_property(ofdev->node, "chip-delay", NULL);
@@ -239,8 +294,15 @@ static int __devinit fun_probe(struct of_device *ofdev,
239 else 294 else
240 fun->chip_delay = 50; 295 fun->chip_delay = 50;
241 296
297 prop = of_get_property(ofdev->node, "fsl,upm-wait-flags", &size);
298 if (prop && size == sizeof(uint32_t))
299 fun->wait_flags = *prop;
300 else
301 fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
302 FSL_UPM_WAIT_WRITE_BYTE;
303
242 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start, 304 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
243 io_res.end - io_res.start + 1); 305 io_res.end - io_res.start + 1);
244 if (!fun->io_base) { 306 if (!fun->io_base) {
245 ret = -ENOMEM; 307 ret = -ENOMEM;
246 goto err2; 308 goto err2;
@@ -257,8 +319,11 @@ static int __devinit fun_probe(struct of_device *ofdev,
257 319
258 return 0; 320 return 0;
259err2: 321err2:
260 if (fun->rnb_gpio >= 0) 322 for (i = 0; i < fun->mchip_count; i++) {
261 gpio_free(fun->rnb_gpio); 323 if (fun->rnb_gpio[i] < 0)
324 break;
325 gpio_free(fun->rnb_gpio[i]);
326 }
262err1: 327err1:
263 kfree(fun); 328 kfree(fun);
264 329
@@ -268,12 +333,16 @@ err1:
268static int __devexit fun_remove(struct of_device *ofdev) 333static int __devexit fun_remove(struct of_device *ofdev)
269{ 334{
270 struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev); 335 struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
336 int i;
271 337
272 nand_release(&fun->mtd); 338 nand_release(&fun->mtd);
273 kfree(fun->mtd.name); 339 kfree(fun->mtd.name);
274 340
275 if (fun->rnb_gpio >= 0) 341 for (i = 0; i < fun->mchip_count; i++) {
276 gpio_free(fun->rnb_gpio); 342 if (fun->rnb_gpio[i] < 0)
343 break;
344 gpio_free(fun->rnb_gpio[i]);
345 }
277 346
278 kfree(fun); 347 kfree(fun);
279 348