diff options
Diffstat (limited to 'drivers/mtd/maps/l440gx.c')
-rw-r--r-- | drivers/mtd/maps/l440gx.c | 157 |
1 files changed, 157 insertions, 0 deletions
diff --git a/drivers/mtd/maps/l440gx.c b/drivers/mtd/maps/l440gx.c new file mode 100644 index 000000000000..b08668212ab7 --- /dev/null +++ b/drivers/mtd/maps/l440gx.c | |||
@@ -0,0 +1,157 @@ | |||
1 | /* | ||
2 | * $Id: l440gx.c,v 1.17 2004/11/28 09:40:39 dwmw2 Exp $ | ||
3 | * | ||
4 | * BIOS Flash chip on Intel 440GX board. | ||
5 | * | ||
6 | * Bugs this currently does not work under linuxBIOS. | ||
7 | */ | ||
8 | |||
9 | #include <linux/module.h> | ||
10 | #include <linux/pci.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <asm/io.h> | ||
14 | #include <linux/mtd/mtd.h> | ||
15 | #include <linux/mtd/map.h> | ||
16 | #include <linux/config.h> | ||
17 | |||
18 | #define PIIXE_IOBASE_RESOURCE 11 | ||
19 | |||
20 | #define WINDOW_ADDR 0xfff00000 | ||
21 | #define WINDOW_SIZE 0x00100000 | ||
22 | #define BUSWIDTH 1 | ||
23 | |||
24 | static u32 iobase; | ||
25 | #define IOBASE iobase | ||
26 | #define TRIBUF_PORT (IOBASE+0x37) | ||
27 | #define VPP_PORT (IOBASE+0x28) | ||
28 | |||
29 | static struct mtd_info *mymtd; | ||
30 | |||
31 | |||
32 | /* Is this really the vpp port? */ | ||
33 | static void l440gx_set_vpp(struct map_info *map, int vpp) | ||
34 | { | ||
35 | unsigned long l; | ||
36 | |||
37 | l = inl(VPP_PORT); | ||
38 | if (vpp) { | ||
39 | l |= 1; | ||
40 | } else { | ||
41 | l &= ~1; | ||
42 | } | ||
43 | outl(l, VPP_PORT); | ||
44 | } | ||
45 | |||
46 | static struct map_info l440gx_map = { | ||
47 | .name = "L440GX BIOS", | ||
48 | .size = WINDOW_SIZE, | ||
49 | .bankwidth = BUSWIDTH, | ||
50 | .phys = WINDOW_ADDR, | ||
51 | #if 0 | ||
52 | /* FIXME verify that this is the | ||
53 | * appripriate code for vpp enable/disable | ||
54 | */ | ||
55 | .set_vpp = l440gx_set_vpp | ||
56 | #endif | ||
57 | }; | ||
58 | |||
59 | static int __init init_l440gx(void) | ||
60 | { | ||
61 | struct pci_dev *dev, *pm_dev; | ||
62 | struct resource *pm_iobase; | ||
63 | __u16 word; | ||
64 | |||
65 | dev = pci_find_device(PCI_VENDOR_ID_INTEL, | ||
66 | PCI_DEVICE_ID_INTEL_82371AB_0, NULL); | ||
67 | |||
68 | pm_dev = pci_find_device(PCI_VENDOR_ID_INTEL, | ||
69 | PCI_DEVICE_ID_INTEL_82371AB_3, NULL); | ||
70 | |||
71 | if (!dev || !pm_dev) { | ||
72 | printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n"); | ||
73 | return -ENODEV; | ||
74 | } | ||
75 | |||
76 | l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE); | ||
77 | |||
78 | if (!l440gx_map.virt) { | ||
79 | printk(KERN_WARNING "Failed to ioremap L440GX flash region\n"); | ||
80 | return -ENOMEM; | ||
81 | } | ||
82 | simple_map_init(&l440gx_map); | ||
83 | printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt); | ||
84 | |||
85 | /* Setup the pm iobase resource | ||
86 | * This code should move into some kind of generic bridge | ||
87 | * driver but for the moment I'm content with getting the | ||
88 | * allocation correct. | ||
89 | */ | ||
90 | pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE]; | ||
91 | if (!(pm_iobase->flags & IORESOURCE_IO)) { | ||
92 | pm_iobase->name = "pm iobase"; | ||
93 | pm_iobase->start = 0; | ||
94 | pm_iobase->end = 63; | ||
95 | pm_iobase->flags = IORESOURCE_IO; | ||
96 | |||
97 | /* Put the current value in the resource */ | ||
98 | pci_read_config_dword(pm_dev, 0x40, &iobase); | ||
99 | iobase &= ~1; | ||
100 | pm_iobase->start += iobase & ~1; | ||
101 | pm_iobase->end += iobase & ~1; | ||
102 | |||
103 | /* Allocate the resource region */ | ||
104 | if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) { | ||
105 | printk(KERN_WARNING "Could not allocate pm iobase resource\n"); | ||
106 | iounmap(l440gx_map.virt); | ||
107 | return -ENXIO; | ||
108 | } | ||
109 | } | ||
110 | /* Set the iobase */ | ||
111 | iobase = pm_iobase->start; | ||
112 | pci_write_config_dword(pm_dev, 0x40, iobase | 1); | ||
113 | |||
114 | |||
115 | /* Set XBCS# */ | ||
116 | pci_read_config_word(dev, 0x4e, &word); | ||
117 | word |= 0x4; | ||
118 | pci_write_config_word(dev, 0x4e, word); | ||
119 | |||
120 | /* Supply write voltage to the chip */ | ||
121 | l440gx_set_vpp(&l440gx_map, 1); | ||
122 | |||
123 | /* Enable the gate on the WE line */ | ||
124 | outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT); | ||
125 | |||
126 | printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n"); | ||
127 | |||
128 | mymtd = do_map_probe("jedec_probe", &l440gx_map); | ||
129 | if (!mymtd) { | ||
130 | printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n"); | ||
131 | mymtd = do_map_probe("map_rom", &l440gx_map); | ||
132 | } | ||
133 | if (mymtd) { | ||
134 | mymtd->owner = THIS_MODULE; | ||
135 | |||
136 | add_mtd_device(mymtd); | ||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | iounmap(l440gx_map.virt); | ||
141 | return -ENXIO; | ||
142 | } | ||
143 | |||
144 | static void __exit cleanup_l440gx(void) | ||
145 | { | ||
146 | del_mtd_device(mymtd); | ||
147 | map_destroy(mymtd); | ||
148 | |||
149 | iounmap(l440gx_map.virt); | ||
150 | } | ||
151 | |||
152 | module_init(init_l440gx); | ||
153 | module_exit(cleanup_l440gx); | ||
154 | |||
155 | MODULE_LICENSE("GPL"); | ||
156 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); | ||
157 | MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards"); | ||