diff options
Diffstat (limited to 'drivers/mtd/maps/cstm_mips_ixx.c')
-rw-r--r-- | drivers/mtd/maps/cstm_mips_ixx.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/mtd/maps/cstm_mips_ixx.c b/drivers/mtd/maps/cstm_mips_ixx.c index ae9252fbf176..a370953c1513 100644 --- a/drivers/mtd/maps/cstm_mips_ixx.c +++ b/drivers/mtd/maps/cstm_mips_ixx.c | |||
@@ -1,10 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: cstm_mips_ixx.c,v 1.12 2004/11/04 13:24:14 gleixner Exp $ | 2 | * $Id: cstm_mips_ixx.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $ |
3 | * | 3 | * |
4 | * Mapping of a custom board with both AMD CFI and JEDEC flash in partitions. | 4 | * Mapping of a custom board with both AMD CFI and JEDEC flash in partitions. |
5 | * Config with both CFI and JEDEC device support. | 5 | * Config with both CFI and JEDEC device support. |
6 | * | 6 | * |
7 | * Basically physmap.c with the addition of partitions and | 7 | * Basically physmap.c with the addition of partitions and |
8 | * an array of mapping info to accomodate more than one flash type per board. | 8 | * an array of mapping info to accomodate more than one flash type per board. |
9 | * | 9 | * |
10 | * Copyright 2000 MontaVista Software Inc. | 10 | * Copyright 2000 MontaVista Software Inc. |
@@ -69,7 +69,7 @@ void cstm_mips_ixx_set_vpp(struct map_info *map,int vpp) | |||
69 | __u16 data; | 69 | __u16 data; |
70 | __u8 data1; | 70 | __u8 data1; |
71 | static u8 first = 1; | 71 | static u8 first = 1; |
72 | 72 | ||
73 | // Set GPIO port B pin3 to high | 73 | // Set GPIO port B pin3 to high |
74 | data = *(__u16 *)(CC_GPBCR); | 74 | data = *(__u16 *)(CC_GPBCR); |
75 | data = (data & 0xff0f) | 0x0040; | 75 | data = (data & 0xff0f) | 0x0040; |
@@ -85,7 +85,7 @@ void cstm_mips_ixx_set_vpp(struct map_info *map,int vpp) | |||
85 | } else { | 85 | } else { |
86 | if (!--vpp_count) { | 86 | if (!--vpp_count) { |
87 | __u16 data; | 87 | __u16 data; |
88 | 88 | ||
89 | // Set GPIO port B pin3 to high | 89 | // Set GPIO port B pin3 to high |
90 | data = *(__u16 *)(CC_GPBCR); | 90 | data = *(__u16 *)(CC_GPBCR); |
91 | data = (data & 0xff3f) | 0x0040; | 91 | data = (data & 0xff3f) | 0x0040; |
@@ -109,8 +109,8 @@ struct cstm_mips_ixx_info { | |||
109 | }; | 109 | }; |
110 | 110 | ||
111 | #if defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR) | 111 | #if defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR) |
112 | #define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type | 112 | #define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type |
113 | const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] = | 113 | const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] = |
114 | { | 114 | { |
115 | { // 28F128J3A in 2x16 configuration | 115 | { // 28F128J3A in 2x16 configuration |
116 | "big flash", // name | 116 | "big flash", // name |
@@ -131,10 +131,10 @@ static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP | |||
131 | }, | 131 | }, |
132 | }; | 132 | }; |
133 | #else /* defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR) */ | 133 | #else /* defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR) */ |
134 | #define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type | 134 | #define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type |
135 | const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] = | 135 | const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] = |
136 | { | 136 | { |
137 | { | 137 | { |
138 | "MTD flash", // name | 138 | "MTD flash", // name |
139 | CONFIG_MTD_CSTM_MIPS_IXX_START, // window_addr | 139 | CONFIG_MTD_CSTM_MIPS_IXX_START, // window_addr |
140 | CONFIG_MTD_CSTM_MIPS_IXX_LEN, // window_size | 140 | CONFIG_MTD_CSTM_MIPS_IXX_LEN, // window_size |
@@ -144,7 +144,7 @@ const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] = | |||
144 | 144 | ||
145 | }; | 145 | }; |
146 | static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = { | 146 | static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = { |
147 | { | 147 | { |
148 | { | 148 | { |
149 | .name = "main partition", | 149 | .name = "main partition", |
150 | .size = CONFIG_MTD_CSTM_MIPS_IXX_LEN, | 150 | .size = CONFIG_MTD_CSTM_MIPS_IXX_LEN, |
@@ -165,7 +165,7 @@ int __init init_cstm_mips_ixx(void) | |||
165 | 165 | ||
166 | /* Initialize mapping */ | 166 | /* Initialize mapping */ |
167 | for (i=0;i<PHYSMAP_NUMBER;i++) { | 167 | for (i=0;i<PHYSMAP_NUMBER;i++) { |
168 | printk(KERN_NOTICE "cstm_mips_ixx flash device: 0x%lx at 0x%lx\n", | 168 | printk(KERN_NOTICE "cstm_mips_ixx flash device: 0x%lx at 0x%lx\n", |
169 | cstm_mips_ixx_board_desc[i].window_size, cstm_mips_ixx_board_desc[i].window_addr); | 169 | cstm_mips_ixx_board_desc[i].window_size, cstm_mips_ixx_board_desc[i].window_addr); |
170 | 170 | ||
171 | 171 | ||
@@ -235,7 +235,7 @@ void PCISetULongByOffset(__u32 DevNumber, __u32 FuncNumber, __u32 Offset, __u32 | |||
235 | 235 | ||
236 | offset = ( unsigned long )( 0x80000000 | ( DevNumber << 11 ) + ( FuncNumber << 8 ) + Offset) ; | 236 | offset = ( unsigned long )( 0x80000000 | ( DevNumber << 11 ) + ( FuncNumber << 8 ) + Offset) ; |
237 | 237 | ||
238 | *(__u32 *)CC_CONFADDR = offset; | 238 | *(__u32 *)CC_CONFADDR = offset; |
239 | *(__u32 *)CC_CONFDATA = data; | 239 | *(__u32 *)CC_CONFDATA = data; |
240 | } | 240 | } |
241 | void setup_ITE_IVR_flash() | 241 | void setup_ITE_IVR_flash() |