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-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c137
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0002.c344
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0020.c136
-rw-r--r--drivers/mtd/chips/cfi_probe.c56
-rw-r--r--drivers/mtd/chips/cfi_util.c3
-rw-r--r--drivers/mtd/chips/fwh_lock.h6
-rw-r--r--drivers/mtd/chips/gen_probe.c15
-rw-r--r--drivers/mtd/chips/jedec_probe.c288
8 files changed, 557 insertions, 428 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index 5fbf29e1e64f..62f3ea9de848 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -615,10 +615,8 @@ static struct mtd_info *cfi_intelext_setup(struct mtd_info *mtd)
615 return mtd; 615 return mtd;
616 616
617 setup_err: 617 setup_err:
618 if(mtd) { 618 kfree(mtd->eraseregions);
619 kfree(mtd->eraseregions); 619 kfree(mtd);
620 kfree(mtd);
621 }
622 kfree(cfi->cmdset_priv); 620 kfree(cfi->cmdset_priv);
623 return NULL; 621 return NULL;
624} 622}
@@ -727,8 +725,7 @@ static int cfi_intelext_partition_fixup(struct mtd_info *mtd,
727 /* those should be reset too since 725 /* those should be reset too since
728 they create memory references. */ 726 they create memory references. */
729 init_waitqueue_head(&chip->wq); 727 init_waitqueue_head(&chip->wq);
730 spin_lock_init(&chip->_spinlock); 728 mutex_init(&chip->mutex);
731 chip->mutex = &chip->_spinlock;
732 chip++; 729 chip++;
733 } 730 }
734 } 731 }
@@ -774,9 +771,9 @@ static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long
774 if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS)) 771 if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS))
775 break; 772 break;
776 773
777 spin_unlock(chip->mutex); 774 mutex_unlock(&chip->mutex);
778 cfi_udelay(1); 775 cfi_udelay(1);
779 spin_lock(chip->mutex); 776 mutex_lock(&chip->mutex);
780 /* Someone else might have been playing with it. */ 777 /* Someone else might have been playing with it. */
781 return -EAGAIN; 778 return -EAGAIN;
782 } 779 }
@@ -823,9 +820,9 @@ static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long
823 return -EIO; 820 return -EIO;
824 } 821 }
825 822
826 spin_unlock(chip->mutex); 823 mutex_unlock(&chip->mutex);
827 cfi_udelay(1); 824 cfi_udelay(1);
828 spin_lock(chip->mutex); 825 mutex_lock(&chip->mutex);
829 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING. 826 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
830 So we can just loop here. */ 827 So we can just loop here. */
831 } 828 }
@@ -852,10 +849,10 @@ static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long
852 sleep: 849 sleep:
853 set_current_state(TASK_UNINTERRUPTIBLE); 850 set_current_state(TASK_UNINTERRUPTIBLE);
854 add_wait_queue(&chip->wq, &wait); 851 add_wait_queue(&chip->wq, &wait);
855 spin_unlock(chip->mutex); 852 mutex_unlock(&chip->mutex);
856 schedule(); 853 schedule();
857 remove_wait_queue(&chip->wq, &wait); 854 remove_wait_queue(&chip->wq, &wait);
858 spin_lock(chip->mutex); 855 mutex_lock(&chip->mutex);
859 return -EAGAIN; 856 return -EAGAIN;
860 } 857 }
861} 858}
@@ -901,20 +898,20 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
901 * it'll happily send us to sleep. In any case, when 898 * it'll happily send us to sleep. In any case, when
902 * get_chip returns success we're clear to go ahead. 899 * get_chip returns success we're clear to go ahead.
903 */ 900 */
904 ret = spin_trylock(contender->mutex); 901 ret = mutex_trylock(&contender->mutex);
905 spin_unlock(&shared->lock); 902 spin_unlock(&shared->lock);
906 if (!ret) 903 if (!ret)
907 goto retry; 904 goto retry;
908 spin_unlock(chip->mutex); 905 mutex_unlock(&chip->mutex);
909 ret = chip_ready(map, contender, contender->start, mode); 906 ret = chip_ready(map, contender, contender->start, mode);
910 spin_lock(chip->mutex); 907 mutex_lock(&chip->mutex);
911 908
912 if (ret == -EAGAIN) { 909 if (ret == -EAGAIN) {
913 spin_unlock(contender->mutex); 910 mutex_unlock(&contender->mutex);
914 goto retry; 911 goto retry;
915 } 912 }
916 if (ret) { 913 if (ret) {
917 spin_unlock(contender->mutex); 914 mutex_unlock(&contender->mutex);
918 return ret; 915 return ret;
919 } 916 }
920 spin_lock(&shared->lock); 917 spin_lock(&shared->lock);
@@ -923,10 +920,10 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
923 * in FL_SYNCING state. Put contender and retry. */ 920 * in FL_SYNCING state. Put contender and retry. */
924 if (chip->state == FL_SYNCING) { 921 if (chip->state == FL_SYNCING) {
925 put_chip(map, contender, contender->start); 922 put_chip(map, contender, contender->start);
926 spin_unlock(contender->mutex); 923 mutex_unlock(&contender->mutex);
927 goto retry; 924 goto retry;
928 } 925 }
929 spin_unlock(contender->mutex); 926 mutex_unlock(&contender->mutex);
930 } 927 }
931 928
932 /* Check if we already have suspended erase 929 /* Check if we already have suspended erase
@@ -936,10 +933,10 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
936 spin_unlock(&shared->lock); 933 spin_unlock(&shared->lock);
937 set_current_state(TASK_UNINTERRUPTIBLE); 934 set_current_state(TASK_UNINTERRUPTIBLE);
938 add_wait_queue(&chip->wq, &wait); 935 add_wait_queue(&chip->wq, &wait);
939 spin_unlock(chip->mutex); 936 mutex_unlock(&chip->mutex);
940 schedule(); 937 schedule();
941 remove_wait_queue(&chip->wq, &wait); 938 remove_wait_queue(&chip->wq, &wait);
942 spin_lock(chip->mutex); 939 mutex_lock(&chip->mutex);
943 goto retry; 940 goto retry;
944 } 941 }
945 942
@@ -969,12 +966,12 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad
969 if (shared->writing && shared->writing != chip) { 966 if (shared->writing && shared->writing != chip) {
970 /* give back ownership to who we loaned it from */ 967 /* give back ownership to who we loaned it from */
971 struct flchip *loaner = shared->writing; 968 struct flchip *loaner = shared->writing;
972 spin_lock(loaner->mutex); 969 mutex_lock(&loaner->mutex);
973 spin_unlock(&shared->lock); 970 spin_unlock(&shared->lock);
974 spin_unlock(chip->mutex); 971 mutex_unlock(&chip->mutex);
975 put_chip(map, loaner, loaner->start); 972 put_chip(map, loaner, loaner->start);
976 spin_lock(chip->mutex); 973 mutex_lock(&chip->mutex);
977 spin_unlock(loaner->mutex); 974 mutex_unlock(&loaner->mutex);
978 wake_up(&chip->wq); 975 wake_up(&chip->wq);
979 return; 976 return;
980 } 977 }
@@ -1144,7 +1141,7 @@ static int __xipram xip_wait_for_operation(
1144 (void) map_read(map, adr); 1141 (void) map_read(map, adr);
1145 xip_iprefetch(); 1142 xip_iprefetch();
1146 local_irq_enable(); 1143 local_irq_enable();
1147 spin_unlock(chip->mutex); 1144 mutex_unlock(&chip->mutex);
1148 xip_iprefetch(); 1145 xip_iprefetch();
1149 cond_resched(); 1146 cond_resched();
1150 1147
@@ -1154,15 +1151,15 @@ static int __xipram xip_wait_for_operation(
1154 * a suspended erase state. If so let's wait 1151 * a suspended erase state. If so let's wait
1155 * until it's done. 1152 * until it's done.
1156 */ 1153 */
1157 spin_lock(chip->mutex); 1154 mutex_lock(&chip->mutex);
1158 while (chip->state != newstate) { 1155 while (chip->state != newstate) {
1159 DECLARE_WAITQUEUE(wait, current); 1156 DECLARE_WAITQUEUE(wait, current);
1160 set_current_state(TASK_UNINTERRUPTIBLE); 1157 set_current_state(TASK_UNINTERRUPTIBLE);
1161 add_wait_queue(&chip->wq, &wait); 1158 add_wait_queue(&chip->wq, &wait);
1162 spin_unlock(chip->mutex); 1159 mutex_unlock(&chip->mutex);
1163 schedule(); 1160 schedule();
1164 remove_wait_queue(&chip->wq, &wait); 1161 remove_wait_queue(&chip->wq, &wait);
1165 spin_lock(chip->mutex); 1162 mutex_lock(&chip->mutex);
1166 } 1163 }
1167 /* Disallow XIP again */ 1164 /* Disallow XIP again */
1168 local_irq_disable(); 1165 local_irq_disable();
@@ -1218,10 +1215,10 @@ static int inval_cache_and_wait_for_operation(
1218 int chip_state = chip->state; 1215 int chip_state = chip->state;
1219 unsigned int timeo, sleep_time, reset_timeo; 1216 unsigned int timeo, sleep_time, reset_timeo;
1220 1217
1221 spin_unlock(chip->mutex); 1218 mutex_unlock(&chip->mutex);
1222 if (inval_len) 1219 if (inval_len)
1223 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len); 1220 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
1224 spin_lock(chip->mutex); 1221 mutex_lock(&chip->mutex);
1225 1222
1226 timeo = chip_op_time_max; 1223 timeo = chip_op_time_max;
1227 if (!timeo) 1224 if (!timeo)
@@ -1241,7 +1238,7 @@ static int inval_cache_and_wait_for_operation(
1241 } 1238 }
1242 1239
1243 /* OK Still waiting. Drop the lock, wait a while and retry. */ 1240 /* OK Still waiting. Drop the lock, wait a while and retry. */
1244 spin_unlock(chip->mutex); 1241 mutex_unlock(&chip->mutex);
1245 if (sleep_time >= 1000000/HZ) { 1242 if (sleep_time >= 1000000/HZ) {
1246 /* 1243 /*
1247 * Half of the normal delay still remaining 1244 * Half of the normal delay still remaining
@@ -1256,17 +1253,17 @@ static int inval_cache_and_wait_for_operation(
1256 cond_resched(); 1253 cond_resched();
1257 timeo--; 1254 timeo--;
1258 } 1255 }
1259 spin_lock(chip->mutex); 1256 mutex_lock(&chip->mutex);
1260 1257
1261 while (chip->state != chip_state) { 1258 while (chip->state != chip_state) {
1262 /* Someone's suspended the operation: sleep */ 1259 /* Someone's suspended the operation: sleep */
1263 DECLARE_WAITQUEUE(wait, current); 1260 DECLARE_WAITQUEUE(wait, current);
1264 set_current_state(TASK_UNINTERRUPTIBLE); 1261 set_current_state(TASK_UNINTERRUPTIBLE);
1265 add_wait_queue(&chip->wq, &wait); 1262 add_wait_queue(&chip->wq, &wait);
1266 spin_unlock(chip->mutex); 1263 mutex_unlock(&chip->mutex);
1267 schedule(); 1264 schedule();
1268 remove_wait_queue(&chip->wq, &wait); 1265 remove_wait_queue(&chip->wq, &wait);
1269 spin_lock(chip->mutex); 1266 mutex_lock(&chip->mutex);
1270 } 1267 }
1271 if (chip->erase_suspended && chip_state == FL_ERASING) { 1268 if (chip->erase_suspended && chip_state == FL_ERASING) {
1272 /* Erase suspend occured while sleep: reset timeout */ 1269 /* Erase suspend occured while sleep: reset timeout */
@@ -1302,7 +1299,7 @@ static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t a
1302 /* Ensure cmd read/writes are aligned. */ 1299 /* Ensure cmd read/writes are aligned. */
1303 cmd_addr = adr & ~(map_bankwidth(map)-1); 1300 cmd_addr = adr & ~(map_bankwidth(map)-1);
1304 1301
1305 spin_lock(chip->mutex); 1302 mutex_lock(&chip->mutex);
1306 1303
1307 ret = get_chip(map, chip, cmd_addr, FL_POINT); 1304 ret = get_chip(map, chip, cmd_addr, FL_POINT);
1308 1305
@@ -1313,7 +1310,7 @@ static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t a
1313 chip->state = FL_POINT; 1310 chip->state = FL_POINT;
1314 chip->ref_point_counter++; 1311 chip->ref_point_counter++;
1315 } 1312 }
1316 spin_unlock(chip->mutex); 1313 mutex_unlock(&chip->mutex);
1317 1314
1318 return ret; 1315 return ret;
1319} 1316}
@@ -1398,7 +1395,7 @@ static void cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
1398 else 1395 else
1399 thislen = len; 1396 thislen = len;
1400 1397
1401 spin_lock(chip->mutex); 1398 mutex_lock(&chip->mutex);
1402 if (chip->state == FL_POINT) { 1399 if (chip->state == FL_POINT) {
1403 chip->ref_point_counter--; 1400 chip->ref_point_counter--;
1404 if(chip->ref_point_counter == 0) 1401 if(chip->ref_point_counter == 0)
@@ -1407,7 +1404,7 @@ static void cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
1407 printk(KERN_ERR "%s: Warning: unpoint called on non pointed region\n", map->name); /* Should this give an error? */ 1404 printk(KERN_ERR "%s: Warning: unpoint called on non pointed region\n", map->name); /* Should this give an error? */
1408 1405
1409 put_chip(map, chip, chip->start); 1406 put_chip(map, chip, chip->start);
1410 spin_unlock(chip->mutex); 1407 mutex_unlock(&chip->mutex);
1411 1408
1412 len -= thislen; 1409 len -= thislen;
1413 ofs = 0; 1410 ofs = 0;
@@ -1426,10 +1423,10 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
1426 /* Ensure cmd read/writes are aligned. */ 1423 /* Ensure cmd read/writes are aligned. */
1427 cmd_addr = adr & ~(map_bankwidth(map)-1); 1424 cmd_addr = adr & ~(map_bankwidth(map)-1);
1428 1425
1429 spin_lock(chip->mutex); 1426 mutex_lock(&chip->mutex);
1430 ret = get_chip(map, chip, cmd_addr, FL_READY); 1427 ret = get_chip(map, chip, cmd_addr, FL_READY);
1431 if (ret) { 1428 if (ret) {
1432 spin_unlock(chip->mutex); 1429 mutex_unlock(&chip->mutex);
1433 return ret; 1430 return ret;
1434 } 1431 }
1435 1432
@@ -1443,7 +1440,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
1443 1440
1444 put_chip(map, chip, cmd_addr); 1441 put_chip(map, chip, cmd_addr);
1445 1442
1446 spin_unlock(chip->mutex); 1443 mutex_unlock(&chip->mutex);
1447 return 0; 1444 return 0;
1448} 1445}
1449 1446
@@ -1506,10 +1503,10 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1506 return -EINVAL; 1503 return -EINVAL;
1507 } 1504 }
1508 1505
1509 spin_lock(chip->mutex); 1506 mutex_lock(&chip->mutex);
1510 ret = get_chip(map, chip, adr, mode); 1507 ret = get_chip(map, chip, adr, mode);
1511 if (ret) { 1508 if (ret) {
1512 spin_unlock(chip->mutex); 1509 mutex_unlock(&chip->mutex);
1513 return ret; 1510 return ret;
1514 } 1511 }
1515 1512
@@ -1555,7 +1552,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1555 1552
1556 xip_enable(map, chip, adr); 1553 xip_enable(map, chip, adr);
1557 out: put_chip(map, chip, adr); 1554 out: put_chip(map, chip, adr);
1558 spin_unlock(chip->mutex); 1555 mutex_unlock(&chip->mutex);
1559 return ret; 1556 return ret;
1560} 1557}
1561 1558
@@ -1664,10 +1661,10 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1664 /* Let's determine this according to the interleave only once */ 1661 /* Let's determine this according to the interleave only once */
1665 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9); 1662 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9);
1666 1663
1667 spin_lock(chip->mutex); 1664 mutex_lock(&chip->mutex);
1668 ret = get_chip(map, chip, cmd_adr, FL_WRITING); 1665 ret = get_chip(map, chip, cmd_adr, FL_WRITING);
1669 if (ret) { 1666 if (ret) {
1670 spin_unlock(chip->mutex); 1667 mutex_unlock(&chip->mutex);
1671 return ret; 1668 return ret;
1672 } 1669 }
1673 1670
@@ -1798,7 +1795,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1798 1795
1799 xip_enable(map, chip, cmd_adr); 1796 xip_enable(map, chip, cmd_adr);
1800 out: put_chip(map, chip, cmd_adr); 1797 out: put_chip(map, chip, cmd_adr);
1801 spin_unlock(chip->mutex); 1798 mutex_unlock(&chip->mutex);
1802 return ret; 1799 return ret;
1803} 1800}
1804 1801
@@ -1877,10 +1874,10 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1877 adr += chip->start; 1874 adr += chip->start;
1878 1875
1879 retry: 1876 retry:
1880 spin_lock(chip->mutex); 1877 mutex_lock(&chip->mutex);
1881 ret = get_chip(map, chip, adr, FL_ERASING); 1878 ret = get_chip(map, chip, adr, FL_ERASING);
1882 if (ret) { 1879 if (ret) {
1883 spin_unlock(chip->mutex); 1880 mutex_unlock(&chip->mutex);
1884 return ret; 1881 return ret;
1885 } 1882 }
1886 1883
@@ -1936,7 +1933,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1936 } else if (chipstatus & 0x20 && retries--) { 1933 } else if (chipstatus & 0x20 && retries--) {
1937 printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus); 1934 printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
1938 put_chip(map, chip, adr); 1935 put_chip(map, chip, adr);
1939 spin_unlock(chip->mutex); 1936 mutex_unlock(&chip->mutex);
1940 goto retry; 1937 goto retry;
1941 } else { 1938 } else {
1942 printk(KERN_ERR "%s: block erase failed at 0x%08lx (status 0x%lx)\n", map->name, adr, chipstatus); 1939 printk(KERN_ERR "%s: block erase failed at 0x%08lx (status 0x%lx)\n", map->name, adr, chipstatus);
@@ -1948,7 +1945,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1948 1945
1949 xip_enable(map, chip, adr); 1946 xip_enable(map, chip, adr);
1950 out: put_chip(map, chip, adr); 1947 out: put_chip(map, chip, adr);
1951 spin_unlock(chip->mutex); 1948 mutex_unlock(&chip->mutex);
1952 return ret; 1949 return ret;
1953} 1950}
1954 1951
@@ -1981,7 +1978,7 @@ static void cfi_intelext_sync (struct mtd_info *mtd)
1981 for (i=0; !ret && i<cfi->numchips; i++) { 1978 for (i=0; !ret && i<cfi->numchips; i++) {
1982 chip = &cfi->chips[i]; 1979 chip = &cfi->chips[i];
1983 1980
1984 spin_lock(chip->mutex); 1981 mutex_lock(&chip->mutex);
1985 ret = get_chip(map, chip, chip->start, FL_SYNCING); 1982 ret = get_chip(map, chip, chip->start, FL_SYNCING);
1986 1983
1987 if (!ret) { 1984 if (!ret) {
@@ -1992,7 +1989,7 @@ static void cfi_intelext_sync (struct mtd_info *mtd)
1992 * with the chip now anyway. 1989 * with the chip now anyway.
1993 */ 1990 */
1994 } 1991 }
1995 spin_unlock(chip->mutex); 1992 mutex_unlock(&chip->mutex);
1996 } 1993 }
1997 1994
1998 /* Unlock the chips again */ 1995 /* Unlock the chips again */
@@ -2000,14 +1997,14 @@ static void cfi_intelext_sync (struct mtd_info *mtd)
2000 for (i--; i >=0; i--) { 1997 for (i--; i >=0; i--) {
2001 chip = &cfi->chips[i]; 1998 chip = &cfi->chips[i];
2002 1999
2003 spin_lock(chip->mutex); 2000 mutex_lock(&chip->mutex);
2004 2001
2005 if (chip->state == FL_SYNCING) { 2002 if (chip->state == FL_SYNCING) {
2006 chip->state = chip->oldstate; 2003 chip->state = chip->oldstate;
2007 chip->oldstate = FL_READY; 2004 chip->oldstate = FL_READY;
2008 wake_up(&chip->wq); 2005 wake_up(&chip->wq);
2009 } 2006 }
2010 spin_unlock(chip->mutex); 2007 mutex_unlock(&chip->mutex);
2011 } 2008 }
2012} 2009}
2013 2010
@@ -2053,10 +2050,10 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
2053 2050
2054 adr += chip->start; 2051 adr += chip->start;
2055 2052
2056 spin_lock(chip->mutex); 2053 mutex_lock(&chip->mutex);
2057 ret = get_chip(map, chip, adr, FL_LOCKING); 2054 ret = get_chip(map, chip, adr, FL_LOCKING);
2058 if (ret) { 2055 if (ret) {
2059 spin_unlock(chip->mutex); 2056 mutex_unlock(&chip->mutex);
2060 return ret; 2057 return ret;
2061 } 2058 }
2062 2059
@@ -2090,7 +2087,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
2090 2087
2091 xip_enable(map, chip, adr); 2088 xip_enable(map, chip, adr);
2092out: put_chip(map, chip, adr); 2089out: put_chip(map, chip, adr);
2093 spin_unlock(chip->mutex); 2090 mutex_unlock(&chip->mutex);
2094 return ret; 2091 return ret;
2095} 2092}
2096 2093
@@ -2155,10 +2152,10 @@ do_otp_read(struct map_info *map, struct flchip *chip, u_long offset,
2155 struct cfi_private *cfi = map->fldrv_priv; 2152 struct cfi_private *cfi = map->fldrv_priv;
2156 int ret; 2153 int ret;
2157 2154
2158 spin_lock(chip->mutex); 2155 mutex_lock(&chip->mutex);
2159 ret = get_chip(map, chip, chip->start, FL_JEDEC_QUERY); 2156 ret = get_chip(map, chip, chip->start, FL_JEDEC_QUERY);
2160 if (ret) { 2157 if (ret) {
2161 spin_unlock(chip->mutex); 2158 mutex_unlock(&chip->mutex);
2162 return ret; 2159 return ret;
2163 } 2160 }
2164 2161
@@ -2177,7 +2174,7 @@ do_otp_read(struct map_info *map, struct flchip *chip, u_long offset,
2177 INVALIDATE_CACHED_RANGE(map, chip->start + offset, size); 2174 INVALIDATE_CACHED_RANGE(map, chip->start + offset, size);
2178 2175
2179 put_chip(map, chip, chip->start); 2176 put_chip(map, chip, chip->start);
2180 spin_unlock(chip->mutex); 2177 mutex_unlock(&chip->mutex);
2181 return 0; 2178 return 0;
2182} 2179}
2183 2180
@@ -2452,7 +2449,7 @@ static int cfi_intelext_suspend(struct mtd_info *mtd)
2452 for (i=0; !ret && i<cfi->numchips; i++) { 2449 for (i=0; !ret && i<cfi->numchips; i++) {
2453 chip = &cfi->chips[i]; 2450 chip = &cfi->chips[i];
2454 2451
2455 spin_lock(chip->mutex); 2452 mutex_lock(&chip->mutex);
2456 2453
2457 switch (chip->state) { 2454 switch (chip->state) {
2458 case FL_READY: 2455 case FL_READY:
@@ -2484,7 +2481,7 @@ static int cfi_intelext_suspend(struct mtd_info *mtd)
2484 case FL_PM_SUSPENDED: 2481 case FL_PM_SUSPENDED:
2485 break; 2482 break;
2486 } 2483 }
2487 spin_unlock(chip->mutex); 2484 mutex_unlock(&chip->mutex);
2488 } 2485 }
2489 2486
2490 /* Unlock the chips again */ 2487 /* Unlock the chips again */
@@ -2493,7 +2490,7 @@ static int cfi_intelext_suspend(struct mtd_info *mtd)
2493 for (i--; i >=0; i--) { 2490 for (i--; i >=0; i--) {
2494 chip = &cfi->chips[i]; 2491 chip = &cfi->chips[i];
2495 2492
2496 spin_lock(chip->mutex); 2493 mutex_lock(&chip->mutex);
2497 2494
2498 if (chip->state == FL_PM_SUSPENDED) { 2495 if (chip->state == FL_PM_SUSPENDED) {
2499 /* No need to force it into a known state here, 2496 /* No need to force it into a known state here,
@@ -2503,7 +2500,7 @@ static int cfi_intelext_suspend(struct mtd_info *mtd)
2503 chip->oldstate = FL_READY; 2500 chip->oldstate = FL_READY;
2504 wake_up(&chip->wq); 2501 wake_up(&chip->wq);
2505 } 2502 }
2506 spin_unlock(chip->mutex); 2503 mutex_unlock(&chip->mutex);
2507 } 2504 }
2508 } 2505 }
2509 2506
@@ -2544,7 +2541,7 @@ static void cfi_intelext_resume(struct mtd_info *mtd)
2544 2541
2545 chip = &cfi->chips[i]; 2542 chip = &cfi->chips[i];
2546 2543
2547 spin_lock(chip->mutex); 2544 mutex_lock(&chip->mutex);
2548 2545
2549 /* Go to known state. Chip may have been power cycled */ 2546 /* Go to known state. Chip may have been power cycled */
2550 if (chip->state == FL_PM_SUSPENDED) { 2547 if (chip->state == FL_PM_SUSPENDED) {
@@ -2553,7 +2550,7 @@ static void cfi_intelext_resume(struct mtd_info *mtd)
2553 wake_up(&chip->wq); 2550 wake_up(&chip->wq);
2554 } 2551 }
2555 2552
2556 spin_unlock(chip->mutex); 2553 mutex_unlock(&chip->mutex);
2557 } 2554 }
2558 2555
2559 if ((mtd->flags & MTD_POWERUP_LOCK) 2556 if ((mtd->flags & MTD_POWERUP_LOCK)
@@ -2573,14 +2570,14 @@ static int cfi_intelext_reset(struct mtd_info *mtd)
2573 /* force the completion of any ongoing operation 2570 /* force the completion of any ongoing operation
2574 and switch to array mode so any bootloader in 2571 and switch to array mode so any bootloader in
2575 flash is accessible for soft reboot. */ 2572 flash is accessible for soft reboot. */
2576 spin_lock(chip->mutex); 2573 mutex_lock(&chip->mutex);
2577 ret = get_chip(map, chip, chip->start, FL_SHUTDOWN); 2574 ret = get_chip(map, chip, chip->start, FL_SHUTDOWN);
2578 if (!ret) { 2575 if (!ret) {
2579 map_write(map, CMD(0xff), chip->start); 2576 map_write(map, CMD(0xff), chip->start);
2580 chip->state = FL_SHUTDOWN; 2577 chip->state = FL_SHUTDOWN;
2581 put_chip(map, chip, chip->start); 2578 put_chip(map, chip, chip->start);
2582 } 2579 }
2583 spin_unlock(chip->mutex); 2580 mutex_unlock(&chip->mutex);
2584 } 2581 }
2585 2582
2586 return 0; 2583 return 0;
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index f3600e8d5382..d81079ef91a5 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -32,6 +32,7 @@
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/delay.h> 33#include <linux/delay.h>
34#include <linux/interrupt.h> 34#include <linux/interrupt.h>
35#include <linux/reboot.h>
35#include <linux/mtd/compatmac.h> 36#include <linux/mtd/compatmac.h>
36#include <linux/mtd/map.h> 37#include <linux/mtd/map.h>
37#include <linux/mtd/mtd.h> 38#include <linux/mtd/mtd.h>
@@ -43,10 +44,6 @@
43 44
44#define MAX_WORD_RETRIES 3 45#define MAX_WORD_RETRIES 3
45 46
46#define MANUFACTURER_AMD 0x0001
47#define MANUFACTURER_ATMEL 0x001F
48#define MANUFACTURER_MACRONIX 0x00C2
49#define MANUFACTURER_SST 0x00BF
50#define SST49LF004B 0x0060 47#define SST49LF004B 0x0060
51#define SST49LF040B 0x0050 48#define SST49LF040B 0x0050
52#define SST49LF008A 0x005a 49#define SST49LF008A 0x005a
@@ -60,6 +57,7 @@ static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
60static void cfi_amdstd_sync (struct mtd_info *); 57static void cfi_amdstd_sync (struct mtd_info *);
61static int cfi_amdstd_suspend (struct mtd_info *); 58static int cfi_amdstd_suspend (struct mtd_info *);
62static void cfi_amdstd_resume (struct mtd_info *); 59static void cfi_amdstd_resume (struct mtd_info *);
60static int cfi_amdstd_reboot(struct notifier_block *, unsigned long, void *);
63static int cfi_amdstd_secsi_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); 61static int cfi_amdstd_secsi_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
64 62
65static void cfi_amdstd_destroy(struct mtd_info *); 63static void cfi_amdstd_destroy(struct mtd_info *);
@@ -168,7 +166,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd, void* param)
168 * This reduces the risk of false detection due to 166 * This reduces the risk of false detection due to
169 * the 8-bit device ID. 167 * the 8-bit device ID.
170 */ 168 */
171 (cfi->mfr == MANUFACTURER_MACRONIX)) { 169 (cfi->mfr == CFI_MFR_MACRONIX)) {
172 DEBUG(MTD_DEBUG_LEVEL1, 170 DEBUG(MTD_DEBUG_LEVEL1,
173 "%s: Macronix MX29LV400C with bottom boot block" 171 "%s: Macronix MX29LV400C with bottom boot block"
174 " detected\n", map->name); 172 " detected\n", map->name);
@@ -260,6 +258,42 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
260 mtd->flags |= MTD_POWERUP_LOCK; 258 mtd->flags |= MTD_POWERUP_LOCK;
261} 259}
262 260
261static void fixup_old_sst_eraseregion(struct mtd_info *mtd)
262{
263 struct map_info *map = mtd->priv;
264 struct cfi_private *cfi = map->fldrv_priv;
265
266 /*
267 * These flashes report two seperate eraseblock regions based on the
268 * sector_erase-size and block_erase-size, although they both operate on the
269 * same memory. This is not allowed according to CFI, so we just pick the
270 * sector_erase-size.
271 */
272 cfi->cfiq->NumEraseRegions = 1;
273}
274
275static void fixup_sst39vf(struct mtd_info *mtd, void *param)
276{
277 struct map_info *map = mtd->priv;
278 struct cfi_private *cfi = map->fldrv_priv;
279
280 fixup_old_sst_eraseregion(mtd);
281
282 cfi->addr_unlock1 = 0x5555;
283 cfi->addr_unlock2 = 0x2AAA;
284}
285
286static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param)
287{
288 struct map_info *map = mtd->priv;
289 struct cfi_private *cfi = map->fldrv_priv;
290
291 fixup_old_sst_eraseregion(mtd);
292
293 cfi->addr_unlock1 = 0x555;
294 cfi->addr_unlock2 = 0x2AA;
295}
296
263static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param) 297static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param)
264{ 298{
265 struct map_info *map = mtd->priv; 299 struct map_info *map = mtd->priv;
@@ -282,11 +316,24 @@ static void fixup_s29gl032n_sectors(struct mtd_info *mtd, void *param)
282 } 316 }
283} 317}
284 318
319/* Used to fix CFI-Tables of chips without Extended Query Tables */
320static struct cfi_fixup cfi_nopri_fixup_table[] = {
321 { CFI_MFR_SST, 0x234A, fixup_sst39vf, NULL, }, // SST39VF1602
322 { CFI_MFR_SST, 0x234B, fixup_sst39vf, NULL, }, // SST39VF1601
323 { CFI_MFR_SST, 0x235A, fixup_sst39vf, NULL, }, // SST39VF3202
324 { CFI_MFR_SST, 0x235B, fixup_sst39vf, NULL, }, // SST39VF3201
325 { CFI_MFR_SST, 0x235C, fixup_sst39vf_rev_b, NULL, }, // SST39VF3202B
326 { CFI_MFR_SST, 0x235D, fixup_sst39vf_rev_b, NULL, }, // SST39VF3201B
327 { CFI_MFR_SST, 0x236C, fixup_sst39vf_rev_b, NULL, }, // SST39VF6402B
328 { CFI_MFR_SST, 0x236D, fixup_sst39vf_rev_b, NULL, }, // SST39VF6401B
329 { 0, 0, NULL, NULL }
330};
331
285static struct cfi_fixup cfi_fixup_table[] = { 332static struct cfi_fixup cfi_fixup_table[] = {
286 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, 333 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
287#ifdef AMD_BOOTLOC_BUG 334#ifdef AMD_BOOTLOC_BUG
288 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, 335 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
289 { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock, NULL }, 336 { CFI_MFR_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock, NULL },
290#endif 337#endif
291 { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, }, 338 { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, },
292 { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, }, 339 { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, },
@@ -304,9 +351,9 @@ static struct cfi_fixup cfi_fixup_table[] = {
304 { 0, 0, NULL, NULL } 351 { 0, 0, NULL, NULL }
305}; 352};
306static struct cfi_fixup jedec_fixup_table[] = { 353static struct cfi_fixup jedec_fixup_table[] = {
307 { MANUFACTURER_SST, SST49LF004B, fixup_use_fwh_lock, NULL, }, 354 { CFI_MFR_SST, SST49LF004B, fixup_use_fwh_lock, NULL, },
308 { MANUFACTURER_SST, SST49LF040B, fixup_use_fwh_lock, NULL, }, 355 { CFI_MFR_SST, SST49LF040B, fixup_use_fwh_lock, NULL, },
309 { MANUFACTURER_SST, SST49LF008A, fixup_use_fwh_lock, NULL, }, 356 { CFI_MFR_SST, SST49LF008A, fixup_use_fwh_lock, NULL, },
310 { 0, 0, NULL, NULL } 357 { 0, 0, NULL, NULL }
311}; 358};
312 359
@@ -355,67 +402,72 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
355 mtd->name = map->name; 402 mtd->name = map->name;
356 mtd->writesize = 1; 403 mtd->writesize = 1;
357 404
405 mtd->reboot_notifier.notifier_call = cfi_amdstd_reboot;
406
358 if (cfi->cfi_mode==CFI_MODE_CFI){ 407 if (cfi->cfi_mode==CFI_MODE_CFI){
359 unsigned char bootloc; 408 unsigned char bootloc;
360 /*
361 * It's a real CFI chip, not one for which the probe
362 * routine faked a CFI structure. So we read the feature
363 * table from it.
364 */
365 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR; 409 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
366 struct cfi_pri_amdstd *extp; 410 struct cfi_pri_amdstd *extp;
367 411
368 extp = (struct cfi_pri_amdstd*)cfi_read_pri(map, adr, sizeof(*extp), "Amd/Fujitsu"); 412 extp = (struct cfi_pri_amdstd*)cfi_read_pri(map, adr, sizeof(*extp), "Amd/Fujitsu");
369 if (!extp) { 413 if (extp) {
370 kfree(mtd); 414 /*
371 return NULL; 415 * It's a real CFI chip, not one for which the probe
372 } 416 * routine faked a CFI structure.
373 417 */
374 cfi_fixup_major_minor(cfi, extp); 418 cfi_fixup_major_minor(cfi, extp);
375 419
376 if (extp->MajorVersion != '1' || 420 if (extp->MajorVersion != '1' ||
377 (extp->MinorVersion < '0' || extp->MinorVersion > '4')) { 421 (extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
378 printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query " 422 printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query "
379 "version %c.%c.\n", extp->MajorVersion, 423 "version %c.%c.\n", extp->MajorVersion,
380 extp->MinorVersion); 424 extp->MinorVersion);
381 kfree(extp); 425 kfree(extp);
382 kfree(mtd); 426 kfree(mtd);
383 return NULL; 427 return NULL;
384 } 428 }
385 429
386 /* Install our own private info structure */ 430 /* Install our own private info structure */
387 cfi->cmdset_priv = extp; 431 cfi->cmdset_priv = extp;
388 432
389 /* Apply cfi device specific fixups */ 433 /* Apply cfi device specific fixups */
390 cfi_fixup(mtd, cfi_fixup_table); 434 cfi_fixup(mtd, cfi_fixup_table);
391 435
392#ifdef DEBUG_CFI_FEATURES 436#ifdef DEBUG_CFI_FEATURES
393 /* Tell the user about it in lots of lovely detail */ 437 /* Tell the user about it in lots of lovely detail */
394 cfi_tell_features(extp); 438 cfi_tell_features(extp);
395#endif 439#endif
396 440
397 bootloc = extp->TopBottom; 441 bootloc = extp->TopBottom;
398 if ((bootloc != 2) && (bootloc != 3)) { 442 if ((bootloc < 2) || (bootloc > 5)) {
399 printk(KERN_WARNING "%s: CFI does not contain boot " 443 printk(KERN_WARNING "%s: CFI contains unrecognised boot "
400 "bank location. Assuming top.\n", map->name); 444 "bank location (%d). Assuming bottom.\n",
401 bootloc = 2; 445 map->name, bootloc);
402 } 446 bootloc = 2;
447 }
403 448
404 if (bootloc == 3 && cfi->cfiq->NumEraseRegions > 1) { 449 if (bootloc == 3 && cfi->cfiq->NumEraseRegions > 1) {
405 printk(KERN_WARNING "%s: Swapping erase regions for broken CFI table.\n", map->name); 450 printk(KERN_WARNING "%s: Swapping erase regions for top-boot CFI table.\n", map->name);
406 451
407 for (i=0; i<cfi->cfiq->NumEraseRegions / 2; i++) { 452 for (i=0; i<cfi->cfiq->NumEraseRegions / 2; i++) {
408 int j = (cfi->cfiq->NumEraseRegions-1)-i; 453 int j = (cfi->cfiq->NumEraseRegions-1)-i;
409 __u32 swap; 454 __u32 swap;
410 455
411 swap = cfi->cfiq->EraseRegionInfo[i]; 456 swap = cfi->cfiq->EraseRegionInfo[i];
412 cfi->cfiq->EraseRegionInfo[i] = cfi->cfiq->EraseRegionInfo[j]; 457 cfi->cfiq->EraseRegionInfo[i] = cfi->cfiq->EraseRegionInfo[j];
413 cfi->cfiq->EraseRegionInfo[j] = swap; 458 cfi->cfiq->EraseRegionInfo[j] = swap;
459 }
414 } 460 }
461 /* Set the default CFI lock/unlock addresses */
462 cfi->addr_unlock1 = 0x555;
463 cfi->addr_unlock2 = 0x2aa;
464 }
465 cfi_fixup(mtd, cfi_nopri_fixup_table);
466
467 if (!cfi->addr_unlock1 || !cfi->addr_unlock2) {
468 kfree(mtd);
469 return NULL;
415 } 470 }
416 /* Set the default CFI lock/unlock addresses */
417 cfi->addr_unlock1 = 0x555;
418 cfi->addr_unlock2 = 0x2aa;
419 471
420 } /* CFI mode */ 472 } /* CFI mode */
421 else if (cfi->cfi_mode == CFI_MODE_JEDEC) { 473 else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
@@ -437,7 +489,11 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
437 489
438 return cfi_amdstd_setup(mtd); 490 return cfi_amdstd_setup(mtd);
439} 491}
492struct mtd_info *cfi_cmdset_0006(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0002")));
493struct mtd_info *cfi_cmdset_0701(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0002")));
440EXPORT_SYMBOL_GPL(cfi_cmdset_0002); 494EXPORT_SYMBOL_GPL(cfi_cmdset_0002);
495EXPORT_SYMBOL_GPL(cfi_cmdset_0006);
496EXPORT_SYMBOL_GPL(cfi_cmdset_0701);
441 497
442static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd) 498static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
443{ 499{
@@ -491,13 +547,12 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
491#endif 547#endif
492 548
493 __module_get(THIS_MODULE); 549 __module_get(THIS_MODULE);
550 register_reboot_notifier(&mtd->reboot_notifier);
494 return mtd; 551 return mtd;
495 552
496 setup_err: 553 setup_err:
497 if(mtd) { 554 kfree(mtd->eraseregions);
498 kfree(mtd->eraseregions); 555 kfree(mtd);
499 kfree(mtd);
500 }
501 kfree(cfi->cmdset_priv); 556 kfree(cfi->cmdset_priv);
502 kfree(cfi->cfiq); 557 kfree(cfi->cfiq);
503 return NULL; 558 return NULL;
@@ -571,9 +626,9 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
571 printk(KERN_ERR "Waiting for chip to be ready timed out.\n"); 626 printk(KERN_ERR "Waiting for chip to be ready timed out.\n");
572 return -EIO; 627 return -EIO;
573 } 628 }
574 spin_unlock(chip->mutex); 629 mutex_unlock(&chip->mutex);
575 cfi_udelay(1); 630 cfi_udelay(1);
576 spin_lock(chip->mutex); 631 mutex_lock(&chip->mutex);
577 /* Someone else might have been playing with it. */ 632 /* Someone else might have been playing with it. */
578 goto retry; 633 goto retry;
579 } 634 }
@@ -617,9 +672,9 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
617 return -EIO; 672 return -EIO;
618 } 673 }
619 674
620 spin_unlock(chip->mutex); 675 mutex_unlock(&chip->mutex);
621 cfi_udelay(1); 676 cfi_udelay(1);
622 spin_lock(chip->mutex); 677 mutex_lock(&chip->mutex);
623 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING. 678 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
624 So we can just loop here. */ 679 So we can just loop here. */
625 } 680 }
@@ -634,6 +689,10 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
634 chip->state = FL_READY; 689 chip->state = FL_READY;
635 return 0; 690 return 0;
636 691
692 case FL_SHUTDOWN:
693 /* The machine is rebooting */
694 return -EIO;
695
637 case FL_POINT: 696 case FL_POINT:
638 /* Only if there's no operation suspended... */ 697 /* Only if there's no operation suspended... */
639 if (mode == FL_READY && chip->oldstate == FL_READY) 698 if (mode == FL_READY && chip->oldstate == FL_READY)
@@ -643,10 +702,10 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
643 sleep: 702 sleep:
644 set_current_state(TASK_UNINTERRUPTIBLE); 703 set_current_state(TASK_UNINTERRUPTIBLE);
645 add_wait_queue(&chip->wq, &wait); 704 add_wait_queue(&chip->wq, &wait);
646 spin_unlock(chip->mutex); 705 mutex_unlock(&chip->mutex);
647 schedule(); 706 schedule();
648 remove_wait_queue(&chip->wq, &wait); 707 remove_wait_queue(&chip->wq, &wait);
649 spin_lock(chip->mutex); 708 mutex_lock(&chip->mutex);
650 goto resettime; 709 goto resettime;
651 } 710 }
652} 711}
@@ -778,7 +837,7 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
778 (void) map_read(map, adr); 837 (void) map_read(map, adr);
779 xip_iprefetch(); 838 xip_iprefetch();
780 local_irq_enable(); 839 local_irq_enable();
781 spin_unlock(chip->mutex); 840 mutex_unlock(&chip->mutex);
782 xip_iprefetch(); 841 xip_iprefetch();
783 cond_resched(); 842 cond_resched();
784 843
@@ -788,15 +847,15 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
788 * a suspended erase state. If so let's wait 847 * a suspended erase state. If so let's wait
789 * until it's done. 848 * until it's done.
790 */ 849 */
791 spin_lock(chip->mutex); 850 mutex_lock(&chip->mutex);
792 while (chip->state != FL_XIP_WHILE_ERASING) { 851 while (chip->state != FL_XIP_WHILE_ERASING) {
793 DECLARE_WAITQUEUE(wait, current); 852 DECLARE_WAITQUEUE(wait, current);
794 set_current_state(TASK_UNINTERRUPTIBLE); 853 set_current_state(TASK_UNINTERRUPTIBLE);
795 add_wait_queue(&chip->wq, &wait); 854 add_wait_queue(&chip->wq, &wait);
796 spin_unlock(chip->mutex); 855 mutex_unlock(&chip->mutex);
797 schedule(); 856 schedule();
798 remove_wait_queue(&chip->wq, &wait); 857 remove_wait_queue(&chip->wq, &wait);
799 spin_lock(chip->mutex); 858 mutex_lock(&chip->mutex);
800 } 859 }
801 /* Disallow XIP again */ 860 /* Disallow XIP again */
802 local_irq_disable(); 861 local_irq_disable();
@@ -858,17 +917,17 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
858 917
859#define UDELAY(map, chip, adr, usec) \ 918#define UDELAY(map, chip, adr, usec) \
860do { \ 919do { \
861 spin_unlock(chip->mutex); \ 920 mutex_unlock(&chip->mutex); \
862 cfi_udelay(usec); \ 921 cfi_udelay(usec); \
863 spin_lock(chip->mutex); \ 922 mutex_lock(&chip->mutex); \
864} while (0) 923} while (0)
865 924
866#define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \ 925#define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \
867do { \ 926do { \
868 spin_unlock(chip->mutex); \ 927 mutex_unlock(&chip->mutex); \
869 INVALIDATE_CACHED_RANGE(map, adr, len); \ 928 INVALIDATE_CACHED_RANGE(map, adr, len); \
870 cfi_udelay(usec); \ 929 cfi_udelay(usec); \
871 spin_lock(chip->mutex); \ 930 mutex_lock(&chip->mutex); \
872} while (0) 931} while (0)
873 932
874#endif 933#endif
@@ -884,10 +943,10 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
884 /* Ensure cmd read/writes are aligned. */ 943 /* Ensure cmd read/writes are aligned. */
885 cmd_addr = adr & ~(map_bankwidth(map)-1); 944 cmd_addr = adr & ~(map_bankwidth(map)-1);
886 945
887 spin_lock(chip->mutex); 946 mutex_lock(&chip->mutex);
888 ret = get_chip(map, chip, cmd_addr, FL_READY); 947 ret = get_chip(map, chip, cmd_addr, FL_READY);
889 if (ret) { 948 if (ret) {
890 spin_unlock(chip->mutex); 949 mutex_unlock(&chip->mutex);
891 return ret; 950 return ret;
892 } 951 }
893 952
@@ -900,7 +959,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
900 959
901 put_chip(map, chip, cmd_addr); 960 put_chip(map, chip, cmd_addr);
902 961
903 spin_unlock(chip->mutex); 962 mutex_unlock(&chip->mutex);
904 return 0; 963 return 0;
905} 964}
906 965
@@ -954,7 +1013,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
954 struct cfi_private *cfi = map->fldrv_priv; 1013 struct cfi_private *cfi = map->fldrv_priv;
955 1014
956 retry: 1015 retry:
957 spin_lock(chip->mutex); 1016 mutex_lock(&chip->mutex);
958 1017
959 if (chip->state != FL_READY){ 1018 if (chip->state != FL_READY){
960#if 0 1019#if 0
@@ -963,7 +1022,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
963 set_current_state(TASK_UNINTERRUPTIBLE); 1022 set_current_state(TASK_UNINTERRUPTIBLE);
964 add_wait_queue(&chip->wq, &wait); 1023 add_wait_queue(&chip->wq, &wait);
965 1024
966 spin_unlock(chip->mutex); 1025 mutex_unlock(&chip->mutex);
967 1026
968 schedule(); 1027 schedule();
969 remove_wait_queue(&chip->wq, &wait); 1028 remove_wait_queue(&chip->wq, &wait);
@@ -992,7 +1051,7 @@ static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chi
992 cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); 1051 cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
993 1052
994 wake_up(&chip->wq); 1053 wake_up(&chip->wq);
995 spin_unlock(chip->mutex); 1054 mutex_unlock(&chip->mutex);
996 1055
997 return 0; 1056 return 0;
998} 1057}
@@ -1061,10 +1120,10 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1061 1120
1062 adr += chip->start; 1121 adr += chip->start;
1063 1122
1064 spin_lock(chip->mutex); 1123 mutex_lock(&chip->mutex);
1065 ret = get_chip(map, chip, adr, FL_WRITING); 1124 ret = get_chip(map, chip, adr, FL_WRITING);
1066 if (ret) { 1125 if (ret) {
1067 spin_unlock(chip->mutex); 1126 mutex_unlock(&chip->mutex);
1068 return ret; 1127 return ret;
1069 } 1128 }
1070 1129
@@ -1107,11 +1166,11 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1107 1166
1108 set_current_state(TASK_UNINTERRUPTIBLE); 1167 set_current_state(TASK_UNINTERRUPTIBLE);
1109 add_wait_queue(&chip->wq, &wait); 1168 add_wait_queue(&chip->wq, &wait);
1110 spin_unlock(chip->mutex); 1169 mutex_unlock(&chip->mutex);
1111 schedule(); 1170 schedule();
1112 remove_wait_queue(&chip->wq, &wait); 1171 remove_wait_queue(&chip->wq, &wait);
1113 timeo = jiffies + (HZ / 2); /* FIXME */ 1172 timeo = jiffies + (HZ / 2); /* FIXME */
1114 spin_lock(chip->mutex); 1173 mutex_lock(&chip->mutex);
1115 continue; 1174 continue;
1116 } 1175 }
1117 1176
@@ -1143,7 +1202,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1143 op_done: 1202 op_done:
1144 chip->state = FL_READY; 1203 chip->state = FL_READY;
1145 put_chip(map, chip, adr); 1204 put_chip(map, chip, adr);
1146 spin_unlock(chip->mutex); 1205 mutex_unlock(&chip->mutex);
1147 1206
1148 return ret; 1207 return ret;
1149} 1208}
@@ -1175,7 +1234,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1175 map_word tmp_buf; 1234 map_word tmp_buf;
1176 1235
1177 retry: 1236 retry:
1178 spin_lock(cfi->chips[chipnum].mutex); 1237 mutex_lock(&cfi->chips[chipnum].mutex);
1179 1238
1180 if (cfi->chips[chipnum].state != FL_READY) { 1239 if (cfi->chips[chipnum].state != FL_READY) {
1181#if 0 1240#if 0
@@ -1184,7 +1243,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1184 set_current_state(TASK_UNINTERRUPTIBLE); 1243 set_current_state(TASK_UNINTERRUPTIBLE);
1185 add_wait_queue(&cfi->chips[chipnum].wq, &wait); 1244 add_wait_queue(&cfi->chips[chipnum].wq, &wait);
1186 1245
1187 spin_unlock(cfi->chips[chipnum].mutex); 1246 mutex_unlock(&cfi->chips[chipnum].mutex);
1188 1247
1189 schedule(); 1248 schedule();
1190 remove_wait_queue(&cfi->chips[chipnum].wq, &wait); 1249 remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
@@ -1198,7 +1257,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1198 /* Load 'tmp_buf' with old contents of flash */ 1257 /* Load 'tmp_buf' with old contents of flash */
1199 tmp_buf = map_read(map, bus_ofs+chipstart); 1258 tmp_buf = map_read(map, bus_ofs+chipstart);
1200 1259
1201 spin_unlock(cfi->chips[chipnum].mutex); 1260 mutex_unlock(&cfi->chips[chipnum].mutex);
1202 1261
1203 /* Number of bytes to copy from buffer */ 1262 /* Number of bytes to copy from buffer */
1204 n = min_t(int, len, map_bankwidth(map)-i); 1263 n = min_t(int, len, map_bankwidth(map)-i);
@@ -1253,7 +1312,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1253 map_word tmp_buf; 1312 map_word tmp_buf;
1254 1313
1255 retry1: 1314 retry1:
1256 spin_lock(cfi->chips[chipnum].mutex); 1315 mutex_lock(&cfi->chips[chipnum].mutex);
1257 1316
1258 if (cfi->chips[chipnum].state != FL_READY) { 1317 if (cfi->chips[chipnum].state != FL_READY) {
1259#if 0 1318#if 0
@@ -1262,7 +1321,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1262 set_current_state(TASK_UNINTERRUPTIBLE); 1321 set_current_state(TASK_UNINTERRUPTIBLE);
1263 add_wait_queue(&cfi->chips[chipnum].wq, &wait); 1322 add_wait_queue(&cfi->chips[chipnum].wq, &wait);
1264 1323
1265 spin_unlock(cfi->chips[chipnum].mutex); 1324 mutex_unlock(&cfi->chips[chipnum].mutex);
1266 1325
1267 schedule(); 1326 schedule();
1268 remove_wait_queue(&cfi->chips[chipnum].wq, &wait); 1327 remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
@@ -1275,7 +1334,7 @@ static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
1275 1334
1276 tmp_buf = map_read(map, ofs + chipstart); 1335 tmp_buf = map_read(map, ofs + chipstart);
1277 1336
1278 spin_unlock(cfi->chips[chipnum].mutex); 1337 mutex_unlock(&cfi->chips[chipnum].mutex);
1279 1338
1280 tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len); 1339 tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len);
1281 1340
@@ -1310,10 +1369,10 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1310 adr += chip->start; 1369 adr += chip->start;
1311 cmd_adr = adr; 1370 cmd_adr = adr;
1312 1371
1313 spin_lock(chip->mutex); 1372 mutex_lock(&chip->mutex);
1314 ret = get_chip(map, chip, adr, FL_WRITING); 1373 ret = get_chip(map, chip, adr, FL_WRITING);
1315 if (ret) { 1374 if (ret) {
1316 spin_unlock(chip->mutex); 1375 mutex_unlock(&chip->mutex);
1317 return ret; 1376 return ret;
1318 } 1377 }
1319 1378
@@ -1368,11 +1427,11 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1368 1427
1369 set_current_state(TASK_UNINTERRUPTIBLE); 1428 set_current_state(TASK_UNINTERRUPTIBLE);
1370 add_wait_queue(&chip->wq, &wait); 1429 add_wait_queue(&chip->wq, &wait);
1371 spin_unlock(chip->mutex); 1430 mutex_unlock(&chip->mutex);
1372 schedule(); 1431 schedule();
1373 remove_wait_queue(&chip->wq, &wait); 1432 remove_wait_queue(&chip->wq, &wait);
1374 timeo = jiffies + (HZ / 2); /* FIXME */ 1433 timeo = jiffies + (HZ / 2); /* FIXME */
1375 spin_lock(chip->mutex); 1434 mutex_lock(&chip->mutex);
1376 continue; 1435 continue;
1377 } 1436 }
1378 1437
@@ -1400,7 +1459,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1400 op_done: 1459 op_done:
1401 chip->state = FL_READY; 1460 chip->state = FL_READY;
1402 put_chip(map, chip, adr); 1461 put_chip(map, chip, adr);
1403 spin_unlock(chip->mutex); 1462 mutex_unlock(&chip->mutex);
1404 1463
1405 return ret; 1464 return ret;
1406} 1465}
@@ -1500,10 +1559,10 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
1500 1559
1501 adr = cfi->addr_unlock1; 1560 adr = cfi->addr_unlock1;
1502 1561
1503 spin_lock(chip->mutex); 1562 mutex_lock(&chip->mutex);
1504 ret = get_chip(map, chip, adr, FL_WRITING); 1563 ret = get_chip(map, chip, adr, FL_WRITING);
1505 if (ret) { 1564 if (ret) {
1506 spin_unlock(chip->mutex); 1565 mutex_unlock(&chip->mutex);
1507 return ret; 1566 return ret;
1508 } 1567 }
1509 1568
@@ -1536,10 +1595,10 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
1536 /* Someone's suspended the erase. Sleep */ 1595 /* Someone's suspended the erase. Sleep */
1537 set_current_state(TASK_UNINTERRUPTIBLE); 1596 set_current_state(TASK_UNINTERRUPTIBLE);
1538 add_wait_queue(&chip->wq, &wait); 1597 add_wait_queue(&chip->wq, &wait);
1539 spin_unlock(chip->mutex); 1598 mutex_unlock(&chip->mutex);
1540 schedule(); 1599 schedule();
1541 remove_wait_queue(&chip->wq, &wait); 1600 remove_wait_queue(&chip->wq, &wait);
1542 spin_lock(chip->mutex); 1601 mutex_lock(&chip->mutex);
1543 continue; 1602 continue;
1544 } 1603 }
1545 if (chip->erase_suspended) { 1604 if (chip->erase_suspended) {
@@ -1573,7 +1632,7 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
1573 chip->state = FL_READY; 1632 chip->state = FL_READY;
1574 xip_enable(map, chip, adr); 1633 xip_enable(map, chip, adr);
1575 put_chip(map, chip, adr); 1634 put_chip(map, chip, adr);
1576 spin_unlock(chip->mutex); 1635 mutex_unlock(&chip->mutex);
1577 1636
1578 return ret; 1637 return ret;
1579} 1638}
@@ -1588,10 +1647,10 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1588 1647
1589 adr += chip->start; 1648 adr += chip->start;
1590 1649
1591 spin_lock(chip->mutex); 1650 mutex_lock(&chip->mutex);
1592 ret = get_chip(map, chip, adr, FL_ERASING); 1651 ret = get_chip(map, chip, adr, FL_ERASING);
1593 if (ret) { 1652 if (ret) {
1594 spin_unlock(chip->mutex); 1653 mutex_unlock(&chip->mutex);
1595 return ret; 1654 return ret;
1596 } 1655 }
1597 1656
@@ -1624,10 +1683,10 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1624 /* Someone's suspended the erase. Sleep */ 1683 /* Someone's suspended the erase. Sleep */
1625 set_current_state(TASK_UNINTERRUPTIBLE); 1684 set_current_state(TASK_UNINTERRUPTIBLE);
1626 add_wait_queue(&chip->wq, &wait); 1685 add_wait_queue(&chip->wq, &wait);
1627 spin_unlock(chip->mutex); 1686 mutex_unlock(&chip->mutex);
1628 schedule(); 1687 schedule();
1629 remove_wait_queue(&chip->wq, &wait); 1688 remove_wait_queue(&chip->wq, &wait);
1630 spin_lock(chip->mutex); 1689 mutex_lock(&chip->mutex);
1631 continue; 1690 continue;
1632 } 1691 }
1633 if (chip->erase_suspended) { 1692 if (chip->erase_suspended) {
@@ -1663,7 +1722,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1663 1722
1664 chip->state = FL_READY; 1723 chip->state = FL_READY;
1665 put_chip(map, chip, adr); 1724 put_chip(map, chip, adr);
1666 spin_unlock(chip->mutex); 1725 mutex_unlock(&chip->mutex);
1667 return ret; 1726 return ret;
1668} 1727}
1669 1728
@@ -1715,7 +1774,7 @@ static int do_atmel_lock(struct map_info *map, struct flchip *chip,
1715 struct cfi_private *cfi = map->fldrv_priv; 1774 struct cfi_private *cfi = map->fldrv_priv;
1716 int ret; 1775 int ret;
1717 1776
1718 spin_lock(chip->mutex); 1777 mutex_lock(&chip->mutex);
1719 ret = get_chip(map, chip, adr + chip->start, FL_LOCKING); 1778 ret = get_chip(map, chip, adr + chip->start, FL_LOCKING);
1720 if (ret) 1779 if (ret)
1721 goto out_unlock; 1780 goto out_unlock;
@@ -1741,7 +1800,7 @@ static int do_atmel_lock(struct map_info *map, struct flchip *chip,
1741 ret = 0; 1800 ret = 0;
1742 1801
1743out_unlock: 1802out_unlock:
1744 spin_unlock(chip->mutex); 1803 mutex_unlock(&chip->mutex);
1745 return ret; 1804 return ret;
1746} 1805}
1747 1806
@@ -1751,7 +1810,7 @@ static int do_atmel_unlock(struct map_info *map, struct flchip *chip,
1751 struct cfi_private *cfi = map->fldrv_priv; 1810 struct cfi_private *cfi = map->fldrv_priv;
1752 int ret; 1811 int ret;
1753 1812
1754 spin_lock(chip->mutex); 1813 mutex_lock(&chip->mutex);
1755 ret = get_chip(map, chip, adr + chip->start, FL_UNLOCKING); 1814 ret = get_chip(map, chip, adr + chip->start, FL_UNLOCKING);
1756 if (ret) 1815 if (ret)
1757 goto out_unlock; 1816 goto out_unlock;
@@ -1769,7 +1828,7 @@ static int do_atmel_unlock(struct map_info *map, struct flchip *chip,
1769 ret = 0; 1828 ret = 0;
1770 1829
1771out_unlock: 1830out_unlock:
1772 spin_unlock(chip->mutex); 1831 mutex_unlock(&chip->mutex);
1773 return ret; 1832 return ret;
1774} 1833}
1775 1834
@@ -1797,7 +1856,7 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
1797 chip = &cfi->chips[i]; 1856 chip = &cfi->chips[i];
1798 1857
1799 retry: 1858 retry:
1800 spin_lock(chip->mutex); 1859 mutex_lock(&chip->mutex);
1801 1860
1802 switch(chip->state) { 1861 switch(chip->state) {
1803 case FL_READY: 1862 case FL_READY:
@@ -1811,7 +1870,7 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
1811 * with the chip now anyway. 1870 * with the chip now anyway.
1812 */ 1871 */
1813 case FL_SYNCING: 1872 case FL_SYNCING:
1814 spin_unlock(chip->mutex); 1873 mutex_unlock(&chip->mutex);
1815 break; 1874 break;
1816 1875
1817 default: 1876 default:
@@ -1819,7 +1878,7 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
1819 set_current_state(TASK_UNINTERRUPTIBLE); 1878 set_current_state(TASK_UNINTERRUPTIBLE);
1820 add_wait_queue(&chip->wq, &wait); 1879 add_wait_queue(&chip->wq, &wait);
1821 1880
1822 spin_unlock(chip->mutex); 1881 mutex_unlock(&chip->mutex);
1823 1882
1824 schedule(); 1883 schedule();
1825 1884
@@ -1834,13 +1893,13 @@ static void cfi_amdstd_sync (struct mtd_info *mtd)
1834 for (i--; i >=0; i--) { 1893 for (i--; i >=0; i--) {
1835 chip = &cfi->chips[i]; 1894 chip = &cfi->chips[i];
1836 1895
1837 spin_lock(chip->mutex); 1896 mutex_lock(&chip->mutex);
1838 1897
1839 if (chip->state == FL_SYNCING) { 1898 if (chip->state == FL_SYNCING) {
1840 chip->state = chip->oldstate; 1899 chip->state = chip->oldstate;
1841 wake_up(&chip->wq); 1900 wake_up(&chip->wq);
1842 } 1901 }
1843 spin_unlock(chip->mutex); 1902 mutex_unlock(&chip->mutex);
1844 } 1903 }
1845} 1904}
1846 1905
@@ -1856,7 +1915,7 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
1856 for (i=0; !ret && i<cfi->numchips; i++) { 1915 for (i=0; !ret && i<cfi->numchips; i++) {
1857 chip = &cfi->chips[i]; 1916 chip = &cfi->chips[i];
1858 1917
1859 spin_lock(chip->mutex); 1918 mutex_lock(&chip->mutex);
1860 1919
1861 switch(chip->state) { 1920 switch(chip->state) {
1862 case FL_READY: 1921 case FL_READY:
@@ -1876,7 +1935,7 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
1876 ret = -EAGAIN; 1935 ret = -EAGAIN;
1877 break; 1936 break;
1878 } 1937 }
1879 spin_unlock(chip->mutex); 1938 mutex_unlock(&chip->mutex);
1880 } 1939 }
1881 1940
1882 /* Unlock the chips again */ 1941 /* Unlock the chips again */
@@ -1885,13 +1944,13 @@ static int cfi_amdstd_suspend(struct mtd_info *mtd)
1885 for (i--; i >=0; i--) { 1944 for (i--; i >=0; i--) {
1886 chip = &cfi->chips[i]; 1945 chip = &cfi->chips[i];
1887 1946
1888 spin_lock(chip->mutex); 1947 mutex_lock(&chip->mutex);
1889 1948
1890 if (chip->state == FL_PM_SUSPENDED) { 1949 if (chip->state == FL_PM_SUSPENDED) {
1891 chip->state = chip->oldstate; 1950 chip->state = chip->oldstate;
1892 wake_up(&chip->wq); 1951 wake_up(&chip->wq);
1893 } 1952 }
1894 spin_unlock(chip->mutex); 1953 mutex_unlock(&chip->mutex);
1895 } 1954 }
1896 } 1955 }
1897 1956
@@ -1910,7 +1969,7 @@ static void cfi_amdstd_resume(struct mtd_info *mtd)
1910 1969
1911 chip = &cfi->chips[i]; 1970 chip = &cfi->chips[i];
1912 1971
1913 spin_lock(chip->mutex); 1972 mutex_lock(&chip->mutex);
1914 1973
1915 if (chip->state == FL_PM_SUSPENDED) { 1974 if (chip->state == FL_PM_SUSPENDED) {
1916 chip->state = FL_READY; 1975 chip->state = FL_READY;
@@ -1920,15 +1979,62 @@ static void cfi_amdstd_resume(struct mtd_info *mtd)
1920 else 1979 else
1921 printk(KERN_ERR "Argh. Chip not in PM_SUSPENDED state upon resume()\n"); 1980 printk(KERN_ERR "Argh. Chip not in PM_SUSPENDED state upon resume()\n");
1922 1981
1923 spin_unlock(chip->mutex); 1982 mutex_unlock(&chip->mutex);
1924 } 1983 }
1925} 1984}
1926 1985
1986
1987/*
1988 * Ensure that the flash device is put back into read array mode before
1989 * unloading the driver or rebooting. On some systems, rebooting while
1990 * the flash is in query/program/erase mode will prevent the CPU from
1991 * fetching the bootloader code, requiring a hard reset or power cycle.
1992 */
1993static int cfi_amdstd_reset(struct mtd_info *mtd)
1994{
1995 struct map_info *map = mtd->priv;
1996 struct cfi_private *cfi = map->fldrv_priv;
1997 int i, ret;
1998 struct flchip *chip;
1999
2000 for (i = 0; i < cfi->numchips; i++) {
2001
2002 chip = &cfi->chips[i];
2003
2004 mutex_lock(&chip->mutex);
2005
2006 ret = get_chip(map, chip, chip->start, FL_SHUTDOWN);
2007 if (!ret) {
2008 map_write(map, CMD(0xF0), chip->start);
2009 chip->state = FL_SHUTDOWN;
2010 put_chip(map, chip, chip->start);
2011 }
2012
2013 mutex_unlock(&chip->mutex);
2014 }
2015
2016 return 0;
2017}
2018
2019
2020static int cfi_amdstd_reboot(struct notifier_block *nb, unsigned long val,
2021 void *v)
2022{
2023 struct mtd_info *mtd;
2024
2025 mtd = container_of(nb, struct mtd_info, reboot_notifier);
2026 cfi_amdstd_reset(mtd);
2027 return NOTIFY_DONE;
2028}
2029
2030
1927static void cfi_amdstd_destroy(struct mtd_info *mtd) 2031static void cfi_amdstd_destroy(struct mtd_info *mtd)
1928{ 2032{
1929 struct map_info *map = mtd->priv; 2033 struct map_info *map = mtd->priv;
1930 struct cfi_private *cfi = map->fldrv_priv; 2034 struct cfi_private *cfi = map->fldrv_priv;
1931 2035
2036 cfi_amdstd_reset(mtd);
2037 unregister_reboot_notifier(&mtd->reboot_notifier);
1932 kfree(cfi->cmdset_priv); 2038 kfree(cfi->cmdset_priv);
1933 kfree(cfi->cfiq); 2039 kfree(cfi->cfiq);
1934 kfree(cfi); 2040 kfree(cfi);
@@ -1938,3 +2044,5 @@ static void cfi_amdstd_destroy(struct mtd_info *mtd)
1938MODULE_LICENSE("GPL"); 2044MODULE_LICENSE("GPL");
1939MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al."); 2045MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");
1940MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips"); 2046MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");
2047MODULE_ALIAS("cfi_cmdset_0006");
2048MODULE_ALIAS("cfi_cmdset_0701");
diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c
index 0667a671525d..e54e8c169d76 100644
--- a/drivers/mtd/chips/cfi_cmdset_0020.c
+++ b/drivers/mtd/chips/cfi_cmdset_0020.c
@@ -265,7 +265,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
265 265
266 timeo = jiffies + HZ; 266 timeo = jiffies + HZ;
267 retry: 267 retry:
268 spin_lock_bh(chip->mutex); 268 mutex_lock(&chip->mutex);
269 269
270 /* Check that the chip's ready to talk to us. 270 /* Check that the chip's ready to talk to us.
271 * If it's in FL_ERASING state, suspend it and make it talk now. 271 * If it's in FL_ERASING state, suspend it and make it talk now.
@@ -296,15 +296,15 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
296 /* make sure we're in 'read status' mode */ 296 /* make sure we're in 'read status' mode */
297 map_write(map, CMD(0x70), cmd_addr); 297 map_write(map, CMD(0x70), cmd_addr);
298 chip->state = FL_ERASING; 298 chip->state = FL_ERASING;
299 spin_unlock_bh(chip->mutex); 299 mutex_unlock(&chip->mutex);
300 printk(KERN_ERR "Chip not ready after erase " 300 printk(KERN_ERR "Chip not ready after erase "
301 "suspended: status = 0x%lx\n", status.x[0]); 301 "suspended: status = 0x%lx\n", status.x[0]);
302 return -EIO; 302 return -EIO;
303 } 303 }
304 304
305 spin_unlock_bh(chip->mutex); 305 mutex_unlock(&chip->mutex);
306 cfi_udelay(1); 306 cfi_udelay(1);
307 spin_lock_bh(chip->mutex); 307 mutex_lock(&chip->mutex);
308 } 308 }
309 309
310 suspended = 1; 310 suspended = 1;
@@ -335,13 +335,13 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
335 335
336 /* Urgh. Chip not yet ready to talk to us. */ 336 /* Urgh. Chip not yet ready to talk to us. */
337 if (time_after(jiffies, timeo)) { 337 if (time_after(jiffies, timeo)) {
338 spin_unlock_bh(chip->mutex); 338 mutex_unlock(&chip->mutex);
339 printk(KERN_ERR "waiting for chip to be ready timed out in read. WSM status = %lx\n", status.x[0]); 339 printk(KERN_ERR "waiting for chip to be ready timed out in read. WSM status = %lx\n", status.x[0]);
340 return -EIO; 340 return -EIO;
341 } 341 }
342 342
343 /* Latency issues. Drop the lock, wait a while and retry */ 343 /* Latency issues. Drop the lock, wait a while and retry */
344 spin_unlock_bh(chip->mutex); 344 mutex_unlock(&chip->mutex);
345 cfi_udelay(1); 345 cfi_udelay(1);
346 goto retry; 346 goto retry;
347 347
@@ -351,7 +351,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
351 someone changes the status */ 351 someone changes the status */
352 set_current_state(TASK_UNINTERRUPTIBLE); 352 set_current_state(TASK_UNINTERRUPTIBLE);
353 add_wait_queue(&chip->wq, &wait); 353 add_wait_queue(&chip->wq, &wait);
354 spin_unlock_bh(chip->mutex); 354 mutex_unlock(&chip->mutex);
355 schedule(); 355 schedule();
356 remove_wait_queue(&chip->wq, &wait); 356 remove_wait_queue(&chip->wq, &wait);
357 timeo = jiffies + HZ; 357 timeo = jiffies + HZ;
@@ -376,7 +376,7 @@ static inline int do_read_onechip(struct map_info *map, struct flchip *chip, lof
376 } 376 }
377 377
378 wake_up(&chip->wq); 378 wake_up(&chip->wq);
379 spin_unlock_bh(chip->mutex); 379 mutex_unlock(&chip->mutex);
380 return 0; 380 return 0;
381} 381}
382 382
@@ -445,7 +445,7 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
445#ifdef DEBUG_CFI_FEATURES 445#ifdef DEBUG_CFI_FEATURES
446 printk("%s: chip->state[%d]\n", __func__, chip->state); 446 printk("%s: chip->state[%d]\n", __func__, chip->state);
447#endif 447#endif
448 spin_lock_bh(chip->mutex); 448 mutex_lock(&chip->mutex);
449 449
450 /* Check that the chip's ready to talk to us. 450 /* Check that the chip's ready to talk to us.
451 * Later, we can actually think about interrupting it 451 * Later, we can actually think about interrupting it
@@ -470,14 +470,14 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
470 break; 470 break;
471 /* Urgh. Chip not yet ready to talk to us. */ 471 /* Urgh. Chip not yet ready to talk to us. */
472 if (time_after(jiffies, timeo)) { 472 if (time_after(jiffies, timeo)) {
473 spin_unlock_bh(chip->mutex); 473 mutex_unlock(&chip->mutex);
474 printk(KERN_ERR "waiting for chip to be ready timed out in buffer write Xstatus = %lx, status = %lx\n", 474 printk(KERN_ERR "waiting for chip to be ready timed out in buffer write Xstatus = %lx, status = %lx\n",
475 status.x[0], map_read(map, cmd_adr).x[0]); 475 status.x[0], map_read(map, cmd_adr).x[0]);
476 return -EIO; 476 return -EIO;
477 } 477 }
478 478
479 /* Latency issues. Drop the lock, wait a while and retry */ 479 /* Latency issues. Drop the lock, wait a while and retry */
480 spin_unlock_bh(chip->mutex); 480 mutex_unlock(&chip->mutex);
481 cfi_udelay(1); 481 cfi_udelay(1);
482 goto retry; 482 goto retry;
483 483
@@ -486,7 +486,7 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
486 someone changes the status */ 486 someone changes the status */
487 set_current_state(TASK_UNINTERRUPTIBLE); 487 set_current_state(TASK_UNINTERRUPTIBLE);
488 add_wait_queue(&chip->wq, &wait); 488 add_wait_queue(&chip->wq, &wait);
489 spin_unlock_bh(chip->mutex); 489 mutex_unlock(&chip->mutex);
490 schedule(); 490 schedule();
491 remove_wait_queue(&chip->wq, &wait); 491 remove_wait_queue(&chip->wq, &wait);
492 timeo = jiffies + HZ; 492 timeo = jiffies + HZ;
@@ -503,16 +503,16 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
503 if (map_word_andequal(map, status, status_OK, status_OK)) 503 if (map_word_andequal(map, status, status_OK, status_OK))
504 break; 504 break;
505 505
506 spin_unlock_bh(chip->mutex); 506 mutex_unlock(&chip->mutex);
507 cfi_udelay(1); 507 cfi_udelay(1);
508 spin_lock_bh(chip->mutex); 508 mutex_lock(&chip->mutex);
509 509
510 if (++z > 100) { 510 if (++z > 100) {
511 /* Argh. Not ready for write to buffer */ 511 /* Argh. Not ready for write to buffer */
512 DISABLE_VPP(map); 512 DISABLE_VPP(map);
513 map_write(map, CMD(0x70), cmd_adr); 513 map_write(map, CMD(0x70), cmd_adr);
514 chip->state = FL_STATUS; 514 chip->state = FL_STATUS;
515 spin_unlock_bh(chip->mutex); 515 mutex_unlock(&chip->mutex);
516 printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx\n", status.x[0]); 516 printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx\n", status.x[0]);
517 return -EIO; 517 return -EIO;
518 } 518 }
@@ -532,9 +532,9 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
532 map_write(map, CMD(0xd0), cmd_adr); 532 map_write(map, CMD(0xd0), cmd_adr);
533 chip->state = FL_WRITING; 533 chip->state = FL_WRITING;
534 534
535 spin_unlock_bh(chip->mutex); 535 mutex_unlock(&chip->mutex);
536 cfi_udelay(chip->buffer_write_time); 536 cfi_udelay(chip->buffer_write_time);
537 spin_lock_bh(chip->mutex); 537 mutex_lock(&chip->mutex);
538 538
539 timeo = jiffies + (HZ/2); 539 timeo = jiffies + (HZ/2);
540 z = 0; 540 z = 0;
@@ -543,11 +543,11 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
543 /* Someone's suspended the write. Sleep */ 543 /* Someone's suspended the write. Sleep */
544 set_current_state(TASK_UNINTERRUPTIBLE); 544 set_current_state(TASK_UNINTERRUPTIBLE);
545 add_wait_queue(&chip->wq, &wait); 545 add_wait_queue(&chip->wq, &wait);
546 spin_unlock_bh(chip->mutex); 546 mutex_unlock(&chip->mutex);
547 schedule(); 547 schedule();
548 remove_wait_queue(&chip->wq, &wait); 548 remove_wait_queue(&chip->wq, &wait);
549 timeo = jiffies + (HZ / 2); /* FIXME */ 549 timeo = jiffies + (HZ / 2); /* FIXME */
550 spin_lock_bh(chip->mutex); 550 mutex_lock(&chip->mutex);
551 continue; 551 continue;
552 } 552 }
553 553
@@ -563,16 +563,16 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
563 map_write(map, CMD(0x70), adr); 563 map_write(map, CMD(0x70), adr);
564 chip->state = FL_STATUS; 564 chip->state = FL_STATUS;
565 DISABLE_VPP(map); 565 DISABLE_VPP(map);
566 spin_unlock_bh(chip->mutex); 566 mutex_unlock(&chip->mutex);
567 printk(KERN_ERR "waiting for chip to be ready timed out in bufwrite\n"); 567 printk(KERN_ERR "waiting for chip to be ready timed out in bufwrite\n");
568 return -EIO; 568 return -EIO;
569 } 569 }
570 570
571 /* Latency issues. Drop the lock, wait a while and retry */ 571 /* Latency issues. Drop the lock, wait a while and retry */
572 spin_unlock_bh(chip->mutex); 572 mutex_unlock(&chip->mutex);
573 cfi_udelay(1); 573 cfi_udelay(1);
574 z++; 574 z++;
575 spin_lock_bh(chip->mutex); 575 mutex_lock(&chip->mutex);
576 } 576 }
577 if (!z) { 577 if (!z) {
578 chip->buffer_write_time--; 578 chip->buffer_write_time--;
@@ -596,11 +596,11 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
596 /* put back into read status register mode */ 596 /* put back into read status register mode */
597 map_write(map, CMD(0x70), adr); 597 map_write(map, CMD(0x70), adr);
598 wake_up(&chip->wq); 598 wake_up(&chip->wq);
599 spin_unlock_bh(chip->mutex); 599 mutex_unlock(&chip->mutex);
600 return map_word_bitsset(map, status, CMD(0x02)) ? -EROFS : -EIO; 600 return map_word_bitsset(map, status, CMD(0x02)) ? -EROFS : -EIO;
601 } 601 }
602 wake_up(&chip->wq); 602 wake_up(&chip->wq);
603 spin_unlock_bh(chip->mutex); 603 mutex_unlock(&chip->mutex);
604 604
605 return 0; 605 return 0;
606} 606}
@@ -749,7 +749,7 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u
749 749
750 timeo = jiffies + HZ; 750 timeo = jiffies + HZ;
751retry: 751retry:
752 spin_lock_bh(chip->mutex); 752 mutex_lock(&chip->mutex);
753 753
754 /* Check that the chip's ready to talk to us. */ 754 /* Check that the chip's ready to talk to us. */
755 switch (chip->state) { 755 switch (chip->state) {
@@ -766,13 +766,13 @@ retry:
766 766
767 /* Urgh. Chip not yet ready to talk to us. */ 767 /* Urgh. Chip not yet ready to talk to us. */
768 if (time_after(jiffies, timeo)) { 768 if (time_after(jiffies, timeo)) {
769 spin_unlock_bh(chip->mutex); 769 mutex_unlock(&chip->mutex);
770 printk(KERN_ERR "waiting for chip to be ready timed out in erase\n"); 770 printk(KERN_ERR "waiting for chip to be ready timed out in erase\n");
771 return -EIO; 771 return -EIO;
772 } 772 }
773 773
774 /* Latency issues. Drop the lock, wait a while and retry */ 774 /* Latency issues. Drop the lock, wait a while and retry */
775 spin_unlock_bh(chip->mutex); 775 mutex_unlock(&chip->mutex);
776 cfi_udelay(1); 776 cfi_udelay(1);
777 goto retry; 777 goto retry;
778 778
@@ -781,7 +781,7 @@ retry:
781 someone changes the status */ 781 someone changes the status */
782 set_current_state(TASK_UNINTERRUPTIBLE); 782 set_current_state(TASK_UNINTERRUPTIBLE);
783 add_wait_queue(&chip->wq, &wait); 783 add_wait_queue(&chip->wq, &wait);
784 spin_unlock_bh(chip->mutex); 784 mutex_unlock(&chip->mutex);
785 schedule(); 785 schedule();
786 remove_wait_queue(&chip->wq, &wait); 786 remove_wait_queue(&chip->wq, &wait);
787 timeo = jiffies + HZ; 787 timeo = jiffies + HZ;
@@ -797,9 +797,9 @@ retry:
797 map_write(map, CMD(0xD0), adr); 797 map_write(map, CMD(0xD0), adr);
798 chip->state = FL_ERASING; 798 chip->state = FL_ERASING;
799 799
800 spin_unlock_bh(chip->mutex); 800 mutex_unlock(&chip->mutex);
801 msleep(1000); 801 msleep(1000);
802 spin_lock_bh(chip->mutex); 802 mutex_lock(&chip->mutex);
803 803
804 /* FIXME. Use a timer to check this, and return immediately. */ 804 /* FIXME. Use a timer to check this, and return immediately. */
805 /* Once the state machine's known to be working I'll do that */ 805 /* Once the state machine's known to be working I'll do that */
@@ -810,11 +810,11 @@ retry:
810 /* Someone's suspended the erase. Sleep */ 810 /* Someone's suspended the erase. Sleep */
811 set_current_state(TASK_UNINTERRUPTIBLE); 811 set_current_state(TASK_UNINTERRUPTIBLE);
812 add_wait_queue(&chip->wq, &wait); 812 add_wait_queue(&chip->wq, &wait);
813 spin_unlock_bh(chip->mutex); 813 mutex_unlock(&chip->mutex);
814 schedule(); 814 schedule();
815 remove_wait_queue(&chip->wq, &wait); 815 remove_wait_queue(&chip->wq, &wait);
816 timeo = jiffies + (HZ*20); /* FIXME */ 816 timeo = jiffies + (HZ*20); /* FIXME */
817 spin_lock_bh(chip->mutex); 817 mutex_lock(&chip->mutex);
818 continue; 818 continue;
819 } 819 }
820 820
@@ -828,14 +828,14 @@ retry:
828 chip->state = FL_STATUS; 828 chip->state = FL_STATUS;
829 printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); 829 printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
830 DISABLE_VPP(map); 830 DISABLE_VPP(map);
831 spin_unlock_bh(chip->mutex); 831 mutex_unlock(&chip->mutex);
832 return -EIO; 832 return -EIO;
833 } 833 }
834 834
835 /* Latency issues. Drop the lock, wait a while and retry */ 835 /* Latency issues. Drop the lock, wait a while and retry */
836 spin_unlock_bh(chip->mutex); 836 mutex_unlock(&chip->mutex);
837 cfi_udelay(1); 837 cfi_udelay(1);
838 spin_lock_bh(chip->mutex); 838 mutex_lock(&chip->mutex);
839 } 839 }
840 840
841 DISABLE_VPP(map); 841 DISABLE_VPP(map);
@@ -878,7 +878,7 @@ retry:
878 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, chipstatus); 878 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, chipstatus);
879 timeo = jiffies + HZ; 879 timeo = jiffies + HZ;
880 chip->state = FL_STATUS; 880 chip->state = FL_STATUS;
881 spin_unlock_bh(chip->mutex); 881 mutex_unlock(&chip->mutex);
882 goto retry; 882 goto retry;
883 } 883 }
884 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, chipstatus); 884 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, chipstatus);
@@ -887,7 +887,7 @@ retry:
887 } 887 }
888 888
889 wake_up(&chip->wq); 889 wake_up(&chip->wq);
890 spin_unlock_bh(chip->mutex); 890 mutex_unlock(&chip->mutex);
891 return ret; 891 return ret;
892} 892}
893 893
@@ -995,7 +995,7 @@ static void cfi_staa_sync (struct mtd_info *mtd)
995 chip = &cfi->chips[i]; 995 chip = &cfi->chips[i];
996 996
997 retry: 997 retry:
998 spin_lock_bh(chip->mutex); 998 mutex_lock(&chip->mutex);
999 999
1000 switch(chip->state) { 1000 switch(chip->state) {
1001 case FL_READY: 1001 case FL_READY:
@@ -1009,7 +1009,7 @@ static void cfi_staa_sync (struct mtd_info *mtd)
1009 * with the chip now anyway. 1009 * with the chip now anyway.
1010 */ 1010 */
1011 case FL_SYNCING: 1011 case FL_SYNCING:
1012 spin_unlock_bh(chip->mutex); 1012 mutex_unlock(&chip->mutex);
1013 break; 1013 break;
1014 1014
1015 default: 1015 default:
@@ -1017,7 +1017,7 @@ static void cfi_staa_sync (struct mtd_info *mtd)
1017 set_current_state(TASK_UNINTERRUPTIBLE); 1017 set_current_state(TASK_UNINTERRUPTIBLE);
1018 add_wait_queue(&chip->wq, &wait); 1018 add_wait_queue(&chip->wq, &wait);
1019 1019
1020 spin_unlock_bh(chip->mutex); 1020 mutex_unlock(&chip->mutex);
1021 schedule(); 1021 schedule();
1022 remove_wait_queue(&chip->wq, &wait); 1022 remove_wait_queue(&chip->wq, &wait);
1023 1023
@@ -1030,13 +1030,13 @@ static void cfi_staa_sync (struct mtd_info *mtd)
1030 for (i--; i >=0; i--) { 1030 for (i--; i >=0; i--) {
1031 chip = &cfi->chips[i]; 1031 chip = &cfi->chips[i];
1032 1032
1033 spin_lock_bh(chip->mutex); 1033 mutex_lock(&chip->mutex);
1034 1034
1035 if (chip->state == FL_SYNCING) { 1035 if (chip->state == FL_SYNCING) {
1036 chip->state = chip->oldstate; 1036 chip->state = chip->oldstate;
1037 wake_up(&chip->wq); 1037 wake_up(&chip->wq);
1038 } 1038 }
1039 spin_unlock_bh(chip->mutex); 1039 mutex_unlock(&chip->mutex);
1040 } 1040 }
1041} 1041}
1042 1042
@@ -1054,7 +1054,7 @@ static inline int do_lock_oneblock(struct map_info *map, struct flchip *chip, un
1054 1054
1055 timeo = jiffies + HZ; 1055 timeo = jiffies + HZ;
1056retry: 1056retry:
1057 spin_lock_bh(chip->mutex); 1057 mutex_lock(&chip->mutex);
1058 1058
1059 /* Check that the chip's ready to talk to us. */ 1059 /* Check that the chip's ready to talk to us. */
1060 switch (chip->state) { 1060 switch (chip->state) {
@@ -1071,13 +1071,13 @@ retry:
1071 1071
1072 /* Urgh. Chip not yet ready to talk to us. */ 1072 /* Urgh. Chip not yet ready to talk to us. */
1073 if (time_after(jiffies, timeo)) { 1073 if (time_after(jiffies, timeo)) {
1074 spin_unlock_bh(chip->mutex); 1074 mutex_unlock(&chip->mutex);
1075 printk(KERN_ERR "waiting for chip to be ready timed out in lock\n"); 1075 printk(KERN_ERR "waiting for chip to be ready timed out in lock\n");
1076 return -EIO; 1076 return -EIO;
1077 } 1077 }
1078 1078
1079 /* Latency issues. Drop the lock, wait a while and retry */ 1079 /* Latency issues. Drop the lock, wait a while and retry */
1080 spin_unlock_bh(chip->mutex); 1080 mutex_unlock(&chip->mutex);
1081 cfi_udelay(1); 1081 cfi_udelay(1);
1082 goto retry; 1082 goto retry;
1083 1083
@@ -1086,7 +1086,7 @@ retry:
1086 someone changes the status */ 1086 someone changes the status */
1087 set_current_state(TASK_UNINTERRUPTIBLE); 1087 set_current_state(TASK_UNINTERRUPTIBLE);
1088 add_wait_queue(&chip->wq, &wait); 1088 add_wait_queue(&chip->wq, &wait);
1089 spin_unlock_bh(chip->mutex); 1089 mutex_unlock(&chip->mutex);
1090 schedule(); 1090 schedule();
1091 remove_wait_queue(&chip->wq, &wait); 1091 remove_wait_queue(&chip->wq, &wait);
1092 timeo = jiffies + HZ; 1092 timeo = jiffies + HZ;
@@ -1098,9 +1098,9 @@ retry:
1098 map_write(map, CMD(0x01), adr); 1098 map_write(map, CMD(0x01), adr);
1099 chip->state = FL_LOCKING; 1099 chip->state = FL_LOCKING;
1100 1100
1101 spin_unlock_bh(chip->mutex); 1101 mutex_unlock(&chip->mutex);
1102 msleep(1000); 1102 msleep(1000);
1103 spin_lock_bh(chip->mutex); 1103 mutex_lock(&chip->mutex);
1104 1104
1105 /* FIXME. Use a timer to check this, and return immediately. */ 1105 /* FIXME. Use a timer to check this, and return immediately. */
1106 /* Once the state machine's known to be working I'll do that */ 1106 /* Once the state machine's known to be working I'll do that */
@@ -1118,21 +1118,21 @@ retry:
1118 chip->state = FL_STATUS; 1118 chip->state = FL_STATUS;
1119 printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); 1119 printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
1120 DISABLE_VPP(map); 1120 DISABLE_VPP(map);
1121 spin_unlock_bh(chip->mutex); 1121 mutex_unlock(&chip->mutex);
1122 return -EIO; 1122 return -EIO;
1123 } 1123 }
1124 1124
1125 /* Latency issues. Drop the lock, wait a while and retry */ 1125 /* Latency issues. Drop the lock, wait a while and retry */
1126 spin_unlock_bh(chip->mutex); 1126 mutex_unlock(&chip->mutex);
1127 cfi_udelay(1); 1127 cfi_udelay(1);
1128 spin_lock_bh(chip->mutex); 1128 mutex_lock(&chip->mutex);
1129 } 1129 }
1130 1130
1131 /* Done and happy. */ 1131 /* Done and happy. */
1132 chip->state = FL_STATUS; 1132 chip->state = FL_STATUS;
1133 DISABLE_VPP(map); 1133 DISABLE_VPP(map);
1134 wake_up(&chip->wq); 1134 wake_up(&chip->wq);
1135 spin_unlock_bh(chip->mutex); 1135 mutex_unlock(&chip->mutex);
1136 return 0; 1136 return 0;
1137} 1137}
1138static int cfi_staa_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 1138static int cfi_staa_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
@@ -1203,7 +1203,7 @@ static inline int do_unlock_oneblock(struct map_info *map, struct flchip *chip,
1203 1203
1204 timeo = jiffies + HZ; 1204 timeo = jiffies + HZ;
1205retry: 1205retry:
1206 spin_lock_bh(chip->mutex); 1206 mutex_lock(&chip->mutex);
1207 1207
1208 /* Check that the chip's ready to talk to us. */ 1208 /* Check that the chip's ready to talk to us. */
1209 switch (chip->state) { 1209 switch (chip->state) {
@@ -1220,13 +1220,13 @@ retry:
1220 1220
1221 /* Urgh. Chip not yet ready to talk to us. */ 1221 /* Urgh. Chip not yet ready to talk to us. */
1222 if (time_after(jiffies, timeo)) { 1222 if (time_after(jiffies, timeo)) {
1223 spin_unlock_bh(chip->mutex); 1223 mutex_unlock(&chip->mutex);
1224 printk(KERN_ERR "waiting for chip to be ready timed out in unlock\n"); 1224 printk(KERN_ERR "waiting for chip to be ready timed out in unlock\n");
1225 return -EIO; 1225 return -EIO;
1226 } 1226 }
1227 1227
1228 /* Latency issues. Drop the lock, wait a while and retry */ 1228 /* Latency issues. Drop the lock, wait a while and retry */
1229 spin_unlock_bh(chip->mutex); 1229 mutex_unlock(&chip->mutex);
1230 cfi_udelay(1); 1230 cfi_udelay(1);
1231 goto retry; 1231 goto retry;
1232 1232
@@ -1235,7 +1235,7 @@ retry:
1235 someone changes the status */ 1235 someone changes the status */
1236 set_current_state(TASK_UNINTERRUPTIBLE); 1236 set_current_state(TASK_UNINTERRUPTIBLE);
1237 add_wait_queue(&chip->wq, &wait); 1237 add_wait_queue(&chip->wq, &wait);
1238 spin_unlock_bh(chip->mutex); 1238 mutex_unlock(&chip->mutex);
1239 schedule(); 1239 schedule();
1240 remove_wait_queue(&chip->wq, &wait); 1240 remove_wait_queue(&chip->wq, &wait);
1241 timeo = jiffies + HZ; 1241 timeo = jiffies + HZ;
@@ -1247,9 +1247,9 @@ retry:
1247 map_write(map, CMD(0xD0), adr); 1247 map_write(map, CMD(0xD0), adr);
1248 chip->state = FL_UNLOCKING; 1248 chip->state = FL_UNLOCKING;
1249 1249
1250 spin_unlock_bh(chip->mutex); 1250 mutex_unlock(&chip->mutex);
1251 msleep(1000); 1251 msleep(1000);
1252 spin_lock_bh(chip->mutex); 1252 mutex_lock(&chip->mutex);
1253 1253
1254 /* FIXME. Use a timer to check this, and return immediately. */ 1254 /* FIXME. Use a timer to check this, and return immediately. */
1255 /* Once the state machine's known to be working I'll do that */ 1255 /* Once the state machine's known to be working I'll do that */
@@ -1267,21 +1267,21 @@ retry:
1267 chip->state = FL_STATUS; 1267 chip->state = FL_STATUS;
1268 printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); 1268 printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
1269 DISABLE_VPP(map); 1269 DISABLE_VPP(map);
1270 spin_unlock_bh(chip->mutex); 1270 mutex_unlock(&chip->mutex);
1271 return -EIO; 1271 return -EIO;
1272 } 1272 }
1273 1273
1274 /* Latency issues. Drop the unlock, wait a while and retry */ 1274 /* Latency issues. Drop the unlock, wait a while and retry */
1275 spin_unlock_bh(chip->mutex); 1275 mutex_unlock(&chip->mutex);
1276 cfi_udelay(1); 1276 cfi_udelay(1);
1277 spin_lock_bh(chip->mutex); 1277 mutex_lock(&chip->mutex);
1278 } 1278 }
1279 1279
1280 /* Done and happy. */ 1280 /* Done and happy. */
1281 chip->state = FL_STATUS; 1281 chip->state = FL_STATUS;
1282 DISABLE_VPP(map); 1282 DISABLE_VPP(map);
1283 wake_up(&chip->wq); 1283 wake_up(&chip->wq);
1284 spin_unlock_bh(chip->mutex); 1284 mutex_unlock(&chip->mutex);
1285 return 0; 1285 return 0;
1286} 1286}
1287static int cfi_staa_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 1287static int cfi_staa_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
@@ -1334,7 +1334,7 @@ static int cfi_staa_suspend(struct mtd_info *mtd)
1334 for (i=0; !ret && i<cfi->numchips; i++) { 1334 for (i=0; !ret && i<cfi->numchips; i++) {
1335 chip = &cfi->chips[i]; 1335 chip = &cfi->chips[i];
1336 1336
1337 spin_lock_bh(chip->mutex); 1337 mutex_lock(&chip->mutex);
1338 1338
1339 switch(chip->state) { 1339 switch(chip->state) {
1340 case FL_READY: 1340 case FL_READY:
@@ -1354,7 +1354,7 @@ static int cfi_staa_suspend(struct mtd_info *mtd)
1354 ret = -EAGAIN; 1354 ret = -EAGAIN;
1355 break; 1355 break;
1356 } 1356 }
1357 spin_unlock_bh(chip->mutex); 1357 mutex_unlock(&chip->mutex);
1358 } 1358 }
1359 1359
1360 /* Unlock the chips again */ 1360 /* Unlock the chips again */
@@ -1363,7 +1363,7 @@ static int cfi_staa_suspend(struct mtd_info *mtd)
1363 for (i--; i >=0; i--) { 1363 for (i--; i >=0; i--) {
1364 chip = &cfi->chips[i]; 1364 chip = &cfi->chips[i];
1365 1365
1366 spin_lock_bh(chip->mutex); 1366 mutex_lock(&chip->mutex);
1367 1367
1368 if (chip->state == FL_PM_SUSPENDED) { 1368 if (chip->state == FL_PM_SUSPENDED) {
1369 /* No need to force it into a known state here, 1369 /* No need to force it into a known state here,
@@ -1372,7 +1372,7 @@ static int cfi_staa_suspend(struct mtd_info *mtd)
1372 chip->state = chip->oldstate; 1372 chip->state = chip->oldstate;
1373 wake_up(&chip->wq); 1373 wake_up(&chip->wq);
1374 } 1374 }
1375 spin_unlock_bh(chip->mutex); 1375 mutex_unlock(&chip->mutex);
1376 } 1376 }
1377 } 1377 }
1378 1378
@@ -1390,7 +1390,7 @@ static void cfi_staa_resume(struct mtd_info *mtd)
1390 1390
1391 chip = &cfi->chips[i]; 1391 chip = &cfi->chips[i];
1392 1392
1393 spin_lock_bh(chip->mutex); 1393 mutex_lock(&chip->mutex);
1394 1394
1395 /* Go to known state. Chip may have been power cycled */ 1395 /* Go to known state. Chip may have been power cycled */
1396 if (chip->state == FL_PM_SUSPENDED) { 1396 if (chip->state == FL_PM_SUSPENDED) {
@@ -1399,7 +1399,7 @@ static void cfi_staa_resume(struct mtd_info *mtd)
1399 wake_up(&chip->wq); 1399 wake_up(&chip->wq);
1400 } 1400 }
1401 1401
1402 spin_unlock_bh(chip->mutex); 1402 mutex_unlock(&chip->mutex);
1403 } 1403 }
1404} 1404}
1405 1405
diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c
index e63e6749429a..b2acd32f4fbf 100644
--- a/drivers/mtd/chips/cfi_probe.c
+++ b/drivers/mtd/chips/cfi_probe.c
@@ -158,6 +158,7 @@ static int __xipram cfi_chip_setup(struct map_info *map,
158 __u32 base = 0; 158 __u32 base = 0;
159 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor); 159 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
160 int i; 160 int i;
161 int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
161 162
162 xip_enable(base, map, cfi); 163 xip_enable(base, map, cfi);
163#ifdef DEBUG_CFI 164#ifdef DEBUG_CFI
@@ -181,29 +182,6 @@ static int __xipram cfi_chip_setup(struct map_info *map,
181 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++) 182 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
182 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor); 183 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
183 184
184 /* Note we put the device back into Read Mode BEFORE going into Auto
185 * Select Mode, as some devices support nesting of modes, others
186 * don't. This way should always work.
187 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
188 * so should be treated as nops or illegal (and so put the device
189 * back into Read Mode, which is a nop in this case).
190 */
191 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
192 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
193 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
194 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
195 cfi->mfr = cfi_read_query16(map, base);
196 cfi->id = cfi_read_query16(map, base + ofs_factor);
197
198 /* Get AMD/Spansion extended JEDEC ID */
199 if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
200 cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
201 cfi_read_query(map, base + 0xf * ofs_factor);
202
203 /* Put it back into Read Mode */
204 cfi_qry_mode_off(base, map, cfi);
205 xip_allowed(base, map);
206
207 /* Do any necessary byteswapping */ 185 /* Do any necessary byteswapping */
208 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID); 186 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
209 187
@@ -228,6 +206,35 @@ static int __xipram cfi_chip_setup(struct map_info *map,
228#endif 206#endif
229 } 207 }
230 208
209 if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
210 addr_unlock1 = 0x5555;
211 addr_unlock2 = 0x2AAA;
212 }
213
214 /*
215 * Note we put the device back into Read Mode BEFORE going into Auto
216 * Select Mode, as some devices support nesting of modes, others
217 * don't. This way should always work.
218 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
219 * so should be treated as nops or illegal (and so put the device
220 * back into Read Mode, which is a nop in this case).
221 */
222 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
223 cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
224 cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
225 cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
226 cfi->mfr = cfi_read_query16(map, base);
227 cfi->id = cfi_read_query16(map, base + ofs_factor);
228
229 /* Get AMD/Spansion extended JEDEC ID */
230 if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
231 cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
232 cfi_read_query(map, base + 0xf * ofs_factor);
233
234 /* Put it back into Read Mode */
235 cfi_qry_mode_off(base, map, cfi);
236 xip_allowed(base, map);
237
231 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 238 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
232 map->name, cfi->interleave, cfi->device_type*8, base, 239 map->name, cfi->interleave, cfi->device_type*8, base,
233 map->bankwidth*8); 240 map->bankwidth*8);
@@ -269,6 +276,9 @@ static char *vendorname(__u16 vendor)
269 case P_ID_SST_PAGE: 276 case P_ID_SST_PAGE:
270 return "SST Page Write"; 277 return "SST Page Write";
271 278
279 case P_ID_SST_OLD:
280 return "SST 39VF160x/39VF320x";
281
272 case P_ID_INTEL_PERFORMANCE: 282 case P_ID_INTEL_PERFORMANCE:
273 return "Intel Performance Code"; 283 return "Intel Performance Code";
274 284
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index ca584d0380b4..d7c2c672757e 100644
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
@@ -104,10 +104,11 @@ __xipram cfi_read_pri(struct map_info *map, __u16 adr, __u16 size, const char* n
104 int i; 104 int i;
105 struct cfi_extquery *extp = NULL; 105 struct cfi_extquery *extp = NULL;
106 106
107 printk(" %s Extended Query Table at 0x%4.4X\n", name, adr);
108 if (!adr) 107 if (!adr)
109 goto out; 108 goto out;
110 109
110 printk(KERN_INFO "%s Extended Query Table at 0x%4.4X\n", name, adr);
111
111 extp = kmalloc(size, GFP_KERNEL); 112 extp = kmalloc(size, GFP_KERNEL);
112 if (!extp) { 113 if (!extp) {
113 printk(KERN_ERR "Failed to allocate memory\n"); 114 printk(KERN_ERR "Failed to allocate memory\n");
diff --git a/drivers/mtd/chips/fwh_lock.h b/drivers/mtd/chips/fwh_lock.h
index 57e0e4e921f9..d18064977192 100644
--- a/drivers/mtd/chips/fwh_lock.h
+++ b/drivers/mtd/chips/fwh_lock.h
@@ -58,10 +58,10 @@ static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,
58 * to flash memory - that means that we don't have to check status 58 * to flash memory - that means that we don't have to check status
59 * and timeout. 59 * and timeout.
60 */ 60 */
61 spin_lock(chip->mutex); 61 mutex_lock(&chip->mutex);
62 ret = get_chip(map, chip, adr, FL_LOCKING); 62 ret = get_chip(map, chip, adr, FL_LOCKING);
63 if (ret) { 63 if (ret) {
64 spin_unlock(chip->mutex); 64 mutex_unlock(&chip->mutex);
65 return ret; 65 return ret;
66 } 66 }
67 67
@@ -72,7 +72,7 @@ static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,
72 /* Done and happy. */ 72 /* Done and happy. */
73 chip->state = chip->oldstate; 73 chip->state = chip->oldstate;
74 put_chip(map, chip, adr); 74 put_chip(map, chip, adr);
75 spin_unlock(chip->mutex); 75 mutex_unlock(&chip->mutex);
76 return 0; 76 return 0;
77} 77}
78 78
diff --git a/drivers/mtd/chips/gen_probe.c b/drivers/mtd/chips/gen_probe.c
index e2dc96441e05..3b9a2843c5f8 100644
--- a/drivers/mtd/chips/gen_probe.c
+++ b/drivers/mtd/chips/gen_probe.c
@@ -155,8 +155,7 @@ static struct cfi_private *genprobe_ident_chips(struct map_info *map, struct chi
155 pchip->start = (i << cfi.chipshift); 155 pchip->start = (i << cfi.chipshift);
156 pchip->state = FL_READY; 156 pchip->state = FL_READY;
157 init_waitqueue_head(&pchip->wq); 157 init_waitqueue_head(&pchip->wq);
158 spin_lock_init(&pchip->_spinlock); 158 mutex_init(&pchip->mutex);
159 pchip->mutex = &pchip->_spinlock;
160 } 159 }
161 } 160 }
162 161
@@ -242,17 +241,19 @@ static struct mtd_info *check_cmd_set(struct map_info *map, int primary)
242 /* We need these for the !CONFIG_MODULES case, 241 /* We need these for the !CONFIG_MODULES case,
243 because symbol_get() doesn't work there */ 242 because symbol_get() doesn't work there */
244#ifdef CONFIG_MTD_CFI_INTELEXT 243#ifdef CONFIG_MTD_CFI_INTELEXT
245 case 0x0001: 244 case P_ID_INTEL_EXT:
246 case 0x0003: 245 case P_ID_INTEL_STD:
247 case 0x0200: 246 case P_ID_INTEL_PERFORMANCE:
248 return cfi_cmdset_0001(map, primary); 247 return cfi_cmdset_0001(map, primary);
249#endif 248#endif
250#ifdef CONFIG_MTD_CFI_AMDSTD 249#ifdef CONFIG_MTD_CFI_AMDSTD
251 case 0x0002: 250 case P_ID_AMD_STD:
251 case P_ID_SST_OLD:
252 case P_ID_WINBOND:
252 return cfi_cmdset_0002(map, primary); 253 return cfi_cmdset_0002(map, primary);
253#endif 254#endif
254#ifdef CONFIG_MTD_CFI_STAA 255#ifdef CONFIG_MTD_CFI_STAA
255 case 0x0020: 256 case P_ID_ST_ADV:
256 return cfi_cmdset_0020(map, primary); 257 return cfi_cmdset_0020(map, primary);
257#endif 258#endif
258 default: 259 default:
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 8db1148dfa47..d72a5fb2d041 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -22,24 +22,6 @@
22#include <linux/mtd/cfi.h> 22#include <linux/mtd/cfi.h>
23#include <linux/mtd/gen_probe.h> 23#include <linux/mtd/gen_probe.h>
24 24
25/* Manufacturers */
26#define MANUFACTURER_AMD 0x0001
27#define MANUFACTURER_ATMEL 0x001f
28#define MANUFACTURER_EON 0x001c
29#define MANUFACTURER_FUJITSU 0x0004
30#define MANUFACTURER_HYUNDAI 0x00AD
31#define MANUFACTURER_INTEL 0x0089
32#define MANUFACTURER_MACRONIX 0x00C2
33#define MANUFACTURER_NEC 0x0010
34#define MANUFACTURER_PMC 0x009D
35#define MANUFACTURER_SHARP 0x00b0
36#define MANUFACTURER_SST 0x00BF
37#define MANUFACTURER_ST 0x0020
38#define MANUFACTURER_TOSHIBA 0x0098
39#define MANUFACTURER_WINBOND 0x00da
40#define CONTINUATION_CODE 0x007f
41
42
43/* AMD */ 25/* AMD */
44#define AM29DL800BB 0x22CB 26#define AM29DL800BB 0x22CB
45#define AM29DL800BT 0x224A 27#define AM29DL800BT 0x224A
@@ -166,6 +148,8 @@
166#define SST39LF160 0x2782 148#define SST39LF160 0x2782
167#define SST39VF1601 0x234b 149#define SST39VF1601 0x234b
168#define SST39VF3201 0x235b 150#define SST39VF3201 0x235b
151#define SST39WF1601 0x274b
152#define SST39WF1602 0x274a
169#define SST39LF512 0x00D4 153#define SST39LF512 0x00D4
170#define SST39LF010 0x00D5 154#define SST39LF010 0x00D5
171#define SST39LF020 0x00D6 155#define SST39LF020 0x00D6
@@ -309,7 +293,7 @@ struct amd_flash_info {
309 */ 293 */
310static const struct amd_flash_info jedec_table[] = { 294static const struct amd_flash_info jedec_table[] = {
311 { 295 {
312 .mfr_id = MANUFACTURER_AMD, 296 .mfr_id = CFI_MFR_AMD,
313 .dev_id = AM29F032B, 297 .dev_id = AM29F032B,
314 .name = "AMD AM29F032B", 298 .name = "AMD AM29F032B",
315 .uaddr = MTD_UADDR_0x0555_0x02AA, 299 .uaddr = MTD_UADDR_0x0555_0x02AA,
@@ -321,7 +305,7 @@ static const struct amd_flash_info jedec_table[] = {
321 ERASEINFO(0x10000,64) 305 ERASEINFO(0x10000,64)
322 } 306 }
323 }, { 307 }, {
324 .mfr_id = MANUFACTURER_AMD, 308 .mfr_id = CFI_MFR_AMD,
325 .dev_id = AM29LV160DT, 309 .dev_id = AM29LV160DT,
326 .name = "AMD AM29LV160DT", 310 .name = "AMD AM29LV160DT",
327 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 311 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -336,7 +320,7 @@ static const struct amd_flash_info jedec_table[] = {
336 ERASEINFO(0x04000,1) 320 ERASEINFO(0x04000,1)
337 } 321 }
338 }, { 322 }, {
339 .mfr_id = MANUFACTURER_AMD, 323 .mfr_id = CFI_MFR_AMD,
340 .dev_id = AM29LV160DB, 324 .dev_id = AM29LV160DB,
341 .name = "AMD AM29LV160DB", 325 .name = "AMD AM29LV160DB",
342 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 326 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -351,7 +335,7 @@ static const struct amd_flash_info jedec_table[] = {
351 ERASEINFO(0x10000,31) 335 ERASEINFO(0x10000,31)
352 } 336 }
353 }, { 337 }, {
354 .mfr_id = MANUFACTURER_AMD, 338 .mfr_id = CFI_MFR_AMD,
355 .dev_id = AM29LV400BB, 339 .dev_id = AM29LV400BB,
356 .name = "AMD AM29LV400BB", 340 .name = "AMD AM29LV400BB",
357 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 341 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -366,7 +350,7 @@ static const struct amd_flash_info jedec_table[] = {
366 ERASEINFO(0x10000,7) 350 ERASEINFO(0x10000,7)
367 } 351 }
368 }, { 352 }, {
369 .mfr_id = MANUFACTURER_AMD, 353 .mfr_id = CFI_MFR_AMD,
370 .dev_id = AM29LV400BT, 354 .dev_id = AM29LV400BT,
371 .name = "AMD AM29LV400BT", 355 .name = "AMD AM29LV400BT",
372 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 356 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -381,7 +365,7 @@ static const struct amd_flash_info jedec_table[] = {
381 ERASEINFO(0x04000,1) 365 ERASEINFO(0x04000,1)
382 } 366 }
383 }, { 367 }, {
384 .mfr_id = MANUFACTURER_AMD, 368 .mfr_id = CFI_MFR_AMD,
385 .dev_id = AM29LV800BB, 369 .dev_id = AM29LV800BB,
386 .name = "AMD AM29LV800BB", 370 .name = "AMD AM29LV800BB",
387 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 371 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -397,7 +381,7 @@ static const struct amd_flash_info jedec_table[] = {
397 } 381 }
398 }, { 382 }, {
399/* add DL */ 383/* add DL */
400 .mfr_id = MANUFACTURER_AMD, 384 .mfr_id = CFI_MFR_AMD,
401 .dev_id = AM29DL800BB, 385 .dev_id = AM29DL800BB,
402 .name = "AMD AM29DL800BB", 386 .name = "AMD AM29DL800BB",
403 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 387 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -414,7 +398,7 @@ static const struct amd_flash_info jedec_table[] = {
414 ERASEINFO(0x10000,14) 398 ERASEINFO(0x10000,14)
415 } 399 }
416 }, { 400 }, {
417 .mfr_id = MANUFACTURER_AMD, 401 .mfr_id = CFI_MFR_AMD,
418 .dev_id = AM29DL800BT, 402 .dev_id = AM29DL800BT,
419 .name = "AMD AM29DL800BT", 403 .name = "AMD AM29DL800BT",
420 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 404 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -431,7 +415,7 @@ static const struct amd_flash_info jedec_table[] = {
431 ERASEINFO(0x04000,1) 415 ERASEINFO(0x04000,1)
432 } 416 }
433 }, { 417 }, {
434 .mfr_id = MANUFACTURER_AMD, 418 .mfr_id = CFI_MFR_AMD,
435 .dev_id = AM29F800BB, 419 .dev_id = AM29F800BB,
436 .name = "AMD AM29F800BB", 420 .name = "AMD AM29F800BB",
437 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 421 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -446,7 +430,7 @@ static const struct amd_flash_info jedec_table[] = {
446 ERASEINFO(0x10000,15), 430 ERASEINFO(0x10000,15),
447 } 431 }
448 }, { 432 }, {
449 .mfr_id = MANUFACTURER_AMD, 433 .mfr_id = CFI_MFR_AMD,
450 .dev_id = AM29LV800BT, 434 .dev_id = AM29LV800BT,
451 .name = "AMD AM29LV800BT", 435 .name = "AMD AM29LV800BT",
452 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 436 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -461,7 +445,7 @@ static const struct amd_flash_info jedec_table[] = {
461 ERASEINFO(0x04000,1) 445 ERASEINFO(0x04000,1)
462 } 446 }
463 }, { 447 }, {
464 .mfr_id = MANUFACTURER_AMD, 448 .mfr_id = CFI_MFR_AMD,
465 .dev_id = AM29F800BT, 449 .dev_id = AM29F800BT,
466 .name = "AMD AM29F800BT", 450 .name = "AMD AM29F800BT",
467 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 451 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -476,7 +460,7 @@ static const struct amd_flash_info jedec_table[] = {
476 ERASEINFO(0x04000,1) 460 ERASEINFO(0x04000,1)
477 } 461 }
478 }, { 462 }, {
479 .mfr_id = MANUFACTURER_AMD, 463 .mfr_id = CFI_MFR_AMD,
480 .dev_id = AM29F017D, 464 .dev_id = AM29F017D,
481 .name = "AMD AM29F017D", 465 .name = "AMD AM29F017D",
482 .devtypes = CFI_DEVICETYPE_X8, 466 .devtypes = CFI_DEVICETYPE_X8,
@@ -488,7 +472,7 @@ static const struct amd_flash_info jedec_table[] = {
488 ERASEINFO(0x10000,32), 472 ERASEINFO(0x10000,32),
489 } 473 }
490 }, { 474 }, {
491 .mfr_id = MANUFACTURER_AMD, 475 .mfr_id = CFI_MFR_AMD,
492 .dev_id = AM29F016D, 476 .dev_id = AM29F016D,
493 .name = "AMD AM29F016D", 477 .name = "AMD AM29F016D",
494 .devtypes = CFI_DEVICETYPE_X8, 478 .devtypes = CFI_DEVICETYPE_X8,
@@ -500,7 +484,7 @@ static const struct amd_flash_info jedec_table[] = {
500 ERASEINFO(0x10000,32), 484 ERASEINFO(0x10000,32),
501 } 485 }
502 }, { 486 }, {
503 .mfr_id = MANUFACTURER_AMD, 487 .mfr_id = CFI_MFR_AMD,
504 .dev_id = AM29F080, 488 .dev_id = AM29F080,
505 .name = "AMD AM29F080", 489 .name = "AMD AM29F080",
506 .devtypes = CFI_DEVICETYPE_X8, 490 .devtypes = CFI_DEVICETYPE_X8,
@@ -512,7 +496,7 @@ static const struct amd_flash_info jedec_table[] = {
512 ERASEINFO(0x10000,16), 496 ERASEINFO(0x10000,16),
513 } 497 }
514 }, { 498 }, {
515 .mfr_id = MANUFACTURER_AMD, 499 .mfr_id = CFI_MFR_AMD,
516 .dev_id = AM29F040, 500 .dev_id = AM29F040,
517 .name = "AMD AM29F040", 501 .name = "AMD AM29F040",
518 .devtypes = CFI_DEVICETYPE_X8, 502 .devtypes = CFI_DEVICETYPE_X8,
@@ -524,7 +508,7 @@ static const struct amd_flash_info jedec_table[] = {
524 ERASEINFO(0x10000,8), 508 ERASEINFO(0x10000,8),
525 } 509 }
526 }, { 510 }, {
527 .mfr_id = MANUFACTURER_AMD, 511 .mfr_id = CFI_MFR_AMD,
528 .dev_id = AM29LV040B, 512 .dev_id = AM29LV040B,
529 .name = "AMD AM29LV040B", 513 .name = "AMD AM29LV040B",
530 .devtypes = CFI_DEVICETYPE_X8, 514 .devtypes = CFI_DEVICETYPE_X8,
@@ -536,7 +520,7 @@ static const struct amd_flash_info jedec_table[] = {
536 ERASEINFO(0x10000,8), 520 ERASEINFO(0x10000,8),
537 } 521 }
538 }, { 522 }, {
539 .mfr_id = MANUFACTURER_AMD, 523 .mfr_id = CFI_MFR_AMD,
540 .dev_id = AM29F002T, 524 .dev_id = AM29F002T,
541 .name = "AMD AM29F002T", 525 .name = "AMD AM29F002T",
542 .devtypes = CFI_DEVICETYPE_X8, 526 .devtypes = CFI_DEVICETYPE_X8,
@@ -551,7 +535,7 @@ static const struct amd_flash_info jedec_table[] = {
551 ERASEINFO(0x04000,1), 535 ERASEINFO(0x04000,1),
552 } 536 }
553 }, { 537 }, {
554 .mfr_id = MANUFACTURER_AMD, 538 .mfr_id = CFI_MFR_AMD,
555 .dev_id = AM29SL800DT, 539 .dev_id = AM29SL800DT,
556 .name = "AMD AM29SL800DT", 540 .name = "AMD AM29SL800DT",
557 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 541 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -566,7 +550,7 @@ static const struct amd_flash_info jedec_table[] = {
566 ERASEINFO(0x04000,1), 550 ERASEINFO(0x04000,1),
567 } 551 }
568 }, { 552 }, {
569 .mfr_id = MANUFACTURER_AMD, 553 .mfr_id = CFI_MFR_AMD,
570 .dev_id = AM29SL800DB, 554 .dev_id = AM29SL800DB,
571 .name = "AMD AM29SL800DB", 555 .name = "AMD AM29SL800DB",
572 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 556 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -581,7 +565,7 @@ static const struct amd_flash_info jedec_table[] = {
581 ERASEINFO(0x10000,15), 565 ERASEINFO(0x10000,15),
582 } 566 }
583 }, { 567 }, {
584 .mfr_id = MANUFACTURER_ATMEL, 568 .mfr_id = CFI_MFR_ATMEL,
585 .dev_id = AT49BV512, 569 .dev_id = AT49BV512,
586 .name = "Atmel AT49BV512", 570 .name = "Atmel AT49BV512",
587 .devtypes = CFI_DEVICETYPE_X8, 571 .devtypes = CFI_DEVICETYPE_X8,
@@ -593,7 +577,7 @@ static const struct amd_flash_info jedec_table[] = {
593 ERASEINFO(0x10000,1) 577 ERASEINFO(0x10000,1)
594 } 578 }
595 }, { 579 }, {
596 .mfr_id = MANUFACTURER_ATMEL, 580 .mfr_id = CFI_MFR_ATMEL,
597 .dev_id = AT29LV512, 581 .dev_id = AT29LV512,
598 .name = "Atmel AT29LV512", 582 .name = "Atmel AT29LV512",
599 .devtypes = CFI_DEVICETYPE_X8, 583 .devtypes = CFI_DEVICETYPE_X8,
@@ -606,7 +590,7 @@ static const struct amd_flash_info jedec_table[] = {
606 ERASEINFO(0x80,256) 590 ERASEINFO(0x80,256)
607 } 591 }
608 }, { 592 }, {
609 .mfr_id = MANUFACTURER_ATMEL, 593 .mfr_id = CFI_MFR_ATMEL,
610 .dev_id = AT49BV16X, 594 .dev_id = AT49BV16X,
611 .name = "Atmel AT49BV16X", 595 .name = "Atmel AT49BV16X",
612 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 596 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -619,7 +603,7 @@ static const struct amd_flash_info jedec_table[] = {
619 ERASEINFO(0x10000,31) 603 ERASEINFO(0x10000,31)
620 } 604 }
621 }, { 605 }, {
622 .mfr_id = MANUFACTURER_ATMEL, 606 .mfr_id = CFI_MFR_ATMEL,
623 .dev_id = AT49BV16XT, 607 .dev_id = AT49BV16XT,
624 .name = "Atmel AT49BV16XT", 608 .name = "Atmel AT49BV16XT",
625 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 609 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -632,7 +616,7 @@ static const struct amd_flash_info jedec_table[] = {
632 ERASEINFO(0x02000,8) 616 ERASEINFO(0x02000,8)
633 } 617 }
634 }, { 618 }, {
635 .mfr_id = MANUFACTURER_ATMEL, 619 .mfr_id = CFI_MFR_ATMEL,
636 .dev_id = AT49BV32X, 620 .dev_id = AT49BV32X,
637 .name = "Atmel AT49BV32X", 621 .name = "Atmel AT49BV32X",
638 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 622 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -645,7 +629,7 @@ static const struct amd_flash_info jedec_table[] = {
645 ERASEINFO(0x10000,63) 629 ERASEINFO(0x10000,63)
646 } 630 }
647 }, { 631 }, {
648 .mfr_id = MANUFACTURER_ATMEL, 632 .mfr_id = CFI_MFR_ATMEL,
649 .dev_id = AT49BV32XT, 633 .dev_id = AT49BV32XT,
650 .name = "Atmel AT49BV32XT", 634 .name = "Atmel AT49BV32XT",
651 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 635 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -658,7 +642,7 @@ static const struct amd_flash_info jedec_table[] = {
658 ERASEINFO(0x02000,8) 642 ERASEINFO(0x02000,8)
659 } 643 }
660 }, { 644 }, {
661 .mfr_id = MANUFACTURER_EON, 645 .mfr_id = CFI_MFR_EON,
662 .dev_id = EN29SL800BT, 646 .dev_id = EN29SL800BT,
663 .name = "Eon EN29SL800BT", 647 .name = "Eon EN29SL800BT",
664 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 648 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -673,7 +657,7 @@ static const struct amd_flash_info jedec_table[] = {
673 ERASEINFO(0x04000,1), 657 ERASEINFO(0x04000,1),
674 } 658 }
675 }, { 659 }, {
676 .mfr_id = MANUFACTURER_EON, 660 .mfr_id = CFI_MFR_EON,
677 .dev_id = EN29SL800BB, 661 .dev_id = EN29SL800BB,
678 .name = "Eon EN29SL800BB", 662 .name = "Eon EN29SL800BB",
679 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 663 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -688,7 +672,7 @@ static const struct amd_flash_info jedec_table[] = {
688 ERASEINFO(0x10000,15), 672 ERASEINFO(0x10000,15),
689 } 673 }
690 }, { 674 }, {
691 .mfr_id = MANUFACTURER_FUJITSU, 675 .mfr_id = CFI_MFR_FUJITSU,
692 .dev_id = MBM29F040C, 676 .dev_id = MBM29F040C,
693 .name = "Fujitsu MBM29F040C", 677 .name = "Fujitsu MBM29F040C",
694 .devtypes = CFI_DEVICETYPE_X8, 678 .devtypes = CFI_DEVICETYPE_X8,
@@ -700,7 +684,7 @@ static const struct amd_flash_info jedec_table[] = {
700 ERASEINFO(0x10000,8) 684 ERASEINFO(0x10000,8)
701 } 685 }
702 }, { 686 }, {
703 .mfr_id = MANUFACTURER_FUJITSU, 687 .mfr_id = CFI_MFR_FUJITSU,
704 .dev_id = MBM29F800BA, 688 .dev_id = MBM29F800BA,
705 .name = "Fujitsu MBM29F800BA", 689 .name = "Fujitsu MBM29F800BA",
706 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 690 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -715,7 +699,7 @@ static const struct amd_flash_info jedec_table[] = {
715 ERASEINFO(0x10000,15), 699 ERASEINFO(0x10000,15),
716 } 700 }
717 }, { 701 }, {
718 .mfr_id = MANUFACTURER_FUJITSU, 702 .mfr_id = CFI_MFR_FUJITSU,
719 .dev_id = MBM29LV650UE, 703 .dev_id = MBM29LV650UE,
720 .name = "Fujitsu MBM29LV650UE", 704 .name = "Fujitsu MBM29LV650UE",
721 .devtypes = CFI_DEVICETYPE_X8, 705 .devtypes = CFI_DEVICETYPE_X8,
@@ -727,7 +711,7 @@ static const struct amd_flash_info jedec_table[] = {
727 ERASEINFO(0x10000,128) 711 ERASEINFO(0x10000,128)
728 } 712 }
729 }, { 713 }, {
730 .mfr_id = MANUFACTURER_FUJITSU, 714 .mfr_id = CFI_MFR_FUJITSU,
731 .dev_id = MBM29LV320TE, 715 .dev_id = MBM29LV320TE,
732 .name = "Fujitsu MBM29LV320TE", 716 .name = "Fujitsu MBM29LV320TE",
733 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 717 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -740,7 +724,7 @@ static const struct amd_flash_info jedec_table[] = {
740 ERASEINFO(0x02000,8) 724 ERASEINFO(0x02000,8)
741 } 725 }
742 }, { 726 }, {
743 .mfr_id = MANUFACTURER_FUJITSU, 727 .mfr_id = CFI_MFR_FUJITSU,
744 .dev_id = MBM29LV320BE, 728 .dev_id = MBM29LV320BE,
745 .name = "Fujitsu MBM29LV320BE", 729 .name = "Fujitsu MBM29LV320BE",
746 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 730 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -753,7 +737,7 @@ static const struct amd_flash_info jedec_table[] = {
753 ERASEINFO(0x10000,63) 737 ERASEINFO(0x10000,63)
754 } 738 }
755 }, { 739 }, {
756 .mfr_id = MANUFACTURER_FUJITSU, 740 .mfr_id = CFI_MFR_FUJITSU,
757 .dev_id = MBM29LV160TE, 741 .dev_id = MBM29LV160TE,
758 .name = "Fujitsu MBM29LV160TE", 742 .name = "Fujitsu MBM29LV160TE",
759 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 743 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -768,7 +752,7 @@ static const struct amd_flash_info jedec_table[] = {
768 ERASEINFO(0x04000,1) 752 ERASEINFO(0x04000,1)
769 } 753 }
770 }, { 754 }, {
771 .mfr_id = MANUFACTURER_FUJITSU, 755 .mfr_id = CFI_MFR_FUJITSU,
772 .dev_id = MBM29LV160BE, 756 .dev_id = MBM29LV160BE,
773 .name = "Fujitsu MBM29LV160BE", 757 .name = "Fujitsu MBM29LV160BE",
774 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 758 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -783,7 +767,7 @@ static const struct amd_flash_info jedec_table[] = {
783 ERASEINFO(0x10000,31) 767 ERASEINFO(0x10000,31)
784 } 768 }
785 }, { 769 }, {
786 .mfr_id = MANUFACTURER_FUJITSU, 770 .mfr_id = CFI_MFR_FUJITSU,
787 .dev_id = MBM29LV800BA, 771 .dev_id = MBM29LV800BA,
788 .name = "Fujitsu MBM29LV800BA", 772 .name = "Fujitsu MBM29LV800BA",
789 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 773 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -798,7 +782,7 @@ static const struct amd_flash_info jedec_table[] = {
798 ERASEINFO(0x10000,15) 782 ERASEINFO(0x10000,15)
799 } 783 }
800 }, { 784 }, {
801 .mfr_id = MANUFACTURER_FUJITSU, 785 .mfr_id = CFI_MFR_FUJITSU,
802 .dev_id = MBM29LV800TA, 786 .dev_id = MBM29LV800TA,
803 .name = "Fujitsu MBM29LV800TA", 787 .name = "Fujitsu MBM29LV800TA",
804 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 788 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -813,7 +797,7 @@ static const struct amd_flash_info jedec_table[] = {
813 ERASEINFO(0x04000,1) 797 ERASEINFO(0x04000,1)
814 } 798 }
815 }, { 799 }, {
816 .mfr_id = MANUFACTURER_FUJITSU, 800 .mfr_id = CFI_MFR_FUJITSU,
817 .dev_id = MBM29LV400BC, 801 .dev_id = MBM29LV400BC,
818 .name = "Fujitsu MBM29LV400BC", 802 .name = "Fujitsu MBM29LV400BC",
819 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 803 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -828,7 +812,7 @@ static const struct amd_flash_info jedec_table[] = {
828 ERASEINFO(0x10000,7) 812 ERASEINFO(0x10000,7)
829 } 813 }
830 }, { 814 }, {
831 .mfr_id = MANUFACTURER_FUJITSU, 815 .mfr_id = CFI_MFR_FUJITSU,
832 .dev_id = MBM29LV400TC, 816 .dev_id = MBM29LV400TC,
833 .name = "Fujitsu MBM29LV400TC", 817 .name = "Fujitsu MBM29LV400TC",
834 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 818 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -843,7 +827,7 @@ static const struct amd_flash_info jedec_table[] = {
843 ERASEINFO(0x04000,1) 827 ERASEINFO(0x04000,1)
844 } 828 }
845 }, { 829 }, {
846 .mfr_id = MANUFACTURER_HYUNDAI, 830 .mfr_id = CFI_MFR_HYUNDAI,
847 .dev_id = HY29F002T, 831 .dev_id = HY29F002T,
848 .name = "Hyundai HY29F002T", 832 .name = "Hyundai HY29F002T",
849 .devtypes = CFI_DEVICETYPE_X8, 833 .devtypes = CFI_DEVICETYPE_X8,
@@ -858,7 +842,7 @@ static const struct amd_flash_info jedec_table[] = {
858 ERASEINFO(0x04000,1), 842 ERASEINFO(0x04000,1),
859 } 843 }
860 }, { 844 }, {
861 .mfr_id = MANUFACTURER_INTEL, 845 .mfr_id = CFI_MFR_INTEL,
862 .dev_id = I28F004B3B, 846 .dev_id = I28F004B3B,
863 .name = "Intel 28F004B3B", 847 .name = "Intel 28F004B3B",
864 .devtypes = CFI_DEVICETYPE_X8, 848 .devtypes = CFI_DEVICETYPE_X8,
@@ -871,7 +855,7 @@ static const struct amd_flash_info jedec_table[] = {
871 ERASEINFO(0x10000, 7), 855 ERASEINFO(0x10000, 7),
872 } 856 }
873 }, { 857 }, {
874 .mfr_id = MANUFACTURER_INTEL, 858 .mfr_id = CFI_MFR_INTEL,
875 .dev_id = I28F004B3T, 859 .dev_id = I28F004B3T,
876 .name = "Intel 28F004B3T", 860 .name = "Intel 28F004B3T",
877 .devtypes = CFI_DEVICETYPE_X8, 861 .devtypes = CFI_DEVICETYPE_X8,
@@ -884,7 +868,7 @@ static const struct amd_flash_info jedec_table[] = {
884 ERASEINFO(0x02000, 8), 868 ERASEINFO(0x02000, 8),
885 } 869 }
886 }, { 870 }, {
887 .mfr_id = MANUFACTURER_INTEL, 871 .mfr_id = CFI_MFR_INTEL,
888 .dev_id = I28F400B3B, 872 .dev_id = I28F400B3B,
889 .name = "Intel 28F400B3B", 873 .name = "Intel 28F400B3B",
890 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 874 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -897,7 +881,7 @@ static const struct amd_flash_info jedec_table[] = {
897 ERASEINFO(0x10000, 7), 881 ERASEINFO(0x10000, 7),
898 } 882 }
899 }, { 883 }, {
900 .mfr_id = MANUFACTURER_INTEL, 884 .mfr_id = CFI_MFR_INTEL,
901 .dev_id = I28F400B3T, 885 .dev_id = I28F400B3T,
902 .name = "Intel 28F400B3T", 886 .name = "Intel 28F400B3T",
903 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 887 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -910,7 +894,7 @@ static const struct amd_flash_info jedec_table[] = {
910 ERASEINFO(0x02000, 8), 894 ERASEINFO(0x02000, 8),
911 } 895 }
912 }, { 896 }, {
913 .mfr_id = MANUFACTURER_INTEL, 897 .mfr_id = CFI_MFR_INTEL,
914 .dev_id = I28F008B3B, 898 .dev_id = I28F008B3B,
915 .name = "Intel 28F008B3B", 899 .name = "Intel 28F008B3B",
916 .devtypes = CFI_DEVICETYPE_X8, 900 .devtypes = CFI_DEVICETYPE_X8,
@@ -923,7 +907,7 @@ static const struct amd_flash_info jedec_table[] = {
923 ERASEINFO(0x10000, 15), 907 ERASEINFO(0x10000, 15),
924 } 908 }
925 }, { 909 }, {
926 .mfr_id = MANUFACTURER_INTEL, 910 .mfr_id = CFI_MFR_INTEL,
927 .dev_id = I28F008B3T, 911 .dev_id = I28F008B3T,
928 .name = "Intel 28F008B3T", 912 .name = "Intel 28F008B3T",
929 .devtypes = CFI_DEVICETYPE_X8, 913 .devtypes = CFI_DEVICETYPE_X8,
@@ -936,7 +920,7 @@ static const struct amd_flash_info jedec_table[] = {
936 ERASEINFO(0x02000, 8), 920 ERASEINFO(0x02000, 8),
937 } 921 }
938 }, { 922 }, {
939 .mfr_id = MANUFACTURER_INTEL, 923 .mfr_id = CFI_MFR_INTEL,
940 .dev_id = I28F008S5, 924 .dev_id = I28F008S5,
941 .name = "Intel 28F008S5", 925 .name = "Intel 28F008S5",
942 .devtypes = CFI_DEVICETYPE_X8, 926 .devtypes = CFI_DEVICETYPE_X8,
@@ -948,7 +932,7 @@ static const struct amd_flash_info jedec_table[] = {
948 ERASEINFO(0x10000,16), 932 ERASEINFO(0x10000,16),
949 } 933 }
950 }, { 934 }, {
951 .mfr_id = MANUFACTURER_INTEL, 935 .mfr_id = CFI_MFR_INTEL,
952 .dev_id = I28F016S5, 936 .dev_id = I28F016S5,
953 .name = "Intel 28F016S5", 937 .name = "Intel 28F016S5",
954 .devtypes = CFI_DEVICETYPE_X8, 938 .devtypes = CFI_DEVICETYPE_X8,
@@ -960,7 +944,7 @@ static const struct amd_flash_info jedec_table[] = {
960 ERASEINFO(0x10000,32), 944 ERASEINFO(0x10000,32),
961 } 945 }
962 }, { 946 }, {
963 .mfr_id = MANUFACTURER_INTEL, 947 .mfr_id = CFI_MFR_INTEL,
964 .dev_id = I28F008SA, 948 .dev_id = I28F008SA,
965 .name = "Intel 28F008SA", 949 .name = "Intel 28F008SA",
966 .devtypes = CFI_DEVICETYPE_X8, 950 .devtypes = CFI_DEVICETYPE_X8,
@@ -972,7 +956,7 @@ static const struct amd_flash_info jedec_table[] = {
972 ERASEINFO(0x10000, 16), 956 ERASEINFO(0x10000, 16),
973 } 957 }
974 }, { 958 }, {
975 .mfr_id = MANUFACTURER_INTEL, 959 .mfr_id = CFI_MFR_INTEL,
976 .dev_id = I28F800B3B, 960 .dev_id = I28F800B3B,
977 .name = "Intel 28F800B3B", 961 .name = "Intel 28F800B3B",
978 .devtypes = CFI_DEVICETYPE_X16, 962 .devtypes = CFI_DEVICETYPE_X16,
@@ -985,7 +969,7 @@ static const struct amd_flash_info jedec_table[] = {
985 ERASEINFO(0x10000, 15), 969 ERASEINFO(0x10000, 15),
986 } 970 }
987 }, { 971 }, {
988 .mfr_id = MANUFACTURER_INTEL, 972 .mfr_id = CFI_MFR_INTEL,
989 .dev_id = I28F800B3T, 973 .dev_id = I28F800B3T,
990 .name = "Intel 28F800B3T", 974 .name = "Intel 28F800B3T",
991 .devtypes = CFI_DEVICETYPE_X16, 975 .devtypes = CFI_DEVICETYPE_X16,
@@ -998,7 +982,7 @@ static const struct amd_flash_info jedec_table[] = {
998 ERASEINFO(0x02000, 8), 982 ERASEINFO(0x02000, 8),
999 } 983 }
1000 }, { 984 }, {
1001 .mfr_id = MANUFACTURER_INTEL, 985 .mfr_id = CFI_MFR_INTEL,
1002 .dev_id = I28F016B3B, 986 .dev_id = I28F016B3B,
1003 .name = "Intel 28F016B3B", 987 .name = "Intel 28F016B3B",
1004 .devtypes = CFI_DEVICETYPE_X8, 988 .devtypes = CFI_DEVICETYPE_X8,
@@ -1011,7 +995,7 @@ static const struct amd_flash_info jedec_table[] = {
1011 ERASEINFO(0x10000, 31), 995 ERASEINFO(0x10000, 31),
1012 } 996 }
1013 }, { 997 }, {
1014 .mfr_id = MANUFACTURER_INTEL, 998 .mfr_id = CFI_MFR_INTEL,
1015 .dev_id = I28F016S3, 999 .dev_id = I28F016S3,
1016 .name = "Intel I28F016S3", 1000 .name = "Intel I28F016S3",
1017 .devtypes = CFI_DEVICETYPE_X8, 1001 .devtypes = CFI_DEVICETYPE_X8,
@@ -1023,7 +1007,7 @@ static const struct amd_flash_info jedec_table[] = {
1023 ERASEINFO(0x10000, 32), 1007 ERASEINFO(0x10000, 32),
1024 } 1008 }
1025 }, { 1009 }, {
1026 .mfr_id = MANUFACTURER_INTEL, 1010 .mfr_id = CFI_MFR_INTEL,
1027 .dev_id = I28F016B3T, 1011 .dev_id = I28F016B3T,
1028 .name = "Intel 28F016B3T", 1012 .name = "Intel 28F016B3T",
1029 .devtypes = CFI_DEVICETYPE_X8, 1013 .devtypes = CFI_DEVICETYPE_X8,
@@ -1036,7 +1020,7 @@ static const struct amd_flash_info jedec_table[] = {
1036 ERASEINFO(0x02000, 8), 1020 ERASEINFO(0x02000, 8),
1037 } 1021 }
1038 }, { 1022 }, {
1039 .mfr_id = MANUFACTURER_INTEL, 1023 .mfr_id = CFI_MFR_INTEL,
1040 .dev_id = I28F160B3B, 1024 .dev_id = I28F160B3B,
1041 .name = "Intel 28F160B3B", 1025 .name = "Intel 28F160B3B",
1042 .devtypes = CFI_DEVICETYPE_X16, 1026 .devtypes = CFI_DEVICETYPE_X16,
@@ -1049,7 +1033,7 @@ static const struct amd_flash_info jedec_table[] = {
1049 ERASEINFO(0x10000, 31), 1033 ERASEINFO(0x10000, 31),
1050 } 1034 }
1051 }, { 1035 }, {
1052 .mfr_id = MANUFACTURER_INTEL, 1036 .mfr_id = CFI_MFR_INTEL,
1053 .dev_id = I28F160B3T, 1037 .dev_id = I28F160B3T,
1054 .name = "Intel 28F160B3T", 1038 .name = "Intel 28F160B3T",
1055 .devtypes = CFI_DEVICETYPE_X16, 1039 .devtypes = CFI_DEVICETYPE_X16,
@@ -1062,7 +1046,7 @@ static const struct amd_flash_info jedec_table[] = {
1062 ERASEINFO(0x02000, 8), 1046 ERASEINFO(0x02000, 8),
1063 } 1047 }
1064 }, { 1048 }, {
1065 .mfr_id = MANUFACTURER_INTEL, 1049 .mfr_id = CFI_MFR_INTEL,
1066 .dev_id = I28F320B3B, 1050 .dev_id = I28F320B3B,
1067 .name = "Intel 28F320B3B", 1051 .name = "Intel 28F320B3B",
1068 .devtypes = CFI_DEVICETYPE_X16, 1052 .devtypes = CFI_DEVICETYPE_X16,
@@ -1075,7 +1059,7 @@ static const struct amd_flash_info jedec_table[] = {
1075 ERASEINFO(0x10000, 63), 1059 ERASEINFO(0x10000, 63),
1076 } 1060 }
1077 }, { 1061 }, {
1078 .mfr_id = MANUFACTURER_INTEL, 1062 .mfr_id = CFI_MFR_INTEL,
1079 .dev_id = I28F320B3T, 1063 .dev_id = I28F320B3T,
1080 .name = "Intel 28F320B3T", 1064 .name = "Intel 28F320B3T",
1081 .devtypes = CFI_DEVICETYPE_X16, 1065 .devtypes = CFI_DEVICETYPE_X16,
@@ -1088,7 +1072,7 @@ static const struct amd_flash_info jedec_table[] = {
1088 ERASEINFO(0x02000, 8), 1072 ERASEINFO(0x02000, 8),
1089 } 1073 }
1090 }, { 1074 }, {
1091 .mfr_id = MANUFACTURER_INTEL, 1075 .mfr_id = CFI_MFR_INTEL,
1092 .dev_id = I28F640B3B, 1076 .dev_id = I28F640B3B,
1093 .name = "Intel 28F640B3B", 1077 .name = "Intel 28F640B3B",
1094 .devtypes = CFI_DEVICETYPE_X16, 1078 .devtypes = CFI_DEVICETYPE_X16,
@@ -1101,7 +1085,7 @@ static const struct amd_flash_info jedec_table[] = {
1101 ERASEINFO(0x10000, 127), 1085 ERASEINFO(0x10000, 127),
1102 } 1086 }
1103 }, { 1087 }, {
1104 .mfr_id = MANUFACTURER_INTEL, 1088 .mfr_id = CFI_MFR_INTEL,
1105 .dev_id = I28F640B3T, 1089 .dev_id = I28F640B3T,
1106 .name = "Intel 28F640B3T", 1090 .name = "Intel 28F640B3T",
1107 .devtypes = CFI_DEVICETYPE_X16, 1091 .devtypes = CFI_DEVICETYPE_X16,
@@ -1114,7 +1098,7 @@ static const struct amd_flash_info jedec_table[] = {
1114 ERASEINFO(0x02000, 8), 1098 ERASEINFO(0x02000, 8),
1115 } 1099 }
1116 }, { 1100 }, {
1117 .mfr_id = MANUFACTURER_INTEL, 1101 .mfr_id = CFI_MFR_INTEL,
1118 .dev_id = I28F640C3B, 1102 .dev_id = I28F640C3B,
1119 .name = "Intel 28F640C3B", 1103 .name = "Intel 28F640C3B",
1120 .devtypes = CFI_DEVICETYPE_X16, 1104 .devtypes = CFI_DEVICETYPE_X16,
@@ -1127,7 +1111,7 @@ static const struct amd_flash_info jedec_table[] = {
1127 ERASEINFO(0x10000, 127), 1111 ERASEINFO(0x10000, 127),
1128 } 1112 }
1129 }, { 1113 }, {
1130 .mfr_id = MANUFACTURER_INTEL, 1114 .mfr_id = CFI_MFR_INTEL,
1131 .dev_id = I82802AB, 1115 .dev_id = I82802AB,
1132 .name = "Intel 82802AB", 1116 .name = "Intel 82802AB",
1133 .devtypes = CFI_DEVICETYPE_X8, 1117 .devtypes = CFI_DEVICETYPE_X8,
@@ -1139,7 +1123,7 @@ static const struct amd_flash_info jedec_table[] = {
1139 ERASEINFO(0x10000,8), 1123 ERASEINFO(0x10000,8),
1140 } 1124 }
1141 }, { 1125 }, {
1142 .mfr_id = MANUFACTURER_INTEL, 1126 .mfr_id = CFI_MFR_INTEL,
1143 .dev_id = I82802AC, 1127 .dev_id = I82802AC,
1144 .name = "Intel 82802AC", 1128 .name = "Intel 82802AC",
1145 .devtypes = CFI_DEVICETYPE_X8, 1129 .devtypes = CFI_DEVICETYPE_X8,
@@ -1151,7 +1135,7 @@ static const struct amd_flash_info jedec_table[] = {
1151 ERASEINFO(0x10000,16), 1135 ERASEINFO(0x10000,16),
1152 } 1136 }
1153 }, { 1137 }, {
1154 .mfr_id = MANUFACTURER_MACRONIX, 1138 .mfr_id = CFI_MFR_MACRONIX,
1155 .dev_id = MX29LV040C, 1139 .dev_id = MX29LV040C,
1156 .name = "Macronix MX29LV040C", 1140 .name = "Macronix MX29LV040C",
1157 .devtypes = CFI_DEVICETYPE_X8, 1141 .devtypes = CFI_DEVICETYPE_X8,
@@ -1163,7 +1147,7 @@ static const struct amd_flash_info jedec_table[] = {
1163 ERASEINFO(0x10000,8), 1147 ERASEINFO(0x10000,8),
1164 } 1148 }
1165 }, { 1149 }, {
1166 .mfr_id = MANUFACTURER_MACRONIX, 1150 .mfr_id = CFI_MFR_MACRONIX,
1167 .dev_id = MX29LV160T, 1151 .dev_id = MX29LV160T,
1168 .name = "MXIC MX29LV160T", 1152 .name = "MXIC MX29LV160T",
1169 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1153 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1178,7 +1162,7 @@ static const struct amd_flash_info jedec_table[] = {
1178 ERASEINFO(0x04000,1) 1162 ERASEINFO(0x04000,1)
1179 } 1163 }
1180 }, { 1164 }, {
1181 .mfr_id = MANUFACTURER_NEC, 1165 .mfr_id = CFI_MFR_NEC,
1182 .dev_id = UPD29F064115, 1166 .dev_id = UPD29F064115,
1183 .name = "NEC uPD29F064115", 1167 .name = "NEC uPD29F064115",
1184 .devtypes = CFI_DEVICETYPE_X16, 1168 .devtypes = CFI_DEVICETYPE_X16,
@@ -1192,7 +1176,7 @@ static const struct amd_flash_info jedec_table[] = {
1192 ERASEINFO(0x2000,8), 1176 ERASEINFO(0x2000,8),
1193 } 1177 }
1194 }, { 1178 }, {
1195 .mfr_id = MANUFACTURER_MACRONIX, 1179 .mfr_id = CFI_MFR_MACRONIX,
1196 .dev_id = MX29LV160B, 1180 .dev_id = MX29LV160B,
1197 .name = "MXIC MX29LV160B", 1181 .name = "MXIC MX29LV160B",
1198 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1182 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1207,7 +1191,7 @@ static const struct amd_flash_info jedec_table[] = {
1207 ERASEINFO(0x10000,31) 1191 ERASEINFO(0x10000,31)
1208 } 1192 }
1209 }, { 1193 }, {
1210 .mfr_id = MANUFACTURER_MACRONIX, 1194 .mfr_id = CFI_MFR_MACRONIX,
1211 .dev_id = MX29F040, 1195 .dev_id = MX29F040,
1212 .name = "Macronix MX29F040", 1196 .name = "Macronix MX29F040",
1213 .devtypes = CFI_DEVICETYPE_X8, 1197 .devtypes = CFI_DEVICETYPE_X8,
@@ -1219,7 +1203,7 @@ static const struct amd_flash_info jedec_table[] = {
1219 ERASEINFO(0x10000,8), 1203 ERASEINFO(0x10000,8),
1220 } 1204 }
1221 }, { 1205 }, {
1222 .mfr_id = MANUFACTURER_MACRONIX, 1206 .mfr_id = CFI_MFR_MACRONIX,
1223 .dev_id = MX29F016, 1207 .dev_id = MX29F016,
1224 .name = "Macronix MX29F016", 1208 .name = "Macronix MX29F016",
1225 .devtypes = CFI_DEVICETYPE_X8, 1209 .devtypes = CFI_DEVICETYPE_X8,
@@ -1231,7 +1215,7 @@ static const struct amd_flash_info jedec_table[] = {
1231 ERASEINFO(0x10000,32), 1215 ERASEINFO(0x10000,32),
1232 } 1216 }
1233 }, { 1217 }, {
1234 .mfr_id = MANUFACTURER_MACRONIX, 1218 .mfr_id = CFI_MFR_MACRONIX,
1235 .dev_id = MX29F004T, 1219 .dev_id = MX29F004T,
1236 .name = "Macronix MX29F004T", 1220 .name = "Macronix MX29F004T",
1237 .devtypes = CFI_DEVICETYPE_X8, 1221 .devtypes = CFI_DEVICETYPE_X8,
@@ -1246,7 +1230,7 @@ static const struct amd_flash_info jedec_table[] = {
1246 ERASEINFO(0x04000,1), 1230 ERASEINFO(0x04000,1),
1247 } 1231 }
1248 }, { 1232 }, {
1249 .mfr_id = MANUFACTURER_MACRONIX, 1233 .mfr_id = CFI_MFR_MACRONIX,
1250 .dev_id = MX29F004B, 1234 .dev_id = MX29F004B,
1251 .name = "Macronix MX29F004B", 1235 .name = "Macronix MX29F004B",
1252 .devtypes = CFI_DEVICETYPE_X8, 1236 .devtypes = CFI_DEVICETYPE_X8,
@@ -1261,7 +1245,7 @@ static const struct amd_flash_info jedec_table[] = {
1261 ERASEINFO(0x10000,7), 1245 ERASEINFO(0x10000,7),
1262 } 1246 }
1263 }, { 1247 }, {
1264 .mfr_id = MANUFACTURER_MACRONIX, 1248 .mfr_id = CFI_MFR_MACRONIX,
1265 .dev_id = MX29F002T, 1249 .dev_id = MX29F002T,
1266 .name = "Macronix MX29F002T", 1250 .name = "Macronix MX29F002T",
1267 .devtypes = CFI_DEVICETYPE_X8, 1251 .devtypes = CFI_DEVICETYPE_X8,
@@ -1276,7 +1260,7 @@ static const struct amd_flash_info jedec_table[] = {
1276 ERASEINFO(0x04000,1), 1260 ERASEINFO(0x04000,1),
1277 } 1261 }
1278 }, { 1262 }, {
1279 .mfr_id = MANUFACTURER_PMC, 1263 .mfr_id = CFI_MFR_PMC,
1280 .dev_id = PM49FL002, 1264 .dev_id = PM49FL002,
1281 .name = "PMC Pm49FL002", 1265 .name = "PMC Pm49FL002",
1282 .devtypes = CFI_DEVICETYPE_X8, 1266 .devtypes = CFI_DEVICETYPE_X8,
@@ -1288,7 +1272,7 @@ static const struct amd_flash_info jedec_table[] = {
1288 ERASEINFO( 0x01000, 64 ) 1272 ERASEINFO( 0x01000, 64 )
1289 } 1273 }
1290 }, { 1274 }, {
1291 .mfr_id = MANUFACTURER_PMC, 1275 .mfr_id = CFI_MFR_PMC,
1292 .dev_id = PM49FL004, 1276 .dev_id = PM49FL004,
1293 .name = "PMC Pm49FL004", 1277 .name = "PMC Pm49FL004",
1294 .devtypes = CFI_DEVICETYPE_X8, 1278 .devtypes = CFI_DEVICETYPE_X8,
@@ -1300,7 +1284,7 @@ static const struct amd_flash_info jedec_table[] = {
1300 ERASEINFO( 0x01000, 128 ) 1284 ERASEINFO( 0x01000, 128 )
1301 } 1285 }
1302 }, { 1286 }, {
1303 .mfr_id = MANUFACTURER_PMC, 1287 .mfr_id = CFI_MFR_PMC,
1304 .dev_id = PM49FL008, 1288 .dev_id = PM49FL008,
1305 .name = "PMC Pm49FL008", 1289 .name = "PMC Pm49FL008",
1306 .devtypes = CFI_DEVICETYPE_X8, 1290 .devtypes = CFI_DEVICETYPE_X8,
@@ -1312,7 +1296,7 @@ static const struct amd_flash_info jedec_table[] = {
1312 ERASEINFO( 0x01000, 256 ) 1296 ERASEINFO( 0x01000, 256 )
1313 } 1297 }
1314 }, { 1298 }, {
1315 .mfr_id = MANUFACTURER_SHARP, 1299 .mfr_id = CFI_MFR_SHARP,
1316 .dev_id = LH28F640BF, 1300 .dev_id = LH28F640BF,
1317 .name = "LH28F640BF", 1301 .name = "LH28F640BF",
1318 .devtypes = CFI_DEVICETYPE_X8, 1302 .devtypes = CFI_DEVICETYPE_X8,
@@ -1324,7 +1308,7 @@ static const struct amd_flash_info jedec_table[] = {
1324 ERASEINFO(0x40000,16), 1308 ERASEINFO(0x40000,16),
1325 } 1309 }
1326 }, { 1310 }, {
1327 .mfr_id = MANUFACTURER_SST, 1311 .mfr_id = CFI_MFR_SST,
1328 .dev_id = SST39LF512, 1312 .dev_id = SST39LF512,
1329 .name = "SST 39LF512", 1313 .name = "SST 39LF512",
1330 .devtypes = CFI_DEVICETYPE_X8, 1314 .devtypes = CFI_DEVICETYPE_X8,
@@ -1336,7 +1320,7 @@ static const struct amd_flash_info jedec_table[] = {
1336 ERASEINFO(0x01000,16), 1320 ERASEINFO(0x01000,16),
1337 } 1321 }
1338 }, { 1322 }, {
1339 .mfr_id = MANUFACTURER_SST, 1323 .mfr_id = CFI_MFR_SST,
1340 .dev_id = SST39LF010, 1324 .dev_id = SST39LF010,
1341 .name = "SST 39LF010", 1325 .name = "SST 39LF010",
1342 .devtypes = CFI_DEVICETYPE_X8, 1326 .devtypes = CFI_DEVICETYPE_X8,
@@ -1348,8 +1332,8 @@ static const struct amd_flash_info jedec_table[] = {
1348 ERASEINFO(0x01000,32), 1332 ERASEINFO(0x01000,32),
1349 } 1333 }
1350 }, { 1334 }, {
1351 .mfr_id = MANUFACTURER_SST, 1335 .mfr_id = CFI_MFR_SST,
1352 .dev_id = SST29EE020, 1336 .dev_id = SST29EE020,
1353 .name = "SST 29EE020", 1337 .name = "SST 29EE020",
1354 .devtypes = CFI_DEVICETYPE_X8, 1338 .devtypes = CFI_DEVICETYPE_X8,
1355 .uaddr = MTD_UADDR_0x5555_0x2AAA, 1339 .uaddr = MTD_UADDR_0x5555_0x2AAA,
@@ -1359,9 +1343,9 @@ static const struct amd_flash_info jedec_table[] = {
1359 .regions = {ERASEINFO(0x01000,64), 1343 .regions = {ERASEINFO(0x01000,64),
1360 } 1344 }
1361 }, { 1345 }, {
1362 .mfr_id = MANUFACTURER_SST, 1346 .mfr_id = CFI_MFR_SST,
1363 .dev_id = SST29LE020, 1347 .dev_id = SST29LE020,
1364 .name = "SST 29LE020", 1348 .name = "SST 29LE020",
1365 .devtypes = CFI_DEVICETYPE_X8, 1349 .devtypes = CFI_DEVICETYPE_X8,
1366 .uaddr = MTD_UADDR_0x5555_0x2AAA, 1350 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1367 .dev_size = SIZE_256KiB, 1351 .dev_size = SIZE_256KiB,
@@ -1370,7 +1354,7 @@ static const struct amd_flash_info jedec_table[] = {
1370 .regions = {ERASEINFO(0x01000,64), 1354 .regions = {ERASEINFO(0x01000,64),
1371 } 1355 }
1372 }, { 1356 }, {
1373 .mfr_id = MANUFACTURER_SST, 1357 .mfr_id = CFI_MFR_SST,
1374 .dev_id = SST39LF020, 1358 .dev_id = SST39LF020,
1375 .name = "SST 39LF020", 1359 .name = "SST 39LF020",
1376 .devtypes = CFI_DEVICETYPE_X8, 1360 .devtypes = CFI_DEVICETYPE_X8,
@@ -1382,7 +1366,7 @@ static const struct amd_flash_info jedec_table[] = {
1382 ERASEINFO(0x01000,64), 1366 ERASEINFO(0x01000,64),
1383 } 1367 }
1384 }, { 1368 }, {
1385 .mfr_id = MANUFACTURER_SST, 1369 .mfr_id = CFI_MFR_SST,
1386 .dev_id = SST39LF040, 1370 .dev_id = SST39LF040,
1387 .name = "SST 39LF040", 1371 .name = "SST 39LF040",
1388 .devtypes = CFI_DEVICETYPE_X8, 1372 .devtypes = CFI_DEVICETYPE_X8,
@@ -1394,7 +1378,7 @@ static const struct amd_flash_info jedec_table[] = {
1394 ERASEINFO(0x01000,128), 1378 ERASEINFO(0x01000,128),
1395 } 1379 }
1396 }, { 1380 }, {
1397 .mfr_id = MANUFACTURER_SST, 1381 .mfr_id = CFI_MFR_SST,
1398 .dev_id = SST39SF010A, 1382 .dev_id = SST39SF010A,
1399 .name = "SST 39SF010A", 1383 .name = "SST 39SF010A",
1400 .devtypes = CFI_DEVICETYPE_X8, 1384 .devtypes = CFI_DEVICETYPE_X8,
@@ -1406,7 +1390,7 @@ static const struct amd_flash_info jedec_table[] = {
1406 ERASEINFO(0x01000,32), 1390 ERASEINFO(0x01000,32),
1407 } 1391 }
1408 }, { 1392 }, {
1409 .mfr_id = MANUFACTURER_SST, 1393 .mfr_id = CFI_MFR_SST,
1410 .dev_id = SST39SF020A, 1394 .dev_id = SST39SF020A,
1411 .name = "SST 39SF020A", 1395 .name = "SST 39SF020A",
1412 .devtypes = CFI_DEVICETYPE_X8, 1396 .devtypes = CFI_DEVICETYPE_X8,
@@ -1418,7 +1402,7 @@ static const struct amd_flash_info jedec_table[] = {
1418 ERASEINFO(0x01000,64), 1402 ERASEINFO(0x01000,64),
1419 } 1403 }
1420 }, { 1404 }, {
1421 .mfr_id = MANUFACTURER_SST, 1405 .mfr_id = CFI_MFR_SST,
1422 .dev_id = SST39SF040, 1406 .dev_id = SST39SF040,
1423 .name = "SST 39SF040", 1407 .name = "SST 39SF040",
1424 .devtypes = CFI_DEVICETYPE_X8, 1408 .devtypes = CFI_DEVICETYPE_X8,
@@ -1430,7 +1414,7 @@ static const struct amd_flash_info jedec_table[] = {
1430 ERASEINFO(0x01000,128), 1414 ERASEINFO(0x01000,128),
1431 } 1415 }
1432 }, { 1416 }, {
1433 .mfr_id = MANUFACTURER_SST, 1417 .mfr_id = CFI_MFR_SST,
1434 .dev_id = SST49LF040B, 1418 .dev_id = SST49LF040B,
1435 .name = "SST 49LF040B", 1419 .name = "SST 49LF040B",
1436 .devtypes = CFI_DEVICETYPE_X8, 1420 .devtypes = CFI_DEVICETYPE_X8,
@@ -1443,7 +1427,7 @@ static const struct amd_flash_info jedec_table[] = {
1443 } 1427 }
1444 }, { 1428 }, {
1445 1429
1446 .mfr_id = MANUFACTURER_SST, 1430 .mfr_id = CFI_MFR_SST,
1447 .dev_id = SST49LF004B, 1431 .dev_id = SST49LF004B,
1448 .name = "SST 49LF004B", 1432 .name = "SST 49LF004B",
1449 .devtypes = CFI_DEVICETYPE_X8, 1433 .devtypes = CFI_DEVICETYPE_X8,
@@ -1455,7 +1439,7 @@ static const struct amd_flash_info jedec_table[] = {
1455 ERASEINFO(0x01000,128), 1439 ERASEINFO(0x01000,128),
1456 } 1440 }
1457 }, { 1441 }, {
1458 .mfr_id = MANUFACTURER_SST, 1442 .mfr_id = CFI_MFR_SST,
1459 .dev_id = SST49LF008A, 1443 .dev_id = SST49LF008A,
1460 .name = "SST 49LF008A", 1444 .name = "SST 49LF008A",
1461 .devtypes = CFI_DEVICETYPE_X8, 1445 .devtypes = CFI_DEVICETYPE_X8,
@@ -1467,7 +1451,7 @@ static const struct amd_flash_info jedec_table[] = {
1467 ERASEINFO(0x01000,256), 1451 ERASEINFO(0x01000,256),
1468 } 1452 }
1469 }, { 1453 }, {
1470 .mfr_id = MANUFACTURER_SST, 1454 .mfr_id = CFI_MFR_SST,
1471 .dev_id = SST49LF030A, 1455 .dev_id = SST49LF030A,
1472 .name = "SST 49LF030A", 1456 .name = "SST 49LF030A",
1473 .devtypes = CFI_DEVICETYPE_X8, 1457 .devtypes = CFI_DEVICETYPE_X8,
@@ -1479,7 +1463,7 @@ static const struct amd_flash_info jedec_table[] = {
1479 ERASEINFO(0x01000,96), 1463 ERASEINFO(0x01000,96),
1480 } 1464 }
1481 }, { 1465 }, {
1482 .mfr_id = MANUFACTURER_SST, 1466 .mfr_id = CFI_MFR_SST,
1483 .dev_id = SST49LF040A, 1467 .dev_id = SST49LF040A,
1484 .name = "SST 49LF040A", 1468 .name = "SST 49LF040A",
1485 .devtypes = CFI_DEVICETYPE_X8, 1469 .devtypes = CFI_DEVICETYPE_X8,
@@ -1491,7 +1475,7 @@ static const struct amd_flash_info jedec_table[] = {
1491 ERASEINFO(0x01000,128), 1475 ERASEINFO(0x01000,128),
1492 } 1476 }
1493 }, { 1477 }, {
1494 .mfr_id = MANUFACTURER_SST, 1478 .mfr_id = CFI_MFR_SST,
1495 .dev_id = SST49LF080A, 1479 .dev_id = SST49LF080A,
1496 .name = "SST 49LF080A", 1480 .name = "SST 49LF080A",
1497 .devtypes = CFI_DEVICETYPE_X8, 1481 .devtypes = CFI_DEVICETYPE_X8,
@@ -1503,7 +1487,7 @@ static const struct amd_flash_info jedec_table[] = {
1503 ERASEINFO(0x01000,256), 1487 ERASEINFO(0x01000,256),
1504 } 1488 }
1505 }, { 1489 }, {
1506 .mfr_id = MANUFACTURER_SST, /* should be CFI */ 1490 .mfr_id = CFI_MFR_SST, /* should be CFI */
1507 .dev_id = SST39LF160, 1491 .dev_id = SST39LF160,
1508 .name = "SST 39LF160", 1492 .name = "SST 39LF160",
1509 .devtypes = CFI_DEVICETYPE_X16, 1493 .devtypes = CFI_DEVICETYPE_X16,
@@ -1516,7 +1500,7 @@ static const struct amd_flash_info jedec_table[] = {
1516 ERASEINFO(0x1000,256) 1500 ERASEINFO(0x1000,256)
1517 } 1501 }
1518 }, { 1502 }, {
1519 .mfr_id = MANUFACTURER_SST, /* should be CFI */ 1503 .mfr_id = CFI_MFR_SST, /* should be CFI */
1520 .dev_id = SST39VF1601, 1504 .dev_id = SST39VF1601,
1521 .name = "SST 39VF1601", 1505 .name = "SST 39VF1601",
1522 .devtypes = CFI_DEVICETYPE_X16, 1506 .devtypes = CFI_DEVICETYPE_X16,
@@ -1529,7 +1513,35 @@ static const struct amd_flash_info jedec_table[] = {
1529 ERASEINFO(0x1000,256) 1513 ERASEINFO(0x1000,256)
1530 } 1514 }
1531 }, { 1515 }, {
1532 .mfr_id = MANUFACTURER_SST, /* should be CFI */ 1516 /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1517 .mfr_id = CFI_MFR_SST,
1518 .dev_id = SST39WF1601,
1519 .name = "SST 39WF1601",
1520 .devtypes = CFI_DEVICETYPE_X16,
1521 .uaddr = MTD_UADDR_0xAAAA_0x5555,
1522 .dev_size = SIZE_2MiB,
1523 .cmd_set = P_ID_AMD_STD,
1524 .nr_regions = 2,
1525 .regions = {
1526 ERASEINFO(0x1000,256),
1527 ERASEINFO(0x1000,256)
1528 }
1529 }, {
1530 /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1531 .mfr_id = CFI_MFR_SST,
1532 .dev_id = SST39WF1602,
1533 .name = "SST 39WF1602",
1534 .devtypes = CFI_DEVICETYPE_X16,
1535 .uaddr = MTD_UADDR_0xAAAA_0x5555,
1536 .dev_size = SIZE_2MiB,
1537 .cmd_set = P_ID_AMD_STD,
1538 .nr_regions = 2,
1539 .regions = {
1540 ERASEINFO(0x1000,256),
1541 ERASEINFO(0x1000,256)
1542 }
1543 }, {
1544 .mfr_id = CFI_MFR_SST, /* should be CFI */
1533 .dev_id = SST39VF3201, 1545 .dev_id = SST39VF3201,
1534 .name = "SST 39VF3201", 1546 .name = "SST 39VF3201",
1535 .devtypes = CFI_DEVICETYPE_X16, 1547 .devtypes = CFI_DEVICETYPE_X16,
@@ -1544,7 +1556,7 @@ static const struct amd_flash_info jedec_table[] = {
1544 ERASEINFO(0x1000,256) 1556 ERASEINFO(0x1000,256)
1545 } 1557 }
1546 }, { 1558 }, {
1547 .mfr_id = MANUFACTURER_SST, 1559 .mfr_id = CFI_MFR_SST,
1548 .dev_id = SST36VF3203, 1560 .dev_id = SST36VF3203,
1549 .name = "SST 36VF3203", 1561 .name = "SST 36VF3203",
1550 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1562 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1556,7 +1568,7 @@ static const struct amd_flash_info jedec_table[] = {
1556 ERASEINFO(0x10000,64), 1568 ERASEINFO(0x10000,64),
1557 } 1569 }
1558 }, { 1570 }, {
1559 .mfr_id = MANUFACTURER_ST, 1571 .mfr_id = CFI_MFR_ST,
1560 .dev_id = M29F800AB, 1572 .dev_id = M29F800AB,
1561 .name = "ST M29F800AB", 1573 .name = "ST M29F800AB",
1562 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1574 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1571,7 +1583,7 @@ static const struct amd_flash_info jedec_table[] = {
1571 ERASEINFO(0x10000,15), 1583 ERASEINFO(0x10000,15),
1572 } 1584 }
1573 }, { 1585 }, {
1574 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1586 .mfr_id = CFI_MFR_ST, /* FIXME - CFI device? */
1575 .dev_id = M29W800DT, 1587 .dev_id = M29W800DT,
1576 .name = "ST M29W800DT", 1588 .name = "ST M29W800DT",
1577 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1589 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1586,7 +1598,7 @@ static const struct amd_flash_info jedec_table[] = {
1586 ERASEINFO(0x04000,1) 1598 ERASEINFO(0x04000,1)
1587 } 1599 }
1588 }, { 1600 }, {
1589 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1601 .mfr_id = CFI_MFR_ST, /* FIXME - CFI device? */
1590 .dev_id = M29W800DB, 1602 .dev_id = M29W800DB,
1591 .name = "ST M29W800DB", 1603 .name = "ST M29W800DB",
1592 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1604 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1601,7 +1613,7 @@ static const struct amd_flash_info jedec_table[] = {
1601 ERASEINFO(0x10000,15) 1613 ERASEINFO(0x10000,15)
1602 } 1614 }
1603 }, { 1615 }, {
1604 .mfr_id = MANUFACTURER_ST, 1616 .mfr_id = CFI_MFR_ST,
1605 .dev_id = M29W400DT, 1617 .dev_id = M29W400DT,
1606 .name = "ST M29W400DT", 1618 .name = "ST M29W400DT",
1607 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1619 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1616,7 +1628,7 @@ static const struct amd_flash_info jedec_table[] = {
1616 ERASEINFO(0x10000,1) 1628 ERASEINFO(0x10000,1)
1617 } 1629 }
1618 }, { 1630 }, {
1619 .mfr_id = MANUFACTURER_ST, 1631 .mfr_id = CFI_MFR_ST,
1620 .dev_id = M29W400DB, 1632 .dev_id = M29W400DB,
1621 .name = "ST M29W400DB", 1633 .name = "ST M29W400DB",
1622 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1634 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1631,7 +1643,7 @@ static const struct amd_flash_info jedec_table[] = {
1631 ERASEINFO(0x10000,7) 1643 ERASEINFO(0x10000,7)
1632 } 1644 }
1633 }, { 1645 }, {
1634 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1646 .mfr_id = CFI_MFR_ST, /* FIXME - CFI device? */
1635 .dev_id = M29W160DT, 1647 .dev_id = M29W160DT,
1636 .name = "ST M29W160DT", 1648 .name = "ST M29W160DT",
1637 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1649 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1646,7 +1658,7 @@ static const struct amd_flash_info jedec_table[] = {
1646 ERASEINFO(0x04000,1) 1658 ERASEINFO(0x04000,1)
1647 } 1659 }
1648 }, { 1660 }, {
1649 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1661 .mfr_id = CFI_MFR_ST, /* FIXME - CFI device? */
1650 .dev_id = M29W160DB, 1662 .dev_id = M29W160DB,
1651 .name = "ST M29W160DB", 1663 .name = "ST M29W160DB",
1652 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1664 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1661,7 +1673,7 @@ static const struct amd_flash_info jedec_table[] = {
1661 ERASEINFO(0x10000,31) 1673 ERASEINFO(0x10000,31)
1662 } 1674 }
1663 }, { 1675 }, {
1664 .mfr_id = MANUFACTURER_ST, 1676 .mfr_id = CFI_MFR_ST,
1665 .dev_id = M29W040B, 1677 .dev_id = M29W040B,
1666 .name = "ST M29W040B", 1678 .name = "ST M29W040B",
1667 .devtypes = CFI_DEVICETYPE_X8, 1679 .devtypes = CFI_DEVICETYPE_X8,
@@ -1673,7 +1685,7 @@ static const struct amd_flash_info jedec_table[] = {
1673 ERASEINFO(0x10000,8), 1685 ERASEINFO(0x10000,8),
1674 } 1686 }
1675 }, { 1687 }, {
1676 .mfr_id = MANUFACTURER_ST, 1688 .mfr_id = CFI_MFR_ST,
1677 .dev_id = M50FW040, 1689 .dev_id = M50FW040,
1678 .name = "ST M50FW040", 1690 .name = "ST M50FW040",
1679 .devtypes = CFI_DEVICETYPE_X8, 1691 .devtypes = CFI_DEVICETYPE_X8,
@@ -1685,7 +1697,7 @@ static const struct amd_flash_info jedec_table[] = {
1685 ERASEINFO(0x10000,8), 1697 ERASEINFO(0x10000,8),
1686 } 1698 }
1687 }, { 1699 }, {
1688 .mfr_id = MANUFACTURER_ST, 1700 .mfr_id = CFI_MFR_ST,
1689 .dev_id = M50FW080, 1701 .dev_id = M50FW080,
1690 .name = "ST M50FW080", 1702 .name = "ST M50FW080",
1691 .devtypes = CFI_DEVICETYPE_X8, 1703 .devtypes = CFI_DEVICETYPE_X8,
@@ -1697,7 +1709,7 @@ static const struct amd_flash_info jedec_table[] = {
1697 ERASEINFO(0x10000,16), 1709 ERASEINFO(0x10000,16),
1698 } 1710 }
1699 }, { 1711 }, {
1700 .mfr_id = MANUFACTURER_ST, 1712 .mfr_id = CFI_MFR_ST,
1701 .dev_id = M50FW016, 1713 .dev_id = M50FW016,
1702 .name = "ST M50FW016", 1714 .name = "ST M50FW016",
1703 .devtypes = CFI_DEVICETYPE_X8, 1715 .devtypes = CFI_DEVICETYPE_X8,
@@ -1709,7 +1721,7 @@ static const struct amd_flash_info jedec_table[] = {
1709 ERASEINFO(0x10000,32), 1721 ERASEINFO(0x10000,32),
1710 } 1722 }
1711 }, { 1723 }, {
1712 .mfr_id = MANUFACTURER_ST, 1724 .mfr_id = CFI_MFR_ST,
1713 .dev_id = M50LPW080, 1725 .dev_id = M50LPW080,
1714 .name = "ST M50LPW080", 1726 .name = "ST M50LPW080",
1715 .devtypes = CFI_DEVICETYPE_X8, 1727 .devtypes = CFI_DEVICETYPE_X8,
@@ -1721,7 +1733,7 @@ static const struct amd_flash_info jedec_table[] = {
1721 ERASEINFO(0x10000,16), 1733 ERASEINFO(0x10000,16),
1722 }, 1734 },
1723 }, { 1735 }, {
1724 .mfr_id = MANUFACTURER_ST, 1736 .mfr_id = CFI_MFR_ST,
1725 .dev_id = M50FLW080A, 1737 .dev_id = M50FLW080A,
1726 .name = "ST M50FLW080A", 1738 .name = "ST M50FLW080A",
1727 .devtypes = CFI_DEVICETYPE_X8, 1739 .devtypes = CFI_DEVICETYPE_X8,
@@ -1736,7 +1748,7 @@ static const struct amd_flash_info jedec_table[] = {
1736 ERASEINFO(0x1000,16), 1748 ERASEINFO(0x1000,16),
1737 } 1749 }
1738 }, { 1750 }, {
1739 .mfr_id = MANUFACTURER_ST, 1751 .mfr_id = CFI_MFR_ST,
1740 .dev_id = M50FLW080B, 1752 .dev_id = M50FLW080B,
1741 .name = "ST M50FLW080B", 1753 .name = "ST M50FLW080B",
1742 .devtypes = CFI_DEVICETYPE_X8, 1754 .devtypes = CFI_DEVICETYPE_X8,
@@ -1751,7 +1763,7 @@ static const struct amd_flash_info jedec_table[] = {
1751 ERASEINFO(0x1000,16), 1763 ERASEINFO(0x1000,16),
1752 } 1764 }
1753 }, { 1765 }, {
1754 .mfr_id = 0xff00 | MANUFACTURER_ST, 1766 .mfr_id = 0xff00 | CFI_MFR_ST,
1755 .dev_id = 0xff00 | PSD4256G6V, 1767 .dev_id = 0xff00 | PSD4256G6V,
1756 .name = "ST PSD4256G6V", 1768 .name = "ST PSD4256G6V",
1757 .devtypes = CFI_DEVICETYPE_X16, 1769 .devtypes = CFI_DEVICETYPE_X16,
@@ -1763,7 +1775,7 @@ static const struct amd_flash_info jedec_table[] = {
1763 ERASEINFO(0x10000,16), 1775 ERASEINFO(0x10000,16),
1764 } 1776 }
1765 }, { 1777 }, {
1766 .mfr_id = MANUFACTURER_TOSHIBA, 1778 .mfr_id = CFI_MFR_TOSHIBA,
1767 .dev_id = TC58FVT160, 1779 .dev_id = TC58FVT160,
1768 .name = "Toshiba TC58FVT160", 1780 .name = "Toshiba TC58FVT160",
1769 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1781 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1778,7 +1790,7 @@ static const struct amd_flash_info jedec_table[] = {
1778 ERASEINFO(0x04000,1) 1790 ERASEINFO(0x04000,1)
1779 } 1791 }
1780 }, { 1792 }, {
1781 .mfr_id = MANUFACTURER_TOSHIBA, 1793 .mfr_id = CFI_MFR_TOSHIBA,
1782 .dev_id = TC58FVB160, 1794 .dev_id = TC58FVB160,
1783 .name = "Toshiba TC58FVB160", 1795 .name = "Toshiba TC58FVB160",
1784 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1796 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1793,7 +1805,7 @@ static const struct amd_flash_info jedec_table[] = {
1793 ERASEINFO(0x10000,31) 1805 ERASEINFO(0x10000,31)
1794 } 1806 }
1795 }, { 1807 }, {
1796 .mfr_id = MANUFACTURER_TOSHIBA, 1808 .mfr_id = CFI_MFR_TOSHIBA,
1797 .dev_id = TC58FVB321, 1809 .dev_id = TC58FVB321,
1798 .name = "Toshiba TC58FVB321", 1810 .name = "Toshiba TC58FVB321",
1799 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1811 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1806,7 +1818,7 @@ static const struct amd_flash_info jedec_table[] = {
1806 ERASEINFO(0x10000,63) 1818 ERASEINFO(0x10000,63)
1807 } 1819 }
1808 }, { 1820 }, {
1809 .mfr_id = MANUFACTURER_TOSHIBA, 1821 .mfr_id = CFI_MFR_TOSHIBA,
1810 .dev_id = TC58FVT321, 1822 .dev_id = TC58FVT321,
1811 .name = "Toshiba TC58FVT321", 1823 .name = "Toshiba TC58FVT321",
1812 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1824 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1819,7 +1831,7 @@ static const struct amd_flash_info jedec_table[] = {
1819 ERASEINFO(0x02000,8) 1831 ERASEINFO(0x02000,8)
1820 } 1832 }
1821 }, { 1833 }, {
1822 .mfr_id = MANUFACTURER_TOSHIBA, 1834 .mfr_id = CFI_MFR_TOSHIBA,
1823 .dev_id = TC58FVB641, 1835 .dev_id = TC58FVB641,
1824 .name = "Toshiba TC58FVB641", 1836 .name = "Toshiba TC58FVB641",
1825 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1837 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1832,7 +1844,7 @@ static const struct amd_flash_info jedec_table[] = {
1832 ERASEINFO(0x10000,127) 1844 ERASEINFO(0x10000,127)
1833 } 1845 }
1834 }, { 1846 }, {
1835 .mfr_id = MANUFACTURER_TOSHIBA, 1847 .mfr_id = CFI_MFR_TOSHIBA,
1836 .dev_id = TC58FVT641, 1848 .dev_id = TC58FVT641,
1837 .name = "Toshiba TC58FVT641", 1849 .name = "Toshiba TC58FVT641",
1838 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, 1850 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
@@ -1845,7 +1857,7 @@ static const struct amd_flash_info jedec_table[] = {
1845 ERASEINFO(0x02000,8) 1857 ERASEINFO(0x02000,8)
1846 } 1858 }
1847 }, { 1859 }, {
1848 .mfr_id = MANUFACTURER_WINBOND, 1860 .mfr_id = CFI_MFR_WINBOND,
1849 .dev_id = W49V002A, 1861 .dev_id = W49V002A,
1850 .name = "Winbond W49V002A", 1862 .name = "Winbond W49V002A",
1851 .devtypes = CFI_DEVICETYPE_X8, 1863 .devtypes = CFI_DEVICETYPE_X8,
@@ -1878,7 +1890,7 @@ static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
1878 mask = (1 << (cfi->device_type * 8)) - 1; 1890 mask = (1 << (cfi->device_type * 8)) - 1;
1879 result = map_read(map, base + ofs); 1891 result = map_read(map, base + ofs);
1880 bank++; 1892 bank++;
1881 } while ((result.x[0] & mask) == CONTINUATION_CODE); 1893 } while ((result.x[0] & mask) == CFI_MFR_CONTINUATION);
1882 1894
1883 return result.x[0] & mask; 1895 return result.x[0] & mask;
1884} 1896}
@@ -1969,7 +1981,7 @@ static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1969 p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type; 1981 p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type;
1970 p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type; 1982 p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type;
1971 1983
1972 return 1; /* ok */ 1984 return 1; /* ok */
1973} 1985}
1974 1986
1975 1987