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path: root/drivers/mtd/chips/cfi_cmdset_0001.c
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Diffstat (limited to 'drivers/mtd/chips/cfi_cmdset_0001.c')
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c71
1 files changed, 54 insertions, 17 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index 5f1b472137a0..c93a8be5d5f1 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -478,6 +478,28 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
478 else 478 else
479 cfi->chips[i].erase_time = 2000000; 479 cfi->chips[i].erase_time = 2000000;
480 480
481 if (cfi->cfiq->WordWriteTimeoutTyp &&
482 cfi->cfiq->WordWriteTimeoutMax)
483 cfi->chips[i].word_write_time_max =
484 1<<(cfi->cfiq->WordWriteTimeoutTyp +
485 cfi->cfiq->WordWriteTimeoutMax);
486 else
487 cfi->chips[i].word_write_time_max = 50000 * 8;
488
489 if (cfi->cfiq->BufWriteTimeoutTyp &&
490 cfi->cfiq->BufWriteTimeoutMax)
491 cfi->chips[i].buffer_write_time_max =
492 1<<(cfi->cfiq->BufWriteTimeoutTyp +
493 cfi->cfiq->BufWriteTimeoutMax);
494
495 if (cfi->cfiq->BlockEraseTimeoutTyp &&
496 cfi->cfiq->BlockEraseTimeoutMax)
497 cfi->chips[i].erase_time_max =
498 1000<<(cfi->cfiq->BlockEraseTimeoutTyp +
499 cfi->cfiq->BlockEraseTimeoutMax);
500 else
501 cfi->chips[i].erase_time_max = 2000000 * 8;
502
481 cfi->chips[i].ref_point_counter = 0; 503 cfi->chips[i].ref_point_counter = 0;
482 init_waitqueue_head(&(cfi->chips[i].wq)); 504 init_waitqueue_head(&(cfi->chips[i].wq));
483 } 505 }
@@ -703,6 +725,10 @@ static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long
703 struct cfi_pri_intelext *cfip = cfi->cmdset_priv; 725 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
704 unsigned long timeo = jiffies + HZ; 726 unsigned long timeo = jiffies + HZ;
705 727
728 /* Prevent setting state FL_SYNCING for chip in suspended state. */
729 if (mode == FL_SYNCING && chip->oldstate != FL_READY)
730 goto sleep;
731
706 switch (chip->state) { 732 switch (chip->state) {
707 733
708 case FL_STATUS: 734 case FL_STATUS:
@@ -808,8 +834,9 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
808 DECLARE_WAITQUEUE(wait, current); 834 DECLARE_WAITQUEUE(wait, current);
809 835
810 retry: 836 retry:
811 if (chip->priv && (mode == FL_WRITING || mode == FL_ERASING 837 if (chip->priv &&
812 || mode == FL_OTP_WRITE || mode == FL_SHUTDOWN)) { 838 (mode == FL_WRITING || mode == FL_ERASING || mode == FL_OTP_WRITE
839 || mode == FL_SHUTDOWN) && chip->state != FL_SYNCING) {
813 /* 840 /*
814 * OK. We have possibility for contention on the write/erase 841 * OK. We have possibility for contention on the write/erase
815 * operations which are global to the real chip and not per 842 * operations which are global to the real chip and not per
@@ -859,6 +886,14 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
859 return ret; 886 return ret;
860 } 887 }
861 spin_lock(&shared->lock); 888 spin_lock(&shared->lock);
889
890 /* We should not own chip if it is already
891 * in FL_SYNCING state. Put contender and retry. */
892 if (chip->state == FL_SYNCING) {
893 put_chip(map, contender, contender->start);
894 spin_unlock(contender->mutex);
895 goto retry;
896 }
862 spin_unlock(contender->mutex); 897 spin_unlock(contender->mutex);
863 } 898 }
864 899
@@ -1012,7 +1047,7 @@ static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
1012 1047
1013static int __xipram xip_wait_for_operation( 1048static int __xipram xip_wait_for_operation(
1014 struct map_info *map, struct flchip *chip, 1049 struct map_info *map, struct flchip *chip,
1015 unsigned long adr, unsigned int chip_op_time ) 1050 unsigned long adr, unsigned int chip_op_time_max)
1016{ 1051{
1017 struct cfi_private *cfi = map->fldrv_priv; 1052 struct cfi_private *cfi = map->fldrv_priv;
1018 struct cfi_pri_intelext *cfip = cfi->cmdset_priv; 1053 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
@@ -1021,7 +1056,7 @@ static int __xipram xip_wait_for_operation(
1021 flstate_t oldstate, newstate; 1056 flstate_t oldstate, newstate;
1022 1057
1023 start = xip_currtime(); 1058 start = xip_currtime();
1024 usec = chip_op_time * 8; 1059 usec = chip_op_time_max;
1025 if (usec == 0) 1060 if (usec == 0)
1026 usec = 500000; 1061 usec = 500000;
1027 done = 0; 1062 done = 0;
@@ -1131,8 +1166,8 @@ static int __xipram xip_wait_for_operation(
1131#define XIP_INVAL_CACHED_RANGE(map, from, size) \ 1166#define XIP_INVAL_CACHED_RANGE(map, from, size) \
1132 INVALIDATE_CACHED_RANGE(map, from, size) 1167 INVALIDATE_CACHED_RANGE(map, from, size)
1133 1168
1134#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \ 1169#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec, usec_max) \
1135 xip_wait_for_operation(map, chip, cmd_adr, usec) 1170 xip_wait_for_operation(map, chip, cmd_adr, usec_max)
1136 1171
1137#else 1172#else
1138 1173
@@ -1144,7 +1179,7 @@ static int __xipram xip_wait_for_operation(
1144static int inval_cache_and_wait_for_operation( 1179static int inval_cache_and_wait_for_operation(
1145 struct map_info *map, struct flchip *chip, 1180 struct map_info *map, struct flchip *chip,
1146 unsigned long cmd_adr, unsigned long inval_adr, int inval_len, 1181 unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
1147 unsigned int chip_op_time) 1182 unsigned int chip_op_time, unsigned int chip_op_time_max)
1148{ 1183{
1149 struct cfi_private *cfi = map->fldrv_priv; 1184 struct cfi_private *cfi = map->fldrv_priv;
1150 map_word status, status_OK = CMD(0x80); 1185 map_word status, status_OK = CMD(0x80);
@@ -1156,8 +1191,7 @@ static int inval_cache_and_wait_for_operation(
1156 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len); 1191 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
1157 spin_lock(chip->mutex); 1192 spin_lock(chip->mutex);
1158 1193
1159 /* set our timeout to 8 times the expected delay */ 1194 timeo = chip_op_time_max;
1160 timeo = chip_op_time * 8;
1161 if (!timeo) 1195 if (!timeo)
1162 timeo = 500000; 1196 timeo = 500000;
1163 reset_timeo = timeo; 1197 reset_timeo = timeo;
@@ -1217,8 +1251,8 @@ static int inval_cache_and_wait_for_operation(
1217 1251
1218#endif 1252#endif
1219 1253
1220#define WAIT_TIMEOUT(map, chip, adr, udelay) \ 1254#define WAIT_TIMEOUT(map, chip, adr, udelay, udelay_max) \
1221 INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay); 1255 INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay, udelay_max);
1222 1256
1223 1257
1224static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len) 1258static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
@@ -1452,7 +1486,8 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1452 1486
1453 ret = INVAL_CACHE_AND_WAIT(map, chip, adr, 1487 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1454 adr, map_bankwidth(map), 1488 adr, map_bankwidth(map),
1455 chip->word_write_time); 1489 chip->word_write_time,
1490 chip->word_write_time_max);
1456 if (ret) { 1491 if (ret) {
1457 xip_enable(map, chip, adr); 1492 xip_enable(map, chip, adr);
1458 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name); 1493 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
@@ -1623,7 +1658,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1623 1658
1624 chip->state = FL_WRITING_TO_BUFFER; 1659 chip->state = FL_WRITING_TO_BUFFER;
1625 map_write(map, write_cmd, cmd_adr); 1660 map_write(map, write_cmd, cmd_adr);
1626 ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0); 1661 ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0, 0);
1627 if (ret) { 1662 if (ret) {
1628 /* Argh. Not ready for write to buffer */ 1663 /* Argh. Not ready for write to buffer */
1629 map_word Xstatus = map_read(map, cmd_adr); 1664 map_word Xstatus = map_read(map, cmd_adr);
@@ -1640,7 +1675,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1640 1675
1641 /* Figure out the number of words to write */ 1676 /* Figure out the number of words to write */
1642 word_gap = (-adr & (map_bankwidth(map)-1)); 1677 word_gap = (-adr & (map_bankwidth(map)-1));
1643 words = (len - word_gap + map_bankwidth(map) - 1) / map_bankwidth(map); 1678 words = DIV_ROUND_UP(len - word_gap, map_bankwidth(map));
1644 if (!word_gap) { 1679 if (!word_gap) {
1645 words--; 1680 words--;
1646 } else { 1681 } else {
@@ -1692,7 +1727,8 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1692 1727
1693 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, 1728 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
1694 initial_adr, initial_len, 1729 initial_adr, initial_len,
1695 chip->buffer_write_time); 1730 chip->buffer_write_time,
1731 chip->buffer_write_time_max);
1696 if (ret) { 1732 if (ret) {
1697 map_write(map, CMD(0x70), cmd_adr); 1733 map_write(map, CMD(0x70), cmd_adr);
1698 chip->state = FL_STATUS; 1734 chip->state = FL_STATUS;
@@ -1827,7 +1863,8 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1827 1863
1828 ret = INVAL_CACHE_AND_WAIT(map, chip, adr, 1864 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1829 adr, len, 1865 adr, len,
1830 chip->erase_time); 1866 chip->erase_time,
1867 chip->erase_time_max);
1831 if (ret) { 1868 if (ret) {
1832 map_write(map, CMD(0x70), adr); 1869 map_write(map, CMD(0x70), adr);
1833 chip->state = FL_STATUS; 1870 chip->state = FL_STATUS;
@@ -2006,7 +2043,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
2006 */ 2043 */
2007 udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0; 2044 udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;
2008 2045
2009 ret = WAIT_TIMEOUT(map, chip, adr, udelay); 2046 ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100);
2010 if (ret) { 2047 if (ret) {
2011 map_write(map, CMD(0x70), adr); 2048 map_write(map, CMD(0x70), adr);
2012 chip->state = FL_STATUS; 2049 chip->state = FL_STATUS;