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-rw-r--r--drivers/mmc/card/block.c81
-rw-r--r--drivers/mmc/card/queue.c17
-rw-r--r--drivers/mmc/core/bus.c3
-rw-r--r--drivers/mmc/core/core.c32
-rw-r--r--drivers/mmc/core/debugfs.c16
-rw-r--r--drivers/mmc/core/mmc.c19
-rw-r--r--drivers/mmc/core/mmc_ops.c11
-rw-r--r--drivers/mmc/core/sdio_bus.c17
-rw-r--r--drivers/mmc/core/sdio_io.c10
-rw-r--r--drivers/mmc/core/sdio_ops.c32
-rw-r--r--drivers/mmc/core/slot-gpio.c8
-rw-r--r--drivers/mmc/host/Kconfig33
-rw-r--r--drivers/mmc/host/Makefile2
-rw-r--r--drivers/mmc/host/at91_mci.c1219
-rw-r--r--drivers/mmc/host/at91_mci.h115
-rw-r--r--drivers/mmc/host/dw_mmc-pci.c2
-rw-r--r--drivers/mmc/host/dw_mmc-pltfm.c16
-rw-r--r--drivers/mmc/host/dw_mmc.c86
-rw-r--r--drivers/mmc/host/mxcmmc.c2
-rw-r--r--drivers/mmc/host/mxs-mmc.c31
-rw-r--r--drivers/mmc/host/omap_hsmmc.c177
-rw-r--r--drivers/mmc/host/sdhci-dove.c108
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c56
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c54
-rw-r--r--drivers/mmc/host/sdhci-pci.c1
-rw-r--r--drivers/mmc/host/sdhci-pltfm.c9
-rw-r--r--drivers/mmc/host/sdhci-pxav3.c13
-rw-r--r--drivers/mmc/host/sdhci-s3c.c65
-rw-r--r--drivers/mmc/host/sdhci-spear.c9
-rw-r--r--drivers/mmc/host/sdhci.c79
-rw-r--r--drivers/mmc/host/sdhci.h5
-rw-r--r--drivers/mmc/host/sh_mmcif.c14
-rw-r--r--drivers/mmc/host/sh_mobile_sdhi.c8
-rw-r--r--drivers/mmc/host/vub300.c1
-rw-r--r--drivers/mmc/host/wmt-sdmmc.c1029
35 files changed, 1710 insertions, 1670 deletions
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 172a768036d8..21056b9ef0a0 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -57,6 +57,7 @@ MODULE_ALIAS("mmc:block");
57#define INAND_CMD38_ARG_SECERASE 0x80 57#define INAND_CMD38_ARG_SECERASE 0x80
58#define INAND_CMD38_ARG_SECTRIM1 0x81 58#define INAND_CMD38_ARG_SECTRIM1 0x81
59#define INAND_CMD38_ARG_SECTRIM2 0x88 59#define INAND_CMD38_ARG_SECTRIM2 0x88
60#define MMC_BLK_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */
60 61
61static DEFINE_MUTEX(block_mutex); 62static DEFINE_MUTEX(block_mutex);
62 63
@@ -126,6 +127,10 @@ enum mmc_blk_status {
126module_param(perdev_minors, int, 0444); 127module_param(perdev_minors, int, 0444);
127MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device"); 128MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
128 129
130static inline int mmc_blk_part_switch(struct mmc_card *card,
131 struct mmc_blk_data *md);
132static int get_card_status(struct mmc_card *card, u32 *status, int retries);
133
129static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) 134static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk)
130{ 135{
131 struct mmc_blk_data *md; 136 struct mmc_blk_data *md;
@@ -357,6 +362,38 @@ out:
357 return ERR_PTR(err); 362 return ERR_PTR(err);
358} 363}
359 364
365static int ioctl_rpmb_card_status_poll(struct mmc_card *card, u32 *status,
366 u32 retries_max)
367{
368 int err;
369 u32 retry_count = 0;
370
371 if (!status || !retries_max)
372 return -EINVAL;
373
374 do {
375 err = get_card_status(card, status, 5);
376 if (err)
377 break;
378
379 if (!R1_STATUS(*status) &&
380 (R1_CURRENT_STATE(*status) != R1_STATE_PRG))
381 break; /* RPMB programming operation complete */
382
383 /*
384 * Rechedule to give the MMC device a chance to continue
385 * processing the previous command without being polled too
386 * frequently.
387 */
388 usleep_range(1000, 5000);
389 } while (++retry_count < retries_max);
390
391 if (retry_count == retries_max)
392 err = -EPERM;
393
394 return err;
395}
396
360static int mmc_blk_ioctl_cmd(struct block_device *bdev, 397static int mmc_blk_ioctl_cmd(struct block_device *bdev,
361 struct mmc_ioc_cmd __user *ic_ptr) 398 struct mmc_ioc_cmd __user *ic_ptr)
362{ 399{
@@ -368,6 +405,8 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
368 struct mmc_request mrq = {NULL}; 405 struct mmc_request mrq = {NULL};
369 struct scatterlist sg; 406 struct scatterlist sg;
370 int err; 407 int err;
408 int is_rpmb = false;
409 u32 status = 0;
371 410
372 /* 411 /*
373 * The caller must have CAP_SYS_RAWIO, and must be calling this on the 412 * The caller must have CAP_SYS_RAWIO, and must be calling this on the
@@ -387,6 +426,9 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
387 goto cmd_err; 426 goto cmd_err;
388 } 427 }
389 428
429 if (md->area_type & MMC_BLK_DATA_AREA_RPMB)
430 is_rpmb = true;
431
390 card = md->queue.card; 432 card = md->queue.card;
391 if (IS_ERR(card)) { 433 if (IS_ERR(card)) {
392 err = PTR_ERR(card); 434 err = PTR_ERR(card);
@@ -437,12 +479,23 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
437 479
438 mmc_claim_host(card->host); 480 mmc_claim_host(card->host);
439 481
482 err = mmc_blk_part_switch(card, md);
483 if (err)
484 goto cmd_rel_host;
485
440 if (idata->ic.is_acmd) { 486 if (idata->ic.is_acmd) {
441 err = mmc_app_cmd(card->host, card); 487 err = mmc_app_cmd(card->host, card);
442 if (err) 488 if (err)
443 goto cmd_rel_host; 489 goto cmd_rel_host;
444 } 490 }
445 491
492 if (is_rpmb) {
493 err = mmc_set_blockcount(card, data.blocks,
494 idata->ic.write_flag & (1 << 31));
495 if (err)
496 goto cmd_rel_host;
497 }
498
446 mmc_wait_for_req(card->host, &mrq); 499 mmc_wait_for_req(card->host, &mrq);
447 500
448 if (cmd.error) { 501 if (cmd.error) {
@@ -478,6 +531,18 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,
478 } 531 }
479 } 532 }
480 533
534 if (is_rpmb) {
535 /*
536 * Ensure RPMB command has completed by polling CMD13
537 * "Send Status".
538 */
539 err = ioctl_rpmb_card_status_poll(card, &status, 5);
540 if (err)
541 dev_err(mmc_dev(card->host),
542 "%s: Card Status=0x%08X, error %d\n",
543 __func__, status, err);
544 }
545
481cmd_rel_host: 546cmd_rel_host:
482 mmc_release_host(card->host); 547 mmc_release_host(card->host);
483 548
@@ -1034,6 +1099,9 @@ static int mmc_blk_err_check(struct mmc_card *card,
1034 */ 1099 */
1035 if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) { 1100 if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) {
1036 u32 status; 1101 u32 status;
1102 unsigned long timeout;
1103
1104 timeout = jiffies + msecs_to_jiffies(MMC_BLK_TIMEOUT_MS);
1037 do { 1105 do {
1038 int err = get_card_status(card, &status, 5); 1106 int err = get_card_status(card, &status, 5);
1039 if (err) { 1107 if (err) {
@@ -1041,6 +1109,17 @@ static int mmc_blk_err_check(struct mmc_card *card,
1041 req->rq_disk->disk_name, err); 1109 req->rq_disk->disk_name, err);
1042 return MMC_BLK_CMD_ERR; 1110 return MMC_BLK_CMD_ERR;
1043 } 1111 }
1112
1113 /* Timeout if the device never becomes ready for data
1114 * and never leaves the program state.
1115 */
1116 if (time_after(jiffies, timeout)) {
1117 pr_err("%s: Card stuck in programming state!"\
1118 " %s %s\n", mmc_hostname(card->host),
1119 req->rq_disk->disk_name, __func__);
1120
1121 return MMC_BLK_CMD_ERR;
1122 }
1044 /* 1123 /*
1045 * Some cards mishandle the status bits, 1124 * Some cards mishandle the status bits,
1046 * so make sure to check both the busy 1125 * so make sure to check both the busy
@@ -1504,6 +1583,8 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card,
1504 md->disk->queue = md->queue.queue; 1583 md->disk->queue = md->queue.queue;
1505 md->disk->driverfs_dev = parent; 1584 md->disk->driverfs_dev = parent;
1506 set_disk_ro(md->disk, md->read_only || default_ro); 1585 set_disk_ro(md->disk, md->read_only || default_ro);
1586 if (area_type & MMC_BLK_DATA_AREA_RPMB)
1587 md->disk->flags |= GENHD_FL_NO_PART_SCAN;
1507 1588
1508 /* 1589 /*
1509 * As discussed on lkml, GENHD_FL_REMOVABLE should: 1590 * As discussed on lkml, GENHD_FL_REMOVABLE should:
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index e360a979857d..fadf52eb5d70 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -68,6 +68,16 @@ static int mmc_queue_thread(void *d)
68 if (req || mq->mqrq_prev->req) { 68 if (req || mq->mqrq_prev->req) {
69 set_current_state(TASK_RUNNING); 69 set_current_state(TASK_RUNNING);
70 mq->issue_fn(mq, req); 70 mq->issue_fn(mq, req);
71
72 /*
73 * Current request becomes previous request
74 * and vice versa.
75 */
76 mq->mqrq_prev->brq.mrq.data = NULL;
77 mq->mqrq_prev->req = NULL;
78 tmp = mq->mqrq_prev;
79 mq->mqrq_prev = mq->mqrq_cur;
80 mq->mqrq_cur = tmp;
71 } else { 81 } else {
72 if (kthread_should_stop()) { 82 if (kthread_should_stop()) {
73 set_current_state(TASK_RUNNING); 83 set_current_state(TASK_RUNNING);
@@ -77,13 +87,6 @@ static int mmc_queue_thread(void *d)
77 schedule(); 87 schedule();
78 down(&mq->thread_sem); 88 down(&mq->thread_sem);
79 } 89 }
80
81 /* Current request becomes previous request and vice versa. */
82 mq->mqrq_prev->brq.mrq.data = NULL;
83 mq->mqrq_prev->req = NULL;
84 tmp = mq->mqrq_prev;
85 mq->mqrq_prev = mq->mqrq_cur;
86 mq->mqrq_cur = tmp;
87 } while (1); 90 } while (1);
88 up(&mq->thread_sem); 91 up(&mq->thread_sem);
89 92
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 9b68933f27e7..420cb6753c1e 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -225,8 +225,7 @@ static void mmc_release_card(struct device *dev)
225 225
226 sdio_free_common_cis(card); 226 sdio_free_common_cis(card);
227 227
228 if (card->info) 228 kfree(card->info);
229 kfree(card->info);
230 229
231 kfree(card); 230 kfree(card);
232} 231}
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 06c42cfb7c34..aaed7687cf09 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -42,6 +42,9 @@
42#include "sd_ops.h" 42#include "sd_ops.h"
43#include "sdio_ops.h" 43#include "sdio_ops.h"
44 44
45/* If the device is not responding */
46#define MMC_CORE_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */
47
45/* 48/*
46 * Background operations can take a long time, depending on the housekeeping 49 * Background operations can take a long time, depending on the housekeeping
47 * operations the card has to perform. 50 * operations the card has to perform.
@@ -1631,6 +1634,7 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from,
1631{ 1634{
1632 struct mmc_command cmd = {0}; 1635 struct mmc_command cmd = {0};
1633 unsigned int qty = 0; 1636 unsigned int qty = 0;
1637 unsigned long timeout;
1634 int err; 1638 int err;
1635 1639
1636 /* 1640 /*
@@ -1708,6 +1712,7 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from,
1708 if (mmc_host_is_spi(card->host)) 1712 if (mmc_host_is_spi(card->host))
1709 goto out; 1713 goto out;
1710 1714
1715 timeout = jiffies + msecs_to_jiffies(MMC_CORE_TIMEOUT_MS);
1711 do { 1716 do {
1712 memset(&cmd, 0, sizeof(struct mmc_command)); 1717 memset(&cmd, 0, sizeof(struct mmc_command));
1713 cmd.opcode = MMC_SEND_STATUS; 1718 cmd.opcode = MMC_SEND_STATUS;
@@ -1721,8 +1726,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from,
1721 err = -EIO; 1726 err = -EIO;
1722 goto out; 1727 goto out;
1723 } 1728 }
1729
1730 /* Timeout if the device never becomes ready for data and
1731 * never leaves the program state.
1732 */
1733 if (time_after(jiffies, timeout)) {
1734 pr_err("%s: Card stuck in programming state! %s\n",
1735 mmc_hostname(card->host), __func__);
1736 err = -EIO;
1737 goto out;
1738 }
1739
1724 } while (!(cmd.resp[0] & R1_READY_FOR_DATA) || 1740 } while (!(cmd.resp[0] & R1_READY_FOR_DATA) ||
1725 R1_CURRENT_STATE(cmd.resp[0]) == R1_STATE_PRG); 1741 (R1_CURRENT_STATE(cmd.resp[0]) == R1_STATE_PRG));
1726out: 1742out:
1727 return err; 1743 return err;
1728} 1744}
@@ -1942,6 +1958,20 @@ int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen)
1942} 1958}
1943EXPORT_SYMBOL(mmc_set_blocklen); 1959EXPORT_SYMBOL(mmc_set_blocklen);
1944 1960
1961int mmc_set_blockcount(struct mmc_card *card, unsigned int blockcount,
1962 bool is_rel_write)
1963{
1964 struct mmc_command cmd = {0};
1965
1966 cmd.opcode = MMC_SET_BLOCK_COUNT;
1967 cmd.arg = blockcount & 0x0000FFFF;
1968 if (is_rel_write)
1969 cmd.arg |= 1 << 31;
1970 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC;
1971 return mmc_wait_for_cmd(card->host, &cmd, 5);
1972}
1973EXPORT_SYMBOL(mmc_set_blockcount);
1974
1945static void mmc_hw_reset_for_init(struct mmc_host *host) 1975static void mmc_hw_reset_for_init(struct mmc_host *host)
1946{ 1976{
1947 if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset) 1977 if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset)
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index d96c643dde1c..35c2f85b1956 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -144,6 +144,22 @@ static int mmc_ios_show(struct seq_file *s, void *data)
144 } 144 }
145 seq_printf(s, "timing spec:\t%u (%s)\n", ios->timing, str); 145 seq_printf(s, "timing spec:\t%u (%s)\n", ios->timing, str);
146 146
147 switch (ios->signal_voltage) {
148 case MMC_SIGNAL_VOLTAGE_330:
149 str = "3.30 V";
150 break;
151 case MMC_SIGNAL_VOLTAGE_180:
152 str = "1.80 V";
153 break;
154 case MMC_SIGNAL_VOLTAGE_120:
155 str = "1.20 V";
156 break;
157 default:
158 str = "invalid";
159 break;
160 }
161 seq_printf(s, "signal voltage:\t%u (%s)\n", ios->chip_select, str);
162
147 return 0; 163 return 0;
148} 164}
149 165
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 7cc46382fd64..e6e39111e05b 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -239,7 +239,7 @@ static void mmc_select_card_type(struct mmc_card *card)
239{ 239{
240 struct mmc_host *host = card->host; 240 struct mmc_host *host = card->host;
241 u8 card_type = card->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_MASK; 241 u8 card_type = card->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_MASK;
242 unsigned int caps = host->caps, caps2 = host->caps2; 242 u32 caps = host->caps, caps2 = host->caps2;
243 unsigned int hs_max_dtr = 0; 243 unsigned int hs_max_dtr = 0;
244 244
245 if (card_type & EXT_CSD_CARD_TYPE_26) 245 if (card_type & EXT_CSD_CARD_TYPE_26)
@@ -491,6 +491,17 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)
491 491
492 card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM]; 492 card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
493 card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION]; 493 card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
494
495 /*
496 * RPMB regions are defined in multiples of 128K.
497 */
498 card->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT];
499 if (ext_csd[EXT_CSD_RPMB_MULT]) {
500 mmc_part_add(card, ext_csd[EXT_CSD_RPMB_MULT] << 17,
501 EXT_CSD_PART_CONFIG_ACC_RPMB,
502 "rpmb", 0, false,
503 MMC_BLK_DATA_AREA_RPMB);
504 }
494 } 505 }
495 506
496 card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT]; 507 card->ext_csd.raw_erased_mem_count = ext_csd[EXT_CSD_ERASED_MEM_CONT];
@@ -615,6 +626,8 @@ MMC_DEV_ATTR(serial, "0x%08x\n", card->cid.serial);
615MMC_DEV_ATTR(enhanced_area_offset, "%llu\n", 626MMC_DEV_ATTR(enhanced_area_offset, "%llu\n",
616 card->ext_csd.enhanced_area_offset); 627 card->ext_csd.enhanced_area_offset);
617MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size); 628MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size);
629MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult);
630MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors);
618 631
619static struct attribute *mmc_std_attrs[] = { 632static struct attribute *mmc_std_attrs[] = {
620 &dev_attr_cid.attr, 633 &dev_attr_cid.attr,
@@ -630,6 +643,8 @@ static struct attribute *mmc_std_attrs[] = {
630 &dev_attr_serial.attr, 643 &dev_attr_serial.attr,
631 &dev_attr_enhanced_area_offset.attr, 644 &dev_attr_enhanced_area_offset.attr,
632 &dev_attr_enhanced_area_size.attr, 645 &dev_attr_enhanced_area_size.attr,
646 &dev_attr_raw_rpmb_size_mult.attr,
647 &dev_attr_rel_sectors.attr,
633 NULL, 648 NULL,
634}; 649};
635 650
@@ -1051,6 +1066,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1051 if (mmc_card_highspeed(card) || mmc_card_hs200(card)) { 1066 if (mmc_card_highspeed(card) || mmc_card_hs200(card)) {
1052 if (max_dtr > card->ext_csd.hs_max_dtr) 1067 if (max_dtr > card->ext_csd.hs_max_dtr)
1053 max_dtr = card->ext_csd.hs_max_dtr; 1068 max_dtr = card->ext_csd.hs_max_dtr;
1069 if (mmc_card_highspeed(card) && (max_dtr > 52000000))
1070 max_dtr = 52000000;
1054 } else if (max_dtr > card->csd.max_dtr) { 1071 } else if (max_dtr > card->csd.max_dtr) {
1055 max_dtr = card->csd.max_dtr; 1072 max_dtr = card->csd.max_dtr;
1056 } 1073 }
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index a0e172042e65..6d8f7012d73a 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -21,6 +21,8 @@
21#include "core.h" 21#include "core.h"
22#include "mmc_ops.h" 22#include "mmc_ops.h"
23 23
24#define MMC_OPS_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */
25
24static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card) 26static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card)
25{ 27{
26 int err; 28 int err;
@@ -409,6 +411,7 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
409{ 411{
410 int err; 412 int err;
411 struct mmc_command cmd = {0}; 413 struct mmc_command cmd = {0};
414 unsigned long timeout;
412 u32 status; 415 u32 status;
413 416
414 BUG_ON(!card); 417 BUG_ON(!card);
@@ -437,6 +440,7 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
437 return 0; 440 return 0;
438 441
439 /* Must check status to be sure of no errors */ 442 /* Must check status to be sure of no errors */
443 timeout = jiffies + msecs_to_jiffies(MMC_OPS_TIMEOUT_MS);
440 do { 444 do {
441 err = mmc_send_status(card, &status); 445 err = mmc_send_status(card, &status);
442 if (err) 446 if (err)
@@ -445,6 +449,13 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
445 break; 449 break;
446 if (mmc_host_is_spi(card->host)) 450 if (mmc_host_is_spi(card->host))
447 break; 451 break;
452
453 /* Timeout if the device never leaves the program state. */
454 if (time_after(jiffies, timeout)) {
455 pr_err("%s: Card stuck in programming state! %s\n",
456 mmc_hostname(card->host), __func__);
457 return -ETIMEDOUT;
458 }
448 } while (R1_CURRENT_STATE(status) == R1_STATE_PRG); 459 } while (R1_CURRENT_STATE(status) == R1_STATE_PRG);
449 460
450 if (mmc_host_is_spi(card->host)) { 461 if (mmc_host_is_spi(card->host)) {
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index 6bf68799fe97..5e57048e2c1d 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -193,7 +193,21 @@ static int sdio_bus_remove(struct device *dev)
193} 193}
194 194
195#ifdef CONFIG_PM 195#ifdef CONFIG_PM
196
197#ifdef CONFIG_PM_SLEEP
198static int pm_no_operation(struct device *dev)
199{
200 /*
201 * Prevent the PM core from calling SDIO device drivers' suspend
202 * callback routines, which it is not supposed to do, by using this
203 * empty function as the bus type suspend callaback for SDIO.
204 */
205 return 0;
206}
207#endif
208
196static const struct dev_pm_ops sdio_bus_pm_ops = { 209static const struct dev_pm_ops sdio_bus_pm_ops = {
210 SET_SYSTEM_SLEEP_PM_OPS(pm_no_operation, pm_no_operation)
197 SET_RUNTIME_PM_OPS( 211 SET_RUNTIME_PM_OPS(
198 pm_generic_runtime_suspend, 212 pm_generic_runtime_suspend,
199 pm_generic_runtime_resume, 213 pm_generic_runtime_resume,
@@ -258,8 +272,7 @@ static void sdio_release_func(struct device *dev)
258 272
259 sdio_free_func_cis(func); 273 sdio_free_func_cis(func);
260 274
261 if (func->info) 275 kfree(func->info);
262 kfree(func->info);
263 276
264 kfree(func); 277 kfree(func);
265} 278}
diff --git a/drivers/mmc/core/sdio_io.c b/drivers/mmc/core/sdio_io.c
index 8f6f5ac131fc..78cb4d5d9d58 100644
--- a/drivers/mmc/core/sdio_io.c
+++ b/drivers/mmc/core/sdio_io.c
@@ -188,8 +188,7 @@ EXPORT_SYMBOL_GPL(sdio_set_block_size);
188 */ 188 */
189static inline unsigned int sdio_max_byte_size(struct sdio_func *func) 189static inline unsigned int sdio_max_byte_size(struct sdio_func *func)
190{ 190{
191 unsigned mval = min(func->card->host->max_seg_size, 191 unsigned mval = func->card->host->max_blk_size;
192 func->card->host->max_blk_size);
193 192
194 if (mmc_blksz_for_byte_mode(func->card)) 193 if (mmc_blksz_for_byte_mode(func->card))
195 mval = min(mval, func->cur_blksize); 194 mval = min(mval, func->cur_blksize);
@@ -311,11 +310,8 @@ static int sdio_io_rw_ext_helper(struct sdio_func *func, int write,
311 /* Do the bulk of the transfer using block mode (if supported). */ 310 /* Do the bulk of the transfer using block mode (if supported). */
312 if (func->card->cccr.multi_block && (size > sdio_max_byte_size(func))) { 311 if (func->card->cccr.multi_block && (size > sdio_max_byte_size(func))) {
313 /* Blocks per command is limited by host count, host transfer 312 /* Blocks per command is limited by host count, host transfer
314 * size (we only use a single sg entry) and the maximum for 313 * size and the maximum for IO_RW_EXTENDED of 511 blocks. */
315 * IO_RW_EXTENDED of 511 blocks. */ 314 max_blocks = min(func->card->host->max_blk_count, 511u);
316 max_blocks = min(func->card->host->max_blk_count,
317 func->card->host->max_seg_size / func->cur_blksize);
318 max_blocks = min(max_blocks, 511u);
319 315
320 while (remainder >= func->cur_blksize) { 316 while (remainder >= func->cur_blksize) {
321 unsigned blocks; 317 unsigned blocks;
diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c
index d29e20630eed..62508b457c4f 100644
--- a/drivers/mmc/core/sdio_ops.c
+++ b/drivers/mmc/core/sdio_ops.c
@@ -124,7 +124,10 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
124 struct mmc_request mrq = {NULL}; 124 struct mmc_request mrq = {NULL};
125 struct mmc_command cmd = {0}; 125 struct mmc_command cmd = {0};
126 struct mmc_data data = {0}; 126 struct mmc_data data = {0};
127 struct scatterlist sg; 127 struct scatterlist sg, *sg_ptr;
128 struct sg_table sgtable;
129 unsigned int nents, left_size, i;
130 unsigned int seg_size = card->host->max_seg_size;
128 131
129 BUG_ON(!card); 132 BUG_ON(!card);
130 BUG_ON(fn > 7); 133 BUG_ON(fn > 7);
@@ -152,15 +155,36 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
152 /* Code in host drivers/fwk assumes that "blocks" always is >=1 */ 155 /* Code in host drivers/fwk assumes that "blocks" always is >=1 */
153 data.blocks = blocks ? blocks : 1; 156 data.blocks = blocks ? blocks : 1;
154 data.flags = write ? MMC_DATA_WRITE : MMC_DATA_READ; 157 data.flags = write ? MMC_DATA_WRITE : MMC_DATA_READ;
155 data.sg = &sg;
156 data.sg_len = 1;
157 158
158 sg_init_one(&sg, buf, data.blksz * data.blocks); 159 left_size = data.blksz * data.blocks;
160 nents = (left_size - 1) / seg_size + 1;
161 if (nents > 1) {
162 if (sg_alloc_table(&sgtable, nents, GFP_KERNEL))
163 return -ENOMEM;
164
165 data.sg = sgtable.sgl;
166 data.sg_len = nents;
167
168 for_each_sg(data.sg, sg_ptr, data.sg_len, i) {
169 sg_set_page(sg_ptr, virt_to_page(buf + (i * seg_size)),
170 min(seg_size, left_size),
171 offset_in_page(buf + (i * seg_size)));
172 left_size = left_size - seg_size;
173 }
174 } else {
175 data.sg = &sg;
176 data.sg_len = 1;
177
178 sg_init_one(&sg, buf, left_size);
179 }
159 180
160 mmc_set_data_timeout(&data, card); 181 mmc_set_data_timeout(&data, card);
161 182
162 mmc_wait_for_req(card->host, &mrq); 183 mmc_wait_for_req(card->host, &mrq);
163 184
185 if (nents > 1)
186 sg_free_table(&sgtable);
187
164 if (cmd.error) 188 if (cmd.error)
165 return cmd.error; 189 return cmd.error;
166 if (data.error) 190 if (data.error)
diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c
index 08c6b3dfe080..16a1c0b6f264 100644
--- a/drivers/mmc/core/slot-gpio.c
+++ b/drivers/mmc/core/slot-gpio.c
@@ -27,7 +27,13 @@ struct mmc_gpio {
27static irqreturn_t mmc_gpio_cd_irqt(int irq, void *dev_id) 27static irqreturn_t mmc_gpio_cd_irqt(int irq, void *dev_id)
28{ 28{
29 /* Schedule a card detection after a debounce timeout */ 29 /* Schedule a card detection after a debounce timeout */
30 mmc_detect_change(dev_id, msecs_to_jiffies(100)); 30 struct mmc_host *host = dev_id;
31
32 if (host->ops->card_event)
33 host->ops->card_event(host);
34
35 mmc_detect_change(host, msecs_to_jiffies(200));
36
31 return IRQ_HANDLED; 37 return IRQ_HANDLED;
32} 38}
33 39
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 9bf10e7bbfaf..83eb1e06ff76 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -270,26 +270,8 @@ config MMC_AU1X
270 270
271 If unsure, say N. 271 If unsure, say N.
272 272
273choice
274 prompt "Atmel SD/MMC Driver"
275 depends on AVR32 || ARCH_AT91
276 default MMC_ATMELMCI if AVR32
277 help
278 Choose which driver to use for the Atmel MCI Silicon
279
280config MMC_AT91
281 tristate "AT91 SD/MMC Card Interface support (DEPRECATED)"
282 depends on ARCH_AT91
283 help
284 This selects the AT91 MCI controller. This driver will
285 be removed soon (for more information have a look to
286 Documentation/feature-removal-schedule.txt). Please use
287 MMC_ATMEL_MCI.
288
289 If unsure, say N.
290
291config MMC_ATMELMCI 273config MMC_ATMELMCI
292 tristate "Atmel Multimedia Card Interface support" 274 tristate "Atmel SD/MMC Driver (Multimedia Card Interface)"
293 depends on AVR32 || ARCH_AT91 275 depends on AVR32 || ARCH_AT91
294 help 276 help
295 This selects the Atmel Multimedia Card Interface driver. If 277 This selects the Atmel Multimedia Card Interface driver. If
@@ -298,8 +280,6 @@ config MMC_ATMELMCI
298 280
299 If unsure, say N. 281 If unsure, say N.
300 282
301endchoice
302
303config MMC_ATMELMCI_DMA 283config MMC_ATMELMCI_DMA
304 bool "Atmel MCI DMA support" 284 bool "Atmel MCI DMA support"
305 depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE 285 depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE
@@ -621,3 +601,14 @@ config MMC_USHC
621 601
622 Note: These controllers only support SDIO cards and do not 602 Note: These controllers only support SDIO cards and do not
623 support MMC or SD memory cards. 603 support MMC or SD memory cards.
604
605config MMC_WMT
606 tristate "Wondermedia SD/MMC Host Controller support"
607 depends on ARCH_VT8500
608 default y
609 help
610 This selects support for the SD/MMC Host Controller on
611 Wondermedia WM8505/WM8650 based SoCs.
612
613 To compile this driver as a module, choose M here: the
614 module will be called wmt-sdmmc.
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 17ad0a7ba40b..39d5e1234709 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -17,7 +17,6 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o
17obj-$(CONFIG_MMC_AU1X) += au1xmmc.o 17obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
18obj-$(CONFIG_MMC_OMAP) += omap.o 18obj-$(CONFIG_MMC_OMAP) += omap.o
19obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o 19obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
20obj-$(CONFIG_MMC_AT91) += at91_mci.o
21obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o 20obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
22obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o 21obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
23obj-$(CONFIG_MMC_MSM) += msm_sdcc.o 22obj-$(CONFIG_MMC_MSM) += msm_sdcc.o
@@ -45,6 +44,7 @@ obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o
45obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o 44obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
46obj-$(CONFIG_MMC_VUB300) += vub300.o 45obj-$(CONFIG_MMC_VUB300) += vub300.o
47obj-$(CONFIG_MMC_USHC) += ushc.o 46obj-$(CONFIG_MMC_USHC) += ushc.o
47obj-$(CONFIG_MMC_WMT) += wmt-sdmmc.o
48 48
49obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o 49obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
50obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o 50obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
deleted file mode 100644
index 74bed0fc23e7..000000000000
--- a/drivers/mmc/host/at91_mci.c
+++ /dev/null
@@ -1,1219 +0,0 @@
1/*
2 * linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
3 *
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
5 *
6 * Copyright (C) 2006 Malcolm Noyes
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 This is the AT91 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
17
18 The three entry points are at91_mci_request, at91_mci_set_ios
19 and at91_mci_get_ro.
20
21 SET IOS
22 This configures the device to put it into the correct mode and clock speed
23 required.
24
25 MCI REQUEST
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
29
30 There are three main types of request, commands, reads and writes.
31
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
36
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
39
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
43
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
45
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
49
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
51
52 GET RO
53 Gets the status of the write protect pin, if available.
54*/
55
56#include <linux/module.h>
57#include <linux/moduleparam.h>
58#include <linux/init.h>
59#include <linux/ioport.h>
60#include <linux/platform_device.h>
61#include <linux/interrupt.h>
62#include <linux/blkdev.h>
63#include <linux/delay.h>
64#include <linux/err.h>
65#include <linux/dma-mapping.h>
66#include <linux/clk.h>
67#include <linux/atmel_pdc.h>
68#include <linux/gfp.h>
69#include <linux/highmem.h>
70
71#include <linux/mmc/host.h>
72#include <linux/mmc/sdio.h>
73
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/gpio.h>
77
78#include <mach/board.h>
79#include <mach/cpu.h>
80
81#include "at91_mci.h"
82
83#define DRIVER_NAME "at91_mci"
84
85static inline int at91mci_is_mci1rev2xx(void)
86{
87 return ( cpu_is_at91sam9260()
88 || cpu_is_at91sam9263()
89 || cpu_is_at91sam9rl()
90 || cpu_is_at91sam9g10()
91 || cpu_is_at91sam9g20()
92 );
93}
94
95#define FL_SENT_COMMAND (1 << 0)
96#define FL_SENT_STOP (1 << 1)
97
98#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
99 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
100 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
101
102#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
103#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
104
105#define MCI_BLKSIZE 512
106#define MCI_MAXBLKSIZE 4095
107#define MCI_BLKATONCE 256
108#define MCI_BUFSIZE (MCI_BLKSIZE * MCI_BLKATONCE)
109
110/*
111 * Low level type for this driver
112 */
113struct at91mci_host
114{
115 struct mmc_host *mmc;
116 struct mmc_command *cmd;
117 struct mmc_request *request;
118
119 void __iomem *baseaddr;
120 int irq;
121
122 struct at91_mmc_data *board;
123 int present;
124
125 struct clk *mci_clk;
126
127 /*
128 * Flag indicating when the command has been sent. This is used to
129 * work out whether or not to send the stop
130 */
131 unsigned int flags;
132 /* flag for current bus settings */
133 u32 bus_mode;
134
135 /* DMA buffer used for transmitting */
136 unsigned int* buffer;
137 dma_addr_t physical_address;
138 unsigned int total_length;
139
140 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
141 int in_use_index;
142
143 /* Latest in the scatterlist that has been enabled for transfer */
144 int transfer_index;
145
146 /* Timer for timeouts */
147 struct timer_list timer;
148};
149
150/*
151 * Reset the controller and restore most of the state
152 */
153static void at91_reset_host(struct at91mci_host *host)
154{
155 unsigned long flags;
156 u32 mr;
157 u32 sdcr;
158 u32 dtor;
159 u32 imr;
160
161 local_irq_save(flags);
162 imr = at91_mci_read(host, AT91_MCI_IMR);
163
164 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
165
166 /* save current state */
167 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
168 sdcr = at91_mci_read(host, AT91_MCI_SDCR);
169 dtor = at91_mci_read(host, AT91_MCI_DTOR);
170
171 /* reset the controller */
172 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
173
174 /* restore state */
175 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
176 at91_mci_write(host, AT91_MCI_MR, mr);
177 at91_mci_write(host, AT91_MCI_SDCR, sdcr);
178 at91_mci_write(host, AT91_MCI_DTOR, dtor);
179 at91_mci_write(host, AT91_MCI_IER, imr);
180
181 /* make sure sdio interrupts will fire */
182 at91_mci_read(host, AT91_MCI_SR);
183
184 local_irq_restore(flags);
185}
186
187static void at91_timeout_timer(unsigned long data)
188{
189 struct at91mci_host *host;
190
191 host = (struct at91mci_host *)data;
192
193 if (host->request) {
194 dev_err(host->mmc->parent, "Timeout waiting end of packet\n");
195
196 if (host->cmd && host->cmd->data) {
197 host->cmd->data->error = -ETIMEDOUT;
198 } else {
199 if (host->cmd)
200 host->cmd->error = -ETIMEDOUT;
201 else
202 host->request->cmd->error = -ETIMEDOUT;
203 }
204
205 at91_reset_host(host);
206 mmc_request_done(host->mmc, host->request);
207 }
208}
209
210/*
211 * Copy from sg to a dma block - used for transfers
212 */
213static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
214{
215 unsigned int len, i, size;
216 unsigned *dmabuf = host->buffer;
217
218 size = data->blksz * data->blocks;
219 len = data->sg_len;
220
221 /* MCI1 rev2xx Data Write Operation and number of bytes erratum */
222 if (at91mci_is_mci1rev2xx())
223 if (host->total_length == 12)
224 memset(dmabuf, 0, 12);
225
226 /*
227 * Just loop through all entries. Size might not
228 * be the entire list though so make sure that
229 * we do not transfer too much.
230 */
231 for (i = 0; i < len; i++) {
232 struct scatterlist *sg;
233 int amount;
234 unsigned int *sgbuffer;
235
236 sg = &data->sg[i];
237
238 sgbuffer = kmap_atomic(sg_page(sg)) + sg->offset;
239 amount = min(size, sg->length);
240 size -= amount;
241
242 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
243 int index;
244
245 for (index = 0; index < (amount / 4); index++)
246 *dmabuf++ = swab32(sgbuffer[index]);
247 } else {
248 char *tmpv = (char *)dmabuf;
249 memcpy(tmpv, sgbuffer, amount);
250 tmpv += amount;
251 dmabuf = (unsigned *)tmpv;
252 }
253
254 kunmap_atomic(sgbuffer);
255
256 if (size == 0)
257 break;
258 }
259
260 /*
261 * Check that we didn't get a request to transfer
262 * more data than can fit into the SG list.
263 */
264 BUG_ON(size != 0);
265}
266
267/*
268 * Handle after a dma read
269 */
270static void at91_mci_post_dma_read(struct at91mci_host *host)
271{
272 struct mmc_command *cmd;
273 struct mmc_data *data;
274 unsigned int len, i, size;
275 unsigned *dmabuf = host->buffer;
276
277 pr_debug("post dma read\n");
278
279 cmd = host->cmd;
280 if (!cmd) {
281 pr_debug("no command\n");
282 return;
283 }
284
285 data = cmd->data;
286 if (!data) {
287 pr_debug("no data\n");
288 return;
289 }
290
291 size = data->blksz * data->blocks;
292 len = data->sg_len;
293
294 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
295 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
296
297 for (i = 0; i < len; i++) {
298 struct scatterlist *sg;
299 int amount;
300 unsigned int *sgbuffer;
301
302 sg = &data->sg[i];
303
304 sgbuffer = kmap_atomic(sg_page(sg)) + sg->offset;
305 amount = min(size, sg->length);
306 size -= amount;
307
308 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
309 int index;
310 for (index = 0; index < (amount / 4); index++)
311 sgbuffer[index] = swab32(*dmabuf++);
312 } else {
313 char *tmpv = (char *)dmabuf;
314 memcpy(sgbuffer, tmpv, amount);
315 tmpv += amount;
316 dmabuf = (unsigned *)tmpv;
317 }
318
319 flush_kernel_dcache_page(sg_page(sg));
320 kunmap_atomic(sgbuffer);
321 data->bytes_xfered += amount;
322 if (size == 0)
323 break;
324 }
325
326 pr_debug("post dma read done\n");
327}
328
329/*
330 * Handle transmitted data
331 */
332static void at91_mci_handle_transmitted(struct at91mci_host *host)
333{
334 struct mmc_command *cmd;
335 struct mmc_data *data;
336
337 pr_debug("Handling the transmit\n");
338
339 /* Disable the transfer */
340 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
341
342 /* Now wait for cmd ready */
343 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
344
345 cmd = host->cmd;
346 if (!cmd) return;
347
348 data = cmd->data;
349 if (!data) return;
350
351 if (cmd->data->blocks > 1) {
352 pr_debug("multiple write : wait for BLKE...\n");
353 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
354 } else
355 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
356}
357
358/*
359 * Update bytes transfered count during a write operation
360 */
361static void at91_mci_update_bytes_xfered(struct at91mci_host *host)
362{
363 struct mmc_data *data;
364
365 /* always deal with the effective request (and not the current cmd) */
366
367 if (host->request->cmd && host->request->cmd->error != 0)
368 return;
369
370 if (host->request->data) {
371 data = host->request->data;
372 if (data->flags & MMC_DATA_WRITE) {
373 /* card is in IDLE mode now */
374 pr_debug("-> bytes_xfered %d, total_length = %d\n",
375 data->bytes_xfered, host->total_length);
376 data->bytes_xfered = data->blksz * data->blocks;
377 }
378 }
379}
380
381
382/*Handle after command sent ready*/
383static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
384{
385 if (!host->cmd)
386 return 1;
387 else if (!host->cmd->data) {
388 if (host->flags & FL_SENT_STOP) {
389 /*After multi block write, we must wait for NOTBUSY*/
390 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
391 } else return 1;
392 } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
393 /*After sendding multi-block-write command, start DMA transfer*/
394 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE | AT91_MCI_BLKE);
395 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
396 }
397
398 /* command not completed, have to wait */
399 return 0;
400}
401
402
403/*
404 * Enable the controller
405 */
406static void at91_mci_enable(struct at91mci_host *host)
407{
408 unsigned int mr;
409
410 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
411 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
412 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
413 mr = AT91_MCI_PDCMODE | 0x34a;
414
415 if (at91mci_is_mci1rev2xx())
416 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
417
418 at91_mci_write(host, AT91_MCI_MR, mr);
419
420 /* use Slot A or B (only one at same time) */
421 at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
422}
423
424/*
425 * Disable the controller
426 */
427static void at91_mci_disable(struct at91mci_host *host)
428{
429 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
430}
431
432/*
433 * Send a command
434 */
435static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
436{
437 unsigned int cmdr, mr;
438 unsigned int block_length;
439 struct mmc_data *data = cmd->data;
440
441 unsigned int blocks;
442 unsigned int ier = 0;
443
444 host->cmd = cmd;
445
446 /* Needed for leaving busy state before CMD1 */
447 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
448 pr_debug("Clearing timeout\n");
449 at91_mci_write(host, AT91_MCI_ARGR, 0);
450 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
451 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
452 /* spin */
453 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
454 }
455 }
456
457 cmdr = cmd->opcode;
458
459 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
460 cmdr |= AT91_MCI_RSPTYP_NONE;
461 else {
462 /* if a response is expected then allow maximum response latancy */
463 cmdr |= AT91_MCI_MAXLAT;
464 /* set 136 bit response for R2, 48 bit response otherwise */
465 if (mmc_resp_type(cmd) == MMC_RSP_R2)
466 cmdr |= AT91_MCI_RSPTYP_136;
467 else
468 cmdr |= AT91_MCI_RSPTYP_48;
469 }
470
471 if (data) {
472
473 if (cpu_is_at91rm9200() || cpu_is_at91sam9261()) {
474 if (data->blksz & 0x3) {
475 pr_debug("Unsupported block size\n");
476 cmd->error = -EINVAL;
477 mmc_request_done(host->mmc, host->request);
478 return;
479 }
480 if (data->flags & MMC_DATA_STREAM) {
481 pr_debug("Stream commands not supported\n");
482 cmd->error = -EINVAL;
483 mmc_request_done(host->mmc, host->request);
484 return;
485 }
486 }
487
488 block_length = data->blksz;
489 blocks = data->blocks;
490
491 /* always set data start - also set direction flag for read */
492 if (data->flags & MMC_DATA_READ)
493 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
494 else if (data->flags & MMC_DATA_WRITE)
495 cmdr |= AT91_MCI_TRCMD_START;
496
497 if (cmd->opcode == SD_IO_RW_EXTENDED) {
498 cmdr |= AT91_MCI_TRTYP_SDIO_BLOCK;
499 } else {
500 if (data->flags & MMC_DATA_STREAM)
501 cmdr |= AT91_MCI_TRTYP_STREAM;
502 if (data->blocks > 1)
503 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
504 }
505 }
506 else {
507 block_length = 0;
508 blocks = 0;
509 }
510
511 if (host->flags & FL_SENT_STOP)
512 cmdr |= AT91_MCI_TRCMD_STOP;
513
514 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
515 cmdr |= AT91_MCI_OPDCMD;
516
517 /*
518 * Set the arguments and send the command
519 */
520 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
521 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
522
523 if (!data) {
524 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
525 at91_mci_write(host, ATMEL_PDC_RPR, 0);
526 at91_mci_write(host, ATMEL_PDC_RCR, 0);
527 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
528 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
529 at91_mci_write(host, ATMEL_PDC_TPR, 0);
530 at91_mci_write(host, ATMEL_PDC_TCR, 0);
531 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
532 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
533 ier = AT91_MCI_CMDRDY;
534 } else {
535 /* zero block length and PDC mode */
536 mr = at91_mci_read(host, AT91_MCI_MR) & 0x5fff;
537 mr |= (data->blksz & 0x3) ? AT91_MCI_PDCFBYTE : 0;
538 mr |= (block_length << 16);
539 mr |= AT91_MCI_PDCMODE;
540 at91_mci_write(host, AT91_MCI_MR, mr);
541
542 if (!(cpu_is_at91rm9200() || cpu_is_at91sam9261()))
543 at91_mci_write(host, AT91_MCI_BLKR,
544 AT91_MCI_BLKR_BCNT(blocks) |
545 AT91_MCI_BLKR_BLKLEN(block_length));
546
547 /*
548 * Disable the PDC controller
549 */
550 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
551
552 if (cmdr & AT91_MCI_TRCMD_START) {
553 data->bytes_xfered = 0;
554 host->transfer_index = 0;
555 host->in_use_index = 0;
556 if (cmdr & AT91_MCI_TRDIR) {
557 /*
558 * Handle a read
559 */
560 host->total_length = 0;
561
562 at91_mci_write(host, ATMEL_PDC_RPR, host->physical_address);
563 at91_mci_write(host, ATMEL_PDC_RCR, (data->blksz & 0x3) ?
564 (blocks * block_length) : (blocks * block_length) / 4);
565 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
566 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
567
568 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
569 }
570 else {
571 /*
572 * Handle a write
573 */
574 host->total_length = block_length * blocks;
575 /*
576 * MCI1 rev2xx Data Write Operation and
577 * number of bytes erratum
578 */
579 if (at91mci_is_mci1rev2xx())
580 if (host->total_length < 12)
581 host->total_length = 12;
582
583 at91_mci_sg_to_dma(host, data);
584
585 pr_debug("Transmitting %d bytes\n", host->total_length);
586
587 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
588 at91_mci_write(host, ATMEL_PDC_TCR, (data->blksz & 0x3) ?
589 host->total_length : host->total_length / 4);
590
591 ier = AT91_MCI_CMDRDY;
592 }
593 }
594 }
595
596 /*
597 * Send the command and then enable the PDC - not the other way round as
598 * the data sheet says
599 */
600
601 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
602 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
603
604 if (cmdr & AT91_MCI_TRCMD_START) {
605 if (cmdr & AT91_MCI_TRDIR)
606 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
607 }
608
609 /* Enable selected interrupts */
610 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
611}
612
613/*
614 * Process the next step in the request
615 */
616static void at91_mci_process_next(struct at91mci_host *host)
617{
618 if (!(host->flags & FL_SENT_COMMAND)) {
619 host->flags |= FL_SENT_COMMAND;
620 at91_mci_send_command(host, host->request->cmd);
621 }
622 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
623 host->flags |= FL_SENT_STOP;
624 at91_mci_send_command(host, host->request->stop);
625 } else {
626 del_timer(&host->timer);
627 /* the at91rm9200 mci controller hangs after some transfers,
628 * and the workaround is to reset it after each transfer.
629 */
630 if (cpu_is_at91rm9200())
631 at91_reset_host(host);
632 mmc_request_done(host->mmc, host->request);
633 }
634}
635
636/*
637 * Handle a command that has been completed
638 */
639static void at91_mci_completed_command(struct at91mci_host *host, unsigned int status)
640{
641 struct mmc_command *cmd = host->cmd;
642 struct mmc_data *data = cmd->data;
643
644 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
645
646 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
647 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
648 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
649 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
650
651 pr_debug("Status = %08X/%08x [%08X %08X %08X %08X]\n",
652 status, at91_mci_read(host, AT91_MCI_SR),
653 cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
654
655 if (status & AT91_MCI_ERRORS) {
656 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
657 cmd->error = 0;
658 }
659 else {
660 if (status & (AT91_MCI_DTOE | AT91_MCI_DCRCE)) {
661 if (data) {
662 if (status & AT91_MCI_DTOE)
663 data->error = -ETIMEDOUT;
664 else if (status & AT91_MCI_DCRCE)
665 data->error = -EILSEQ;
666 }
667 } else {
668 if (status & AT91_MCI_RTOE)
669 cmd->error = -ETIMEDOUT;
670 else if (status & AT91_MCI_RCRCE)
671 cmd->error = -EILSEQ;
672 else
673 cmd->error = -EIO;
674 }
675
676 pr_debug("Error detected and set to %d/%d (cmd = %d, retries = %d)\n",
677 cmd->error, data ? data->error : 0,
678 cmd->opcode, cmd->retries);
679 }
680 }
681 else
682 cmd->error = 0;
683
684 at91_mci_process_next(host);
685}
686
687/*
688 * Handle an MMC request
689 */
690static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
691{
692 struct at91mci_host *host = mmc_priv(mmc);
693 host->request = mrq;
694 host->flags = 0;
695
696 /* more than 1s timeout needed with slow SD cards */
697 mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000));
698
699 at91_mci_process_next(host);
700}
701
702/*
703 * Set the IOS
704 */
705static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
706{
707 int clkdiv;
708 struct at91mci_host *host = mmc_priv(mmc);
709 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
710
711 host->bus_mode = ios->bus_mode;
712
713 if (ios->clock == 0) {
714 /* Disable the MCI controller */
715 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
716 clkdiv = 0;
717 }
718 else {
719 /* Enable the MCI controller */
720 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
721
722 if ((at91_master_clock % (ios->clock * 2)) == 0)
723 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
724 else
725 clkdiv = (at91_master_clock / ios->clock) / 2;
726
727 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
728 at91_master_clock / (2 * (clkdiv + 1)));
729 }
730 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
731 pr_debug("MMC: Setting controller bus width to 4\n");
732 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
733 }
734 else {
735 pr_debug("MMC: Setting controller bus width to 1\n");
736 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
737 }
738
739 /* Set the clock divider */
740 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
741
742 /* maybe switch power to the card */
743 if (gpio_is_valid(host->board->vcc_pin)) {
744 switch (ios->power_mode) {
745 case MMC_POWER_OFF:
746 gpio_set_value(host->board->vcc_pin, 0);
747 break;
748 case MMC_POWER_UP:
749 gpio_set_value(host->board->vcc_pin, 1);
750 break;
751 case MMC_POWER_ON:
752 break;
753 default:
754 WARN_ON(1);
755 }
756 }
757}
758
759/*
760 * Handle an interrupt
761 */
762static irqreturn_t at91_mci_irq(int irq, void *devid)
763{
764 struct at91mci_host *host = devid;
765 int completed = 0;
766 unsigned int int_status, int_mask;
767
768 int_status = at91_mci_read(host, AT91_MCI_SR);
769 int_mask = at91_mci_read(host, AT91_MCI_IMR);
770
771 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
772 int_status & int_mask);
773
774 int_status = int_status & int_mask;
775
776 if (int_status & AT91_MCI_ERRORS) {
777 completed = 1;
778
779 if (int_status & AT91_MCI_UNRE)
780 pr_debug("MMC: Underrun error\n");
781 if (int_status & AT91_MCI_OVRE)
782 pr_debug("MMC: Overrun error\n");
783 if (int_status & AT91_MCI_DTOE)
784 pr_debug("MMC: Data timeout\n");
785 if (int_status & AT91_MCI_DCRCE)
786 pr_debug("MMC: CRC error in data\n");
787 if (int_status & AT91_MCI_RTOE)
788 pr_debug("MMC: Response timeout\n");
789 if (int_status & AT91_MCI_RENDE)
790 pr_debug("MMC: Response end bit error\n");
791 if (int_status & AT91_MCI_RCRCE)
792 pr_debug("MMC: Response CRC error\n");
793 if (int_status & AT91_MCI_RDIRE)
794 pr_debug("MMC: Response direction error\n");
795 if (int_status & AT91_MCI_RINDE)
796 pr_debug("MMC: Response index error\n");
797 } else {
798 /* Only continue processing if no errors */
799
800 if (int_status & AT91_MCI_TXBUFE) {
801 pr_debug("TX buffer empty\n");
802 at91_mci_handle_transmitted(host);
803 }
804
805 if (int_status & AT91_MCI_ENDRX) {
806 pr_debug("ENDRX\n");
807 at91_mci_post_dma_read(host);
808 }
809
810 if (int_status & AT91_MCI_RXBUFF) {
811 pr_debug("RX buffer full\n");
812 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
813 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
814 completed = 1;
815 }
816
817 if (int_status & AT91_MCI_ENDTX)
818 pr_debug("Transmit has ended\n");
819
820 if (int_status & AT91_MCI_NOTBUSY) {
821 pr_debug("Card is ready\n");
822 at91_mci_update_bytes_xfered(host);
823 completed = 1;
824 }
825
826 if (int_status & AT91_MCI_DTIP)
827 pr_debug("Data transfer in progress\n");
828
829 if (int_status & AT91_MCI_BLKE) {
830 pr_debug("Block transfer has ended\n");
831 if (host->request->data && host->request->data->blocks > 1) {
832 /* multi block write : complete multi write
833 * command and send stop */
834 completed = 1;
835 } else {
836 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
837 }
838 }
839
840 if (int_status & AT91_MCI_SDIOIRQA)
841 mmc_signal_sdio_irq(host->mmc);
842
843 if (int_status & AT91_MCI_SDIOIRQB)
844 mmc_signal_sdio_irq(host->mmc);
845
846 if (int_status & AT91_MCI_TXRDY)
847 pr_debug("Ready to transmit\n");
848
849 if (int_status & AT91_MCI_RXRDY)
850 pr_debug("Ready to receive\n");
851
852 if (int_status & AT91_MCI_CMDRDY) {
853 pr_debug("Command ready\n");
854 completed = at91_mci_handle_cmdrdy(host);
855 }
856 }
857
858 if (completed) {
859 pr_debug("Completed command\n");
860 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
861 at91_mci_completed_command(host, int_status);
862 } else
863 at91_mci_write(host, AT91_MCI_IDR, int_status & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
864
865 return IRQ_HANDLED;
866}
867
868static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
869{
870 struct at91mci_host *host = _host;
871 int present;
872
873 /* entering this ISR means that we have configured det_pin:
874 * we can use its value in board structure */
875 present = !gpio_get_value(host->board->det_pin);
876
877 /*
878 * we expect this irq on both insert and remove,
879 * and use a short delay to debounce.
880 */
881 if (present != host->present) {
882 host->present = present;
883 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
884 present ? "insert" : "remove");
885 if (!present) {
886 pr_debug("****** Resetting SD-card bus width ******\n");
887 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
888 }
889 /* 0.5s needed because of early card detect switch firing */
890 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
891 }
892 return IRQ_HANDLED;
893}
894
895static int at91_mci_get_ro(struct mmc_host *mmc)
896{
897 struct at91mci_host *host = mmc_priv(mmc);
898
899 if (gpio_is_valid(host->board->wp_pin))
900 return !!gpio_get_value(host->board->wp_pin);
901 /*
902 * Board doesn't support read only detection; let the mmc core
903 * decide what to do.
904 */
905 return -ENOSYS;
906}
907
908static void at91_mci_enable_sdio_irq(struct mmc_host *mmc, int enable)
909{
910 struct at91mci_host *host = mmc_priv(mmc);
911
912 pr_debug("%s: sdio_irq %c : %s\n", mmc_hostname(host->mmc),
913 host->board->slot_b ? 'B':'A', enable ? "enable" : "disable");
914 at91_mci_write(host, enable ? AT91_MCI_IER : AT91_MCI_IDR,
915 host->board->slot_b ? AT91_MCI_SDIOIRQB : AT91_MCI_SDIOIRQA);
916
917}
918
919static const struct mmc_host_ops at91_mci_ops = {
920 .request = at91_mci_request,
921 .set_ios = at91_mci_set_ios,
922 .get_ro = at91_mci_get_ro,
923 .enable_sdio_irq = at91_mci_enable_sdio_irq,
924};
925
926/*
927 * Probe for the device
928 */
929static int __init at91_mci_probe(struct platform_device *pdev)
930{
931 struct mmc_host *mmc;
932 struct at91mci_host *host;
933 struct resource *res;
934 int ret;
935
936 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
937 if (!res)
938 return -ENXIO;
939
940 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME))
941 return -EBUSY;
942
943 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
944 if (!mmc) {
945 ret = -ENOMEM;
946 dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
947 goto fail6;
948 }
949
950 mmc->ops = &at91_mci_ops;
951 mmc->f_min = 375000;
952 mmc->f_max = 25000000;
953 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
954 mmc->caps = 0;
955
956 mmc->max_blk_size = MCI_MAXBLKSIZE;
957 mmc->max_blk_count = MCI_BLKATONCE;
958 mmc->max_req_size = MCI_BUFSIZE;
959 mmc->max_segs = MCI_BLKATONCE;
960 mmc->max_seg_size = MCI_BUFSIZE;
961
962 host = mmc_priv(mmc);
963 host->mmc = mmc;
964 host->bus_mode = 0;
965 host->board = pdev->dev.platform_data;
966 if (host->board->wire4) {
967 if (at91mci_is_mci1rev2xx())
968 mmc->caps |= MMC_CAP_4_BIT_DATA;
969 else
970 dev_warn(&pdev->dev, "4 wire bus mode not supported"
971 " - using 1 wire\n");
972 }
973
974 host->buffer = dma_alloc_coherent(&pdev->dev, MCI_BUFSIZE,
975 &host->physical_address, GFP_KERNEL);
976 if (!host->buffer) {
977 ret = -ENOMEM;
978 dev_err(&pdev->dev, "Can't allocate transmit buffer\n");
979 goto fail5;
980 }
981
982 /* Add SDIO capability when available */
983 if (at91mci_is_mci1rev2xx()) {
984 /* at91mci MCI1 rev2xx sdio interrupt erratum */
985 if (host->board->wire4 || !host->board->slot_b)
986 mmc->caps |= MMC_CAP_SDIO_IRQ;
987 }
988
989 /*
990 * Reserve GPIOs ... board init code makes sure these pins are set
991 * up as GPIOs with the right direction (input, except for vcc)
992 */
993 if (gpio_is_valid(host->board->det_pin)) {
994 ret = gpio_request(host->board->det_pin, "mmc_detect");
995 if (ret < 0) {
996 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
997 goto fail4b;
998 }
999 }
1000 if (gpio_is_valid(host->board->wp_pin)) {
1001 ret = gpio_request(host->board->wp_pin, "mmc_wp");
1002 if (ret < 0) {
1003 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
1004 goto fail4;
1005 }
1006 }
1007 if (gpio_is_valid(host->board->vcc_pin)) {
1008 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
1009 if (ret < 0) {
1010 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
1011 goto fail3;
1012 }
1013 }
1014
1015 /*
1016 * Get Clock
1017 */
1018 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
1019 if (IS_ERR(host->mci_clk)) {
1020 ret = -ENODEV;
1021 dev_dbg(&pdev->dev, "no mci_clk?\n");
1022 goto fail2;
1023 }
1024
1025 /*
1026 * Map I/O region
1027 */
1028 host->baseaddr = ioremap(res->start, resource_size(res));
1029 if (!host->baseaddr) {
1030 ret = -ENOMEM;
1031 goto fail1;
1032 }
1033
1034 /*
1035 * Reset hardware
1036 */
1037 clk_enable(host->mci_clk); /* Enable the peripheral clock */
1038 at91_mci_disable(host);
1039 at91_mci_enable(host);
1040
1041 /*
1042 * Allocate the MCI interrupt
1043 */
1044 host->irq = platform_get_irq(pdev, 0);
1045 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED,
1046 mmc_hostname(mmc), host);
1047 if (ret) {
1048 dev_dbg(&pdev->dev, "request MCI interrupt failed\n");
1049 goto fail0;
1050 }
1051
1052 setup_timer(&host->timer, at91_timeout_timer, (unsigned long)host);
1053
1054 platform_set_drvdata(pdev, mmc);
1055
1056 /*
1057 * Add host to MMC layer
1058 */
1059 if (gpio_is_valid(host->board->det_pin)) {
1060 host->present = !gpio_get_value(host->board->det_pin);
1061 }
1062 else
1063 host->present = -1;
1064
1065 mmc_add_host(mmc);
1066
1067 /*
1068 * monitor card insertion/removal if we can
1069 */
1070 if (gpio_is_valid(host->board->det_pin)) {
1071 ret = request_irq(gpio_to_irq(host->board->det_pin),
1072 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
1073 if (ret)
1074 dev_warn(&pdev->dev, "request MMC detect irq failed\n");
1075 else
1076 device_init_wakeup(&pdev->dev, 1);
1077 }
1078
1079 pr_debug("Added MCI driver\n");
1080
1081 return 0;
1082
1083fail0:
1084 clk_disable(host->mci_clk);
1085 iounmap(host->baseaddr);
1086fail1:
1087 clk_put(host->mci_clk);
1088fail2:
1089 if (gpio_is_valid(host->board->vcc_pin))
1090 gpio_free(host->board->vcc_pin);
1091fail3:
1092 if (gpio_is_valid(host->board->wp_pin))
1093 gpio_free(host->board->wp_pin);
1094fail4:
1095 if (gpio_is_valid(host->board->det_pin))
1096 gpio_free(host->board->det_pin);
1097fail4b:
1098 if (host->buffer)
1099 dma_free_coherent(&pdev->dev, MCI_BUFSIZE,
1100 host->buffer, host->physical_address);
1101fail5:
1102 mmc_free_host(mmc);
1103fail6:
1104 release_mem_region(res->start, resource_size(res));
1105 dev_err(&pdev->dev, "probe failed, err %d\n", ret);
1106 return ret;
1107}
1108
1109/*
1110 * Remove a device
1111 */
1112static int __exit at91_mci_remove(struct platform_device *pdev)
1113{
1114 struct mmc_host *mmc = platform_get_drvdata(pdev);
1115 struct at91mci_host *host;
1116 struct resource *res;
1117
1118 if (!mmc)
1119 return -1;
1120
1121 host = mmc_priv(mmc);
1122
1123 if (host->buffer)
1124 dma_free_coherent(&pdev->dev, MCI_BUFSIZE,
1125 host->buffer, host->physical_address);
1126
1127 if (gpio_is_valid(host->board->det_pin)) {
1128 if (device_can_wakeup(&pdev->dev))
1129 free_irq(gpio_to_irq(host->board->det_pin), host);
1130 device_init_wakeup(&pdev->dev, 0);
1131 gpio_free(host->board->det_pin);
1132 }
1133
1134 at91_mci_disable(host);
1135 del_timer_sync(&host->timer);
1136 mmc_remove_host(mmc);
1137 free_irq(host->irq, host);
1138
1139 clk_disable(host->mci_clk); /* Disable the peripheral clock */
1140 clk_put(host->mci_clk);
1141
1142 if (gpio_is_valid(host->board->vcc_pin))
1143 gpio_free(host->board->vcc_pin);
1144 if (gpio_is_valid(host->board->wp_pin))
1145 gpio_free(host->board->wp_pin);
1146
1147 iounmap(host->baseaddr);
1148 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1149 release_mem_region(res->start, resource_size(res));
1150
1151 mmc_free_host(mmc);
1152 platform_set_drvdata(pdev, NULL);
1153 pr_debug("MCI Removed\n");
1154
1155 return 0;
1156}
1157
1158#ifdef CONFIG_PM
1159static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1160{
1161 struct mmc_host *mmc = platform_get_drvdata(pdev);
1162 struct at91mci_host *host = mmc_priv(mmc);
1163 int ret = 0;
1164
1165 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1166 enable_irq_wake(host->board->det_pin);
1167
1168 if (mmc)
1169 ret = mmc_suspend_host(mmc);
1170
1171 return ret;
1172}
1173
1174static int at91_mci_resume(struct platform_device *pdev)
1175{
1176 struct mmc_host *mmc = platform_get_drvdata(pdev);
1177 struct at91mci_host *host = mmc_priv(mmc);
1178 int ret = 0;
1179
1180 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1181 disable_irq_wake(host->board->det_pin);
1182
1183 if (mmc)
1184 ret = mmc_resume_host(mmc);
1185
1186 return ret;
1187}
1188#else
1189#define at91_mci_suspend NULL
1190#define at91_mci_resume NULL
1191#endif
1192
1193static struct platform_driver at91_mci_driver = {
1194 .remove = __exit_p(at91_mci_remove),
1195 .suspend = at91_mci_suspend,
1196 .resume = at91_mci_resume,
1197 .driver = {
1198 .name = DRIVER_NAME,
1199 .owner = THIS_MODULE,
1200 },
1201};
1202
1203static int __init at91_mci_init(void)
1204{
1205 return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1206}
1207
1208static void __exit at91_mci_exit(void)
1209{
1210 platform_driver_unregister(&at91_mci_driver);
1211}
1212
1213module_init(at91_mci_init);
1214module_exit(at91_mci_exit);
1215
1216MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1217MODULE_AUTHOR("Nick Randell");
1218MODULE_LICENSE("GPL");
1219MODULE_ALIAS("platform:at91_mci");
diff --git a/drivers/mmc/host/at91_mci.h b/drivers/mmc/host/at91_mci.h
deleted file mode 100644
index eec3a6b1c2bc..000000000000
--- a/drivers/mmc/host/at91_mci.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * drivers/mmc/host/at91_mci.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * MultiMedia Card Interface (MCI) registers.
8 * Based on AT91RM9200 datasheet revision F.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_MCI_H
17#define AT91_MCI_H
18
19#define AT91_MCI_CR 0x00 /* Control Register */
20#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */
21#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */
22#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */
23#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */
24#define AT91_MCI_SWRST (1 << 7) /* Software Reset */
25
26#define AT91_MCI_MR 0x04 /* Mode Register */
27#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */
28#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */
29#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */
30#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */
31#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */
32#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */
33#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */
34#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */
35
36#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */
37#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */
38#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */
39#define AT91_MCI_DTOMUL_1 (0 << 4)
40#define AT91_MCI_DTOMUL_16 (1 << 4)
41#define AT91_MCI_DTOMUL_128 (2 << 4)
42#define AT91_MCI_DTOMUL_256 (3 << 4)
43#define AT91_MCI_DTOMUL_1K (4 << 4)
44#define AT91_MCI_DTOMUL_4K (5 << 4)
45#define AT91_MCI_DTOMUL_64K (6 << 4)
46#define AT91_MCI_DTOMUL_1M (7 << 4)
47
48#define AT91_MCI_SDCR 0x0c /* SD Card Register */
49#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */
50#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */
51
52#define AT91_MCI_ARGR 0x10 /* Argument Register */
53
54#define AT91_MCI_CMDR 0x14 /* Command Register */
55#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */
56#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */
57#define AT91_MCI_RSPTYP_NONE (0 << 6)
58#define AT91_MCI_RSPTYP_48 (1 << 6)
59#define AT91_MCI_RSPTYP_136 (2 << 6)
60#define AT91_MCI_SPCMD (7 << 8) /* Special Command */
61#define AT91_MCI_SPCMD_NONE (0 << 8)
62#define AT91_MCI_SPCMD_INIT (1 << 8)
63#define AT91_MCI_SPCMD_SYNC (2 << 8)
64#define AT91_MCI_SPCMD_ICMD (4 << 8)
65#define AT91_MCI_SPCMD_IRESP (5 << 8)
66#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */
67#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */
68#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */
69#define AT91_MCI_TRCMD_NONE (0 << 16)
70#define AT91_MCI_TRCMD_START (1 << 16)
71#define AT91_MCI_TRCMD_STOP (2 << 16)
72#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */
73#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */
74#define AT91_MCI_TRTYP_BLOCK (0 << 19)
75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
76#define AT91_MCI_TRTYP_STREAM (2 << 19)
77#define AT91_MCI_TRTYP_SDIO_BYTE (4 << 19)
78#define AT91_MCI_TRTYP_SDIO_BLOCK (5 << 19)
79
80#define AT91_MCI_BLKR 0x18 /* Block Register */
81#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
82#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block length */
83
84#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
85#define AT91_MCR_RDR 0x30 /* Receive Data Register */
86#define AT91_MCR_TDR 0x34 /* Transmit Data Register */
87
88#define AT91_MCI_SR 0x40 /* Status Register */
89#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */
90#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */
91#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */
92#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */
93#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */
94#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */
95#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */
96#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */
97#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */
98#define AT91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B */
99#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */
100#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */
101#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */
102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */
103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */
104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */
105#define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */
106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */
107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */
108#define AT91_MCI_OVRE (1 << 30) /* Overrun */
109#define AT91_MCI_UNRE (1 << 31) /* Underrun */
110
111#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */
112#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */
113#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */
114
115#endif
diff --git a/drivers/mmc/host/dw_mmc-pci.c b/drivers/mmc/host/dw_mmc-pci.c
index edb37e9135ae..53a09cbb2c7c 100644
--- a/drivers/mmc/host/dw_mmc-pci.c
+++ b/drivers/mmc/host/dw_mmc-pci.c
@@ -134,7 +134,7 @@ static struct pci_driver dw_mci_pci_driver = {
134 .name = "dw_mmc_pci", 134 .name = "dw_mmc_pci",
135 .id_table = dw_mci_pci_id, 135 .id_table = dw_mci_pci_id,
136 .probe = dw_mci_pci_probe, 136 .probe = dw_mci_pci_probe,
137 .remove = dw_mci_pci_remove, 137 .remove = __devexit_p(dw_mci_pci_remove),
138 .driver = { 138 .driver = {
139 .pm = &dw_mci_pci_pmops 139 .pm = &dw_mci_pci_pmops
140 }, 140 },
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 917936bee5d5..4e133709e33d 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -119,7 +119,8 @@ static const struct of_device_id dw_mci_pltfm_match[] = {
119MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); 119MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
120 120
121static struct platform_driver dw_mci_pltfm_driver = { 121static struct platform_driver dw_mci_pltfm_driver = {
122 .remove = __exit_p(dw_mci_pltfm_remove), 122 .probe = dw_mci_pltfm_probe,
123 .remove = __devexit_p(dw_mci_pltfm_remove),
123 .driver = { 124 .driver = {
124 .name = "dw_mmc", 125 .name = "dw_mmc",
125 .of_match_table = of_match_ptr(dw_mci_pltfm_match), 126 .of_match_table = of_match_ptr(dw_mci_pltfm_match),
@@ -127,18 +128,7 @@ static struct platform_driver dw_mci_pltfm_driver = {
127 }, 128 },
128}; 129};
129 130
130static int __init dw_mci_init(void) 131module_platform_driver(dw_mci_pltfm_driver);
131{
132 return platform_driver_probe(&dw_mci_pltfm_driver, dw_mci_pltfm_probe);
133}
134
135static void __exit dw_mci_exit(void)
136{
137 platform_driver_unregister(&dw_mci_pltfm_driver);
138}
139
140module_init(dw_mci_init);
141module_exit(dw_mci_exit);
142 132
143MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 133MODULE_DESCRIPTION("DW Multimedia Card Interface driver");
144MODULE_AUTHOR("NXP Semiconductor VietNam"); 134MODULE_AUTHOR("NXP Semiconductor VietNam");
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index c0667c8af2bd..323c5022c2ca 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -232,7 +232,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd)
232{ 232{
233 struct mmc_data *data; 233 struct mmc_data *data;
234 struct dw_mci_slot *slot = mmc_priv(mmc); 234 struct dw_mci_slot *slot = mmc_priv(mmc);
235 struct dw_mci_drv_data *drv_data = slot->host->drv_data; 235 const struct dw_mci_drv_data *drv_data = slot->host->drv_data;
236 u32 cmdr; 236 u32 cmdr;
237 cmd->error = -EINPROGRESS; 237 cmd->error = -EINPROGRESS;
238 238
@@ -617,13 +617,13 @@ static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg)
617 cmd, arg, cmd_status); 617 cmd, arg, cmd_status);
618} 618}
619 619
620static void dw_mci_setup_bus(struct dw_mci_slot *slot) 620static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
621{ 621{
622 struct dw_mci *host = slot->host; 622 struct dw_mci *host = slot->host;
623 u32 div; 623 u32 div;
624 u32 clk_en_a; 624 u32 clk_en_a;
625 625
626 if (slot->clock != host->current_speed) { 626 if (slot->clock != host->current_speed || force_clkinit) {
627 div = host->bus_hz / slot->clock; 627 div = host->bus_hz / slot->clock;
628 if (host->bus_hz % slot->clock && host->bus_hz > slot->clock) 628 if (host->bus_hz % slot->clock && host->bus_hz > slot->clock)
629 /* 629 /*
@@ -683,9 +683,6 @@ static void __dw_mci_start_request(struct dw_mci *host,
683 if (host->pdata->select_slot) 683 if (host->pdata->select_slot)
684 host->pdata->select_slot(slot->id); 684 host->pdata->select_slot(slot->id);
685 685
686 /* Slot specific timing and width adjustment */
687 dw_mci_setup_bus(slot);
688
689 host->cur_slot = slot; 686 host->cur_slot = slot;
690 host->mrq = mrq; 687 host->mrq = mrq;
691 688
@@ -773,22 +770,19 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
773static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 770static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
774{ 771{
775 struct dw_mci_slot *slot = mmc_priv(mmc); 772 struct dw_mci_slot *slot = mmc_priv(mmc);
776 struct dw_mci_drv_data *drv_data = slot->host->drv_data; 773 const struct dw_mci_drv_data *drv_data = slot->host->drv_data;
777 u32 regs; 774 u32 regs;
778 775
779 /* set default 1 bit mode */
780 slot->ctype = SDMMC_CTYPE_1BIT;
781
782 switch (ios->bus_width) { 776 switch (ios->bus_width) {
783 case MMC_BUS_WIDTH_1:
784 slot->ctype = SDMMC_CTYPE_1BIT;
785 break;
786 case MMC_BUS_WIDTH_4: 777 case MMC_BUS_WIDTH_4:
787 slot->ctype = SDMMC_CTYPE_4BIT; 778 slot->ctype = SDMMC_CTYPE_4BIT;
788 break; 779 break;
789 case MMC_BUS_WIDTH_8: 780 case MMC_BUS_WIDTH_8:
790 slot->ctype = SDMMC_CTYPE_8BIT; 781 slot->ctype = SDMMC_CTYPE_8BIT;
791 break; 782 break;
783 default:
784 /* set default 1 bit mode */
785 slot->ctype = SDMMC_CTYPE_1BIT;
792 } 786 }
793 787
794 regs = mci_readl(slot->host, UHS_REG); 788 regs = mci_readl(slot->host, UHS_REG);
@@ -812,6 +806,9 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
812 if (drv_data && drv_data->set_ios) 806 if (drv_data && drv_data->set_ios)
813 drv_data->set_ios(slot->host, ios); 807 drv_data->set_ios(slot->host, ios);
814 808
809 /* Slot specific timing and width adjustment */
810 dw_mci_setup_bus(slot, false);
811
815 switch (ios->power_mode) { 812 switch (ios->power_mode) {
816 case MMC_POWER_UP: 813 case MMC_POWER_UP:
817 set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 814 set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags);
@@ -1817,7 +1814,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
1817{ 1814{
1818 struct mmc_host *mmc; 1815 struct mmc_host *mmc;
1819 struct dw_mci_slot *slot; 1816 struct dw_mci_slot *slot;
1820 struct dw_mci_drv_data *drv_data = host->drv_data; 1817 const struct dw_mci_drv_data *drv_data = host->drv_data;
1821 int ctrl_id, ret; 1818 int ctrl_id, ret;
1822 u8 bus_width; 1819 u8 bus_width;
1823 1820
@@ -1850,6 +1847,9 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
1850 if (host->pdata->caps) 1847 if (host->pdata->caps)
1851 mmc->caps = host->pdata->caps; 1848 mmc->caps = host->pdata->caps;
1852 1849
1850 if (host->pdata->pm_caps)
1851 mmc->pm_caps = host->pdata->pm_caps;
1852
1853 if (host->dev->of_node) { 1853 if (host->dev->of_node) {
1854 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); 1854 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
1855 if (ctrl_id < 0) 1855 if (ctrl_id < 0)
@@ -1911,7 +1911,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
1911#endif /* CONFIG_MMC_DW_IDMAC */ 1911#endif /* CONFIG_MMC_DW_IDMAC */
1912 } 1912 }
1913 1913
1914 host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1914 host->vmmc = devm_regulator_get(mmc_dev(mmc), "vmmc");
1915 if (IS_ERR(host->vmmc)) { 1915 if (IS_ERR(host->vmmc)) {
1916 pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1916 pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc));
1917 host->vmmc = NULL; 1917 host->vmmc = NULL;
@@ -1960,7 +1960,7 @@ static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id)
1960static void dw_mci_init_dma(struct dw_mci *host) 1960static void dw_mci_init_dma(struct dw_mci *host)
1961{ 1961{
1962 /* Alloc memory for sg translation */ 1962 /* Alloc memory for sg translation */
1963 host->sg_cpu = dma_alloc_coherent(host->dev, PAGE_SIZE, 1963 host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
1964 &host->sg_dma, GFP_KERNEL); 1964 &host->sg_dma, GFP_KERNEL);
1965 if (!host->sg_cpu) { 1965 if (!host->sg_cpu) {
1966 dev_err(host->dev, "%s: could not alloc DMA memory\n", 1966 dev_err(host->dev, "%s: could not alloc DMA memory\n",
@@ -2038,7 +2038,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
2038 struct dw_mci_board *pdata; 2038 struct dw_mci_board *pdata;
2039 struct device *dev = host->dev; 2039 struct device *dev = host->dev;
2040 struct device_node *np = dev->of_node; 2040 struct device_node *np = dev->of_node;
2041 struct dw_mci_drv_data *drv_data = host->drv_data; 2041 const struct dw_mci_drv_data *drv_data = host->drv_data;
2042 int idx, ret; 2042 int idx, ret;
2043 2043
2044 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 2044 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
@@ -2072,6 +2072,12 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
2072 return ERR_PTR(ret); 2072 return ERR_PTR(ret);
2073 } 2073 }
2074 2074
2075 if (of_find_property(np, "keep-power-in-suspend", NULL))
2076 pdata->pm_caps |= MMC_PM_KEEP_POWER;
2077
2078 if (of_find_property(np, "enable-sdio-wakeup", NULL))
2079 pdata->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
2080
2075 return pdata; 2081 return pdata;
2076} 2082}
2077 2083
@@ -2084,7 +2090,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
2084 2090
2085int dw_mci_probe(struct dw_mci *host) 2091int dw_mci_probe(struct dw_mci *host)
2086{ 2092{
2087 struct dw_mci_drv_data *drv_data = host->drv_data; 2093 const struct dw_mci_drv_data *drv_data = host->drv_data;
2088 int width, i, ret = 0; 2094 int width, i, ret = 0;
2089 u32 fifo_size; 2095 u32 fifo_size;
2090 int init_slots = 0; 2096 int init_slots = 0;
@@ -2103,26 +2109,24 @@ int dw_mci_probe(struct dw_mci *host)
2103 return -ENODEV; 2109 return -ENODEV;
2104 } 2110 }
2105 2111
2106 host->biu_clk = clk_get(host->dev, "biu"); 2112 host->biu_clk = devm_clk_get(host->dev, "biu");
2107 if (IS_ERR(host->biu_clk)) { 2113 if (IS_ERR(host->biu_clk)) {
2108 dev_dbg(host->dev, "biu clock not available\n"); 2114 dev_dbg(host->dev, "biu clock not available\n");
2109 } else { 2115 } else {
2110 ret = clk_prepare_enable(host->biu_clk); 2116 ret = clk_prepare_enable(host->biu_clk);
2111 if (ret) { 2117 if (ret) {
2112 dev_err(host->dev, "failed to enable biu clock\n"); 2118 dev_err(host->dev, "failed to enable biu clock\n");
2113 clk_put(host->biu_clk);
2114 return ret; 2119 return ret;
2115 } 2120 }
2116 } 2121 }
2117 2122
2118 host->ciu_clk = clk_get(host->dev, "ciu"); 2123 host->ciu_clk = devm_clk_get(host->dev, "ciu");
2119 if (IS_ERR(host->ciu_clk)) { 2124 if (IS_ERR(host->ciu_clk)) {
2120 dev_dbg(host->dev, "ciu clock not available\n"); 2125 dev_dbg(host->dev, "ciu clock not available\n");
2121 } else { 2126 } else {
2122 ret = clk_prepare_enable(host->ciu_clk); 2127 ret = clk_prepare_enable(host->ciu_clk);
2123 if (ret) { 2128 if (ret) {
2124 dev_err(host->dev, "failed to enable ciu clock\n"); 2129 dev_err(host->dev, "failed to enable ciu clock\n");
2125 clk_put(host->ciu_clk);
2126 goto err_clk_biu; 2130 goto err_clk_biu;
2127 } 2131 }
2128 } 2132 }
@@ -2224,7 +2228,8 @@ int dw_mci_probe(struct dw_mci *host)
2224 if (!host->card_workqueue) 2228 if (!host->card_workqueue)
2225 goto err_dmaunmap; 2229 goto err_dmaunmap;
2226 INIT_WORK(&host->card_work, dw_mci_work_routine_card); 2230 INIT_WORK(&host->card_work, dw_mci_work_routine_card);
2227 ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 2231 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt,
2232 host->irq_flags, "dw-mci", host);
2228 if (ret) 2233 if (ret)
2229 goto err_workqueue; 2234 goto err_workqueue;
2230 2235
@@ -2262,7 +2267,7 @@ int dw_mci_probe(struct dw_mci *host)
2262 } else { 2267 } else {
2263 dev_dbg(host->dev, "attempted to initialize %d slots, " 2268 dev_dbg(host->dev, "attempted to initialize %d slots, "
2264 "but failed on all\n", host->num_slots); 2269 "but failed on all\n", host->num_slots);
2265 goto err_init_slot; 2270 goto err_workqueue;
2266 } 2271 }
2267 2272
2268 /* 2273 /*
@@ -2282,33 +2287,24 @@ int dw_mci_probe(struct dw_mci *host)
2282 2287
2283 return 0; 2288 return 0;
2284 2289
2285err_init_slot:
2286 free_irq(host->irq, host);
2287
2288err_workqueue: 2290err_workqueue:
2289 destroy_workqueue(host->card_workqueue); 2291 destroy_workqueue(host->card_workqueue);
2290 2292
2291err_dmaunmap: 2293err_dmaunmap:
2292 if (host->use_dma && host->dma_ops->exit) 2294 if (host->use_dma && host->dma_ops->exit)
2293 host->dma_ops->exit(host); 2295 host->dma_ops->exit(host);
2294 dma_free_coherent(host->dev, PAGE_SIZE,
2295 host->sg_cpu, host->sg_dma);
2296 2296
2297 if (host->vmmc) { 2297 if (host->vmmc)
2298 regulator_disable(host->vmmc); 2298 regulator_disable(host->vmmc);
2299 regulator_put(host->vmmc);
2300 }
2301 2299
2302err_clk_ciu: 2300err_clk_ciu:
2303 if (!IS_ERR(host->ciu_clk)) { 2301 if (!IS_ERR(host->ciu_clk))
2304 clk_disable_unprepare(host->ciu_clk); 2302 clk_disable_unprepare(host->ciu_clk);
2305 clk_put(host->ciu_clk); 2303
2306 }
2307err_clk_biu: 2304err_clk_biu:
2308 if (!IS_ERR(host->biu_clk)) { 2305 if (!IS_ERR(host->biu_clk))
2309 clk_disable_unprepare(host->biu_clk); 2306 clk_disable_unprepare(host->biu_clk);
2310 clk_put(host->biu_clk); 2307
2311 }
2312 return ret; 2308 return ret;
2313} 2309}
2314EXPORT_SYMBOL(dw_mci_probe); 2310EXPORT_SYMBOL(dw_mci_probe);
@@ -2330,24 +2326,19 @@ void dw_mci_remove(struct dw_mci *host)
2330 mci_writel(host, CLKENA, 0); 2326 mci_writel(host, CLKENA, 0);
2331 mci_writel(host, CLKSRC, 0); 2327 mci_writel(host, CLKSRC, 0);
2332 2328
2333 free_irq(host->irq, host);
2334 destroy_workqueue(host->card_workqueue); 2329 destroy_workqueue(host->card_workqueue);
2335 dma_free_coherent(host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
2336 2330
2337 if (host->use_dma && host->dma_ops->exit) 2331 if (host->use_dma && host->dma_ops->exit)
2338 host->dma_ops->exit(host); 2332 host->dma_ops->exit(host);
2339 2333
2340 if (host->vmmc) { 2334 if (host->vmmc)
2341 regulator_disable(host->vmmc); 2335 regulator_disable(host->vmmc);
2342 regulator_put(host->vmmc);
2343 }
2344 2336
2345 if (!IS_ERR(host->ciu_clk)) 2337 if (!IS_ERR(host->ciu_clk))
2346 clk_disable_unprepare(host->ciu_clk); 2338 clk_disable_unprepare(host->ciu_clk);
2339
2347 if (!IS_ERR(host->biu_clk)) 2340 if (!IS_ERR(host->biu_clk))
2348 clk_disable_unprepare(host->biu_clk); 2341 clk_disable_unprepare(host->biu_clk);
2349 clk_put(host->ciu_clk);
2350 clk_put(host->biu_clk);
2351} 2342}
2352EXPORT_SYMBOL(dw_mci_remove); 2343EXPORT_SYMBOL(dw_mci_remove);
2353 2344
@@ -2411,6 +2402,11 @@ int dw_mci_resume(struct dw_mci *host)
2411 struct dw_mci_slot *slot = host->slot[i]; 2402 struct dw_mci_slot *slot = host->slot[i];
2412 if (!slot) 2403 if (!slot)
2413 continue; 2404 continue;
2405 if (slot->mmc->pm_flags & MMC_PM_KEEP_POWER) {
2406 dw_mci_set_ios(slot->mmc, &slot->mmc->ios);
2407 dw_mci_setup_bus(slot, true);
2408 }
2409
2414 ret = mmc_resume_host(host->slot[i]->mmc); 2410 ret = mmc_resume_host(host->slot[i]->mmc);
2415 if (ret < 0) 2411 if (ret < 0)
2416 return ret; 2412 return ret;
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 6290b7f1ccfe..29e680f193a0 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -240,7 +240,7 @@ static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
240 return 0; 240 return 0;
241 241
242 for_each_sg(data->sg, sg, data->sg_len, i) { 242 for_each_sg(data->sg, sg, data->sg_len, i) {
243 if (sg->offset & 3 || sg->length & 3) { 243 if (sg->offset & 3 || sg->length & 3 || sg->length < 512) {
244 host->do_dma = 0; 244 host->do_dma = 0;
245 return 0; 245 return 0;
246 } 246 }
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 80d1e6d4b0ae..206fe499ded5 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -43,7 +43,6 @@
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/pinctrl/consumer.h> 44#include <linux/pinctrl/consumer.h>
45#include <linux/stmp_device.h> 45#include <linux/stmp_device.h>
46#include <linux/mmc/mxs-mmc.h>
47#include <linux/spi/mxs-spi.h> 46#include <linux/spi/mxs-spi.h>
48 47
49#define DRIVER_NAME "mxs-mmc" 48#define DRIVER_NAME "mxs-mmc"
@@ -593,13 +592,13 @@ static int mxs_mmc_probe(struct platform_device *pdev)
593 struct mxs_mmc_host *host; 592 struct mxs_mmc_host *host;
594 struct mmc_host *mmc; 593 struct mmc_host *mmc;
595 struct resource *iores, *dmares; 594 struct resource *iores, *dmares;
596 struct mxs_mmc_platform_data *pdata;
597 struct pinctrl *pinctrl; 595 struct pinctrl *pinctrl;
598 int ret = 0, irq_err, irq_dma; 596 int ret = 0, irq_err, irq_dma;
599 dma_cap_mask_t mask; 597 dma_cap_mask_t mask;
600 struct regulator *reg_vmmc; 598 struct regulator *reg_vmmc;
601 enum of_gpio_flags flags; 599 enum of_gpio_flags flags;
602 struct mxs_ssp *ssp; 600 struct mxs_ssp *ssp;
601 u32 bus_width = 0;
603 602
604 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 603 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
605 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); 604 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
@@ -682,25 +681,15 @@ static int mxs_mmc_probe(struct platform_device *pdev)
682 mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | 681 mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
683 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL; 682 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
684 683
685 pdata = mmc_dev(host->mmc)->platform_data; 684 of_property_read_u32(np, "bus-width", &bus_width);
686 if (!pdata) { 685 if (bus_width == 4)
687 u32 bus_width = 0; 686 mmc->caps |= MMC_CAP_4_BIT_DATA;
688 of_property_read_u32(np, "bus-width", &bus_width); 687 else if (bus_width == 8)
689 if (bus_width == 4) 688 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
690 mmc->caps |= MMC_CAP_4_BIT_DATA; 689 host->wp_gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, &flags);
691 else if (bus_width == 8) 690
692 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; 691 if (flags & OF_GPIO_ACTIVE_LOW)
693 host->wp_gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, 692 host->wp_inverted = 1;
694 &flags);
695 if (flags & OF_GPIO_ACTIVE_LOW)
696 host->wp_inverted = 1;
697 } else {
698 if (pdata->flags & SLOTF_8_BIT_CAPABLE)
699 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
700 if (pdata->flags & SLOTF_4_BIT_CAPABLE)
701 mmc->caps |= MMC_CAP_4_BIT_DATA;
702 host->wp_gpio = pdata->wp_gpio;
703 }
704 693
705 mmc->f_min = 400000; 694 mmc->f_min = 400000;
706 mmc->f_max = 288000000; 695 mmc->f_max = 288000000;
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index fedd258cc4ea..d0a912fbad3b 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -37,6 +37,7 @@
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/gpio.h> 38#include <linux/gpio.h>
39#include <linux/regulator/consumer.h> 39#include <linux/regulator/consumer.h>
40#include <linux/pinctrl/consumer.h>
40#include <linux/pm_runtime.h> 41#include <linux/pm_runtime.h>
41#include <mach/hardware.h> 42#include <mach/hardware.h>
42#include <plat/mmc.h> 43#include <plat/mmc.h>
@@ -62,6 +63,7 @@
62 63
63#define VS18 (1 << 26) 64#define VS18 (1 << 26)
64#define VS30 (1 << 25) 65#define VS30 (1 << 25)
66#define HSS (1 << 21)
65#define SDVS18 (0x5 << 9) 67#define SDVS18 (0x5 << 9)
66#define SDVS30 (0x6 << 9) 68#define SDVS30 (0x6 << 9)
67#define SDVS33 (0x7 << 9) 69#define SDVS33 (0x7 << 9)
@@ -78,28 +80,17 @@
78#define CLKD_SHIFT 6 80#define CLKD_SHIFT 6
79#define DTO_MASK 0x000F0000 81#define DTO_MASK 0x000F0000
80#define DTO_SHIFT 16 82#define DTO_SHIFT 16
81#define INT_EN_MASK 0x307F0033
82#define BWR_ENABLE (1 << 4)
83#define BRR_ENABLE (1 << 5)
84#define DTO_ENABLE (1 << 20)
85#define INIT_STREAM (1 << 1) 83#define INIT_STREAM (1 << 1)
86#define DP_SELECT (1 << 21) 84#define DP_SELECT (1 << 21)
87#define DDIR (1 << 4) 85#define DDIR (1 << 4)
88#define DMA_EN 0x1 86#define DMAE 0x1
89#define MSBS (1 << 5) 87#define MSBS (1 << 5)
90#define BCE (1 << 1) 88#define BCE (1 << 1)
91#define FOUR_BIT (1 << 1) 89#define FOUR_BIT (1 << 1)
90#define HSPE (1 << 2)
92#define DDR (1 << 19) 91#define DDR (1 << 19)
93#define DW8 (1 << 5) 92#define DW8 (1 << 5)
94#define CC 0x1
95#define TC 0x02
96#define OD 0x1 93#define OD 0x1
97#define ERR (1 << 15)
98#define CMD_TIMEOUT (1 << 16)
99#define DATA_TIMEOUT (1 << 20)
100#define CMD_CRC (1 << 17)
101#define DATA_CRC (1 << 21)
102#define CARD_ERR (1 << 28)
103#define STAT_CLEAR 0xFFFFFFFF 94#define STAT_CLEAR 0xFFFFFFFF
104#define INIT_STREAM_CMD 0x00000000 95#define INIT_STREAM_CMD 0x00000000
105#define DUAL_VOLT_OCR_BIT 7 96#define DUAL_VOLT_OCR_BIT 7
@@ -108,6 +99,26 @@
108#define SOFTRESET (1 << 1) 99#define SOFTRESET (1 << 1)
109#define RESETDONE (1 << 0) 100#define RESETDONE (1 << 0)
110 101
102/* Interrupt masks for IE and ISE register */
103#define CC_EN (1 << 0)
104#define TC_EN (1 << 1)
105#define BWR_EN (1 << 4)
106#define BRR_EN (1 << 5)
107#define ERR_EN (1 << 15)
108#define CTO_EN (1 << 16)
109#define CCRC_EN (1 << 17)
110#define CEB_EN (1 << 18)
111#define CIE_EN (1 << 19)
112#define DTO_EN (1 << 20)
113#define DCRC_EN (1 << 21)
114#define DEB_EN (1 << 22)
115#define CERR_EN (1 << 28)
116#define BADA_EN (1 << 29)
117
118#define INT_EN_MASK (BADA_EN | CERR_EN | DEB_EN | DCRC_EN |\
119 DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \
120 BRR_EN | BWR_EN | TC_EN | CC_EN)
121
111#define MMC_AUTOSUSPEND_DELAY 100 122#define MMC_AUTOSUSPEND_DELAY 100
112#define MMC_TIMEOUT_MS 20 123#define MMC_TIMEOUT_MS 20
113#define OMAP_MMC_MIN_CLOCK 400000 124#define OMAP_MMC_MIN_CLOCK 400000
@@ -302,7 +313,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
302 313
303 reg = regulator_get(host->dev, "vmmc"); 314 reg = regulator_get(host->dev, "vmmc");
304 if (IS_ERR(reg)) { 315 if (IS_ERR(reg)) {
305 dev_dbg(host->dev, "vmmc regulator missing\n"); 316 dev_err(host->dev, "vmmc regulator missing\n");
306 return PTR_ERR(reg); 317 return PTR_ERR(reg);
307 } else { 318 } else {
308 mmc_slot(host).set_power = omap_hsmmc_set_power; 319 mmc_slot(host).set_power = omap_hsmmc_set_power;
@@ -455,13 +466,13 @@ static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
455 unsigned int irq_mask; 466 unsigned int irq_mask;
456 467
457 if (host->use_dma) 468 if (host->use_dma)
458 irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 469 irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
459 else 470 else
460 irq_mask = INT_EN_MASK; 471 irq_mask = INT_EN_MASK;
461 472
462 /* Disable timeout for erases */ 473 /* Disable timeout for erases */
463 if (cmd->opcode == MMC_ERASE) 474 if (cmd->opcode == MMC_ERASE)
464 irq_mask &= ~DTO_ENABLE; 475 irq_mask &= ~DTO_EN;
465 476
466 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 477 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
467 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 478 OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
@@ -494,6 +505,7 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
494 struct mmc_ios *ios = &host->mmc->ios; 505 struct mmc_ios *ios = &host->mmc->ios;
495 unsigned long regval; 506 unsigned long regval;
496 unsigned long timeout; 507 unsigned long timeout;
508 unsigned long clkdiv;
497 509
498 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); 510 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock);
499 511
@@ -501,7 +513,8 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
501 513
502 regval = OMAP_HSMMC_READ(host->base, SYSCTL); 514 regval = OMAP_HSMMC_READ(host->base, SYSCTL);
503 regval = regval & ~(CLKD_MASK | DTO_MASK); 515 regval = regval & ~(CLKD_MASK | DTO_MASK);
504 regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16); 516 clkdiv = calc_divisor(host, ios);
517 regval = regval | (clkdiv << 6) | (DTO << 16);
505 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 518 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval);
506 OMAP_HSMMC_WRITE(host->base, SYSCTL, 519 OMAP_HSMMC_WRITE(host->base, SYSCTL,
507 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 520 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
@@ -512,6 +525,27 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
512 && time_before(jiffies, timeout)) 525 && time_before(jiffies, timeout))
513 cpu_relax(); 526 cpu_relax();
514 527
528 /*
529 * Enable High-Speed Support
530 * Pre-Requisites
531 * - Controller should support High-Speed-Enable Bit
532 * - Controller should not be using DDR Mode
533 * - Controller should advertise that it supports High Speed
534 * in capabilities register
535 * - MMC/SD clock coming out of controller > 25MHz
536 */
537 if ((mmc_slot(host).features & HSMMC_HAS_HSPE_SUPPORT) &&
538 (ios->timing != MMC_TIMING_UHS_DDR50) &&
539 ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
540 regval = OMAP_HSMMC_READ(host->base, HCTL);
541 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
542 regval |= HSPE;
543 else
544 regval &= ~HSPE;
545
546 OMAP_HSMMC_WRITE(host->base, HCTL, regval);
547 }
548
515 omap_hsmmc_start_clock(host); 549 omap_hsmmc_start_clock(host);
516} 550}
517 551
@@ -676,8 +710,8 @@ static void send_init_stream(struct omap_hsmmc_host *host)
676 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 710 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
677 711
678 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 712 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
679 while ((reg != CC) && time_before(jiffies, timeout)) 713 while ((reg != CC_EN) && time_before(jiffies, timeout))
680 reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 714 reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN;
681 715
682 OMAP_HSMMC_WRITE(host->base, CON, 716 OMAP_HSMMC_WRITE(host->base, CON,
683 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 717 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM);
@@ -768,7 +802,7 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
768 } 802 }
769 803
770 if (host->use_dma) 804 if (host->use_dma)
771 cmdreg |= DMA_EN; 805 cmdreg |= DMAE;
772 806
773 host->req_in_progress = 1; 807 host->req_in_progress = 1;
774 808
@@ -968,16 +1002,20 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
968 __func__); 1002 __func__);
969} 1003}
970 1004
971static void hsmmc_command_incomplete(struct omap_hsmmc_host *host, int err) 1005static void hsmmc_command_incomplete(struct omap_hsmmc_host *host,
1006 int err, int end_cmd)
972{ 1007{
973 omap_hsmmc_reset_controller_fsm(host, SRC); 1008 if (end_cmd) {
974 host->cmd->error = err; 1009 omap_hsmmc_reset_controller_fsm(host, SRC);
1010 if (host->cmd)
1011 host->cmd->error = err;
1012 }
975 1013
976 if (host->data) { 1014 if (host->data) {
977 omap_hsmmc_reset_controller_fsm(host, SRD); 1015 omap_hsmmc_reset_controller_fsm(host, SRD);
978 omap_hsmmc_dma_cleanup(host, err); 1016 omap_hsmmc_dma_cleanup(host, err);
979 } 1017 } else if (host->mrq && host->mrq->cmd)
980 1018 host->mrq->cmd->error = err;
981} 1019}
982 1020
983static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 1021static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)
@@ -988,23 +1026,25 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status)
988 data = host->data; 1026 data = host->data;
989 dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 1027 dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status);
990 1028
991 if (status & ERR) { 1029 if (status & ERR_EN) {
992 omap_hsmmc_dbg_report_irq(host, status); 1030 omap_hsmmc_dbg_report_irq(host, status);
993 if (status & (CMD_TIMEOUT | DATA_TIMEOUT))
994 hsmmc_command_incomplete(host, -ETIMEDOUT);
995 else if (status & (CMD_CRC | DATA_CRC))
996 hsmmc_command_incomplete(host, -EILSEQ);
997 1031
998 end_cmd = 1; 1032 if (status & (CTO_EN | CCRC_EN))
1033 end_cmd = 1;
1034 if (status & (CTO_EN | DTO_EN))
1035 hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd);
1036 else if (status & (CCRC_EN | DCRC_EN))
1037 hsmmc_command_incomplete(host, -EILSEQ, end_cmd);
1038
999 if (host->data || host->response_busy) { 1039 if (host->data || host->response_busy) {
1000 end_trans = 1; 1040 end_trans = !end_cmd;
1001 host->response_busy = 0; 1041 host->response_busy = 0;
1002 } 1042 }
1003 } 1043 }
1004 1044
1005 if (end_cmd || ((status & CC) && host->cmd)) 1045 if (end_cmd || ((status & CC_EN) && host->cmd))
1006 omap_hsmmc_cmd_done(host, host->cmd); 1046 omap_hsmmc_cmd_done(host, host->cmd);
1007 if ((end_trans || (status & TC)) && host->mrq) 1047 if ((end_trans || (status & TC_EN)) && host->mrq)
1008 omap_hsmmc_xfer_done(host, data); 1048 omap_hsmmc_xfer_done(host, data);
1009} 1049}
1010 1050
@@ -1101,7 +1141,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)
1101 1141
1102 return 0; 1142 return 0;
1103err: 1143err:
1104 dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1144 dev_err(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
1105 return ret; 1145 return ret;
1106} 1146}
1107 1147
@@ -1360,7 +1400,7 @@ omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req)
1360 if (host->use_dma) { 1400 if (host->use_dma) {
1361 ret = omap_hsmmc_start_dma_transfer(host, req); 1401 ret = omap_hsmmc_start_dma_transfer(host, req);
1362 if (ret != 0) { 1402 if (ret != 0) {
1363 dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1403 dev_err(mmc_dev(host->mmc), "MMC start dma failure\n");
1364 return ret; 1404 return ret;
1365 } 1405 }
1366 } 1406 }
@@ -1678,7 +1718,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
1678{ 1718{
1679 struct omap_mmc_platform_data *pdata; 1719 struct omap_mmc_platform_data *pdata;
1680 struct device_node *np = dev->of_node; 1720 struct device_node *np = dev->of_node;
1681 u32 bus_width; 1721 u32 bus_width, max_freq;
1682 1722
1683 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 1723 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1684 if (!pdata) 1724 if (!pdata)
@@ -1705,6 +1745,12 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
1705 if (of_find_property(np, "ti,needs-special-reset", NULL)) 1745 if (of_find_property(np, "ti,needs-special-reset", NULL))
1706 pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET; 1746 pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET;
1707 1747
1748 if (!of_property_read_u32(np, "max-frequency", &max_freq))
1749 pdata->max_freq = max_freq;
1750
1751 if (of_find_property(np, "ti,needs-special-hs-handling", NULL))
1752 pdata->slots[0].features |= HSMMC_HAS_HSPE_SUPPORT;
1753
1708 return pdata; 1754 return pdata;
1709} 1755}
1710#else 1756#else
@@ -1725,6 +1771,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
1725 const struct of_device_id *match; 1771 const struct of_device_id *match;
1726 dma_cap_mask_t mask; 1772 dma_cap_mask_t mask;
1727 unsigned tx_req, rx_req; 1773 unsigned tx_req, rx_req;
1774 struct pinctrl *pinctrl;
1728 1775
1729 match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); 1776 match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
1730 if (match) { 1777 if (match) {
@@ -1821,7 +1868,6 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
1821 * MMC can still work without debounce clock. 1868 * MMC can still work without debounce clock.
1822 */ 1869 */
1823 if (IS_ERR(host->dbclk)) { 1870 if (IS_ERR(host->dbclk)) {
1824 dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n");
1825 host->dbclk = NULL; 1871 host->dbclk = NULL;
1826 } else if (clk_prepare_enable(host->dbclk) != 0) { 1872 } else if (clk_prepare_enable(host->dbclk) != 0) {
1827 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); 1873 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n");
@@ -1889,13 +1935,13 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
1889 ret = request_irq(host->irq, omap_hsmmc_irq, 0, 1935 ret = request_irq(host->irq, omap_hsmmc_irq, 0,
1890 mmc_hostname(mmc), host); 1936 mmc_hostname(mmc), host);
1891 if (ret) { 1937 if (ret) {
1892 dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1938 dev_err(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
1893 goto err_irq; 1939 goto err_irq;
1894 } 1940 }
1895 1941
1896 if (pdata->init != NULL) { 1942 if (pdata->init != NULL) {
1897 if (pdata->init(&pdev->dev) != 0) { 1943 if (pdata->init(&pdev->dev) != 0) {
1898 dev_dbg(mmc_dev(host->mmc), 1944 dev_err(mmc_dev(host->mmc),
1899 "Unable to configure MMC IRQs\n"); 1945 "Unable to configure MMC IRQs\n");
1900 goto err_irq_cd_init; 1946 goto err_irq_cd_init;
1901 } 1947 }
@@ -1918,7 +1964,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
1918 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1964 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1919 mmc_hostname(mmc), host); 1965 mmc_hostname(mmc), host);
1920 if (ret) { 1966 if (ret) {
1921 dev_dbg(mmc_dev(host->mmc), 1967 dev_err(mmc_dev(host->mmc),
1922 "Unable to grab MMC CD IRQ\n"); 1968 "Unable to grab MMC CD IRQ\n");
1923 goto err_irq_cd; 1969 goto err_irq_cd;
1924 } 1970 }
@@ -1928,6 +1974,11 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
1928 1974
1929 omap_hsmmc_disable_irq(host); 1975 omap_hsmmc_disable_irq(host);
1930 1976
1977 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1978 if (IS_ERR(pinctrl))
1979 dev_warn(&pdev->dev,
1980 "pins are not configured from the driver\n");
1981
1931 omap_hsmmc_protect_card(host); 1982 omap_hsmmc_protect_card(host);
1932 1983
1933 mmc_add_host(mmc); 1984 mmc_add_host(mmc);
@@ -2027,6 +2078,25 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev)
2027} 2078}
2028 2079
2029#ifdef CONFIG_PM 2080#ifdef CONFIG_PM
2081static int omap_hsmmc_prepare(struct device *dev)
2082{
2083 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2084
2085 if (host->pdata->suspend)
2086 return host->pdata->suspend(dev, host->slot_id);
2087
2088 return 0;
2089}
2090
2091static void omap_hsmmc_complete(struct device *dev)
2092{
2093 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2094
2095 if (host->pdata->resume)
2096 host->pdata->resume(dev, host->slot_id);
2097
2098}
2099
2030static int omap_hsmmc_suspend(struct device *dev) 2100static int omap_hsmmc_suspend(struct device *dev)
2031{ 2101{
2032 int ret = 0; 2102 int ret = 0;
@@ -2040,23 +2110,10 @@ static int omap_hsmmc_suspend(struct device *dev)
2040 2110
2041 pm_runtime_get_sync(host->dev); 2111 pm_runtime_get_sync(host->dev);
2042 host->suspended = 1; 2112 host->suspended = 1;
2043 if (host->pdata->suspend) {
2044 ret = host->pdata->suspend(dev, host->slot_id);
2045 if (ret) {
2046 dev_dbg(dev, "Unable to handle MMC board"
2047 " level suspend\n");
2048 host->suspended = 0;
2049 return ret;
2050 }
2051 }
2052 ret = mmc_suspend_host(host->mmc); 2113 ret = mmc_suspend_host(host->mmc);
2053 2114
2054 if (ret) { 2115 if (ret) {
2055 host->suspended = 0; 2116 host->suspended = 0;
2056 if (host->pdata->resume) {
2057 if (host->pdata->resume(dev, host->slot_id))
2058 dev_dbg(dev, "Unmask interrupt failed\n");
2059 }
2060 goto err; 2117 goto err;
2061 } 2118 }
2062 2119
@@ -2093,12 +2150,6 @@ static int omap_hsmmc_resume(struct device *dev)
2093 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 2150 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER))
2094 omap_hsmmc_conf_bus_power(host); 2151 omap_hsmmc_conf_bus_power(host);
2095 2152
2096 if (host->pdata->resume) {
2097 ret = host->pdata->resume(dev, host->slot_id);
2098 if (ret)
2099 dev_dbg(dev, "Unmask interrupt failed\n");
2100 }
2101
2102 omap_hsmmc_protect_card(host); 2153 omap_hsmmc_protect_card(host);
2103 2154
2104 /* Notify the core to resume the host */ 2155 /* Notify the core to resume the host */
@@ -2114,8 +2165,10 @@ static int omap_hsmmc_resume(struct device *dev)
2114} 2165}
2115 2166
2116#else 2167#else
2168#define omap_hsmmc_prepare NULL
2169#define omap_hsmmc_complete NULL
2117#define omap_hsmmc_suspend NULL 2170#define omap_hsmmc_suspend NULL
2118#define omap_hsmmc_resume NULL 2171#define omap_hsmmc_resume NULL
2119#endif 2172#endif
2120 2173
2121static int omap_hsmmc_runtime_suspend(struct device *dev) 2174static int omap_hsmmc_runtime_suspend(struct device *dev)
@@ -2143,6 +2196,8 @@ static int omap_hsmmc_runtime_resume(struct device *dev)
2143static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 2196static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
2144 .suspend = omap_hsmmc_suspend, 2197 .suspend = omap_hsmmc_suspend,
2145 .resume = omap_hsmmc_resume, 2198 .resume = omap_hsmmc_resume,
2199 .prepare = omap_hsmmc_prepare,
2200 .complete = omap_hsmmc_complete,
2146 .runtime_suspend = omap_hsmmc_runtime_suspend, 2201 .runtime_suspend = omap_hsmmc_runtime_suspend,
2147 .runtime_resume = omap_hsmmc_runtime_resume, 2202 .runtime_resume = omap_hsmmc_runtime_resume,
2148}; 2203};
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c
index 8fd50a211037..e6214480bc98 100644
--- a/drivers/mmc/host/sdhci-dove.c
+++ b/drivers/mmc/host/sdhci-dove.c
@@ -19,20 +19,30 @@
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22#include <linux/err.h>
23#include <linux/io.h>
24#include <linux/clk.h> 22#include <linux/clk.h>
25#include <linux/err.h> 23#include <linux/err.h>
26#include <linux/module.h> 24#include <linux/gpio.h>
25#include <linux/io.h>
27#include <linux/mmc/host.h> 26#include <linux/mmc/host.h>
27#include <linux/module.h>
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_gpio.h>
29 30
30#include "sdhci-pltfm.h" 31#include "sdhci-pltfm.h"
31 32
32struct sdhci_dove_priv { 33struct sdhci_dove_priv {
33 struct clk *clk; 34 struct clk *clk;
35 int gpio_cd;
34}; 36};
35 37
38static irqreturn_t sdhci_dove_carddetect_irq(int irq, void *data)
39{
40 struct sdhci_host *host = data;
41
42 tasklet_schedule(&host->card_tasklet);
43 return IRQ_HANDLED;
44}
45
36static u16 sdhci_dove_readw(struct sdhci_host *host, int reg) 46static u16 sdhci_dove_readw(struct sdhci_host *host, int reg)
37{ 47{
38 u16 ret; 48 u16 ret;
@@ -50,16 +60,25 @@ static u16 sdhci_dove_readw(struct sdhci_host *host, int reg)
50 60
51static u32 sdhci_dove_readl(struct sdhci_host *host, int reg) 61static u32 sdhci_dove_readl(struct sdhci_host *host, int reg)
52{ 62{
63 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
64 struct sdhci_dove_priv *priv = pltfm_host->priv;
53 u32 ret; 65 u32 ret;
54 66
67 ret = readl(host->ioaddr + reg);
68
55 switch (reg) { 69 switch (reg) {
56 case SDHCI_CAPABILITIES: 70 case SDHCI_CAPABILITIES:
57 ret = readl(host->ioaddr + reg);
58 /* Mask the support for 3.0V */ 71 /* Mask the support for 3.0V */
59 ret &= ~SDHCI_CAN_VDD_300; 72 ret &= ~SDHCI_CAN_VDD_300;
60 break; 73 break;
61 default: 74 case SDHCI_PRESENT_STATE:
62 ret = readl(host->ioaddr + reg); 75 if (gpio_is_valid(priv->gpio_cd)) {
76 if (gpio_get_value(priv->gpio_cd) == 0)
77 ret |= SDHCI_CARD_PRESENT;
78 else
79 ret &= ~SDHCI_CARD_PRESENT;
80 }
81 break;
63 } 82 }
64 return ret; 83 return ret;
65} 84}
@@ -92,25 +111,70 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev)
92 return -ENOMEM; 111 return -ENOMEM;
93 } 112 }
94 113
95 priv->clk = clk_get(&pdev->dev, NULL); 114 priv->clk = devm_clk_get(&pdev->dev, NULL);
96 if (!IS_ERR(priv->clk))
97 clk_prepare_enable(priv->clk);
98 115
99 ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); 116 if (pdev->dev.of_node) {
100 if (ret) 117 priv->gpio_cd = of_get_named_gpio(pdev->dev.of_node,
101 goto sdhci_dove_register_fail; 118 "cd-gpios", 0);
119 } else {
120 priv->gpio_cd = -EINVAL;
121 }
122
123 if (gpio_is_valid(priv->gpio_cd)) {
124 ret = gpio_request(priv->gpio_cd, "sdhci-cd");
125 if (ret) {
126 dev_err(&pdev->dev, "card detect gpio request failed: %d\n",
127 ret);
128 return ret;
129 }
130 gpio_direction_input(priv->gpio_cd);
131 }
132
133 host = sdhci_pltfm_init(pdev, &sdhci_dove_pdata);
134 if (IS_ERR(host)) {
135 ret = PTR_ERR(host);
136 goto err_sdhci_pltfm_init;
137 }
102 138
103 host = platform_get_drvdata(pdev);
104 pltfm_host = sdhci_priv(host); 139 pltfm_host = sdhci_priv(host);
105 pltfm_host->priv = priv; 140 pltfm_host->priv = priv;
106 141
142 if (!IS_ERR(priv->clk))
143 clk_prepare_enable(priv->clk);
144
145 sdhci_get_of_property(pdev);
146
147 ret = sdhci_add_host(host);
148 if (ret)
149 goto err_sdhci_add;
150
151 /*
152 * We must request the IRQ after sdhci_add_host(), as the tasklet only
153 * gets setup in sdhci_add_host() and we oops.
154 */
155 if (gpio_is_valid(priv->gpio_cd)) {
156 ret = request_irq(gpio_to_irq(priv->gpio_cd),
157 sdhci_dove_carddetect_irq,
158 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
159 mmc_hostname(host->mmc), host);
160 if (ret) {
161 dev_err(&pdev->dev, "card detect irq request failed: %d\n",
162 ret);
163 goto err_request_irq;
164 }
165 }
166
107 return 0; 167 return 0;
108 168
109sdhci_dove_register_fail: 169err_request_irq:
110 if (!IS_ERR(priv->clk)) { 170 sdhci_remove_host(host, 0);
171err_sdhci_add:
172 if (!IS_ERR(priv->clk))
111 clk_disable_unprepare(priv->clk); 173 clk_disable_unprepare(priv->clk);
112 clk_put(priv->clk); 174 sdhci_pltfm_free(pdev);
113 } 175err_sdhci_pltfm_init:
176 if (gpio_is_valid(priv->gpio_cd))
177 gpio_free(priv->gpio_cd);
114 return ret; 178 return ret;
115} 179}
116 180
@@ -122,10 +186,14 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev)
122 186
123 sdhci_pltfm_unregister(pdev); 187 sdhci_pltfm_unregister(pdev);
124 188
125 if (!IS_ERR(priv->clk)) { 189 if (gpio_is_valid(priv->gpio_cd)) {
126 clk_disable_unprepare(priv->clk); 190 free_irq(gpio_to_irq(priv->gpio_cd), host);
127 clk_put(priv->clk); 191 gpio_free(priv->gpio_cd);
128 } 192 }
193
194 if (!IS_ERR(priv->clk))
195 clk_disable_unprepare(priv->clk);
196
129 return 0; 197 return 0;
130} 198}
131 199
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index effc2acfe778..1849461c39ee 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -456,10 +456,10 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
456 456
457 pltfm_host = sdhci_priv(host); 457 pltfm_host = sdhci_priv(host);
458 458
459 imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL); 459 imx_data = devm_kzalloc(&pdev->dev, sizeof(*imx_data), GFP_KERNEL);
460 if (!imx_data) { 460 if (!imx_data) {
461 err = -ENOMEM; 461 err = -ENOMEM;
462 goto err_imx_data; 462 goto free_sdhci;
463 } 463 }
464 464
465 if (of_id) 465 if (of_id)
@@ -470,19 +470,19 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
470 imx_data->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 470 imx_data->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
471 if (IS_ERR(imx_data->clk_ipg)) { 471 if (IS_ERR(imx_data->clk_ipg)) {
472 err = PTR_ERR(imx_data->clk_ipg); 472 err = PTR_ERR(imx_data->clk_ipg);
473 goto err_clk_get; 473 goto free_sdhci;
474 } 474 }
475 475
476 imx_data->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); 476 imx_data->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
477 if (IS_ERR(imx_data->clk_ahb)) { 477 if (IS_ERR(imx_data->clk_ahb)) {
478 err = PTR_ERR(imx_data->clk_ahb); 478 err = PTR_ERR(imx_data->clk_ahb);
479 goto err_clk_get; 479 goto free_sdhci;
480 } 480 }
481 481
482 imx_data->clk_per = devm_clk_get(&pdev->dev, "per"); 482 imx_data->clk_per = devm_clk_get(&pdev->dev, "per");
483 if (IS_ERR(imx_data->clk_per)) { 483 if (IS_ERR(imx_data->clk_per)) {
484 err = PTR_ERR(imx_data->clk_per); 484 err = PTR_ERR(imx_data->clk_per);
485 goto err_clk_get; 485 goto free_sdhci;
486 } 486 }
487 487
488 pltfm_host->clk = imx_data->clk_per; 488 pltfm_host->clk = imx_data->clk_per;
@@ -494,7 +494,7 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
494 imx_data->pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 494 imx_data->pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
495 if (IS_ERR(imx_data->pinctrl)) { 495 if (IS_ERR(imx_data->pinctrl)) {
496 err = PTR_ERR(imx_data->pinctrl); 496 err = PTR_ERR(imx_data->pinctrl);
497 goto pin_err; 497 goto disable_clk;
498 } 498 }
499 499
500 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; 500 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
@@ -519,7 +519,7 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
519 if (!host->mmc->parent->platform_data) { 519 if (!host->mmc->parent->platform_data) {
520 dev_err(mmc_dev(host->mmc), "no board data!\n"); 520 dev_err(mmc_dev(host->mmc), "no board data!\n");
521 err = -EINVAL; 521 err = -EINVAL;
522 goto no_board_data; 522 goto disable_clk;
523 } 523 }
524 imx_data->boarddata = *((struct esdhc_platform_data *) 524 imx_data->boarddata = *((struct esdhc_platform_data *)
525 host->mmc->parent->platform_data); 525 host->mmc->parent->platform_data);
@@ -527,7 +527,8 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
527 527
528 /* write_protect */ 528 /* write_protect */
529 if (boarddata->wp_type == ESDHC_WP_GPIO) { 529 if (boarddata->wp_type == ESDHC_WP_GPIO) {
530 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); 530 err = devm_gpio_request_one(&pdev->dev, boarddata->wp_gpio,
531 GPIOF_IN, "ESDHC_WP");
531 if (err) { 532 if (err) {
532 dev_warn(mmc_dev(host->mmc), 533 dev_warn(mmc_dev(host->mmc),
533 "no write-protect pin available!\n"); 534 "no write-protect pin available!\n");
@@ -543,19 +544,21 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
543 544
544 switch (boarddata->cd_type) { 545 switch (boarddata->cd_type) {
545 case ESDHC_CD_GPIO: 546 case ESDHC_CD_GPIO:
546 err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD"); 547 err = devm_gpio_request_one(&pdev->dev, boarddata->cd_gpio,
548 GPIOF_IN, "ESDHC_CD");
547 if (err) { 549 if (err) {
548 dev_err(mmc_dev(host->mmc), 550 dev_err(mmc_dev(host->mmc),
549 "no card-detect pin available!\n"); 551 "no card-detect pin available!\n");
550 goto no_card_detect_pin; 552 goto disable_clk;
551 } 553 }
552 554
553 err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq, 555 err = devm_request_irq(&pdev->dev,
556 gpio_to_irq(boarddata->cd_gpio), cd_irq,
554 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 557 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
555 mmc_hostname(host->mmc), host); 558 mmc_hostname(host->mmc), host);
556 if (err) { 559 if (err) {
557 dev_err(mmc_dev(host->mmc), "request irq error\n"); 560 dev_err(mmc_dev(host->mmc), "request irq error\n");
558 goto no_card_detect_irq; 561 goto disable_clk;
559 } 562 }
560 /* fall through */ 563 /* fall through */
561 564
@@ -574,27 +577,15 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
574 577
575 err = sdhci_add_host(host); 578 err = sdhci_add_host(host);
576 if (err) 579 if (err)
577 goto err_add_host; 580 goto disable_clk;
578 581
579 return 0; 582 return 0;
580 583
581err_add_host: 584disable_clk:
582 if (gpio_is_valid(boarddata->cd_gpio))
583 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
584no_card_detect_irq:
585 if (gpio_is_valid(boarddata->cd_gpio))
586 gpio_free(boarddata->cd_gpio);
587 if (gpio_is_valid(boarddata->wp_gpio))
588 gpio_free(boarddata->wp_gpio);
589no_card_detect_pin:
590no_board_data:
591pin_err:
592 clk_disable_unprepare(imx_data->clk_per); 585 clk_disable_unprepare(imx_data->clk_per);
593 clk_disable_unprepare(imx_data->clk_ipg); 586 clk_disable_unprepare(imx_data->clk_ipg);
594 clk_disable_unprepare(imx_data->clk_ahb); 587 clk_disable_unprepare(imx_data->clk_ahb);
595err_clk_get: 588free_sdhci:
596 kfree(imx_data);
597err_imx_data:
598 sdhci_pltfm_free(pdev); 589 sdhci_pltfm_free(pdev);
599 return err; 590 return err;
600} 591}
@@ -604,25 +595,14 @@ static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
604 struct sdhci_host *host = platform_get_drvdata(pdev); 595 struct sdhci_host *host = platform_get_drvdata(pdev);
605 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 596 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
606 struct pltfm_imx_data *imx_data = pltfm_host->priv; 597 struct pltfm_imx_data *imx_data = pltfm_host->priv;
607 struct esdhc_platform_data *boarddata = &imx_data->boarddata;
608 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); 598 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
609 599
610 sdhci_remove_host(host, dead); 600 sdhci_remove_host(host, dead);
611 601
612 if (gpio_is_valid(boarddata->wp_gpio))
613 gpio_free(boarddata->wp_gpio);
614
615 if (gpio_is_valid(boarddata->cd_gpio)) {
616 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
617 gpio_free(boarddata->cd_gpio);
618 }
619
620 clk_disable_unprepare(imx_data->clk_per); 602 clk_disable_unprepare(imx_data->clk_per);
621 clk_disable_unprepare(imx_data->clk_ipg); 603 clk_disable_unprepare(imx_data->clk_ipg);
622 clk_disable_unprepare(imx_data->clk_ahb); 604 clk_disable_unprepare(imx_data->clk_ahb);
623 605
624 kfree(imx_data);
625
626 sdhci_pltfm_free(pdev); 606 sdhci_pltfm_free(pdev);
627 607
628 return 0; 608 return 0;
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 63d219f57cae..60de2eeb39b1 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -22,6 +22,7 @@
22#include "sdhci-esdhc.h" 22#include "sdhci-esdhc.h"
23 23
24#define VENDOR_V_22 0x12 24#define VENDOR_V_22 0x12
25#define VENDOR_V_23 0x13
25static u32 esdhc_readl(struct sdhci_host *host, int reg) 26static u32 esdhc_readl(struct sdhci_host *host, int reg)
26{ 27{
27 u32 ret; 28 u32 ret;
@@ -85,6 +86,18 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
85 return ret; 86 return ret;
86} 87}
87 88
89static void esdhc_writel(struct sdhci_host *host, u32 val, int reg)
90{
91 /*
92 * Enable IRQSTATEN[BGESEN] is just to set IRQSTAT[BGE]
93 * when SYSCTL[RSTD]) is set for some special operations.
94 * No any impact other operation.
95 */
96 if (reg == SDHCI_INT_ENABLE)
97 val |= SDHCI_INT_BLK_GAP;
98 sdhci_be32bs_writel(host, val, reg);
99}
100
88static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) 101static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
89{ 102{
90 if (reg == SDHCI_BLOCK_SIZE) { 103 if (reg == SDHCI_BLOCK_SIZE) {
@@ -121,6 +134,41 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
121 sdhci_be32bs_writeb(host, val, reg); 134 sdhci_be32bs_writeb(host, val, reg);
122} 135}
123 136
137/*
138 * For Abort or Suspend after Stop at Block Gap, ignore the ADMA
139 * error(IRQSTAT[ADMAE]) if both Transfer Complete(IRQSTAT[TC])
140 * and Block Gap Event(IRQSTAT[BGE]) are also set.
141 * For Continue, apply soft reset for data(SYSCTL[RSTD]);
142 * and re-issue the entire read transaction from beginning.
143 */
144static void esdhci_of_adma_workaround(struct sdhci_host *host, u32 intmask)
145{
146 u32 tmp;
147 bool applicable;
148 dma_addr_t dmastart;
149 dma_addr_t dmanow;
150
151 tmp = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS);
152 tmp = (tmp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
153
154 applicable = (intmask & SDHCI_INT_DATA_END) &&
155 (intmask & SDHCI_INT_BLK_GAP) &&
156 (tmp == VENDOR_V_23);
157 if (!applicable)
158 return;
159
160 host->data->error = 0;
161 dmastart = sg_dma_address(host->data->sg);
162 dmanow = dmastart + host->data->bytes_xfered;
163 /*
164 * Force update to the next DMA block boundary.
165 */
166 dmanow = (dmanow & ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) +
167 SDHCI_DEFAULT_BOUNDARY_SIZE;
168 host->data->bytes_xfered = dmanow - dmastart;
169 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS);
170}
171
124static int esdhc_of_enable_dma(struct sdhci_host *host) 172static int esdhc_of_enable_dma(struct sdhci_host *host)
125{ 173{
126 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); 174 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
@@ -177,13 +225,16 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
177 vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; 225 vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
178 if (vvn == VENDOR_V_22) 226 if (vvn == VENDOR_V_22)
179 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23; 227 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
228
229 if (vvn > VENDOR_V_22)
230 host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
180} 231}
181 232
182static struct sdhci_ops sdhci_esdhc_ops = { 233static struct sdhci_ops sdhci_esdhc_ops = {
183 .read_l = esdhc_readl, 234 .read_l = esdhc_readl,
184 .read_w = esdhc_readw, 235 .read_w = esdhc_readw,
185 .read_b = esdhc_readb, 236 .read_b = esdhc_readb,
186 .write_l = sdhci_be32bs_writel, 237 .write_l = esdhc_writel,
187 .write_w = esdhc_writew, 238 .write_w = esdhc_writew,
188 .write_b = esdhc_writeb, 239 .write_b = esdhc_writeb,
189 .set_clock = esdhc_of_set_clock, 240 .set_clock = esdhc_of_set_clock,
@@ -195,6 +246,7 @@ static struct sdhci_ops sdhci_esdhc_ops = {
195 .platform_suspend = esdhc_of_suspend, 246 .platform_suspend = esdhc_of_suspend,
196 .platform_resume = esdhc_of_resume, 247 .platform_resume = esdhc_of_resume,
197#endif 248#endif
249 .adma_workaround = esdhci_of_adma_workaround,
198}; 250};
199 251
200static struct sdhci_pltfm_data sdhci_esdhc_pdata = { 252static struct sdhci_pltfm_data sdhci_esdhc_pdata = {
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 04936f353ced..0777fad997ba 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -114,6 +114,7 @@ static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
114 114
115 SDHCI_TIMEOUT_CLK_UNIT | 115 SDHCI_TIMEOUT_CLK_UNIT |
116 SDHCI_CAN_VDD_330 | 116 SDHCI_CAN_VDD_330 |
117 SDHCI_CAN_DO_HISPD |
117 SDHCI_CAN_DO_SDMA; 118 SDHCI_CAN_DO_SDMA;
118 return 0; 119 return 0;
119} 120}
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c
index 27164457f861..d4283ef5917a 100644
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -78,6 +78,9 @@ void sdhci_get_of_property(struct platform_device *pdev)
78 if (of_get_property(np, "broken-cd", NULL)) 78 if (of_get_property(np, "broken-cd", NULL))
79 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 79 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
80 80
81 if (of_get_property(np, "no-1-8-v", NULL))
82 host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
83
81 if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc")) 84 if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc"))
82 host->quirks |= SDHCI_QUIRK_BROKEN_DMA; 85 host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
83 86
@@ -89,6 +92,12 @@ void sdhci_get_of_property(struct platform_device *pdev)
89 clk = of_get_property(np, "clock-frequency", &size); 92 clk = of_get_property(np, "clock-frequency", &size);
90 if (clk && size == sizeof(*clk) && *clk) 93 if (clk && size == sizeof(*clk) && *clk)
91 pltfm_host->clock = be32_to_cpup(clk); 94 pltfm_host->clock = be32_to_cpup(clk);
95
96 if (of_find_property(np, "keep-power-in-suspend", NULL))
97 host->mmc->pm_caps |= MMC_PM_KEEP_POWER;
98
99 if (of_find_property(np, "enable-sdio-wakeup", NULL))
100 host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
92 } 101 }
93} 102}
94#else 103#else
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index e918a2bb3af1..60829c92bcfd 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -163,10 +163,18 @@ static int pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
163 return 0; 163 return 0;
164} 164}
165 165
166static u32 pxav3_get_max_clock(struct sdhci_host *host)
167{
168 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
169
170 return clk_get_rate(pltfm_host->clk);
171}
172
166static struct sdhci_ops pxav3_sdhci_ops = { 173static struct sdhci_ops pxav3_sdhci_ops = {
167 .platform_reset_exit = pxav3_set_private_registers, 174 .platform_reset_exit = pxav3_set_private_registers,
168 .set_uhs_signaling = pxav3_set_uhs_signaling, 175 .set_uhs_signaling = pxav3_set_uhs_signaling,
169 .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, 176 .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
177 .get_max_clock = pxav3_get_max_clock,
170}; 178};
171 179
172#ifdef CONFIG_OF 180#ifdef CONFIG_OF
@@ -249,7 +257,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
249 257
250 host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL 258 host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
251 | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC 259 | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
252 | SDHCI_QUIRK_32BIT_ADMA_SIZE; 260 | SDHCI_QUIRK_32BIT_ADMA_SIZE
261 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
253 262
254 /* enable 1/8V DDR capable */ 263 /* enable 1/8V DDR capable */
255 host->mmc->caps |= MMC_CAP_1_8V_DDR; 264 host->mmc->caps |= MMC_CAP_1_8V_DDR;
@@ -271,6 +280,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
271 280
272 if (pdata->quirks) 281 if (pdata->quirks)
273 host->quirks |= pdata->quirks; 282 host->quirks |= pdata->quirks;
283 if (pdata->quirks2)
284 host->quirks2 |= pdata->quirks2;
274 if (pdata->host_caps) 285 if (pdata->host_caps)
275 host->mmc->caps |= pdata->host_caps; 286 host->mmc->caps |= pdata->host_caps;
276 if (pdata->host_caps2) 287 if (pdata->host_caps2)
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index a54dd5d7a5f9..82b7a7ad4217 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -24,6 +24,7 @@
24#include <linux/of_gpio.h> 24#include <linux/of_gpio.h>
25#include <linux/pm.h> 25#include <linux/pm.h>
26#include <linux/pm_runtime.h> 26#include <linux/pm_runtime.h>
27#include <linux/pinctrl/consumer.h>
27 28
28#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
29 30
@@ -57,6 +58,7 @@ struct sdhci_s3c {
57 int ext_cd_irq; 58 int ext_cd_irq;
58 int ext_cd_gpio; 59 int ext_cd_gpio;
59 int *gpios; 60 int *gpios;
61 struct pinctrl *pctrl;
60 62
61 struct clk *clk_io; 63 struct clk *clk_io;
62 struct clk *clk_bus[MAX_BUS_CLK]; 64 struct clk *clk_bus[MAX_BUS_CLK];
@@ -373,18 +375,27 @@ static struct sdhci_ops sdhci_s3c_ops = {
373static void sdhci_s3c_notify_change(struct platform_device *dev, int state) 375static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
374{ 376{
375 struct sdhci_host *host = platform_get_drvdata(dev); 377 struct sdhci_host *host = platform_get_drvdata(dev);
378#ifdef CONFIG_PM_RUNTIME
379 struct sdhci_s3c *sc = sdhci_priv(host);
380#endif
376 unsigned long flags; 381 unsigned long flags;
377 382
378 if (host) { 383 if (host) {
379 spin_lock_irqsave(&host->lock, flags); 384 spin_lock_irqsave(&host->lock, flags);
380 if (state) { 385 if (state) {
381 dev_dbg(&dev->dev, "card inserted.\n"); 386 dev_dbg(&dev->dev, "card inserted.\n");
387#ifdef CONFIG_PM_RUNTIME
388 clk_prepare_enable(sc->clk_io);
389#endif
382 host->flags &= ~SDHCI_DEVICE_DEAD; 390 host->flags &= ~SDHCI_DEVICE_DEAD;
383 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 391 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
384 } else { 392 } else {
385 dev_dbg(&dev->dev, "card removed.\n"); 393 dev_dbg(&dev->dev, "card removed.\n");
386 host->flags |= SDHCI_DEVICE_DEAD; 394 host->flags |= SDHCI_DEVICE_DEAD;
387 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; 395 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
396#ifdef CONFIG_PM_RUNTIME
397 clk_disable_unprepare(sc->clk_io);
398#endif
388 } 399 }
389 tasklet_schedule(&host->card_tasklet); 400 tasklet_schedule(&host->card_tasklet);
390 spin_unlock_irqrestore(&host->lock, flags); 401 spin_unlock_irqrestore(&host->lock, flags);
@@ -406,7 +417,7 @@ static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
406 struct s3c_sdhci_platdata *pdata = sc->pdata; 417 struct s3c_sdhci_platdata *pdata = sc->pdata;
407 struct device *dev = &sc->pdev->dev; 418 struct device *dev = &sc->pdev->dev;
408 419
409 if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { 420 if (devm_gpio_request(dev, pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
410 sc->ext_cd_gpio = pdata->ext_cd_gpio; 421 sc->ext_cd_gpio = pdata->ext_cd_gpio;
411 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); 422 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
412 if (sc->ext_cd_irq && 423 if (sc->ext_cd_irq &&
@@ -449,12 +460,12 @@ static int __devinit sdhci_s3c_parse_dt(struct device *dev,
449 return -ENOMEM; 460 return -ENOMEM;
450 461
451 /* get the card detection method */ 462 /* get the card detection method */
452 if (of_get_property(node, "broken-cd", 0)) { 463 if (of_get_property(node, "broken-cd", NULL)) {
453 pdata->cd_type = S3C_SDHCI_CD_NONE; 464 pdata->cd_type = S3C_SDHCI_CD_NONE;
454 goto setup_bus; 465 goto setup_bus;
455 } 466 }
456 467
457 if (of_get_property(node, "non-removable", 0)) { 468 if (of_get_property(node, "non-removable", NULL)) {
458 pdata->cd_type = S3C_SDHCI_CD_PERMANENT; 469 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
459 goto setup_bus; 470 goto setup_bus;
460 } 471 }
@@ -477,8 +488,9 @@ static int __devinit sdhci_s3c_parse_dt(struct device *dev,
477 return -EINVAL; 488 return -EINVAL;
478 } 489 }
479 490
480 dev_info(dev, "assuming no card detect line available\n"); 491 /* assuming internal card detect that will be configured by pinctrl */
481 pdata->cd_type = S3C_SDHCI_CD_NONE; 492 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
493 goto setup_bus;
482 494
483 found_cd: 495 found_cd:
484 if (pdata->cd_type == S3C_SDHCI_CD_GPIO) { 496 if (pdata->cd_type == S3C_SDHCI_CD_GPIO) {
@@ -487,7 +499,7 @@ static int __devinit sdhci_s3c_parse_dt(struct device *dev,
487 if (of_get_property(node, "cd-inverted", NULL)) 499 if (of_get_property(node, "cd-inverted", NULL))
488 pdata->ext_cd_gpio_invert = 1; 500 pdata->ext_cd_gpio_invert = 1;
489 } else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { 501 } else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
490 ret = gpio_request(gpio, "sdhci-cd"); 502 ret = devm_gpio_request(dev, gpio, "sdhci-cd");
491 if (ret) { 503 if (ret) {
492 dev_err(dev, "card detect gpio request failed\n"); 504 dev_err(dev, "card detect gpio request failed\n");
493 return -EINVAL; 505 return -EINVAL;
@@ -496,33 +508,28 @@ static int __devinit sdhci_s3c_parse_dt(struct device *dev,
496 } 508 }
497 509
498 setup_bus: 510 setup_bus:
511 if (!IS_ERR(ourhost->pctrl))
512 return 0;
513
499 /* get the gpios for command, clock and data lines */ 514 /* get the gpios for command, clock and data lines */
500 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) { 515 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
501 gpio = of_get_gpio(node, cnt); 516 gpio = of_get_gpio(node, cnt);
502 if (!gpio_is_valid(gpio)) { 517 if (!gpio_is_valid(gpio)) {
503 dev_err(dev, "invalid gpio[%d]\n", cnt); 518 dev_err(dev, "invalid gpio[%d]\n", cnt);
504 goto err_free_dt_cd_gpio; 519 return -EINVAL;
505 } 520 }
506 ourhost->gpios[cnt] = gpio; 521 ourhost->gpios[cnt] = gpio;
507 } 522 }
508 523
509 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) { 524 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
510 ret = gpio_request(ourhost->gpios[cnt], "sdhci-gpio"); 525 ret = devm_gpio_request(dev, ourhost->gpios[cnt], "sdhci-gpio");
511 if (ret) { 526 if (ret) {
512 dev_err(dev, "gpio[%d] request failed\n", cnt); 527 dev_err(dev, "gpio[%d] request failed\n", cnt);
513 goto err_free_dt_gpios; 528 return -EINVAL;
514 } 529 }
515 } 530 }
516 531
517 return 0; 532 return 0;
518
519 err_free_dt_gpios:
520 while (--cnt >= 0)
521 gpio_free(ourhost->gpios[cnt]);
522 err_free_dt_cd_gpio:
523 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL)
524 gpio_free(ourhost->ext_cd_gpio);
525 return -EINVAL;
526} 533}
527#else 534#else
528static int __devinit sdhci_s3c_parse_dt(struct device *dev, 535static int __devinit sdhci_s3c_parse_dt(struct device *dev,
@@ -579,13 +586,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
579 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 586 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
580 if (!pdata) { 587 if (!pdata) {
581 ret = -ENOMEM; 588 ret = -ENOMEM;
582 goto err_pdata; 589 goto err_pdata_io_clk;
583 } 590 }
584 591
592 sc->pctrl = devm_pinctrl_get_select_default(&pdev->dev);
593
585 if (pdev->dev.of_node) { 594 if (pdev->dev.of_node) {
586 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata); 595 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
587 if (ret) 596 if (ret)
588 goto err_pdata; 597 goto err_pdata_io_clk;
589 } else { 598 } else {
590 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); 599 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
591 sc->ext_cd_gpio = -1; /* invalid gpio number */ 600 sc->ext_cd_gpio = -1; /* invalid gpio number */
@@ -603,7 +612,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
603 if (IS_ERR(sc->clk_io)) { 612 if (IS_ERR(sc->clk_io)) {
604 dev_err(dev, "failed to get io clock\n"); 613 dev_err(dev, "failed to get io clock\n");
605 ret = PTR_ERR(sc->clk_io); 614 ret = PTR_ERR(sc->clk_io);
606 goto err_io_clk; 615 goto err_pdata_io_clk;
607 } 616 }
608 617
609 /* enable the local io clock and keep it running for the moment. */ 618 /* enable the local io clock and keep it running for the moment. */
@@ -766,13 +775,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
766 clk_disable_unprepare(sc->clk_io); 775 clk_disable_unprepare(sc->clk_io);
767 clk_put(sc->clk_io); 776 clk_put(sc->clk_io);
768 777
769 err_io_clk: 778 err_pdata_io_clk:
770 for (ptr = 0; ptr < NUM_GPIOS(sc->pdata->max_width); ptr++)
771 gpio_free(sc->gpios[ptr]);
772 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL)
773 gpio_free(sc->ext_cd_gpio);
774
775 err_pdata:
776 sdhci_free_host(host); 779 sdhci_free_host(host);
777 780
778 return ret; 781 return ret;
@@ -791,9 +794,6 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
791 if (sc->ext_cd_irq) 794 if (sc->ext_cd_irq)
792 free_irq(sc->ext_cd_irq, sc); 795 free_irq(sc->ext_cd_irq, sc);
793 796
794 if (gpio_is_valid(sc->ext_cd_gpio))
795 gpio_free(sc->ext_cd_gpio);
796
797#ifdef CONFIG_PM_RUNTIME 797#ifdef CONFIG_PM_RUNTIME
798 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) 798 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
799 clk_prepare_enable(sc->clk_io); 799 clk_prepare_enable(sc->clk_io);
@@ -814,11 +814,6 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
814 clk_disable_unprepare(sc->clk_io); 814 clk_disable_unprepare(sc->clk_io);
815 clk_put(sc->clk_io); 815 clk_put(sc->clk_io);
816 816
817 if (pdev->dev.of_node) {
818 for (ptr = 0; ptr < NUM_GPIOS(sc->pdata->max_width); ptr++)
819 gpio_free(sc->gpios[ptr]);
820 }
821
822 sdhci_free_host(host); 817 sdhci_free_host(host);
823 platform_set_drvdata(pdev, NULL); 818 platform_set_drvdata(pdev, NULL);
824 819
diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c
index 6be89c032deb..87a700944b7d 100644
--- a/drivers/mmc/host/sdhci-spear.c
+++ b/drivers/mmc/host/sdhci-spear.c
@@ -146,6 +146,11 @@ static int __devinit sdhci_probe(struct platform_device *pdev)
146 goto put_clk; 146 goto put_clk;
147 } 147 }
148 148
149 ret = clk_set_rate(sdhci->clk, 50000000);
150 if (ret)
151 dev_dbg(&pdev->dev, "Error setting desired clk, clk=%lu\n",
152 clk_get_rate(sdhci->clk));
153
149 if (np) { 154 if (np) {
150 sdhci->data = sdhci_probe_config_dt(pdev); 155 sdhci->data = sdhci_probe_config_dt(pdev);
151 if (IS_ERR(sdhci->data)) { 156 if (IS_ERR(sdhci->data)) {
@@ -297,7 +302,7 @@ static int sdhci_suspend(struct device *dev)
297 302
298 ret = sdhci_suspend_host(host); 303 ret = sdhci_suspend_host(host);
299 if (!ret) 304 if (!ret)
300 clk_disable_unprepare(sdhci->clk); 305 clk_disable(sdhci->clk);
301 306
302 return ret; 307 return ret;
303} 308}
@@ -308,7 +313,7 @@ static int sdhci_resume(struct device *dev)
308 struct spear_sdhci *sdhci = dev_get_platdata(dev); 313 struct spear_sdhci *sdhci = dev_get_platdata(dev);
309 int ret; 314 int ret;
310 315
311 ret = clk_prepare_enable(sdhci->clk); 316 ret = clk_enable(sdhci->clk);
312 if (ret) { 317 if (ret) {
313 dev_dbg(dev, "Resume: Error enabling clock\n"); 318 dev_dbg(dev, "Resume: Error enabling clock\n");
314 return ret; 319 return ret;
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c7851c0aabce..6f0bfc0c8c9c 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1618,7 +1618,7 @@ static int sdhci_do_3_3v_signal_voltage_switch(struct sdhci_host *host,
1618 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1618 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
1619 1619
1620 if (host->vqmmc) { 1620 if (host->vqmmc) {
1621 ret = regulator_set_voltage(host->vqmmc, 3300000, 3300000); 1621 ret = regulator_set_voltage(host->vqmmc, 2700000, 3600000);
1622 if (ret) { 1622 if (ret) {
1623 pr_warning("%s: Switching to 3.3V signalling voltage " 1623 pr_warning("%s: Switching to 3.3V signalling voltage "
1624 " failed\n", mmc_hostname(host->mmc)); 1624 " failed\n", mmc_hostname(host->mmc));
@@ -1662,7 +1662,7 @@ static int sdhci_do_1_8v_signal_voltage_switch(struct sdhci_host *host,
1662 */ 1662 */
1663 if (host->vqmmc) 1663 if (host->vqmmc)
1664 ret = regulator_set_voltage(host->vqmmc, 1664 ret = regulator_set_voltage(host->vqmmc,
1665 1800000, 1800000); 1665 1700000, 1950000);
1666 else 1666 else
1667 ret = 0; 1667 ret = 0;
1668 1668
@@ -1994,30 +1994,11 @@ static void sdhci_enable_preset_value(struct mmc_host *mmc, bool enable)
1994 sdhci_runtime_pm_put(host); 1994 sdhci_runtime_pm_put(host);
1995} 1995}
1996 1996
1997static const struct mmc_host_ops sdhci_ops = { 1997static void sdhci_card_event(struct mmc_host *mmc)
1998 .request = sdhci_request,
1999 .set_ios = sdhci_set_ios,
2000 .get_ro = sdhci_get_ro,
2001 .hw_reset = sdhci_hw_reset,
2002 .enable_sdio_irq = sdhci_enable_sdio_irq,
2003 .start_signal_voltage_switch = sdhci_start_signal_voltage_switch,
2004 .execute_tuning = sdhci_execute_tuning,
2005 .enable_preset_value = sdhci_enable_preset_value,
2006};
2007
2008/*****************************************************************************\
2009 * *
2010 * Tasklets *
2011 * *
2012\*****************************************************************************/
2013
2014static void sdhci_tasklet_card(unsigned long param)
2015{ 1998{
2016 struct sdhci_host *host; 1999 struct sdhci_host *host = mmc_priv(mmc);
2017 unsigned long flags; 2000 unsigned long flags;
2018 2001
2019 host = (struct sdhci_host*)param;
2020
2021 spin_lock_irqsave(&host->lock, flags); 2002 spin_lock_irqsave(&host->lock, flags);
2022 2003
2023 /* Check host->mrq first in case we are runtime suspended */ 2004 /* Check host->mrq first in case we are runtime suspended */
@@ -2036,6 +2017,31 @@ static void sdhci_tasklet_card(unsigned long param)
2036 } 2017 }
2037 2018
2038 spin_unlock_irqrestore(&host->lock, flags); 2019 spin_unlock_irqrestore(&host->lock, flags);
2020}
2021
2022static const struct mmc_host_ops sdhci_ops = {
2023 .request = sdhci_request,
2024 .set_ios = sdhci_set_ios,
2025 .get_ro = sdhci_get_ro,
2026 .hw_reset = sdhci_hw_reset,
2027 .enable_sdio_irq = sdhci_enable_sdio_irq,
2028 .start_signal_voltage_switch = sdhci_start_signal_voltage_switch,
2029 .execute_tuning = sdhci_execute_tuning,
2030 .enable_preset_value = sdhci_enable_preset_value,
2031 .card_event = sdhci_card_event,
2032};
2033
2034/*****************************************************************************\
2035 * *
2036 * Tasklets *
2037 * *
2038\*****************************************************************************/
2039
2040static void sdhci_tasklet_card(unsigned long param)
2041{
2042 struct sdhci_host *host = (struct sdhci_host*)param;
2043
2044 sdhci_card_event(host->mmc);
2039 2045
2040 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 2046 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
2041} 2047}
@@ -2282,6 +2288,8 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
2282 pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); 2288 pr_err("%s: ADMA error\n", mmc_hostname(host->mmc));
2283 sdhci_show_adma_error(host); 2289 sdhci_show_adma_error(host);
2284 host->data->error = -EIO; 2290 host->data->error = -EIO;
2291 if (host->ops->adma_workaround)
2292 host->ops->adma_workaround(host, intmask);
2285 } 2293 }
2286 2294
2287 if (host->data->error) 2295 if (host->data->error)
@@ -2858,10 +2866,16 @@ int sdhci_add_host(struct sdhci_host *host)
2858 mmc_hostname(mmc)); 2866 mmc_hostname(mmc));
2859 host->vqmmc = NULL; 2867 host->vqmmc = NULL;
2860 } 2868 }
2861 } 2869 } else {
2862 else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000))
2863 regulator_enable(host->vqmmc); 2870 regulator_enable(host->vqmmc);
2864 else 2871 if (!regulator_is_supported_voltage(host->vqmmc, 1700000,
2872 1950000))
2873 caps[1] &= ~(SDHCI_SUPPORT_SDR104 |
2874 SDHCI_SUPPORT_SDR50 |
2875 SDHCI_SUPPORT_DDR50);
2876 }
2877
2878 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
2865 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | 2879 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
2866 SDHCI_SUPPORT_DDR50); 2880 SDHCI_SUPPORT_DDR50);
2867 2881
@@ -2919,21 +2933,18 @@ int sdhci_add_host(struct sdhci_host *host)
2919 mmc_hostname(mmc)); 2933 mmc_hostname(mmc));
2920 host->vmmc = NULL; 2934 host->vmmc = NULL;
2921 } 2935 }
2922 } else 2936 }
2923 regulator_enable(host->vmmc);
2924 2937
2925#ifdef CONFIG_REGULATOR 2938#ifdef CONFIG_REGULATOR
2926 if (host->vmmc) { 2939 if (host->vmmc) {
2927 ret = regulator_is_supported_voltage(host->vmmc, 3300000, 2940 ret = regulator_is_supported_voltage(host->vmmc, 2700000,
2928 3300000); 2941 3600000);
2929 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_330))) 2942 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_330)))
2930 caps[0] &= ~SDHCI_CAN_VDD_330; 2943 caps[0] &= ~SDHCI_CAN_VDD_330;
2931 ret = regulator_is_supported_voltage(host->vmmc, 3000000,
2932 3000000);
2933 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_300))) 2944 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_300)))
2934 caps[0] &= ~SDHCI_CAN_VDD_300; 2945 caps[0] &= ~SDHCI_CAN_VDD_300;
2935 ret = regulator_is_supported_voltage(host->vmmc, 1800000, 2946 ret = regulator_is_supported_voltage(host->vmmc, 1700000,
2936 1800000); 2947 1950000);
2937 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_180))) 2948 if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_180)))
2938 caps[0] &= ~SDHCI_CAN_VDD_180; 2949 caps[0] &= ~SDHCI_CAN_VDD_180;
2939 } 2950 }
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 71a4a7ed46c5..a6d69b7bdea2 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -120,6 +120,7 @@
120#define SDHCI_SIGNAL_ENABLE 0x38 120#define SDHCI_SIGNAL_ENABLE 0x38
121#define SDHCI_INT_RESPONSE 0x00000001 121#define SDHCI_INT_RESPONSE 0x00000001
122#define SDHCI_INT_DATA_END 0x00000002 122#define SDHCI_INT_DATA_END 0x00000002
123#define SDHCI_INT_BLK_GAP 0x00000004
123#define SDHCI_INT_DMA_END 0x00000008 124#define SDHCI_INT_DMA_END 0x00000008
124#define SDHCI_INT_SPACE_AVAIL 0x00000010 125#define SDHCI_INT_SPACE_AVAIL 0x00000010
125#define SDHCI_INT_DATA_AVAIL 0x00000020 126#define SDHCI_INT_DATA_AVAIL 0x00000020
@@ -146,7 +147,8 @@
146#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ 147#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
147 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ 148 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
148 SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ 149 SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
149 SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR) 150 SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR | \
151 SDHCI_INT_BLK_GAP)
150#define SDHCI_INT_ALL_MASK ((unsigned int)-1) 152#define SDHCI_INT_ALL_MASK ((unsigned int)-1)
151 153
152#define SDHCI_ACMD12_ERR 0x3C 154#define SDHCI_ACMD12_ERR 0x3C
@@ -278,6 +280,7 @@ struct sdhci_ops {
278 void (*hw_reset)(struct sdhci_host *host); 280 void (*hw_reset)(struct sdhci_host *host);
279 void (*platform_suspend)(struct sdhci_host *host); 281 void (*platform_suspend)(struct sdhci_host *host);
280 void (*platform_resume)(struct sdhci_host *host); 282 void (*platform_resume)(struct sdhci_host *host);
283 void (*adma_workaround)(struct sdhci_host *host, u32 intmask);
281 void (*platform_init)(struct sdhci_host *host); 284 void (*platform_init)(struct sdhci_host *host);
282}; 285};
283 286
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index d25bc97dc5c6..ae795233a1d6 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -1104,7 +1104,6 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
1104{ 1104{
1105 struct sh_mmcif_host *host = dev_id; 1105 struct sh_mmcif_host *host = dev_id;
1106 struct mmc_request *mrq = host->mrq; 1106 struct mmc_request *mrq = host->mrq;
1107 struct mmc_data *data = mrq->data;
1108 1107
1109 cancel_delayed_work_sync(&host->timeout_work); 1108 cancel_delayed_work_sync(&host->timeout_work);
1110 1109
@@ -1152,13 +1151,14 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
1152 case MMCIF_WAIT_FOR_READ_END: 1151 case MMCIF_WAIT_FOR_READ_END:
1153 case MMCIF_WAIT_FOR_WRITE_END: 1152 case MMCIF_WAIT_FOR_WRITE_END:
1154 if (host->sd_error) 1153 if (host->sd_error)
1155 data->error = sh_mmcif_error_manage(host); 1154 mrq->data->error = sh_mmcif_error_manage(host);
1156 break; 1155 break;
1157 default: 1156 default:
1158 BUG(); 1157 BUG();
1159 } 1158 }
1160 1159
1161 if (host->wait_for != MMCIF_WAIT_FOR_STOP) { 1160 if (host->wait_for != MMCIF_WAIT_FOR_STOP) {
1161 struct mmc_data *data = mrq->data;
1162 if (!mrq->cmd->error && data && !data->error) 1162 if (!mrq->cmd->error && data && !data->error)
1163 data->bytes_xfered = 1163 data->bytes_xfered =
1164 data->blocks * data->blksz; 1164 data->blocks * data->blksz;
@@ -1231,10 +1231,6 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
1231 host->sd_error = true; 1231 host->sd_error = true;
1232 dev_dbg(&host->pd->dev, "int err state = %08x\n", state); 1232 dev_dbg(&host->pd->dev, "int err state = %08x\n", state);
1233 } 1233 }
1234 if (host->state == STATE_IDLE) {
1235 dev_info(&host->pd->dev, "Spurious IRQ status 0x%x", state);
1236 return IRQ_HANDLED;
1237 }
1238 if (state & ~(INT_CMD12RBE | INT_CMD12CRE)) { 1234 if (state & ~(INT_CMD12RBE | INT_CMD12CRE)) {
1239 if (!host->dma_active) 1235 if (!host->dma_active)
1240 return IRQ_WAKE_THREAD; 1236 return IRQ_WAKE_THREAD;
@@ -1310,7 +1306,6 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
1310 struct sh_mmcif_plat_data *pd = pdev->dev.platform_data; 1306 struct sh_mmcif_plat_data *pd = pdev->dev.platform_data;
1311 struct resource *res; 1307 struct resource *res;
1312 void __iomem *reg; 1308 void __iomem *reg;
1313 char clk_name[8];
1314 1309
1315 irq[0] = platform_get_irq(pdev, 0); 1310 irq[0] = platform_get_irq(pdev, 0);
1316 irq[1] = platform_get_irq(pdev, 1); 1311 irq[1] = platform_get_irq(pdev, 1);
@@ -1360,11 +1355,10 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev)
1360 pm_runtime_enable(&pdev->dev); 1355 pm_runtime_enable(&pdev->dev);
1361 host->power = false; 1356 host->power = false;
1362 1357
1363 snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id); 1358 host->hclk = clk_get(&pdev->dev, NULL);
1364 host->hclk = clk_get(&pdev->dev, clk_name);
1365 if (IS_ERR(host->hclk)) { 1359 if (IS_ERR(host->hclk)) {
1366 ret = PTR_ERR(host->hclk); 1360 ret = PTR_ERR(host->hclk);
1367 dev_err(&pdev->dev, "cannot get clock \"%s\": %d\n", clk_name, ret); 1361 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
1368 goto eclkget; 1362 goto eclkget;
1369 } 1363 }
1370 ret = sh_mmcif_clk_update(host); 1364 ret = sh_mmcif_clk_update(host);
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
index 0bdc146178db..d6ff8531fb35 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/sh_mobile_sdhi.c
@@ -123,7 +123,6 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
123 struct tmio_mmc_data *mmc_data; 123 struct tmio_mmc_data *mmc_data;
124 struct sh_mobile_sdhi_info *p = pdev->dev.platform_data; 124 struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
125 struct tmio_mmc_host *host; 125 struct tmio_mmc_host *host;
126 char clk_name[8];
127 int irq, ret, i = 0; 126 int irq, ret, i = 0;
128 bool multiplexed_isr = true; 127 bool multiplexed_isr = true;
129 128
@@ -144,11 +143,10 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
144 } 143 }
145 } 144 }
146 145
147 snprintf(clk_name, sizeof(clk_name), "sdhi%d", pdev->id); 146 priv->clk = clk_get(&pdev->dev, NULL);
148 priv->clk = clk_get(&pdev->dev, clk_name);
149 if (IS_ERR(priv->clk)) { 147 if (IS_ERR(priv->clk)) {
150 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
151 ret = PTR_ERR(priv->clk); 148 ret = PTR_ERR(priv->clk);
149 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
152 goto eclkget; 150 goto eclkget;
153 } 151 }
154 152
@@ -250,7 +248,7 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
250 dev_info(&pdev->dev, "%s base at 0x%08lx clock rate %u MHz\n", 248 dev_info(&pdev->dev, "%s base at 0x%08lx clock rate %u MHz\n",
251 mmc_hostname(host->mmc), (unsigned long) 249 mmc_hostname(host->mmc), (unsigned long)
252 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start), 250 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
253 mmc_data->hclk / 1000000); 251 host->mmc->f_max / 1000000);
254 252
255 return ret; 253 return ret;
256 254
diff --git a/drivers/mmc/host/vub300.c b/drivers/mmc/host/vub300.c
index d5655a63eda4..cb9f361c03ab 100644
--- a/drivers/mmc/host/vub300.c
+++ b/drivers/mmc/host/vub300.c
@@ -2362,6 +2362,7 @@ error4:
2362error1: 2362error1:
2363 usb_free_urb(command_out_urb); 2363 usb_free_urb(command_out_urb);
2364error0: 2364error0:
2365 usb_put_dev(udev);
2365 return retval; 2366 return retval;
2366} 2367}
2367 2368
diff --git a/drivers/mmc/host/wmt-sdmmc.c b/drivers/mmc/host/wmt-sdmmc.c
new file mode 100644
index 000000000000..5ba4605e4f80
--- /dev/null
+++ b/drivers/mmc/host/wmt-sdmmc.c
@@ -0,0 +1,1029 @@
1/*
2 * WM8505/WM8650 SD/MMC Host Controller
3 *
4 * Copyright (C) 2010 Tony Prisk
5 * Copyright (C) 2008 WonderMedia Technologies, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/ioport.h>
16#include <linux/errno.h>
17#include <linux/dma-mapping.h>
18#include <linux/delay.h>
19#include <linux/io.h>
20#include <linux/irq.h>
21#include <linux/clk.h>
22#include <linux/gpio.h>
23
24#include <linux/of.h>
25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/of_device.h>
28
29#include <linux/mmc/host.h>
30#include <linux/mmc/mmc.h>
31#include <linux/mmc/sd.h>
32
33#include <asm/byteorder.h>
34
35
36#define DRIVER_NAME "wmt-sdhc"
37
38
39/* MMC/SD controller registers */
40#define SDMMC_CTLR 0x00
41#define SDMMC_CMD 0x01
42#define SDMMC_RSPTYPE 0x02
43#define SDMMC_ARG 0x04
44#define SDMMC_BUSMODE 0x08
45#define SDMMC_BLKLEN 0x0C
46#define SDMMC_BLKCNT 0x0E
47#define SDMMC_RSP 0x10
48#define SDMMC_CBCR 0x20
49#define SDMMC_INTMASK0 0x24
50#define SDMMC_INTMASK1 0x25
51#define SDMMC_STS0 0x28
52#define SDMMC_STS1 0x29
53#define SDMMC_STS2 0x2A
54#define SDMMC_STS3 0x2B
55#define SDMMC_RSPTIMEOUT 0x2C
56#define SDMMC_CLK 0x30 /* VT8500 only */
57#define SDMMC_EXTCTRL 0x34
58#define SDMMC_SBLKLEN 0x38
59#define SDMMC_DMATIMEOUT 0x3C
60
61
62/* SDMMC_CTLR bit fields */
63#define CTLR_CMD_START 0x01
64#define CTLR_CMD_WRITE 0x04
65#define CTLR_FIFO_RESET 0x08
66
67/* SDMMC_BUSMODE bit fields */
68#define BM_SPI_MODE 0x01
69#define BM_FOURBIT_MODE 0x02
70#define BM_EIGHTBIT_MODE 0x04
71#define BM_SD_OFF 0x10
72#define BM_SPI_CS 0x20
73#define BM_SD_POWER 0x40
74#define BM_SOFT_RESET 0x80
75#define BM_ONEBIT_MASK 0xFD
76
77/* SDMMC_BLKLEN bit fields */
78#define BLKL_CRCERR_ABORT 0x0800
79#define BLKL_CD_POL_HIGH 0x1000
80#define BLKL_GPI_CD 0x2000
81#define BLKL_DATA3_CD 0x4000
82#define BLKL_INT_ENABLE 0x8000
83
84/* SDMMC_INTMASK0 bit fields */
85#define INT0_MBLK_TRAN_DONE_INT_EN 0x10
86#define INT0_BLK_TRAN_DONE_INT_EN 0x20
87#define INT0_CD_INT_EN 0x40
88#define INT0_DI_INT_EN 0x80
89
90/* SDMMC_INTMASK1 bit fields */
91#define INT1_CMD_RES_TRAN_DONE_INT_EN 0x02
92#define INT1_CMD_RES_TOUT_INT_EN 0x04
93#define INT1_MBLK_AUTO_STOP_INT_EN 0x08
94#define INT1_DATA_TOUT_INT_EN 0x10
95#define INT1_RESCRC_ERR_INT_EN 0x20
96#define INT1_RCRC_ERR_INT_EN 0x40
97#define INT1_WCRC_ERR_INT_EN 0x80
98
99/* SDMMC_STS0 bit fields */
100#define STS0_WRITE_PROTECT 0x02
101#define STS0_CD_DATA3 0x04
102#define STS0_CD_GPI 0x08
103#define STS0_MBLK_DONE 0x10
104#define STS0_BLK_DONE 0x20
105#define STS0_CARD_DETECT 0x40
106#define STS0_DEVICE_INS 0x80
107
108/* SDMMC_STS1 bit fields */
109#define STS1_SDIO_INT 0x01
110#define STS1_CMDRSP_DONE 0x02
111#define STS1_RSP_TIMEOUT 0x04
112#define STS1_AUTOSTOP_DONE 0x08
113#define STS1_DATA_TIMEOUT 0x10
114#define STS1_RSP_CRC_ERR 0x20
115#define STS1_RCRC_ERR 0x40
116#define STS1_WCRC_ERR 0x80
117
118/* SDMMC_STS2 bit fields */
119#define STS2_CMD_RES_BUSY 0x10
120#define STS2_DATARSP_BUSY 0x20
121#define STS2_DIS_FORCECLK 0x80
122
123
124/* MMC/SD DMA Controller Registers */
125#define SDDMA_GCR 0x100
126#define SDDMA_IER 0x104
127#define SDDMA_ISR 0x108
128#define SDDMA_DESPR 0x10C
129#define SDDMA_RBR 0x110
130#define SDDMA_DAR 0x114
131#define SDDMA_BAR 0x118
132#define SDDMA_CPR 0x11C
133#define SDDMA_CCR 0x120
134
135
136/* SDDMA_GCR bit fields */
137#define DMA_GCR_DMA_EN 0x00000001
138#define DMA_GCR_SOFT_RESET 0x00000100
139
140/* SDDMA_IER bit fields */
141#define DMA_IER_INT_EN 0x00000001
142
143/* SDDMA_ISR bit fields */
144#define DMA_ISR_INT_STS 0x00000001
145
146/* SDDMA_RBR bit fields */
147#define DMA_RBR_FORMAT 0x40000000
148#define DMA_RBR_END 0x80000000
149
150/* SDDMA_CCR bit fields */
151#define DMA_CCR_RUN 0x00000080
152#define DMA_CCR_IF_TO_PERIPHERAL 0x00000000
153#define DMA_CCR_PERIPHERAL_TO_IF 0x00400000
154
155/* SDDMA_CCR event status */
156#define DMA_CCR_EVT_NO_STATUS 0x00000000
157#define DMA_CCR_EVT_UNDERRUN 0x00000001
158#define DMA_CCR_EVT_OVERRUN 0x00000002
159#define DMA_CCR_EVT_DESP_READ 0x00000003
160#define DMA_CCR_EVT_DATA_RW 0x00000004
161#define DMA_CCR_EVT_EARLY_END 0x00000005
162#define DMA_CCR_EVT_SUCCESS 0x0000000F
163
164#define PDMA_READ 0x00
165#define PDMA_WRITE 0x01
166
167#define WMT_SD_POWER_OFF 0
168#define WMT_SD_POWER_ON 1
169
170struct wmt_dma_descriptor {
171 u32 flags;
172 u32 data_buffer_addr;
173 u32 branch_addr;
174 u32 reserved1;
175};
176
177struct wmt_mci_caps {
178 unsigned int f_min;
179 unsigned int f_max;
180 u32 ocr_avail;
181 u32 caps;
182 u32 max_seg_size;
183 u32 max_segs;
184 u32 max_blk_size;
185};
186
187struct wmt_mci_priv {
188 struct mmc_host *mmc;
189 void __iomem *sdmmc_base;
190
191 int irq_regular;
192 int irq_dma;
193
194 void *dma_desc_buffer;
195 dma_addr_t dma_desc_device_addr;
196
197 struct completion cmdcomp;
198 struct completion datacomp;
199
200 struct completion *comp_cmd;
201 struct completion *comp_dma;
202
203 struct mmc_request *req;
204 struct mmc_command *cmd;
205
206 struct clk *clk_sdmmc;
207 struct device *dev;
208
209 u8 power_inverted;
210 u8 cd_inverted;
211};
212
213static void wmt_set_sd_power(struct wmt_mci_priv *priv, int enable)
214{
215 u32 reg_tmp;
216 if (enable) {
217 if (priv->power_inverted) {
218 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
219 writeb(reg_tmp | BM_SD_OFF,
220 priv->sdmmc_base + SDMMC_BUSMODE);
221 } else {
222 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
223 writeb(reg_tmp & (~BM_SD_OFF),
224 priv->sdmmc_base + SDMMC_BUSMODE);
225 }
226 } else {
227 if (priv->power_inverted) {
228 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
229 writeb(reg_tmp & (~BM_SD_OFF),
230 priv->sdmmc_base + SDMMC_BUSMODE);
231 } else {
232 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
233 writeb(reg_tmp | BM_SD_OFF,
234 priv->sdmmc_base + SDMMC_BUSMODE);
235 }
236 }
237}
238
239static void wmt_mci_read_response(struct mmc_host *mmc)
240{
241 struct wmt_mci_priv *priv;
242 int idx1, idx2;
243 u8 tmp_resp;
244 u32 response;
245
246 priv = mmc_priv(mmc);
247
248 for (idx1 = 0; idx1 < 4; idx1++) {
249 response = 0;
250 for (idx2 = 0; idx2 < 4; idx2++) {
251 if ((idx1 == 3) && (idx2 == 3))
252 tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP);
253 else
254 tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP +
255 (idx1*4) + idx2 + 1);
256 response |= (tmp_resp << (idx2 * 8));
257 }
258 priv->cmd->resp[idx1] = cpu_to_be32(response);
259 }
260}
261
262static void wmt_mci_start_command(struct wmt_mci_priv *priv)
263{
264 u32 reg_tmp;
265
266 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
267 writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);
268}
269
270static int wmt_mci_send_command(struct mmc_host *mmc, u8 command, u8 cmdtype,
271 u32 arg, u8 rsptype)
272{
273 struct wmt_mci_priv *priv;
274 u32 reg_tmp;
275
276 priv = mmc_priv(mmc);
277
278 /* write command, arg, resptype registers */
279 writeb(command, priv->sdmmc_base + SDMMC_CMD);
280 writel(arg, priv->sdmmc_base + SDMMC_ARG);
281 writeb(rsptype, priv->sdmmc_base + SDMMC_RSPTYPE);
282
283 /* reset response FIFO */
284 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
285 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);
286
287 /* ensure clock enabled - VT3465 */
288 wmt_set_sd_power(priv, WMT_SD_POWER_ON);
289
290 /* clear status bits */
291 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0);
292 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1);
293 writeb(0xFF, priv->sdmmc_base + SDMMC_STS2);
294 writeb(0xFF, priv->sdmmc_base + SDMMC_STS3);
295
296 /* set command type */
297 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
298 writeb((reg_tmp & 0x0F) | (cmdtype << 4),
299 priv->sdmmc_base + SDMMC_CTLR);
300
301 return 0;
302}
303
304static void wmt_mci_disable_dma(struct wmt_mci_priv *priv)
305{
306 writel(DMA_ISR_INT_STS, priv->sdmmc_base + SDDMA_ISR);
307 writel(0, priv->sdmmc_base + SDDMA_IER);
308}
309
310static void wmt_complete_data_request(struct wmt_mci_priv *priv)
311{
312 struct mmc_request *req;
313 req = priv->req;
314
315 req->data->bytes_xfered = req->data->blksz * req->data->blocks;
316
317 /* unmap the DMA pages used for write data */
318 if (req->data->flags & MMC_DATA_WRITE)
319 dma_unmap_sg(mmc_dev(priv->mmc), req->data->sg,
320 req->data->sg_len, DMA_TO_DEVICE);
321 else
322 dma_unmap_sg(mmc_dev(priv->mmc), req->data->sg,
323 req->data->sg_len, DMA_FROM_DEVICE);
324
325 /* Check if the DMA ISR returned a data error */
326 if ((req->cmd->error) || (req->data->error))
327 mmc_request_done(priv->mmc, req);
328 else {
329 wmt_mci_read_response(priv->mmc);
330 if (!req->data->stop) {
331 /* single-block read/write requests end here */
332 mmc_request_done(priv->mmc, req);
333 } else {
334 /*
335 * we change the priv->cmd variable so the response is
336 * stored in the stop struct rather than the original
337 * calling command struct
338 */
339 priv->comp_cmd = &priv->cmdcomp;
340 init_completion(priv->comp_cmd);
341 priv->cmd = req->data->stop;
342 wmt_mci_send_command(priv->mmc, req->data->stop->opcode,
343 7, req->data->stop->arg, 9);
344 wmt_mci_start_command(priv);
345 }
346 }
347}
348
349static irqreturn_t wmt_mci_dma_isr(int irq_num, void *data)
350{
351 struct mmc_host *mmc;
352 struct wmt_mci_priv *priv;
353
354 int status;
355
356 priv = (struct wmt_mci_priv *)data;
357 mmc = priv->mmc;
358
359 status = readl(priv->sdmmc_base + SDDMA_CCR) & 0x0F;
360
361 if (status != DMA_CCR_EVT_SUCCESS) {
362 dev_err(priv->dev, "DMA Error: Status = %d\n", status);
363 priv->req->data->error = -ETIMEDOUT;
364 complete(priv->comp_dma);
365 return IRQ_HANDLED;
366 }
367
368 priv->req->data->error = 0;
369
370 wmt_mci_disable_dma(priv);
371
372 complete(priv->comp_dma);
373
374 if (priv->comp_cmd) {
375 if (completion_done(priv->comp_cmd)) {
376 /*
377 * if the command (regular) interrupt has already
378 * completed, finish off the request otherwise we wait
379 * for the command interrupt and finish from there.
380 */
381 wmt_complete_data_request(priv);
382 }
383 }
384
385 return IRQ_HANDLED;
386}
387
388static irqreturn_t wmt_mci_regular_isr(int irq_num, void *data)
389{
390 struct wmt_mci_priv *priv;
391 u32 status0;
392 u32 status1;
393 u32 status2;
394 u32 reg_tmp;
395 int cmd_done;
396
397 priv = (struct wmt_mci_priv *)data;
398 cmd_done = 0;
399 status0 = readb(priv->sdmmc_base + SDMMC_STS0);
400 status1 = readb(priv->sdmmc_base + SDMMC_STS1);
401 status2 = readb(priv->sdmmc_base + SDMMC_STS2);
402
403 /* Check for card insertion */
404 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);
405 if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) {
406 mmc_detect_change(priv->mmc, 0);
407 if (priv->cmd)
408 priv->cmd->error = -ETIMEDOUT;
409 if (priv->comp_cmd)
410 complete(priv->comp_cmd);
411 if (priv->comp_dma) {
412 wmt_mci_disable_dma(priv);
413 complete(priv->comp_dma);
414 }
415 writeb(STS0_DEVICE_INS, priv->sdmmc_base + SDMMC_STS0);
416 return IRQ_HANDLED;
417 }
418
419 if ((!priv->req->data) ||
420 ((priv->req->data->stop) && (priv->cmd == priv->req->data->stop))) {
421 /* handle non-data & stop_transmission requests */
422 if (status1 & STS1_CMDRSP_DONE) {
423 priv->cmd->error = 0;
424 cmd_done = 1;
425 } else if ((status1 & STS1_RSP_TIMEOUT) ||
426 (status1 & STS1_DATA_TIMEOUT)) {
427 priv->cmd->error = -ETIMEDOUT;
428 cmd_done = 1;
429 }
430
431 if (cmd_done) {
432 priv->comp_cmd = NULL;
433
434 if (!priv->cmd->error)
435 wmt_mci_read_response(priv->mmc);
436
437 priv->cmd = NULL;
438
439 mmc_request_done(priv->mmc, priv->req);
440 }
441 } else {
442 /* handle data requests */
443 if (status1 & STS1_CMDRSP_DONE) {
444 if (priv->cmd)
445 priv->cmd->error = 0;
446 if (priv->comp_cmd)
447 complete(priv->comp_cmd);
448 }
449
450 if ((status1 & STS1_RSP_TIMEOUT) ||
451 (status1 & STS1_DATA_TIMEOUT)) {
452 if (priv->cmd)
453 priv->cmd->error = -ETIMEDOUT;
454 if (priv->comp_cmd)
455 complete(priv->comp_cmd);
456 if (priv->comp_dma) {
457 wmt_mci_disable_dma(priv);
458 complete(priv->comp_dma);
459 }
460 }
461
462 if (priv->comp_dma) {
463 /*
464 * If the dma interrupt has already completed, finish
465 * off the request; otherwise we wait for the DMA
466 * interrupt and finish from there.
467 */
468 if (completion_done(priv->comp_dma))
469 wmt_complete_data_request(priv);
470 }
471 }
472
473 writeb(status0, priv->sdmmc_base + SDMMC_STS0);
474 writeb(status1, priv->sdmmc_base + SDMMC_STS1);
475 writeb(status2, priv->sdmmc_base + SDMMC_STS2);
476
477 return IRQ_HANDLED;
478}
479
480static void wmt_reset_hardware(struct mmc_host *mmc)
481{
482 struct wmt_mci_priv *priv;
483 u32 reg_tmp;
484
485 priv = mmc_priv(mmc);
486
487 /* reset controller */
488 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
489 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);
490
491 /* reset response FIFO */
492 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
493 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);
494
495 /* enable GPI pin to detect card */
496 writew(BLKL_INT_ENABLE | BLKL_GPI_CD, priv->sdmmc_base + SDMMC_BLKLEN);
497
498 /* clear interrupt status */
499 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0);
500 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1);
501
502 /* setup interrupts */
503 writeb(INT0_CD_INT_EN | INT0_DI_INT_EN, priv->sdmmc_base +
504 SDMMC_INTMASK0);
505 writeb(INT1_DATA_TOUT_INT_EN | INT1_CMD_RES_TRAN_DONE_INT_EN |
506 INT1_CMD_RES_TOUT_INT_EN, priv->sdmmc_base + SDMMC_INTMASK1);
507
508 /* set the DMA timeout */
509 writew(8191, priv->sdmmc_base + SDMMC_DMATIMEOUT);
510
511 /* auto clock freezing enable */
512 reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);
513 writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2);
514
515 /* set a default clock speed of 400Khz */
516 clk_set_rate(priv->clk_sdmmc, 400000);
517}
518
519static int wmt_dma_init(struct mmc_host *mmc)
520{
521 struct wmt_mci_priv *priv;
522
523 priv = mmc_priv(mmc);
524
525 writel(DMA_GCR_SOFT_RESET, priv->sdmmc_base + SDDMA_GCR);
526 writel(DMA_GCR_DMA_EN, priv->sdmmc_base + SDDMA_GCR);
527 if ((readl(priv->sdmmc_base + SDDMA_GCR) & DMA_GCR_DMA_EN) != 0)
528 return 0;
529 else
530 return 1;
531}
532
533static void wmt_dma_init_descriptor(struct wmt_dma_descriptor *desc,
534 u16 req_count, u32 buffer_addr, u32 branch_addr, int end)
535{
536 desc->flags = 0x40000000 | req_count;
537 if (end)
538 desc->flags |= 0x80000000;
539 desc->data_buffer_addr = buffer_addr;
540 desc->branch_addr = branch_addr;
541}
542
543static void wmt_dma_config(struct mmc_host *mmc, u32 descaddr, u8 dir)
544{
545 struct wmt_mci_priv *priv;
546 u32 reg_tmp;
547
548 priv = mmc_priv(mmc);
549
550 /* Enable DMA Interrupts */
551 writel(DMA_IER_INT_EN, priv->sdmmc_base + SDDMA_IER);
552
553 /* Write DMA Descriptor Pointer Register */
554 writel(descaddr, priv->sdmmc_base + SDDMA_DESPR);
555
556 writel(0x00, priv->sdmmc_base + SDDMA_CCR);
557
558 if (dir == PDMA_WRITE) {
559 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
560 writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +
561 SDDMA_CCR);
562 } else {
563 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
564 writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +
565 SDDMA_CCR);
566 }
567}
568
569static void wmt_dma_start(struct wmt_mci_priv *priv)
570{
571 u32 reg_tmp;
572
573 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
574 writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);
575}
576
577static void wmt_mci_request(struct mmc_host *mmc, struct mmc_request *req)
578{
579 struct wmt_mci_priv *priv;
580 struct wmt_dma_descriptor *desc;
581 u8 command;
582 u8 cmdtype;
583 u32 arg;
584 u8 rsptype;
585 u32 reg_tmp;
586
587 struct scatterlist *sg;
588 int i;
589 int sg_cnt;
590 int offset;
591 u32 dma_address;
592 int desc_cnt;
593
594 priv = mmc_priv(mmc);
595 priv->req = req;
596
597 /*
598 * Use the cmd variable to pass a pointer to the resp[] structure
599 * This is required on multi-block requests to pass the pointer to the
600 * stop command
601 */
602 priv->cmd = req->cmd;
603
604 command = req->cmd->opcode;
605 arg = req->cmd->arg;
606 rsptype = mmc_resp_type(req->cmd);
607 cmdtype = 0;
608
609 /* rsptype=7 only valid for SPI commands - should be =2 for SD */
610 if (rsptype == 7)
611 rsptype = 2;
612 /* rsptype=21 is R1B, convert for controller */
613 if (rsptype == 21)
614 rsptype = 9;
615
616 if (!req->data) {
617 wmt_mci_send_command(mmc, command, cmdtype, arg, rsptype);
618 wmt_mci_start_command(priv);
619 /* completion is now handled in the regular_isr() */
620 }
621 if (req->data) {
622 priv->comp_cmd = &priv->cmdcomp;
623 init_completion(priv->comp_cmd);
624
625 wmt_dma_init(mmc);
626
627 /* set controller data length */
628 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);
629 writew((reg_tmp & 0xF800) | (req->data->blksz - 1),
630 priv->sdmmc_base + SDMMC_BLKLEN);
631
632 /* set controller block count */
633 writew(req->data->blocks, priv->sdmmc_base + SDMMC_BLKCNT);
634
635 desc = (struct wmt_dma_descriptor *)priv->dma_desc_buffer;
636
637 if (req->data->flags & MMC_DATA_WRITE) {
638 sg_cnt = dma_map_sg(mmc_dev(mmc), req->data->sg,
639 req->data->sg_len, DMA_TO_DEVICE);
640 cmdtype = 1;
641 if (req->data->blocks > 1)
642 cmdtype = 3;
643 } else {
644 sg_cnt = dma_map_sg(mmc_dev(mmc), req->data->sg,
645 req->data->sg_len, DMA_FROM_DEVICE);
646 cmdtype = 2;
647 if (req->data->blocks > 1)
648 cmdtype = 4;
649 }
650
651 dma_address = priv->dma_desc_device_addr + 16;
652 desc_cnt = 0;
653
654 for_each_sg(req->data->sg, sg, sg_cnt, i) {
655 offset = 0;
656 while (offset < sg_dma_len(sg)) {
657 wmt_dma_init_descriptor(desc, req->data->blksz,
658 sg_dma_address(sg)+offset,
659 dma_address, 0);
660 desc++;
661 desc_cnt++;
662 offset += req->data->blksz;
663 dma_address += 16;
664 if (desc_cnt == req->data->blocks)
665 break;
666 }
667 }
668 desc--;
669 desc->flags |= 0x80000000;
670
671 if (req->data->flags & MMC_DATA_WRITE)
672 wmt_dma_config(mmc, priv->dma_desc_device_addr,
673 PDMA_WRITE);
674 else
675 wmt_dma_config(mmc, priv->dma_desc_device_addr,
676 PDMA_READ);
677
678 wmt_mci_send_command(mmc, command, cmdtype, arg, rsptype);
679
680 priv->comp_dma = &priv->datacomp;
681 init_completion(priv->comp_dma);
682
683 wmt_dma_start(priv);
684 wmt_mci_start_command(priv);
685 }
686}
687
688static void wmt_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
689{
690 struct wmt_mci_priv *priv;
691 u32 reg_tmp;
692
693 priv = mmc_priv(mmc);
694
695 if (ios->power_mode == MMC_POWER_UP) {
696 wmt_reset_hardware(mmc);
697
698 wmt_set_sd_power(priv, WMT_SD_POWER_ON);
699 }
700 if (ios->power_mode == MMC_POWER_OFF)
701 wmt_set_sd_power(priv, WMT_SD_POWER_OFF);
702
703 if (ios->clock != 0)
704 clk_set_rate(priv->clk_sdmmc, ios->clock);
705
706 switch (ios->bus_width) {
707 case MMC_BUS_WIDTH_8:
708 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL);
709 writeb(reg_tmp | 0x04, priv->sdmmc_base + SDMMC_EXTCTRL);
710 break;
711 case MMC_BUS_WIDTH_4:
712 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
713 writeb(reg_tmp | BM_FOURBIT_MODE, priv->sdmmc_base +
714 SDMMC_BUSMODE);
715
716 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL);
717 writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL);
718 break;
719 case MMC_BUS_WIDTH_1:
720 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
721 writeb(reg_tmp & BM_ONEBIT_MASK, priv->sdmmc_base +
722 SDMMC_BUSMODE);
723
724 reg_tmp = readb(priv->sdmmc_base + SDMMC_EXTCTRL);
725 writeb(reg_tmp & 0xFB, priv->sdmmc_base + SDMMC_EXTCTRL);
726 break;
727 }
728}
729
730static int wmt_mci_get_ro(struct mmc_host *mmc)
731{
732 struct wmt_mci_priv *priv = mmc_priv(mmc);
733
734 return !(readb(priv->sdmmc_base + SDMMC_STS0) & STS0_WRITE_PROTECT);
735}
736
737static int wmt_mci_get_cd(struct mmc_host *mmc)
738{
739 struct wmt_mci_priv *priv = mmc_priv(mmc);
740 u32 cd = (readb(priv->sdmmc_base + SDMMC_STS0) & STS0_CD_GPI) >> 3;
741
742 return !(cd ^ priv->cd_inverted);
743}
744
745static struct mmc_host_ops wmt_mci_ops = {
746 .request = wmt_mci_request,
747 .set_ios = wmt_mci_set_ios,
748 .get_ro = wmt_mci_get_ro,
749 .get_cd = wmt_mci_get_cd,
750};
751
752/* Controller capabilities */
753static struct wmt_mci_caps wm8505_caps = {
754 .f_min = 390425,
755 .f_max = 50000000,
756 .ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34,
757 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED |
758 MMC_CAP_SD_HIGHSPEED,
759 .max_seg_size = 65024,
760 .max_segs = 128,
761 .max_blk_size = 2048,
762};
763
764static struct of_device_id wmt_mci_dt_ids[] = {
765 { .compatible = "wm,wm8505-sdhc", .data = &wm8505_caps },
766 { /* Sentinel */ },
767};
768
769static int __devinit wmt_mci_probe(struct platform_device *pdev)
770{
771 struct mmc_host *mmc;
772 struct wmt_mci_priv *priv;
773 struct device_node *np = pdev->dev.of_node;
774 const struct of_device_id *of_id =
775 of_match_device(wmt_mci_dt_ids, &pdev->dev);
776 const struct wmt_mci_caps *wmt_caps = of_id->data;
777 int ret;
778 int regular_irq, dma_irq;
779
780 if (!of_id || !of_id->data) {
781 dev_err(&pdev->dev, "Controller capabilities data missing\n");
782 return -EFAULT;
783 }
784
785 if (!np) {
786 dev_err(&pdev->dev, "Missing SDMMC description in devicetree\n");
787 return -EFAULT;
788 }
789
790 regular_irq = irq_of_parse_and_map(np, 0);
791 dma_irq = irq_of_parse_and_map(np, 1);
792
793 if (!regular_irq || !dma_irq) {
794 dev_err(&pdev->dev, "Getting IRQs failed!\n");
795 ret = -ENXIO;
796 goto fail1;
797 }
798
799 mmc = mmc_alloc_host(sizeof(struct wmt_mci_priv), &pdev->dev);
800 if (!mmc) {
801 dev_err(&pdev->dev, "Failed to allocate mmc_host\n");
802 ret = -ENOMEM;
803 goto fail1;
804 }
805
806 mmc->ops = &wmt_mci_ops;
807 mmc->f_min = wmt_caps->f_min;
808 mmc->f_max = wmt_caps->f_max;
809 mmc->ocr_avail = wmt_caps->ocr_avail;
810 mmc->caps = wmt_caps->caps;
811
812 mmc->max_seg_size = wmt_caps->max_seg_size;
813 mmc->max_segs = wmt_caps->max_segs;
814 mmc->max_blk_size = wmt_caps->max_blk_size;
815
816 mmc->max_req_size = (16*512*mmc->max_segs);
817 mmc->max_blk_count = mmc->max_req_size / 512;
818
819 priv = mmc_priv(mmc);
820 priv->mmc = mmc;
821 priv->dev = &pdev->dev;
822
823 priv->power_inverted = 0;
824 priv->cd_inverted = 0;
825
826 if (of_get_property(np, "sdon-inverted", NULL))
827 priv->power_inverted = 1;
828 if (of_get_property(np, "cd-inverted", NULL))
829 priv->cd_inverted = 1;
830
831 priv->sdmmc_base = of_iomap(np, 0);
832 if (!priv->sdmmc_base) {
833 dev_err(&pdev->dev, "Failed to map IO space\n");
834 ret = -ENOMEM;
835 goto fail2;
836 }
837
838 priv->irq_regular = regular_irq;
839 priv->irq_dma = dma_irq;
840
841 ret = request_irq(regular_irq, wmt_mci_regular_isr, 0, "sdmmc", priv);
842 if (ret) {
843 dev_err(&pdev->dev, "Register regular IRQ fail\n");
844 goto fail3;
845 }
846
847 ret = request_irq(dma_irq, wmt_mci_dma_isr, 32, "sdmmc", priv);
848 if (ret) {
849 dev_err(&pdev->dev, "Register DMA IRQ fail\n");
850 goto fail4;
851 }
852
853 /* alloc some DMA buffers for descriptors/transfers */
854 priv->dma_desc_buffer = dma_alloc_coherent(&pdev->dev,
855 mmc->max_blk_count * 16,
856 &priv->dma_desc_device_addr,
857 208);
858 if (!priv->dma_desc_buffer) {
859 dev_err(&pdev->dev, "DMA alloc fail\n");
860 ret = -EPERM;
861 goto fail5;
862 }
863
864 platform_set_drvdata(pdev, mmc);
865
866 priv->clk_sdmmc = of_clk_get(np, 0);
867 if (IS_ERR(priv->clk_sdmmc)) {
868 dev_err(&pdev->dev, "Error getting clock\n");
869 ret = PTR_ERR(priv->clk_sdmmc);
870 goto fail5;
871 }
872
873 clk_prepare_enable(priv->clk_sdmmc);
874
875 /* configure the controller to a known 'ready' state */
876 wmt_reset_hardware(mmc);
877
878 mmc_add_host(mmc);
879
880 dev_info(&pdev->dev, "WMT SDHC Controller initialized\n");
881
882 return 0;
883fail5:
884 free_irq(dma_irq, priv);
885fail4:
886 free_irq(regular_irq, priv);
887fail3:
888 iounmap(priv->sdmmc_base);
889fail2:
890 mmc_free_host(mmc);
891fail1:
892 return ret;
893}
894
895static int __devexit wmt_mci_remove(struct platform_device *pdev)
896{
897 struct mmc_host *mmc;
898 struct wmt_mci_priv *priv;
899 struct resource *res;
900 u32 reg_tmp;
901
902 mmc = platform_get_drvdata(pdev);
903 priv = mmc_priv(mmc);
904
905 /* reset SD controller */
906 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
907 writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);
908 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);
909 writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN);
910 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0);
911 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1);
912
913 /* release the dma buffers */
914 dma_free_coherent(&pdev->dev, priv->mmc->max_blk_count * 16,
915 priv->dma_desc_buffer, priv->dma_desc_device_addr);
916
917 mmc_remove_host(mmc);
918
919 free_irq(priv->irq_regular, priv);
920 free_irq(priv->irq_dma, priv);
921
922 iounmap(priv->sdmmc_base);
923
924 clk_disable_unprepare(priv->clk_sdmmc);
925 clk_put(priv->clk_sdmmc);
926
927 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
928 release_mem_region(res->start, res->end - res->start + 1);
929
930 mmc_free_host(mmc);
931
932 platform_set_drvdata(pdev, NULL);
933
934 dev_info(&pdev->dev, "WMT MCI device removed\n");
935
936 return 0;
937}
938
939#ifdef CONFIG_PM
940static int wmt_mci_suspend(struct device *dev)
941{
942 u32 reg_tmp;
943 struct platform_device *pdev = to_platform_device(dev);
944 struct mmc_host *mmc = platform_get_drvdata(pdev);
945 struct wmt_mci_priv *priv;
946 int ret;
947
948 if (!mmc)
949 return 0;
950
951 priv = mmc_priv(mmc);
952 ret = mmc_suspend_host(mmc);
953
954 if (!ret) {
955 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
956 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +
957 SDMMC_BUSMODE);
958
959 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);
960 writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN);
961
962 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0);
963 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1);
964
965 clk_disable(priv->clk_sdmmc);
966 }
967 return ret;
968}
969
970static int wmt_mci_resume(struct device *dev)
971{
972 u32 reg_tmp;
973 struct platform_device *pdev = to_platform_device(dev);
974 struct mmc_host *mmc = platform_get_drvdata(pdev);
975 struct wmt_mci_priv *priv;
976 int ret = 0;
977
978 if (mmc) {
979 priv = mmc_priv(mmc);
980 clk_enable(priv->clk_sdmmc);
981
982 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);
983 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +
984 SDMMC_BUSMODE);
985
986 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);
987 writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE),
988 priv->sdmmc_base + SDMMC_BLKLEN);
989
990 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);
991 writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base +
992 SDMMC_INTMASK0);
993
994 ret = mmc_resume_host(mmc);
995 }
996
997 return ret;
998}
999
1000static const struct dev_pm_ops wmt_mci_pm = {
1001 .suspend = wmt_mci_suspend,
1002 .resume = wmt_mci_resume,
1003};
1004
1005#define wmt_mci_pm_ops (&wmt_mci_pm)
1006
1007#else /* !CONFIG_PM */
1008
1009#define wmt_mci_pm_ops NULL
1010
1011#endif
1012
1013static struct platform_driver wmt_mci_driver = {
1014 .probe = wmt_mci_probe,
1015 .remove = __exit_p(wmt_mci_remove),
1016 .driver = {
1017 .name = DRIVER_NAME,
1018 .owner = THIS_MODULE,
1019 .pm = wmt_mci_pm_ops,
1020 .of_match_table = wmt_mci_dt_ids,
1021 },
1022};
1023
1024module_platform_driver(wmt_mci_driver);
1025
1026MODULE_DESCRIPTION("Wondermedia MMC/SD Driver");
1027MODULE_AUTHOR("Tony Prisk");
1028MODULE_LICENSE("GPL v2");
1029MODULE_DEVICE_TABLE(of, wmt_mci_dt_ids);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 11:20:30 -0500