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-rw-r--r--drivers/mmc/host/sdhci-pci.c3
-rw-r--r--drivers/mmc/host/sdhci.c3
-rw-r--r--drivers/mmc/host/sdhci.h2
3 files changed, 2 insertions, 6 deletions
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index f07255cb17ee..8cff5f5e7f86 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -144,8 +144,7 @@ static int jmicron_probe(struct sdhci_pci_chip *chip)
144 SDHCI_QUIRK_32BIT_DMA_SIZE | 144 SDHCI_QUIRK_32BIT_DMA_SIZE |
145 SDHCI_QUIRK_32BIT_ADMA_SIZE | 145 SDHCI_QUIRK_32BIT_ADMA_SIZE |
146 SDHCI_QUIRK_RESET_AFTER_REQUEST | 146 SDHCI_QUIRK_RESET_AFTER_REQUEST |
147 SDHCI_QUIRK_BROKEN_SMALL_PIO | 147 SDHCI_QUIRK_BROKEN_SMALL_PIO;
148 SDHCI_QUIRK_FORCE_HIGHSPEED;
149 } 148 }
150 149
151 /* 150 /*
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 6b2d1f99af67..24d7414a3315 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1636,8 +1636,7 @@ int sdhci_add_host(struct sdhci_host *host)
1636 mmc->f_max = host->max_clk; 1636 mmc->f_max = host->max_clk;
1637 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 1637 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1638 1638
1639 if ((caps & SDHCI_CAN_DO_HISPD) || 1639 if (caps & SDHCI_CAN_DO_HISPD)
1640 (host->quirks & SDHCI_QUIRK_FORCE_HIGHSPEED))
1641 mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1640 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1642 1641
1643 mmc->ocr_avail = 0; 1642 mmc->ocr_avail = 0;
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 3efba2363941..ffeab227d95b 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -208,8 +208,6 @@ struct sdhci_host {
208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) 208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)
209/* Controller has an issue with buffer bits for small transfers */ 209/* Controller has an issue with buffer bits for small transfers */
210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) 210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
211/* Controller supports high speed but doesn't have the caps bit set */
212#define SDHCI_QUIRK_FORCE_HIGHSPEED (1<<14)
213 211
214 int irq; /* Device IRQ */ 212 int irq; /* Device IRQ */
215 void __iomem * ioaddr; /* Mapped address */ 213 void __iomem * ioaddr; /* Mapped address */