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-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 968a70f1a420..24daaf4e20ba 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -36,6 +36,9 @@
36#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1) 36#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1)
37#define ESDHC_WTMK_LVL 0x44 37#define ESDHC_WTMK_LVL 0x44
38#define ESDHC_MIX_CTRL 0x48 38#define ESDHC_MIX_CTRL 0x48
39#define ESDHC_MIX_CTRL_AC23EN (1 << 7)
40/* Bits 3 and 6 are not SDHCI standard definitions */
41#define ESDHC_MIX_CTRL_SDHCI_MASK 0xb7
39 42
40/* 43/*
41 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC: 44 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
@@ -251,7 +254,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
251 254
252 if (is_imx6q_usdhc(imx_data)) { 255 if (is_imx6q_usdhc(imx_data)) {
253 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL); 256 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
254 m = val | (m & 0xffff0000); 257 /* Swap AC23 bit */
258 if (val & SDHCI_TRNS_AUTO_CMD23) {
259 val &= ~SDHCI_TRNS_AUTO_CMD23;
260 val |= ESDHC_MIX_CTRL_AC23EN;
261 }
262 m = val | (m & ~ESDHC_MIX_CTRL_SDHCI_MASK);
255 writel(m, host->ioaddr + ESDHC_MIX_CTRL); 263 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
256 } else { 264 } else {
257 /* 265 /*