diff options
Diffstat (limited to 'drivers/mmc/sdhci.h')
-rw-r--r-- | drivers/mmc/sdhci.h | 34 |
1 files changed, 30 insertions, 4 deletions
diff --git a/drivers/mmc/sdhci.h b/drivers/mmc/sdhci.h index 3b270ef486b4..f2453343f783 100644 --- a/drivers/mmc/sdhci.h +++ b/drivers/mmc/sdhci.h | |||
@@ -12,6 +12,10 @@ | |||
12 | * PCI registers | 12 | * PCI registers |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #define PCI_SDHCI_IFPIO 0x00 | ||
16 | #define PCI_SDHCI_IFDMA 0x01 | ||
17 | #define PCI_SDHCI_IFVENDOR 0x02 | ||
18 | |||
15 | #define PCI_SLOT_INFO 0x40 /* 8 bits */ | 19 | #define PCI_SLOT_INFO 0x40 /* 8 bits */ |
16 | #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) | 20 | #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) |
17 | #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 | 21 | #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 |
@@ -23,6 +27,7 @@ | |||
23 | #define SDHCI_DMA_ADDRESS 0x00 | 27 | #define SDHCI_DMA_ADDRESS 0x00 |
24 | 28 | ||
25 | #define SDHCI_BLOCK_SIZE 0x04 | 29 | #define SDHCI_BLOCK_SIZE 0x04 |
30 | #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) | ||
26 | 31 | ||
27 | #define SDHCI_BLOCK_COUNT 0x06 | 32 | #define SDHCI_BLOCK_COUNT 0x06 |
28 | 33 | ||
@@ -67,6 +72,10 @@ | |||
67 | #define SDHCI_CTRL_4BITBUS 0x02 | 72 | #define SDHCI_CTRL_4BITBUS 0x02 |
68 | 73 | ||
69 | #define SDHCI_POWER_CONTROL 0x29 | 74 | #define SDHCI_POWER_CONTROL 0x29 |
75 | #define SDHCI_POWER_ON 0x01 | ||
76 | #define SDHCI_POWER_180 0x0A | ||
77 | #define SDHCI_POWER_300 0x0C | ||
78 | #define SDHCI_POWER_330 0x0E | ||
70 | 79 | ||
71 | #define SDHCI_BLOCK_GAP_CONTROL 0x2A | 80 | #define SDHCI_BLOCK_GAP_CONTROL 0x2A |
72 | 81 | ||
@@ -91,8 +100,8 @@ | |||
91 | #define SDHCI_INT_RESPONSE 0x00000001 | 100 | #define SDHCI_INT_RESPONSE 0x00000001 |
92 | #define SDHCI_INT_DATA_END 0x00000002 | 101 | #define SDHCI_INT_DATA_END 0x00000002 |
93 | #define SDHCI_INT_DMA_END 0x00000008 | 102 | #define SDHCI_INT_DMA_END 0x00000008 |
94 | #define SDHCI_INT_BUF_EMPTY 0x00000010 | 103 | #define SDHCI_INT_SPACE_AVAIL 0x00000010 |
95 | #define SDHCI_INT_BUF_FULL 0x00000020 | 104 | #define SDHCI_INT_DATA_AVAIL 0x00000020 |
96 | #define SDHCI_INT_CARD_INSERT 0x00000040 | 105 | #define SDHCI_INT_CARD_INSERT 0x00000040 |
97 | #define SDHCI_INT_CARD_REMOVE 0x00000080 | 106 | #define SDHCI_INT_CARD_REMOVE 0x00000080 |
98 | #define SDHCI_INT_CARD_INT 0x00000100 | 107 | #define SDHCI_INT_CARD_INT 0x00000100 |
@@ -112,7 +121,7 @@ | |||
112 | #define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ | 121 | #define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ |
113 | SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) | 122 | SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) |
114 | #define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ | 123 | #define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ |
115 | SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL | \ | 124 | SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ |
116 | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ | 125 | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ |
117 | SDHCI_INT_DATA_END_BIT) | 126 | SDHCI_INT_DATA_END_BIT) |
118 | 127 | ||
@@ -121,9 +130,17 @@ | |||
121 | /* 3E-3F reserved */ | 130 | /* 3E-3F reserved */ |
122 | 131 | ||
123 | #define SDHCI_CAPABILITIES 0x40 | 132 | #define SDHCI_CAPABILITIES 0x40 |
124 | #define SDHCI_CAN_DO_DMA 0x00400000 | 133 | #define SDHCI_TIMEOUT_CLK_MASK 0x0000003F |
134 | #define SDHCI_TIMEOUT_CLK_SHIFT 0 | ||
135 | #define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 | ||
125 | #define SDHCI_CLOCK_BASE_MASK 0x00003F00 | 136 | #define SDHCI_CLOCK_BASE_MASK 0x00003F00 |
126 | #define SDHCI_CLOCK_BASE_SHIFT 8 | 137 | #define SDHCI_CLOCK_BASE_SHIFT 8 |
138 | #define SDHCI_MAX_BLOCK_MASK 0x00030000 | ||
139 | #define SDHCI_MAX_BLOCK_SHIFT 16 | ||
140 | #define SDHCI_CAN_DO_DMA 0x00400000 | ||
141 | #define SDHCI_CAN_VDD_330 0x01000000 | ||
142 | #define SDHCI_CAN_VDD_300 0x02000000 | ||
143 | #define SDHCI_CAN_VDD_180 0x04000000 | ||
127 | 144 | ||
128 | /* 44-47 reserved for more caps */ | 145 | /* 44-47 reserved for more caps */ |
129 | 146 | ||
@@ -136,6 +153,10 @@ | |||
136 | #define SDHCI_SLOT_INT_STATUS 0xFC | 153 | #define SDHCI_SLOT_INT_STATUS 0xFC |
137 | 154 | ||
138 | #define SDHCI_HOST_VERSION 0xFE | 155 | #define SDHCI_HOST_VERSION 0xFE |
156 | #define SDHCI_VENDOR_VER_MASK 0xFF00 | ||
157 | #define SDHCI_VENDOR_VER_SHIFT 8 | ||
158 | #define SDHCI_SPEC_VER_MASK 0x00FF | ||
159 | #define SDHCI_SPEC_VER_SHIFT 0 | ||
139 | 160 | ||
140 | struct sdhci_chip; | 161 | struct sdhci_chip; |
141 | 162 | ||
@@ -149,8 +170,11 @@ struct sdhci_host { | |||
149 | #define SDHCI_USE_DMA (1<<0) | 170 | #define SDHCI_USE_DMA (1<<0) |
150 | 171 | ||
151 | unsigned int max_clk; /* Max possible freq (MHz) */ | 172 | unsigned int max_clk; /* Max possible freq (MHz) */ |
173 | unsigned int timeout_clk; /* Timeout freq (KHz) */ | ||
174 | unsigned int max_block; /* Max block size (bytes) */ | ||
152 | 175 | ||
153 | unsigned int clock; /* Current clock (MHz) */ | 176 | unsigned int clock; /* Current clock (MHz) */ |
177 | unsigned short power; /* Current voltage */ | ||
154 | 178 | ||
155 | struct mmc_request *mrq; /* Current request */ | 179 | struct mmc_request *mrq; /* Current request */ |
156 | struct mmc_command *cmd; /* Current command */ | 180 | struct mmc_command *cmd; /* Current command */ |
@@ -180,6 +204,8 @@ struct sdhci_host { | |||
180 | struct sdhci_chip { | 204 | struct sdhci_chip { |
181 | struct pci_dev *pdev; | 205 | struct pci_dev *pdev; |
182 | 206 | ||
207 | unsigned long quirks; | ||
208 | |||
183 | int num_slots; /* Slots on controller */ | 209 | int num_slots; /* Slots on controller */ |
184 | struct sdhci_host *hosts[0]; /* Pointers to hosts */ | 210 | struct sdhci_host *hosts[0]; /* Pointers to hosts */ |
185 | }; | 211 | }; |