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path: root/drivers/mmc/host/sdhci.c
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Diffstat (limited to 'drivers/mmc/host/sdhci.c')
-rw-r--r--drivers/mmc/host/sdhci.c54
1 files changed, 43 insertions, 11 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 782c0ee3c925..a25db426c910 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1185,17 +1185,31 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1185 if (host->ops->platform_send_init_74_clocks) 1185 if (host->ops->platform_send_init_74_clocks)
1186 host->ops->platform_send_init_74_clocks(host, ios->power_mode); 1186 host->ops->platform_send_init_74_clocks(host, ios->power_mode);
1187 1187
1188 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 1188 /*
1189 1189 * If your platform has 8-bit width support but is not a v3 controller,
1190 if (ios->bus_width == MMC_BUS_WIDTH_8) 1190 * or if it requires special setup code, you should implement that in
1191 ctrl |= SDHCI_CTRL_8BITBUS; 1191 * platform_8bit_width().
1192 else 1192 */
1193 ctrl &= ~SDHCI_CTRL_8BITBUS; 1193 if (host->ops->platform_8bit_width)
1194 host->ops->platform_8bit_width(host, ios->bus_width);
1195 else {
1196 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1197 if (ios->bus_width == MMC_BUS_WIDTH_8) {
1198 ctrl &= ~SDHCI_CTRL_4BITBUS;
1199 if (host->version >= SDHCI_SPEC_300)
1200 ctrl |= SDHCI_CTRL_8BITBUS;
1201 } else {
1202 if (host->version >= SDHCI_SPEC_300)
1203 ctrl &= ~SDHCI_CTRL_8BITBUS;
1204 if (ios->bus_width == MMC_BUS_WIDTH_4)
1205 ctrl |= SDHCI_CTRL_4BITBUS;
1206 else
1207 ctrl &= ~SDHCI_CTRL_4BITBUS;
1208 }
1209 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1210 }
1194 1211
1195 if (ios->bus_width == MMC_BUS_WIDTH_4) 1212 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1196 ctrl |= SDHCI_CTRL_4BITBUS;
1197 else
1198 ctrl &= ~SDHCI_CTRL_4BITBUS;
1199 1213
1200 if ((ios->timing == MMC_TIMING_SD_HS || 1214 if ((ios->timing == MMC_TIMING_SD_HS ||
1201 ios->timing == MMC_TIMING_MMC_HS) 1215 ios->timing == MMC_TIMING_MMC_HS)
@@ -1681,6 +1695,16 @@ int sdhci_resume_host(struct sdhci_host *host)
1681 1695
1682EXPORT_SYMBOL_GPL(sdhci_resume_host); 1696EXPORT_SYMBOL_GPL(sdhci_resume_host);
1683 1697
1698void sdhci_enable_irq_wakeups(struct sdhci_host *host)
1699{
1700 u8 val;
1701 val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL);
1702 val |= SDHCI_WAKE_ON_INT;
1703 sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL);
1704}
1705
1706EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups);
1707
1684#endif /* CONFIG_PM */ 1708#endif /* CONFIG_PM */
1685 1709
1686/*****************************************************************************\ 1710/*****************************************************************************\
@@ -1845,11 +1869,19 @@ int sdhci_add_host(struct sdhci_host *host)
1845 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; 1869 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1846 else 1870 else
1847 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; 1871 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
1872
1848 mmc->f_max = host->max_clk; 1873 mmc->f_max = host->max_clk;
1849 mmc->caps |= MMC_CAP_SDIO_IRQ; 1874 mmc->caps |= MMC_CAP_SDIO_IRQ;
1850 1875
1876 /*
1877 * A controller may support 8-bit width, but the board itself
1878 * might not have the pins brought out. Boards that support
1879 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in
1880 * their platform code before calling sdhci_add_host(), and we
1881 * won't assume 8-bit width for hosts without that CAP.
1882 */
1851 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 1883 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
1852 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; 1884 mmc->caps |= MMC_CAP_4_BIT_DATA;
1853 1885
1854 if (caps & SDHCI_CAN_DO_HISPD) 1886 if (caps & SDHCI_CAN_DO_HISPD)
1855 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1887 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;