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path: root/drivers/mmc/host/sdhci.c
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Diffstat (limited to 'drivers/mmc/host/sdhci.c')
-rw-r--r--drivers/mmc/host/sdhci.c32
1 files changed, 29 insertions, 3 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 758a7417eb50..a5300f238d98 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -43,6 +43,10 @@ static unsigned int debug_quirks = 0;
43#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) 43#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
44/* Controller has an unusable DMA engine */ 44/* Controller has an unusable DMA engine */
45#define SDHCI_QUIRK_BROKEN_DMA (1<<5) 45#define SDHCI_QUIRK_BROKEN_DMA (1<<5)
46/* Controller can only DMA from 32-bit aligned addresses */
47#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6)
48/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
49#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7)
46 50
47static const struct pci_device_id pci_ids[] __devinitdata = { 51static const struct pci_device_id pci_ids[] __devinitdata = {
48 { 52 {
@@ -429,7 +433,29 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
429 433
430 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL); 434 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
431 435
432 if (host->flags & SDHCI_USE_DMA) { 436 if (host->flags & SDHCI_USE_DMA)
437 host->flags |= SDHCI_REQ_USE_DMA;
438
439 if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
440 (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) &&
441 ((data->blksz * data->blocks) & 0x3))) {
442 DBG("Reverting to PIO because of transfer size (%d)\n",
443 data->blksz * data->blocks);
444 host->flags &= ~SDHCI_REQ_USE_DMA;
445 }
446
447 /*
448 * The assumption here being that alignment is the same after
449 * translation to device address space.
450 */
451 if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
452 (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
453 (data->sg->offset & 0x3))) {
454 DBG("Reverting to PIO because of bad alignment\n");
455 host->flags &= ~SDHCI_REQ_USE_DMA;
456 }
457
458 if (host->flags & SDHCI_REQ_USE_DMA) {
433 int count; 459 int count;
434 460
435 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len, 461 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
@@ -466,7 +492,7 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
466 mode |= SDHCI_TRNS_MULTI; 492 mode |= SDHCI_TRNS_MULTI;
467 if (data->flags & MMC_DATA_READ) 493 if (data->flags & MMC_DATA_READ)
468 mode |= SDHCI_TRNS_READ; 494 mode |= SDHCI_TRNS_READ;
469 if (host->flags & SDHCI_USE_DMA) 495 if (host->flags & SDHCI_REQ_USE_DMA)
470 mode |= SDHCI_TRNS_DMA; 496 mode |= SDHCI_TRNS_DMA;
471 497
472 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); 498 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
@@ -482,7 +508,7 @@ static void sdhci_finish_data(struct sdhci_host *host)
482 data = host->data; 508 data = host->data;
483 host->data = NULL; 509 host->data = NULL;
484 510
485 if (host->flags & SDHCI_USE_DMA) { 511 if (host->flags & SDHCI_REQ_USE_DMA) {
486 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len, 512 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
487 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); 513 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
488 } 514 }