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path: root/drivers/mmc/host/sdhci.c
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Diffstat (limited to 'drivers/mmc/host/sdhci.c')
-rw-r--r--drivers/mmc/host/sdhci.c155
1 files changed, 104 insertions, 51 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 37b2a9ae52ef..ada1a3ea3a87 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -707,19 +707,28 @@ static void sdhci_set_transfer_irqs(struct sdhci_host *host)
707 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 707 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
708} 708}
709 709
710static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) 710static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)
711{ 711{
712 u8 count; 712 u8 count;
713
714 if (host->ops->set_timeout) {
715 host->ops->set_timeout(host, cmd);
716 } else {
717 count = sdhci_calc_timeout(host, cmd);
718 sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
719 }
720}
721
722static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
723{
713 u8 ctrl; 724 u8 ctrl;
714 struct mmc_data *data = cmd->data; 725 struct mmc_data *data = cmd->data;
715 int ret; 726 int ret;
716 727
717 WARN_ON(host->data); 728 WARN_ON(host->data);
718 729
719 if (data || (cmd->flags & MMC_RSP_BUSY)) { 730 if (data || (cmd->flags & MMC_RSP_BUSY))
720 count = sdhci_calc_timeout(host, cmd); 731 sdhci_set_timeout(host, cmd);
721 sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
722 }
723 732
724 if (!data) 733 if (!data)
725 return; 734 return;
@@ -1007,6 +1016,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
1007 mod_timer(&host->timer, timeout); 1016 mod_timer(&host->timer, timeout);
1008 1017
1009 host->cmd = cmd; 1018 host->cmd = cmd;
1019 host->busy_handle = 0;
1010 1020
1011 sdhci_prepare_data(host, cmd); 1021 sdhci_prepare_data(host, cmd);
1012 1022
@@ -1194,7 +1204,6 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
1194clock_set: 1204clock_set:
1195 if (real_div) 1205 if (real_div)
1196 host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; 1206 host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
1197
1198 clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; 1207 clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1199 clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) 1208 clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1200 << SDHCI_DIVIDER_HI_SHIFT; 1209 << SDHCI_DIVIDER_HI_SHIFT;
@@ -1357,11 +1366,12 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1357 present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); 1366 present_state = sdhci_readl(host, SDHCI_PRESENT_STATE);
1358 /* 1367 /*
1359 * Check if the re-tuning timer has already expired and there 1368 * Check if the re-tuning timer has already expired and there
1360 * is no on-going data transfer. If so, we need to execute 1369 * is no on-going data transfer and DAT0 is not busy. If so,
1361 * tuning procedure before sending command. 1370 * we need to execute tuning procedure before sending command.
1362 */ 1371 */
1363 if ((host->flags & SDHCI_NEEDS_RETUNING) && 1372 if ((host->flags & SDHCI_NEEDS_RETUNING) &&
1364 !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { 1373 !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ)) &&
1374 (present_state & SDHCI_DATA_0_LVL_MASK)) {
1365 if (mmc->card) { 1375 if (mmc->card) {
1366 /* eMMC uses cmd21 but sd and sdio use cmd19 */ 1376 /* eMMC uses cmd21 but sd and sdio use cmd19 */
1367 tuning_opcode = 1377 tuning_opcode =
@@ -1471,6 +1481,18 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
1471 if (!ios->clock || ios->clock != host->clock) { 1481 if (!ios->clock || ios->clock != host->clock) {
1472 host->ops->set_clock(host, ios->clock); 1482 host->ops->set_clock(host, ios->clock);
1473 host->clock = ios->clock; 1483 host->clock = ios->clock;
1484
1485 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK &&
1486 host->clock) {
1487 host->timeout_clk = host->mmc->actual_clock ?
1488 host->mmc->actual_clock / 1000 :
1489 host->clock / 1000;
1490 host->mmc->max_busy_timeout =
1491 host->ops->get_max_timeout_count ?
1492 host->ops->get_max_timeout_count(host) :
1493 1 << 27;
1494 host->mmc->max_busy_timeout /= host->timeout_clk;
1495 }
1474 } 1496 }
1475 1497
1476 sdhci_set_power(host, ios->power_mode, ios->vdd); 1498 sdhci_set_power(host, ios->power_mode, ios->vdd);
@@ -1733,8 +1755,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1733 ret = regulator_set_voltage(mmc->supply.vqmmc, 2700000, 1755 ret = regulator_set_voltage(mmc->supply.vqmmc, 2700000,
1734 3600000); 1756 3600000);
1735 if (ret) { 1757 if (ret) {
1736 pr_warning("%s: Switching to 3.3V signalling voltage " 1758 pr_warn("%s: Switching to 3.3V signalling voltage failed\n",
1737 " failed\n", mmc_hostname(mmc)); 1759 mmc_hostname(mmc));
1738 return -EIO; 1760 return -EIO;
1739 } 1761 }
1740 } 1762 }
@@ -1746,8 +1768,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1746 if (!(ctrl & SDHCI_CTRL_VDD_180)) 1768 if (!(ctrl & SDHCI_CTRL_VDD_180))
1747 return 0; 1769 return 0;
1748 1770
1749 pr_warning("%s: 3.3V regulator output did not became stable\n", 1771 pr_warn("%s: 3.3V regulator output did not became stable\n",
1750 mmc_hostname(mmc)); 1772 mmc_hostname(mmc));
1751 1773
1752 return -EAGAIN; 1774 return -EAGAIN;
1753 case MMC_SIGNAL_VOLTAGE_180: 1775 case MMC_SIGNAL_VOLTAGE_180:
@@ -1755,8 +1777,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1755 ret = regulator_set_voltage(mmc->supply.vqmmc, 1777 ret = regulator_set_voltage(mmc->supply.vqmmc,
1756 1700000, 1950000); 1778 1700000, 1950000);
1757 if (ret) { 1779 if (ret) {
1758 pr_warning("%s: Switching to 1.8V signalling voltage " 1780 pr_warn("%s: Switching to 1.8V signalling voltage failed\n",
1759 " failed\n", mmc_hostname(mmc)); 1781 mmc_hostname(mmc));
1760 return -EIO; 1782 return -EIO;
1761 } 1783 }
1762 } 1784 }
@@ -1773,8 +1795,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1773 if (ctrl & SDHCI_CTRL_VDD_180) 1795 if (ctrl & SDHCI_CTRL_VDD_180)
1774 return 0; 1796 return 0;
1775 1797
1776 pr_warning("%s: 1.8V regulator output did not became stable\n", 1798 pr_warn("%s: 1.8V regulator output did not became stable\n",
1777 mmc_hostname(mmc)); 1799 mmc_hostname(mmc));
1778 1800
1779 return -EAGAIN; 1801 return -EAGAIN;
1780 case MMC_SIGNAL_VOLTAGE_120: 1802 case MMC_SIGNAL_VOLTAGE_120:
@@ -1782,8 +1804,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1782 ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000, 1804 ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000,
1783 1300000); 1805 1300000);
1784 if (ret) { 1806 if (ret) {
1785 pr_warning("%s: Switching to 1.2V signalling voltage " 1807 pr_warn("%s: Switching to 1.2V signalling voltage failed\n",
1786 " failed\n", mmc_hostname(mmc)); 1808 mmc_hostname(mmc));
1787 return -EIO; 1809 return -EIO;
1788 } 1810 }
1789 } 1811 }
@@ -2203,7 +2225,7 @@ static void sdhci_tuning_timer(unsigned long data)
2203 * * 2225 * *
2204\*****************************************************************************/ 2226\*****************************************************************************/
2205 2227
2206static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 2228static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *mask)
2207{ 2229{
2208 BUG_ON(intmask == 0); 2230 BUG_ON(intmask == 0);
2209 2231
@@ -2241,11 +2263,18 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
2241 if (host->cmd->data) 2263 if (host->cmd->data)
2242 DBG("Cannot wait for busy signal when also " 2264 DBG("Cannot wait for busy signal when also "
2243 "doing a data transfer"); 2265 "doing a data transfer");
2244 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) 2266 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)
2267 && !host->busy_handle) {
2268 /* Mark that command complete before busy is ended */
2269 host->busy_handle = 1;
2245 return; 2270 return;
2271 }
2246 2272
2247 /* The controller does not support the end-of-busy IRQ, 2273 /* The controller does not support the end-of-busy IRQ,
2248 * fall through and take the SDHCI_INT_RESPONSE */ 2274 * fall through and take the SDHCI_INT_RESPONSE */
2275 } else if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) &&
2276 host->cmd->opcode == MMC_STOP_TRANSMISSION && !host->data) {
2277 *mask &= ~SDHCI_INT_DATA_END;
2249 } 2278 }
2250 2279
2251 if (intmask & SDHCI_INT_RESPONSE) 2280 if (intmask & SDHCI_INT_RESPONSE)
@@ -2304,8 +2333,21 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
2304 * above in sdhci_cmd_irq(). 2333 * above in sdhci_cmd_irq().
2305 */ 2334 */
2306 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { 2335 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
2336 if (intmask & SDHCI_INT_DATA_TIMEOUT) {
2337 host->cmd->error = -ETIMEDOUT;
2338 tasklet_schedule(&host->finish_tasklet);
2339 return;
2340 }
2307 if (intmask & SDHCI_INT_DATA_END) { 2341 if (intmask & SDHCI_INT_DATA_END) {
2308 sdhci_finish_command(host); 2342 /*
2343 * Some cards handle busy-end interrupt
2344 * before the command completed, so make
2345 * sure we do things in the proper order.
2346 */
2347 if (host->busy_handle)
2348 sdhci_finish_command(host);
2349 else
2350 host->busy_handle = 1;
2309 return; 2351 return;
2310 } 2352 }
2311 } 2353 }
@@ -2442,7 +2484,8 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
2442 } 2484 }
2443 2485
2444 if (intmask & SDHCI_INT_CMD_MASK) 2486 if (intmask & SDHCI_INT_CMD_MASK)
2445 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 2487 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK,
2488 &intmask);
2446 2489
2447 if (intmask & SDHCI_INT_DATA_MASK) 2490 if (intmask & SDHCI_INT_DATA_MASK)
2448 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 2491 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
@@ -2534,7 +2577,7 @@ void sdhci_enable_irq_wakeups(struct sdhci_host *host)
2534} 2577}
2535EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); 2578EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups);
2536 2579
2537void sdhci_disable_irq_wakeups(struct sdhci_host *host) 2580static void sdhci_disable_irq_wakeups(struct sdhci_host *host)
2538{ 2581{
2539 u8 val; 2582 u8 val;
2540 u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE 2583 u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE
@@ -2544,7 +2587,6 @@ void sdhci_disable_irq_wakeups(struct sdhci_host *host)
2544 val &= ~mask; 2587 val &= ~mask;
2545 sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); 2588 sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL);
2546} 2589}
2547EXPORT_SYMBOL_GPL(sdhci_disable_irq_wakeups);
2548 2590
2549int sdhci_suspend_host(struct sdhci_host *host) 2591int sdhci_suspend_host(struct sdhci_host *host)
2550{ 2592{
@@ -2749,6 +2791,7 @@ int sdhci_add_host(struct sdhci_host *host)
2749 u32 caps[2] = {0, 0}; 2791 u32 caps[2] = {0, 0};
2750 u32 max_current_caps; 2792 u32 max_current_caps;
2751 unsigned int ocr_avail; 2793 unsigned int ocr_avail;
2794 unsigned int override_timeout_clk;
2752 int ret; 2795 int ret;
2753 2796
2754 WARN_ON(host == NULL); 2797 WARN_ON(host == NULL);
@@ -2762,6 +2805,8 @@ int sdhci_add_host(struct sdhci_host *host)
2762 if (debug_quirks2) 2805 if (debug_quirks2)
2763 host->quirks2 = debug_quirks2; 2806 host->quirks2 = debug_quirks2;
2764 2807
2808 override_timeout_clk = host->timeout_clk;
2809
2765 sdhci_do_reset(host, SDHCI_RESET_ALL); 2810 sdhci_do_reset(host, SDHCI_RESET_ALL);
2766 2811
2767 host->version = sdhci_readw(host, SDHCI_HOST_VERSION); 2812 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -2807,8 +2852,7 @@ int sdhci_add_host(struct sdhci_host *host)
2807 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2852 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
2808 if (host->ops->enable_dma) { 2853 if (host->ops->enable_dma) {
2809 if (host->ops->enable_dma(host)) { 2854 if (host->ops->enable_dma(host)) {
2810 pr_warning("%s: No suitable DMA " 2855 pr_warn("%s: No suitable DMA available - falling back to PIO\n",
2811 "available. Falling back to PIO.\n",
2812 mmc_hostname(mmc)); 2856 mmc_hostname(mmc));
2813 host->flags &= 2857 host->flags &=
2814 ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); 2858 ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA);
@@ -2830,15 +2874,14 @@ int sdhci_add_host(struct sdhci_host *host)
2830 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, 2874 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE,
2831 host->adma_desc, host->adma_addr); 2875 host->adma_desc, host->adma_addr);
2832 kfree(host->align_buffer); 2876 kfree(host->align_buffer);
2833 pr_warning("%s: Unable to allocate ADMA " 2877 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n",
2834 "buffers. Falling back to standard DMA.\n",
2835 mmc_hostname(mmc)); 2878 mmc_hostname(mmc));
2836 host->flags &= ~SDHCI_USE_ADMA; 2879 host->flags &= ~SDHCI_USE_ADMA;
2837 host->adma_desc = NULL; 2880 host->adma_desc = NULL;
2838 host->align_buffer = NULL; 2881 host->align_buffer = NULL;
2839 } else if (host->adma_addr & 3) { 2882 } else if (host->adma_addr & 3) {
2840 pr_warning("%s: unable to allocate aligned ADMA descriptor\n", 2883 pr_warn("%s: unable to allocate aligned ADMA descriptor\n",
2841 mmc_hostname(mmc)); 2884 mmc_hostname(mmc));
2842 host->flags &= ~SDHCI_USE_ADMA; 2885 host->flags &= ~SDHCI_USE_ADMA;
2843 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, 2886 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE,
2844 host->adma_desc, host->adma_addr); 2887 host->adma_desc, host->adma_addr);
@@ -2908,25 +2951,30 @@ int sdhci_add_host(struct sdhci_host *host)
2908 } else 2951 } else
2909 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; 2952 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
2910 2953
2911 host->timeout_clk = 2954 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
2912 (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 2955 host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >>
2913 if (host->timeout_clk == 0) { 2956 SDHCI_TIMEOUT_CLK_SHIFT;
2914 if (host->ops->get_timeout_clock) { 2957 if (host->timeout_clk == 0) {
2915 host->timeout_clk = host->ops->get_timeout_clock(host); 2958 if (host->ops->get_timeout_clock) {
2916 } else if (!(host->quirks & 2959 host->timeout_clk =
2917 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { 2960 host->ops->get_timeout_clock(host);
2918 pr_err("%s: Hardware doesn't specify timeout clock " 2961 } else {
2919 "frequency.\n", mmc_hostname(mmc)); 2962 pr_err("%s: Hardware doesn't specify timeout clock frequency.\n",
2920 return -ENODEV; 2963 mmc_hostname(mmc));
2964 return -ENODEV;
2965 }
2921 } 2966 }
2922 }
2923 if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT)
2924 host->timeout_clk *= 1000;
2925 2967
2926 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) 2968 if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT)
2927 host->timeout_clk = mmc->f_max / 1000; 2969 host->timeout_clk *= 1000;
2928 2970
2929 mmc->max_busy_timeout = (1 << 27) / host->timeout_clk; 2971 mmc->max_busy_timeout = host->ops->get_max_timeout_count ?
2972 host->ops->get_max_timeout_count(host) : 1 << 27;
2973 mmc->max_busy_timeout /= host->timeout_clk;
2974 }
2975
2976 if (override_timeout_clk)
2977 host->timeout_clk = override_timeout_clk;
2930 2978
2931 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; 2979 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23;
2932 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; 2980 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
@@ -2998,8 +3046,13 @@ int sdhci_add_host(struct sdhci_host *host)
2998 /* SD3.0: SDR104 is supported so (for eMMC) the caps2 3046 /* SD3.0: SDR104 is supported so (for eMMC) the caps2
2999 * field can be promoted to support HS200. 3047 * field can be promoted to support HS200.
3000 */ 3048 */
3001 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) 3049 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) {
3002 mmc->caps2 |= MMC_CAP2_HS200; 3050 mmc->caps2 |= MMC_CAP2_HS200;
3051 if (IS_ERR(mmc->supply.vqmmc) ||
3052 !regulator_is_supported_voltage
3053 (mmc->supply.vqmmc, 1100000, 1300000))
3054 mmc->caps2 &= ~MMC_CAP2_HS200_1_2V_SDR;
3055 }
3003 } else if (caps[1] & SDHCI_SUPPORT_SDR50) 3056 } else if (caps[1] & SDHCI_SUPPORT_SDR50)
3004 mmc->caps |= MMC_CAP_UHS_SDR50; 3057 mmc->caps |= MMC_CAP_UHS_SDR50;
3005 3058
@@ -3049,7 +3102,7 @@ int sdhci_add_host(struct sdhci_host *host)
3049 */ 3102 */
3050 max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); 3103 max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT);
3051 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { 3104 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) {
3052 u32 curr = regulator_get_current_limit(mmc->supply.vmmc); 3105 int curr = regulator_get_current_limit(mmc->supply.vmmc);
3053 if (curr > 0) { 3106 if (curr > 0) {
3054 3107
3055 /* convert to SDHCI_MAX_CURRENT format */ 3108 /* convert to SDHCI_MAX_CURRENT format */
@@ -3158,8 +3211,8 @@ int sdhci_add_host(struct sdhci_host *host)
3158 mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> 3211 mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
3159 SDHCI_MAX_BLOCK_SHIFT; 3212 SDHCI_MAX_BLOCK_SHIFT;
3160 if (mmc->max_blk_size >= 3) { 3213 if (mmc->max_blk_size >= 3) {
3161 pr_warning("%s: Invalid maximum block size, " 3214 pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
3162 "assuming 512 bytes\n", mmc_hostname(mmc)); 3215 mmc_hostname(mmc));
3163 mmc->max_blk_size = 0; 3216 mmc->max_blk_size = 0;
3164 } 3217 }
3165 } 3218 }