diff options
Diffstat (limited to 'drivers/mmc/host/sdhci.c')
-rw-r--r-- | drivers/mmc/host/sdhci.c | 86 |
1 files changed, 57 insertions, 29 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 401527d273b5..782c0ee3c925 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -47,7 +47,8 @@ static void sdhci_finish_command(struct sdhci_host *); | |||
47 | 47 | ||
48 | static void sdhci_dumpregs(struct sdhci_host *host) | 48 | static void sdhci_dumpregs(struct sdhci_host *host) |
49 | { | 49 | { |
50 | printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); | 50 | printk(KERN_DEBUG DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n", |
51 | mmc_hostname(host->mmc)); | ||
51 | 52 | ||
52 | printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", | 53 | printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", |
53 | sdhci_readl(host, SDHCI_DMA_ADDRESS), | 54 | sdhci_readl(host, SDHCI_DMA_ADDRESS), |
@@ -1001,13 +1002,28 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) | |||
1001 | if (clock == 0) | 1002 | if (clock == 0) |
1002 | goto out; | 1003 | goto out; |
1003 | 1004 | ||
1004 | for (div = 1;div < 256;div *= 2) { | 1005 | if (host->version >= SDHCI_SPEC_300) { |
1005 | if ((host->max_clk / div) <= clock) | 1006 | /* Version 3.00 divisors must be a multiple of 2. */ |
1006 | break; | 1007 | if (host->max_clk <= clock) |
1008 | div = 1; | ||
1009 | else { | ||
1010 | for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { | ||
1011 | if ((host->max_clk / div) <= clock) | ||
1012 | break; | ||
1013 | } | ||
1014 | } | ||
1015 | } else { | ||
1016 | /* Version 2.00 divisors must be a power of 2. */ | ||
1017 | for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { | ||
1018 | if ((host->max_clk / div) <= clock) | ||
1019 | break; | ||
1020 | } | ||
1007 | } | 1021 | } |
1008 | div >>= 1; | 1022 | div >>= 1; |
1009 | 1023 | ||
1010 | clk = div << SDHCI_DIVIDER_SHIFT; | 1024 | clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; |
1025 | clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) | ||
1026 | << SDHCI_DIVIDER_HI_SHIFT; | ||
1011 | clk |= SDHCI_CLOCK_INT_EN; | 1027 | clk |= SDHCI_CLOCK_INT_EN; |
1012 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); | 1028 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
1013 | 1029 | ||
@@ -1034,11 +1050,9 @@ out: | |||
1034 | 1050 | ||
1035 | static void sdhci_set_power(struct sdhci_host *host, unsigned short power) | 1051 | static void sdhci_set_power(struct sdhci_host *host, unsigned short power) |
1036 | { | 1052 | { |
1037 | u8 pwr; | 1053 | u8 pwr = 0; |
1038 | 1054 | ||
1039 | if (power == (unsigned short)-1) | 1055 | if (power != (unsigned short)-1) { |
1040 | pwr = 0; | ||
1041 | else { | ||
1042 | switch (1 << power) { | 1056 | switch (1 << power) { |
1043 | case MMC_VDD_165_195: | 1057 | case MMC_VDD_165_195: |
1044 | pwr = SDHCI_POWER_180; | 1058 | pwr = SDHCI_POWER_180; |
@@ -1168,6 +1182,9 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
1168 | else | 1182 | else |
1169 | sdhci_set_power(host, ios->vdd); | 1183 | sdhci_set_power(host, ios->vdd); |
1170 | 1184 | ||
1185 | if (host->ops->platform_send_init_74_clocks) | ||
1186 | host->ops->platform_send_init_74_clocks(host, ios->power_mode); | ||
1187 | |||
1171 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); | 1188 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
1172 | 1189 | ||
1173 | if (ios->bus_width == MMC_BUS_WIDTH_8) | 1190 | if (ios->bus_width == MMC_BUS_WIDTH_8) |
@@ -1180,8 +1197,9 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
1180 | else | 1197 | else |
1181 | ctrl &= ~SDHCI_CTRL_4BITBUS; | 1198 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
1182 | 1199 | ||
1183 | if (ios->timing == MMC_TIMING_SD_HS && | 1200 | if ((ios->timing == MMC_TIMING_SD_HS || |
1184 | !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) | 1201 | ios->timing == MMC_TIMING_MMC_HS) |
1202 | && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) | ||
1185 | ctrl |= SDHCI_CTRL_HISPD; | 1203 | ctrl |= SDHCI_CTRL_HISPD; |
1186 | else | 1204 | else |
1187 | ctrl &= ~SDHCI_CTRL_HISPD; | 1205 | ctrl &= ~SDHCI_CTRL_HISPD; |
@@ -1205,22 +1223,25 @@ static int sdhci_get_ro(struct mmc_host *mmc) | |||
1205 | { | 1223 | { |
1206 | struct sdhci_host *host; | 1224 | struct sdhci_host *host; |
1207 | unsigned long flags; | 1225 | unsigned long flags; |
1208 | int present; | 1226 | int is_readonly; |
1209 | 1227 | ||
1210 | host = mmc_priv(mmc); | 1228 | host = mmc_priv(mmc); |
1211 | 1229 | ||
1212 | spin_lock_irqsave(&host->lock, flags); | 1230 | spin_lock_irqsave(&host->lock, flags); |
1213 | 1231 | ||
1214 | if (host->flags & SDHCI_DEVICE_DEAD) | 1232 | if (host->flags & SDHCI_DEVICE_DEAD) |
1215 | present = 0; | 1233 | is_readonly = 0; |
1234 | else if (host->ops->get_ro) | ||
1235 | is_readonly = host->ops->get_ro(host); | ||
1216 | else | 1236 | else |
1217 | present = sdhci_readl(host, SDHCI_PRESENT_STATE); | 1237 | is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) |
1238 | & SDHCI_WRITE_PROTECT); | ||
1218 | 1239 | ||
1219 | spin_unlock_irqrestore(&host->lock, flags); | 1240 | spin_unlock_irqrestore(&host->lock, flags); |
1220 | 1241 | ||
1221 | if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT) | 1242 | /* This quirk needs to be replaced by a callback-function later */ |
1222 | return !!(present & SDHCI_WRITE_PROTECT); | 1243 | return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? |
1223 | return !(present & SDHCI_WRITE_PROTECT); | 1244 | !is_readonly : is_readonly; |
1224 | } | 1245 | } |
1225 | 1246 | ||
1226 | static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) | 1247 | static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) |
@@ -1427,7 +1448,7 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) | |||
1427 | sdhci_finish_command(host); | 1448 | sdhci_finish_command(host); |
1428 | } | 1449 | } |
1429 | 1450 | ||
1430 | #ifdef DEBUG | 1451 | #ifdef CONFIG_MMC_DEBUG |
1431 | static void sdhci_show_adma_error(struct sdhci_host *host) | 1452 | static void sdhci_show_adma_error(struct sdhci_host *host) |
1432 | { | 1453 | { |
1433 | const char *name = mmc_hostname(host->mmc); | 1454 | const char *name = mmc_hostname(host->mmc); |
@@ -1708,7 +1729,7 @@ int sdhci_add_host(struct sdhci_host *host) | |||
1708 | host->version = sdhci_readw(host, SDHCI_HOST_VERSION); | 1729 | host->version = sdhci_readw(host, SDHCI_HOST_VERSION); |
1709 | host->version = (host->version & SDHCI_SPEC_VER_MASK) | 1730 | host->version = (host->version & SDHCI_SPEC_VER_MASK) |
1710 | >> SDHCI_SPEC_VER_SHIFT; | 1731 | >> SDHCI_SPEC_VER_SHIFT; |
1711 | if (host->version > SDHCI_SPEC_200) { | 1732 | if (host->version > SDHCI_SPEC_300) { |
1712 | printk(KERN_ERR "%s: Unknown controller version (%d). " | 1733 | printk(KERN_ERR "%s: Unknown controller version (%d). " |
1713 | "You may experience problems.\n", mmc_hostname(mmc), | 1734 | "You may experience problems.\n", mmc_hostname(mmc), |
1714 | host->version); | 1735 | host->version); |
@@ -1779,8 +1800,13 @@ int sdhci_add_host(struct sdhci_host *host) | |||
1779 | mmc_dev(host->mmc)->dma_mask = &host->dma_mask; | 1800 | mmc_dev(host->mmc)->dma_mask = &host->dma_mask; |
1780 | } | 1801 | } |
1781 | 1802 | ||
1782 | host->max_clk = | 1803 | if (host->version >= SDHCI_SPEC_300) |
1783 | (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; | 1804 | host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) |
1805 | >> SDHCI_CLOCK_BASE_SHIFT; | ||
1806 | else | ||
1807 | host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) | ||
1808 | >> SDHCI_CLOCK_BASE_SHIFT; | ||
1809 | |||
1784 | host->max_clk *= 1000000; | 1810 | host->max_clk *= 1000000; |
1785 | if (host->max_clk == 0 || host->quirks & | 1811 | if (host->max_clk == 0 || host->quirks & |
1786 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { | 1812 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { |
@@ -1815,18 +1841,21 @@ int sdhci_add_host(struct sdhci_host *host) | |||
1815 | mmc->ops = &sdhci_ops; | 1841 | mmc->ops = &sdhci_ops; |
1816 | if (host->ops->get_min_clock) | 1842 | if (host->ops->get_min_clock) |
1817 | mmc->f_min = host->ops->get_min_clock(host); | 1843 | mmc->f_min = host->ops->get_min_clock(host); |
1844 | else if (host->version >= SDHCI_SPEC_300) | ||
1845 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; | ||
1818 | else | 1846 | else |
1819 | mmc->f_min = host->max_clk / 256; | 1847 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; |
1820 | mmc->f_max = host->max_clk; | 1848 | mmc->f_max = host->max_clk; |
1821 | mmc->caps |= MMC_CAP_SDIO_IRQ; | 1849 | mmc->caps |= MMC_CAP_SDIO_IRQ; |
1822 | 1850 | ||
1823 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | 1851 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) |
1824 | mmc->caps |= MMC_CAP_4_BIT_DATA; | 1852 | mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; |
1825 | 1853 | ||
1826 | if (caps & SDHCI_CAN_DO_HISPD) | 1854 | if (caps & SDHCI_CAN_DO_HISPD) |
1827 | mmc->caps |= MMC_CAP_SD_HIGHSPEED; | 1855 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; |
1828 | 1856 | ||
1829 | if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) | 1857 | if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && |
1858 | mmc_card_is_removable(mmc)) | ||
1830 | mmc->caps |= MMC_CAP_NEEDS_POLL; | 1859 | mmc->caps |= MMC_CAP_NEEDS_POLL; |
1831 | 1860 | ||
1832 | mmc->ocr_avail = 0; | 1861 | mmc->ocr_avail = 0; |
@@ -1850,12 +1879,11 @@ int sdhci_add_host(struct sdhci_host *host) | |||
1850 | * can do scatter/gather or not. | 1879 | * can do scatter/gather or not. |
1851 | */ | 1880 | */ |
1852 | if (host->flags & SDHCI_USE_ADMA) | 1881 | if (host->flags & SDHCI_USE_ADMA) |
1853 | mmc->max_hw_segs = 128; | 1882 | mmc->max_segs = 128; |
1854 | else if (host->flags & SDHCI_USE_SDMA) | 1883 | else if (host->flags & SDHCI_USE_SDMA) |
1855 | mmc->max_hw_segs = 1; | 1884 | mmc->max_segs = 1; |
1856 | else /* PIO */ | 1885 | else /* PIO */ |
1857 | mmc->max_hw_segs = 128; | 1886 | mmc->max_segs = 128; |
1858 | mmc->max_phys_segs = 128; | ||
1859 | 1887 | ||
1860 | /* | 1888 | /* |
1861 | * Maximum number of sectors in one transfer. Limited by DMA boundary | 1889 | * Maximum number of sectors in one transfer. Limited by DMA boundary |