diff options
Diffstat (limited to 'drivers/mmc/host/omap_hsmmc.c')
-rw-r--r-- | drivers/mmc/host/omap_hsmmc.c | 242 |
1 files changed, 166 insertions, 76 deletions
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index dbd32ad3b749..e91ee21549d0 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -45,6 +45,7 @@ | |||
45 | /* OMAP HSMMC Host Controller Registers */ | 45 | /* OMAP HSMMC Host Controller Registers */ |
46 | #define OMAP_HSMMC_SYSSTATUS 0x0014 | 46 | #define OMAP_HSMMC_SYSSTATUS 0x0014 |
47 | #define OMAP_HSMMC_CON 0x002C | 47 | #define OMAP_HSMMC_CON 0x002C |
48 | #define OMAP_HSMMC_SDMASA 0x0100 | ||
48 | #define OMAP_HSMMC_BLK 0x0104 | 49 | #define OMAP_HSMMC_BLK 0x0104 |
49 | #define OMAP_HSMMC_ARG 0x0108 | 50 | #define OMAP_HSMMC_ARG 0x0108 |
50 | #define OMAP_HSMMC_CMD 0x010C | 51 | #define OMAP_HSMMC_CMD 0x010C |
@@ -58,6 +59,7 @@ | |||
58 | #define OMAP_HSMMC_STAT 0x0130 | 59 | #define OMAP_HSMMC_STAT 0x0130 |
59 | #define OMAP_HSMMC_IE 0x0134 | 60 | #define OMAP_HSMMC_IE 0x0134 |
60 | #define OMAP_HSMMC_ISE 0x0138 | 61 | #define OMAP_HSMMC_ISE 0x0138 |
62 | #define OMAP_HSMMC_AC12 0x013C | ||
61 | #define OMAP_HSMMC_CAPA 0x0140 | 63 | #define OMAP_HSMMC_CAPA 0x0140 |
62 | 64 | ||
63 | #define VS18 (1 << 26) | 65 | #define VS18 (1 << 26) |
@@ -81,6 +83,7 @@ | |||
81 | #define DTO_MASK 0x000F0000 | 83 | #define DTO_MASK 0x000F0000 |
82 | #define DTO_SHIFT 16 | 84 | #define DTO_SHIFT 16 |
83 | #define INIT_STREAM (1 << 1) | 85 | #define INIT_STREAM (1 << 1) |
86 | #define ACEN_ACMD23 (2 << 2) | ||
84 | #define DP_SELECT (1 << 21) | 87 | #define DP_SELECT (1 << 21) |
85 | #define DDIR (1 << 4) | 88 | #define DDIR (1 << 4) |
86 | #define DMAE 0x1 | 89 | #define DMAE 0x1 |
@@ -97,7 +100,6 @@ | |||
97 | #define SRC (1 << 25) | 100 | #define SRC (1 << 25) |
98 | #define SRD (1 << 26) | 101 | #define SRD (1 << 26) |
99 | #define SOFTRESET (1 << 1) | 102 | #define SOFTRESET (1 << 1) |
100 | #define RESETDONE (1 << 0) | ||
101 | 103 | ||
102 | /* Interrupt masks for IE and ISE register */ | 104 | /* Interrupt masks for IE and ISE register */ |
103 | #define CC_EN (1 << 0) | 105 | #define CC_EN (1 << 0) |
@@ -112,13 +114,21 @@ | |||
112 | #define DTO_EN (1 << 20) | 114 | #define DTO_EN (1 << 20) |
113 | #define DCRC_EN (1 << 21) | 115 | #define DCRC_EN (1 << 21) |
114 | #define DEB_EN (1 << 22) | 116 | #define DEB_EN (1 << 22) |
117 | #define ACE_EN (1 << 24) | ||
115 | #define CERR_EN (1 << 28) | 118 | #define CERR_EN (1 << 28) |
116 | #define BADA_EN (1 << 29) | 119 | #define BADA_EN (1 << 29) |
117 | 120 | ||
118 | #define INT_EN_MASK (BADA_EN | CERR_EN | DEB_EN | DCRC_EN |\ | 121 | #define INT_EN_MASK (BADA_EN | CERR_EN | ACE_EN | DEB_EN | DCRC_EN |\ |
119 | DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \ | 122 | DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \ |
120 | BRR_EN | BWR_EN | TC_EN | CC_EN) | 123 | BRR_EN | BWR_EN | TC_EN | CC_EN) |
121 | 124 | ||
125 | #define CNI (1 << 7) | ||
126 | #define ACIE (1 << 4) | ||
127 | #define ACEB (1 << 3) | ||
128 | #define ACCE (1 << 2) | ||
129 | #define ACTO (1 << 1) | ||
130 | #define ACNE (1 << 0) | ||
131 | |||
122 | #define MMC_AUTOSUSPEND_DELAY 100 | 132 | #define MMC_AUTOSUSPEND_DELAY 100 |
123 | #define MMC_TIMEOUT_MS 20 /* 20 mSec */ | 133 | #define MMC_TIMEOUT_MS 20 /* 20 mSec */ |
124 | #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ | 134 | #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ |
@@ -126,6 +136,11 @@ | |||
126 | #define OMAP_MMC_MAX_CLOCK 52000000 | 136 | #define OMAP_MMC_MAX_CLOCK 52000000 |
127 | #define DRIVER_NAME "omap_hsmmc" | 137 | #define DRIVER_NAME "omap_hsmmc" |
128 | 138 | ||
139 | #define VDD_1V8 1800000 /* 180000 uV */ | ||
140 | #define VDD_3V0 3000000 /* 300000 uV */ | ||
141 | #define VDD_165_195 (ffs(MMC_VDD_165_195) - 1) | ||
142 | |||
143 | #define AUTO_CMD23 (1 << 1) /* Auto CMD23 support */ | ||
129 | /* | 144 | /* |
130 | * One controller can have multiple slots, like on some omap boards using | 145 | * One controller can have multiple slots, like on some omap boards using |
131 | * omap.c controller driver. Luckily this is not currently done on any known | 146 | * omap.c controller driver. Luckily this is not currently done on any known |
@@ -164,7 +179,8 @@ struct omap_hsmmc_host { | |||
164 | */ | 179 | */ |
165 | struct regulator *vcc; | 180 | struct regulator *vcc; |
166 | struct regulator *vcc_aux; | 181 | struct regulator *vcc_aux; |
167 | int pbias_disable; | 182 | struct regulator *pbias; |
183 | bool pbias_enabled; | ||
168 | void __iomem *base; | 184 | void __iomem *base; |
169 | resource_size_t mapbase; | 185 | resource_size_t mapbase; |
170 | spinlock_t irq_lock; /* Prevent races with irq handler */ | 186 | spinlock_t irq_lock; /* Prevent races with irq handler */ |
@@ -188,10 +204,19 @@ struct omap_hsmmc_host { | |||
188 | int reqs_blocked; | 204 | int reqs_blocked; |
189 | int use_reg; | 205 | int use_reg; |
190 | int req_in_progress; | 206 | int req_in_progress; |
207 | unsigned long clk_rate; | ||
208 | unsigned int flags; | ||
191 | struct omap_hsmmc_next next_data; | 209 | struct omap_hsmmc_next next_data; |
192 | struct omap_mmc_platform_data *pdata; | 210 | struct omap_mmc_platform_data *pdata; |
193 | }; | 211 | }; |
194 | 212 | ||
213 | struct omap_mmc_of_data { | ||
214 | u32 reg_offset; | ||
215 | u8 controller_flags; | ||
216 | }; | ||
217 | |||
218 | static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host); | ||
219 | |||
195 | static int omap_hsmmc_card_detect(struct device *dev, int slot) | 220 | static int omap_hsmmc_card_detect(struct device *dev, int slot) |
196 | { | 221 | { |
197 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); | 222 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
@@ -261,17 +286,19 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, | |||
261 | */ | 286 | */ |
262 | if (!host->vcc) | 287 | if (!host->vcc) |
263 | return 0; | 288 | return 0; |
264 | /* | ||
265 | * With DT, never turn OFF the regulator for MMC1. This is because | ||
266 | * the pbias cell programming support is still missing when | ||
267 | * booting with Device tree | ||
268 | */ | ||
269 | if (host->pbias_disable && !vdd) | ||
270 | return 0; | ||
271 | 289 | ||
272 | if (mmc_slot(host).before_set_reg) | 290 | if (mmc_slot(host).before_set_reg) |
273 | mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); | 291 | mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); |
274 | 292 | ||
293 | if (host->pbias) { | ||
294 | if (host->pbias_enabled == 1) { | ||
295 | ret = regulator_disable(host->pbias); | ||
296 | if (!ret) | ||
297 | host->pbias_enabled = 0; | ||
298 | } | ||
299 | regulator_set_voltage(host->pbias, VDD_3V0, VDD_3V0); | ||
300 | } | ||
301 | |||
275 | /* | 302 | /* |
276 | * Assume Vcc regulator is used only to power the card ... OMAP | 303 | * Assume Vcc regulator is used only to power the card ... OMAP |
277 | * VDDS is used to power the pins, optionally with a transceiver to | 304 | * VDDS is used to power the pins, optionally with a transceiver to |
@@ -286,11 +313,12 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, | |||
286 | * chips/cards need an interface voltage rail too. | 313 | * chips/cards need an interface voltage rail too. |
287 | */ | 314 | */ |
288 | if (power_on) { | 315 | if (power_on) { |
289 | ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); | 316 | if (host->vcc) |
317 | ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); | ||
290 | /* Enable interface voltage rail, if needed */ | 318 | /* Enable interface voltage rail, if needed */ |
291 | if (ret == 0 && host->vcc_aux) { | 319 | if (ret == 0 && host->vcc_aux) { |
292 | ret = regulator_enable(host->vcc_aux); | 320 | ret = regulator_enable(host->vcc_aux); |
293 | if (ret < 0) | 321 | if (ret < 0 && host->vcc) |
294 | ret = mmc_regulator_set_ocr(host->mmc, | 322 | ret = mmc_regulator_set_ocr(host->mmc, |
295 | host->vcc, 0); | 323 | host->vcc, 0); |
296 | } | 324 | } |
@@ -298,16 +326,34 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, | |||
298 | /* Shut down the rail */ | 326 | /* Shut down the rail */ |
299 | if (host->vcc_aux) | 327 | if (host->vcc_aux) |
300 | ret = regulator_disable(host->vcc_aux); | 328 | ret = regulator_disable(host->vcc_aux); |
301 | if (!ret) { | 329 | if (host->vcc) { |
302 | /* Then proceed to shut down the local regulator */ | 330 | /* Then proceed to shut down the local regulator */ |
303 | ret = mmc_regulator_set_ocr(host->mmc, | 331 | ret = mmc_regulator_set_ocr(host->mmc, |
304 | host->vcc, 0); | 332 | host->vcc, 0); |
305 | } | 333 | } |
306 | } | 334 | } |
307 | 335 | ||
336 | if (host->pbias) { | ||
337 | if (vdd <= VDD_165_195) | ||
338 | ret = regulator_set_voltage(host->pbias, VDD_1V8, | ||
339 | VDD_1V8); | ||
340 | else | ||
341 | ret = regulator_set_voltage(host->pbias, VDD_3V0, | ||
342 | VDD_3V0); | ||
343 | if (ret < 0) | ||
344 | goto error_set_power; | ||
345 | |||
346 | if (host->pbias_enabled == 0) { | ||
347 | ret = regulator_enable(host->pbias); | ||
348 | if (!ret) | ||
349 | host->pbias_enabled = 1; | ||
350 | } | ||
351 | } | ||
352 | |||
308 | if (mmc_slot(host).after_set_reg) | 353 | if (mmc_slot(host).after_set_reg) |
309 | mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); | 354 | mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); |
310 | 355 | ||
356 | error_set_power: | ||
311 | return ret; | 357 | return ret; |
312 | } | 358 | } |
313 | 359 | ||
@@ -316,12 +362,12 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) | |||
316 | struct regulator *reg; | 362 | struct regulator *reg; |
317 | int ocr_value = 0; | 363 | int ocr_value = 0; |
318 | 364 | ||
319 | reg = regulator_get(host->dev, "vmmc"); | 365 | reg = devm_regulator_get(host->dev, "vmmc"); |
320 | if (IS_ERR(reg)) { | 366 | if (IS_ERR(reg)) { |
321 | dev_err(host->dev, "vmmc regulator missing\n"); | 367 | dev_err(host->dev, "unable to get vmmc regulator %ld\n", |
368 | PTR_ERR(reg)); | ||
322 | return PTR_ERR(reg); | 369 | return PTR_ERR(reg); |
323 | } else { | 370 | } else { |
324 | mmc_slot(host).set_power = omap_hsmmc_set_power; | ||
325 | host->vcc = reg; | 371 | host->vcc = reg; |
326 | ocr_value = mmc_regulator_get_ocrmask(reg); | 372 | ocr_value = mmc_regulator_get_ocrmask(reg); |
327 | if (!mmc_slot(host).ocr_mask) { | 373 | if (!mmc_slot(host).ocr_mask) { |
@@ -334,31 +380,29 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) | |||
334 | return -EINVAL; | 380 | return -EINVAL; |
335 | } | 381 | } |
336 | } | 382 | } |
383 | } | ||
384 | mmc_slot(host).set_power = omap_hsmmc_set_power; | ||
337 | 385 | ||
338 | /* Allow an aux regulator */ | 386 | /* Allow an aux regulator */ |
339 | reg = regulator_get(host->dev, "vmmc_aux"); | 387 | reg = devm_regulator_get_optional(host->dev, "vmmc_aux"); |
340 | host->vcc_aux = IS_ERR(reg) ? NULL : reg; | 388 | host->vcc_aux = IS_ERR(reg) ? NULL : reg; |
341 | 389 | ||
342 | /* For eMMC do not power off when not in sleep state */ | 390 | reg = devm_regulator_get_optional(host->dev, "pbias"); |
343 | if (mmc_slot(host).no_regulator_off_init) | 391 | host->pbias = IS_ERR(reg) ? NULL : reg; |
344 | return 0; | ||
345 | /* | ||
346 | * UGLY HACK: workaround regulator framework bugs. | ||
347 | * When the bootloader leaves a supply active, it's | ||
348 | * initialized with zero usecount ... and we can't | ||
349 | * disable it without first enabling it. Until the | ||
350 | * framework is fixed, we need a workaround like this | ||
351 | * (which is safe for MMC, but not in general). | ||
352 | */ | ||
353 | if (regulator_is_enabled(host->vcc) > 0 || | ||
354 | (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { | ||
355 | int vdd = ffs(mmc_slot(host).ocr_mask) - 1; | ||
356 | 392 | ||
357 | mmc_slot(host).set_power(host->dev, host->slot_id, | 393 | /* For eMMC do not power off when not in sleep state */ |
358 | 1, vdd); | 394 | if (mmc_slot(host).no_regulator_off_init) |
359 | mmc_slot(host).set_power(host->dev, host->slot_id, | 395 | return 0; |
360 | 0, 0); | 396 | /* |
361 | } | 397 | * To disable boot_on regulator, enable regulator |
398 | * to increase usecount and then disable it. | ||
399 | */ | ||
400 | if ((host->vcc && regulator_is_enabled(host->vcc) > 0) || | ||
401 | (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { | ||
402 | int vdd = ffs(mmc_slot(host).ocr_mask) - 1; | ||
403 | |||
404 | mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); | ||
405 | mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); | ||
362 | } | 406 | } |
363 | 407 | ||
364 | return 0; | 408 | return 0; |
@@ -366,8 +410,6 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) | |||
366 | 410 | ||
367 | static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) | 411 | static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) |
368 | { | 412 | { |
369 | regulator_put(host->vcc); | ||
370 | regulator_put(host->vcc_aux); | ||
371 | mmc_slot(host).set_power = NULL; | 413 | mmc_slot(host).set_power = NULL; |
372 | } | 414 | } |
373 | 415 | ||
@@ -605,9 +647,6 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) | |||
605 | u32 hctl, capa; | 647 | u32 hctl, capa; |
606 | unsigned long timeout; | 648 | unsigned long timeout; |
607 | 649 | ||
608 | if (!OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) | ||
609 | return 1; | ||
610 | |||
611 | if (host->con == OMAP_HSMMC_READ(host->base, CON) && | 650 | if (host->con == OMAP_HSMMC_READ(host->base, CON) && |
612 | host->hctl == OMAP_HSMMC_READ(host->base, HCTL) && | 651 | host->hctl == OMAP_HSMMC_READ(host->base, HCTL) && |
613 | host->sysctl == OMAP_HSMMC_READ(host->base, SYSCTL) && | 652 | host->sysctl == OMAP_HSMMC_READ(host->base, SYSCTL) && |
@@ -787,6 +826,11 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, | |||
787 | 826 | ||
788 | cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); | 827 | cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); |
789 | 828 | ||
829 | if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) && | ||
830 | host->mrq->sbc) { | ||
831 | cmdreg |= ACEN_ACMD23; | ||
832 | OMAP_HSMMC_WRITE(host->base, SDMASA, host->mrq->sbc->arg); | ||
833 | } | ||
790 | if (data) { | 834 | if (data) { |
791 | cmdreg |= DP_SELECT | MSBS | BCE; | 835 | cmdreg |= DP_SELECT | MSBS | BCE; |
792 | if (data->flags & MMC_DATA_READ) | 836 | if (data->flags & MMC_DATA_READ) |
@@ -864,11 +908,10 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) | |||
864 | else | 908 | else |
865 | data->bytes_xfered = 0; | 909 | data->bytes_xfered = 0; |
866 | 910 | ||
867 | if (!data->stop) { | 911 | if (data->stop && (data->error || !host->mrq->sbc)) |
912 | omap_hsmmc_start_command(host, data->stop, NULL); | ||
913 | else | ||
868 | omap_hsmmc_request_done(host, data->mrq); | 914 | omap_hsmmc_request_done(host, data->mrq); |
869 | return; | ||
870 | } | ||
871 | omap_hsmmc_start_command(host, data->stop, NULL); | ||
872 | } | 915 | } |
873 | 916 | ||
874 | /* | 917 | /* |
@@ -879,6 +922,14 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) | |||
879 | { | 922 | { |
880 | host->cmd = NULL; | 923 | host->cmd = NULL; |
881 | 924 | ||
925 | if (host->mrq->sbc && (host->cmd == host->mrq->sbc) && | ||
926 | !host->mrq->sbc->error && !(host->flags & AUTO_CMD23)) { | ||
927 | omap_hsmmc_start_dma_transfer(host); | ||
928 | omap_hsmmc_start_command(host, host->mrq->cmd, | ||
929 | host->mrq->data); | ||
930 | return; | ||
931 | } | ||
932 | |||
882 | if (cmd->flags & MMC_RSP_PRESENT) { | 933 | if (cmd->flags & MMC_RSP_PRESENT) { |
883 | if (cmd->flags & MMC_RSP_136) { | 934 | if (cmd->flags & MMC_RSP_136) { |
884 | /* response type 2 */ | 935 | /* response type 2 */ |
@@ -892,7 +943,7 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) | |||
892 | } | 943 | } |
893 | } | 944 | } |
894 | if ((host->data == NULL && !host->response_busy) || cmd->error) | 945 | if ((host->data == NULL && !host->response_busy) || cmd->error) |
895 | omap_hsmmc_request_done(host, cmd->mrq); | 946 | omap_hsmmc_request_done(host, host->mrq); |
896 | } | 947 | } |
897 | 948 | ||
898 | /* | 949 | /* |
@@ -1015,6 +1066,7 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | |||
1015 | { | 1066 | { |
1016 | struct mmc_data *data; | 1067 | struct mmc_data *data; |
1017 | int end_cmd = 0, end_trans = 0; | 1068 | int end_cmd = 0, end_trans = 0; |
1069 | int error = 0; | ||
1018 | 1070 | ||
1019 | data = host->data; | 1071 | data = host->data; |
1020 | dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); | 1072 | dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); |
@@ -1029,6 +1081,20 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | |||
1029 | else if (status & (CCRC_EN | DCRC_EN)) | 1081 | else if (status & (CCRC_EN | DCRC_EN)) |
1030 | hsmmc_command_incomplete(host, -EILSEQ, end_cmd); | 1082 | hsmmc_command_incomplete(host, -EILSEQ, end_cmd); |
1031 | 1083 | ||
1084 | if (status & ACE_EN) { | ||
1085 | u32 ac12; | ||
1086 | ac12 = OMAP_HSMMC_READ(host->base, AC12); | ||
1087 | if (!(ac12 & ACNE) && host->mrq->sbc) { | ||
1088 | end_cmd = 1; | ||
1089 | if (ac12 & ACTO) | ||
1090 | error = -ETIMEDOUT; | ||
1091 | else if (ac12 & (ACCE | ACEB | ACIE)) | ||
1092 | error = -EILSEQ; | ||
1093 | host->mrq->sbc->error = error; | ||
1094 | hsmmc_command_incomplete(host, error, end_cmd); | ||
1095 | } | ||
1096 | dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12); | ||
1097 | } | ||
1032 | if (host->data || host->response_busy) { | 1098 | if (host->data || host->response_busy) { |
1033 | end_trans = !end_cmd; | 1099 | end_trans = !end_cmd; |
1034 | host->response_busy = 0; | 1100 | host->response_busy = 0; |
@@ -1236,8 +1302,7 @@ static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, | |||
1236 | } | 1302 | } |
1237 | 1303 | ||
1238 | /* Check if next job is already prepared */ | 1304 | /* Check if next job is already prepared */ |
1239 | if (next || | 1305 | if (next || data->host_cookie != host->next_data.cookie) { |
1240 | (!next && data->host_cookie != host->next_data.cookie)) { | ||
1241 | dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len, | 1306 | dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len, |
1242 | omap_hsmmc_get_dma_dir(host, data)); | 1307 | omap_hsmmc_get_dma_dir(host, data)); |
1243 | 1308 | ||
@@ -1262,7 +1327,7 @@ static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, | |||
1262 | /* | 1327 | /* |
1263 | * Routine to configure and start DMA for the MMC card | 1328 | * Routine to configure and start DMA for the MMC card |
1264 | */ | 1329 | */ |
1265 | static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | 1330 | static int omap_hsmmc_setup_dma_transfer(struct omap_hsmmc_host *host, |
1266 | struct mmc_request *req) | 1331 | struct mmc_request *req) |
1267 | { | 1332 | { |
1268 | struct dma_slave_config cfg; | 1333 | struct dma_slave_config cfg; |
@@ -1321,8 +1386,6 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | |||
1321 | 1386 | ||
1322 | host->dma_ch = 1; | 1387 | host->dma_ch = 1; |
1323 | 1388 | ||
1324 | dma_async_issue_pending(chan); | ||
1325 | |||
1326 | return 0; | 1389 | return 0; |
1327 | } | 1390 | } |
1328 | 1391 | ||
@@ -1338,7 +1401,7 @@ static void set_data_timeout(struct omap_hsmmc_host *host, | |||
1338 | if (clkd == 0) | 1401 | if (clkd == 0) |
1339 | clkd = 1; | 1402 | clkd = 1; |
1340 | 1403 | ||
1341 | cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); | 1404 | cycle_ns = 1000000000 / (host->clk_rate / clkd); |
1342 | timeout = timeout_ns / cycle_ns; | 1405 | timeout = timeout_ns / cycle_ns; |
1343 | timeout += timeout_clks; | 1406 | timeout += timeout_clks; |
1344 | if (timeout) { | 1407 | if (timeout) { |
@@ -1363,6 +1426,21 @@ static void set_data_timeout(struct omap_hsmmc_host *host, | |||
1363 | OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); | 1426 | OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); |
1364 | } | 1427 | } |
1365 | 1428 | ||
1429 | static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host) | ||
1430 | { | ||
1431 | struct mmc_request *req = host->mrq; | ||
1432 | struct dma_chan *chan; | ||
1433 | |||
1434 | if (!req->data) | ||
1435 | return; | ||
1436 | OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) | ||
1437 | | (req->data->blocks << 16)); | ||
1438 | set_data_timeout(host, req->data->timeout_ns, | ||
1439 | req->data->timeout_clks); | ||
1440 | chan = omap_hsmmc_get_dma_chan(host, req->data); | ||
1441 | dma_async_issue_pending(chan); | ||
1442 | } | ||
1443 | |||
1366 | /* | 1444 | /* |
1367 | * Configure block length for MMC/SD cards and initiate the transfer. | 1445 | * Configure block length for MMC/SD cards and initiate the transfer. |
1368 | */ | 1446 | */ |
@@ -1383,12 +1461,8 @@ omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) | |||
1383 | return 0; | 1461 | return 0; |
1384 | } | 1462 | } |
1385 | 1463 | ||
1386 | OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) | ||
1387 | | (req->data->blocks << 16)); | ||
1388 | set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); | ||
1389 | |||
1390 | if (host->use_dma) { | 1464 | if (host->use_dma) { |
1391 | ret = omap_hsmmc_start_dma_transfer(host, req); | 1465 | ret = omap_hsmmc_setup_dma_transfer(host, req); |
1392 | if (ret != 0) { | 1466 | if (ret != 0) { |
1393 | dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); | 1467 | dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); |
1394 | return ret; | 1468 | return ret; |
@@ -1462,6 +1536,7 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | |||
1462 | host->reqs_blocked = 0; | 1536 | host->reqs_blocked = 0; |
1463 | WARN_ON(host->mrq != NULL); | 1537 | WARN_ON(host->mrq != NULL); |
1464 | host->mrq = req; | 1538 | host->mrq = req; |
1539 | host->clk_rate = clk_get_rate(host->fclk); | ||
1465 | err = omap_hsmmc_prepare_data(host, req); | 1540 | err = omap_hsmmc_prepare_data(host, req); |
1466 | if (err) { | 1541 | if (err) { |
1467 | req->cmd->error = err; | 1542 | req->cmd->error = err; |
@@ -1471,7 +1546,12 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | |||
1471 | mmc_request_done(mmc, req); | 1546 | mmc_request_done(mmc, req); |
1472 | return; | 1547 | return; |
1473 | } | 1548 | } |
1549 | if (req->sbc && !(host->flags & AUTO_CMD23)) { | ||
1550 | omap_hsmmc_start_command(host, req->sbc, NULL); | ||
1551 | return; | ||
1552 | } | ||
1474 | 1553 | ||
1554 | omap_hsmmc_start_dma_transfer(host); | ||
1475 | omap_hsmmc_start_command(host, req->cmd, req->data); | 1555 | omap_hsmmc_start_command(host, req->cmd, req->data); |
1476 | } | 1556 | } |
1477 | 1557 | ||
@@ -1509,13 +1589,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
1509 | * of external transceiver; but they all handle 1.8V. | 1589 | * of external transceiver; but they all handle 1.8V. |
1510 | */ | 1590 | */ |
1511 | if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && | 1591 | if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && |
1512 | (ios->vdd == DUAL_VOLT_OCR_BIT) && | 1592 | (ios->vdd == DUAL_VOLT_OCR_BIT)) { |
1513 | /* | ||
1514 | * With pbias cell programming missing, this | ||
1515 | * can't be allowed on MMC1 when booting with device | ||
1516 | * tree. | ||
1517 | */ | ||
1518 | !host->pbias_disable) { | ||
1519 | /* | 1593 | /* |
1520 | * The mmc_select_voltage fn of the core does | 1594 | * The mmc_select_voltage fn of the core does |
1521 | * not seem to set the power_mode to | 1595 | * not seem to set the power_mode to |
@@ -1678,18 +1752,29 @@ static void omap_hsmmc_debugfs(struct mmc_host *mmc) | |||
1678 | #endif | 1752 | #endif |
1679 | 1753 | ||
1680 | #ifdef CONFIG_OF | 1754 | #ifdef CONFIG_OF |
1681 | static u16 omap4_reg_offset = 0x100; | 1755 | static const struct omap_mmc_of_data omap3_pre_es3_mmc_of_data = { |
1756 | /* See 35xx errata 2.1.1.128 in SPRZ278F */ | ||
1757 | .controller_flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ, | ||
1758 | }; | ||
1759 | |||
1760 | static const struct omap_mmc_of_data omap4_mmc_of_data = { | ||
1761 | .reg_offset = 0x100, | ||
1762 | }; | ||
1682 | 1763 | ||
1683 | static const struct of_device_id omap_mmc_of_match[] = { | 1764 | static const struct of_device_id omap_mmc_of_match[] = { |
1684 | { | 1765 | { |
1685 | .compatible = "ti,omap2-hsmmc", | 1766 | .compatible = "ti,omap2-hsmmc", |
1686 | }, | 1767 | }, |
1687 | { | 1768 | { |
1769 | .compatible = "ti,omap3-pre-es3-hsmmc", | ||
1770 | .data = &omap3_pre_es3_mmc_of_data, | ||
1771 | }, | ||
1772 | { | ||
1688 | .compatible = "ti,omap3-hsmmc", | 1773 | .compatible = "ti,omap3-hsmmc", |
1689 | }, | 1774 | }, |
1690 | { | 1775 | { |
1691 | .compatible = "ti,omap4-hsmmc", | 1776 | .compatible = "ti,omap4-hsmmc", |
1692 | .data = &omap4_reg_offset, | 1777 | .data = &omap4_mmc_of_data, |
1693 | }, | 1778 | }, |
1694 | {}, | 1779 | {}, |
1695 | }; | 1780 | }; |
@@ -1709,7 +1794,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) | |||
1709 | 1794 | ||
1710 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | 1795 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
1711 | if (!pdata) | 1796 | if (!pdata) |
1712 | return NULL; /* out of memory */ | 1797 | return ERR_PTR(-ENOMEM); /* out of memory */ |
1713 | 1798 | ||
1714 | if (of_find_property(np, "ti,dual-volt", NULL)) | 1799 | if (of_find_property(np, "ti,dual-volt", NULL)) |
1715 | pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; | 1800 | pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; |
@@ -1738,13 +1823,19 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) | |||
1738 | if (of_find_property(np, "ti,needs-special-hs-handling", NULL)) | 1823 | if (of_find_property(np, "ti,needs-special-hs-handling", NULL)) |
1739 | pdata->slots[0].features |= HSMMC_HAS_HSPE_SUPPORT; | 1824 | pdata->slots[0].features |= HSMMC_HAS_HSPE_SUPPORT; |
1740 | 1825 | ||
1826 | if (of_find_property(np, "keep-power-in-suspend", NULL)) | ||
1827 | pdata->slots[0].pm_caps |= MMC_PM_KEEP_POWER; | ||
1828 | |||
1829 | if (of_find_property(np, "enable-sdio-wakeup", NULL)) | ||
1830 | pdata->slots[0].pm_caps |= MMC_PM_WAKE_SDIO_IRQ; | ||
1831 | |||
1741 | return pdata; | 1832 | return pdata; |
1742 | } | 1833 | } |
1743 | #else | 1834 | #else |
1744 | static inline struct omap_mmc_platform_data | 1835 | static inline struct omap_mmc_platform_data |
1745 | *of_get_hsmmc_pdata(struct device *dev) | 1836 | *of_get_hsmmc_pdata(struct device *dev) |
1746 | { | 1837 | { |
1747 | return NULL; | 1838 | return ERR_PTR(-EINVAL); |
1748 | } | 1839 | } |
1749 | #endif | 1840 | #endif |
1750 | 1841 | ||
@@ -1759,6 +1850,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1759 | dma_cap_mask_t mask; | 1850 | dma_cap_mask_t mask; |
1760 | unsigned tx_req, rx_req; | 1851 | unsigned tx_req, rx_req; |
1761 | struct pinctrl *pinctrl; | 1852 | struct pinctrl *pinctrl; |
1853 | const struct omap_mmc_of_data *data; | ||
1762 | 1854 | ||
1763 | match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); | 1855 | match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); |
1764 | if (match) { | 1856 | if (match) { |
@@ -1768,8 +1860,9 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1768 | return PTR_ERR(pdata); | 1860 | return PTR_ERR(pdata); |
1769 | 1861 | ||
1770 | if (match->data) { | 1862 | if (match->data) { |
1771 | const u16 *offsetp = match->data; | 1863 | data = match->data; |
1772 | pdata->reg_offset = *offsetp; | 1864 | pdata->reg_offset = data->reg_offset; |
1865 | pdata->controller_flags |= data->controller_flags; | ||
1773 | } | 1866 | } |
1774 | } | 1867 | } |
1775 | 1868 | ||
@@ -1814,6 +1907,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1814 | host->base = ioremap(host->mapbase, SZ_4K); | 1907 | host->base = ioremap(host->mapbase, SZ_4K); |
1815 | host->power_mode = MMC_POWER_OFF; | 1908 | host->power_mode = MMC_POWER_OFF; |
1816 | host->next_data.cookie = 1; | 1909 | host->next_data.cookie = 1; |
1910 | host->pbias_enabled = 0; | ||
1817 | 1911 | ||
1818 | platform_set_drvdata(pdev, host); | 1912 | platform_set_drvdata(pdev, host); |
1819 | 1913 | ||
@@ -1847,10 +1941,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1847 | 1941 | ||
1848 | omap_hsmmc_context_save(host); | 1942 | omap_hsmmc_context_save(host); |
1849 | 1943 | ||
1850 | /* This can be removed once we support PBIAS with DT */ | ||
1851 | if (host->dev->of_node && res->start == 0x4809c000) | ||
1852 | host->pbias_disable = 1; | ||
1853 | |||
1854 | host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); | 1944 | host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); |
1855 | /* | 1945 | /* |
1856 | * MMC can still work without debounce clock. | 1946 | * MMC can still work without debounce clock. |