diff options
Diffstat (limited to 'drivers/mmc/host/mmci.h')
| -rw-r--r-- | drivers/mmc/host/mmci.h | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index ec9a7bc6d0df..bb32e21c09db 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h | |||
| @@ -11,23 +11,33 @@ | |||
| 11 | #define MCI_PWR_OFF 0x00 | 11 | #define MCI_PWR_OFF 0x00 |
| 12 | #define MCI_PWR_UP 0x02 | 12 | #define MCI_PWR_UP 0x02 |
| 13 | #define MCI_PWR_ON 0x03 | 13 | #define MCI_PWR_ON 0x03 |
| 14 | #define MCI_DATA2DIREN (1 << 2) | ||
| 15 | #define MCI_CMDDIREN (1 << 3) | ||
| 16 | #define MCI_DATA0DIREN (1 << 4) | ||
| 17 | #define MCI_DATA31DIREN (1 << 5) | ||
| 18 | #define MCI_OD (1 << 6) | 14 | #define MCI_OD (1 << 6) |
| 19 | #define MCI_ROD (1 << 7) | 15 | #define MCI_ROD (1 << 7) |
| 20 | /* The ST Micro version does not have ROD */ | 16 | /* |
| 21 | #define MCI_FBCLKEN (1 << 7) | 17 | * The ST Micro version does not have ROD and reuse the voltage registers |
| 22 | #define MCI_DATA74DIREN (1 << 8) | 18 | * for direction settings |
| 19 | */ | ||
| 20 | #define MCI_ST_DATA2DIREN (1 << 2) | ||
| 21 | #define MCI_ST_CMDDIREN (1 << 3) | ||
| 22 | #define MCI_ST_DATA0DIREN (1 << 4) | ||
| 23 | #define MCI_ST_DATA31DIREN (1 << 5) | ||
| 24 | #define MCI_ST_FBCLKEN (1 << 7) | ||
| 25 | #define MCI_ST_DATA74DIREN (1 << 8) | ||
| 23 | 26 | ||
| 24 | #define MMCICLOCK 0x004 | 27 | #define MMCICLOCK 0x004 |
| 25 | #define MCI_CLK_ENABLE (1 << 8) | 28 | #define MCI_CLK_ENABLE (1 << 8) |
| 26 | #define MCI_CLK_PWRSAVE (1 << 9) | 29 | #define MCI_CLK_PWRSAVE (1 << 9) |
| 27 | #define MCI_CLK_BYPASS (1 << 10) | 30 | #define MCI_CLK_BYPASS (1 << 10) |
| 28 | #define MCI_4BIT_BUS (1 << 11) | 31 | #define MCI_4BIT_BUS (1 << 11) |
| 29 | /* 8bit wide buses supported in ST Micro versions */ | 32 | /* |
| 33 | * 8bit wide buses, hardware flow contronl, negative edges and clock inversion | ||
| 34 | * supported in ST Micro U300 and Ux500 versions | ||
| 35 | */ | ||
| 30 | #define MCI_ST_8BIT_BUS (1 << 12) | 36 | #define MCI_ST_8BIT_BUS (1 << 12) |
| 37 | #define MCI_ST_U300_HWFCEN (1 << 13) | ||
| 38 | #define MCI_ST_UX500_NEG_EDGE (1 << 13) | ||
| 39 | #define MCI_ST_UX500_HWFCEN (1 << 14) | ||
| 40 | #define MCI_ST_UX500_CLK_INV (1 << 15) | ||
| 31 | 41 | ||
| 32 | #define MMCIARGUMENT 0x008 | 42 | #define MMCIARGUMENT 0x008 |
| 33 | #define MMCICOMMAND 0x00c | 43 | #define MMCICOMMAND 0x00c |
| @@ -88,8 +98,9 @@ | |||
| 88 | #define MCI_RXFIFOEMPTY (1 << 19) | 98 | #define MCI_RXFIFOEMPTY (1 << 19) |
| 89 | #define MCI_TXDATAAVLBL (1 << 20) | 99 | #define MCI_TXDATAAVLBL (1 << 20) |
| 90 | #define MCI_RXDATAAVLBL (1 << 21) | 100 | #define MCI_RXDATAAVLBL (1 << 21) |
| 91 | #define MCI_SDIOIT (1 << 22) | 101 | /* Extended status bits for the ST Micro variants */ |
| 92 | #define MCI_CEATAEND (1 << 23) | 102 | #define MCI_ST_SDIOIT (1 << 22) |
| 103 | #define MCI_ST_CEATAEND (1 << 23) | ||
| 93 | 104 | ||
| 94 | #define MMCICLEAR 0x038 | 105 | #define MMCICLEAR 0x038 |
| 95 | #define MCI_CMDCRCFAILCLR (1 << 0) | 106 | #define MCI_CMDCRCFAILCLR (1 << 0) |
| @@ -102,8 +113,9 @@ | |||
| 102 | #define MCI_CMDSENTCLR (1 << 7) | 113 | #define MCI_CMDSENTCLR (1 << 7) |
| 103 | #define MCI_DATAENDCLR (1 << 8) | 114 | #define MCI_DATAENDCLR (1 << 8) |
| 104 | #define MCI_DATABLOCKENDCLR (1 << 10) | 115 | #define MCI_DATABLOCKENDCLR (1 << 10) |
| 105 | #define MCI_SDIOITC (1 << 22) | 116 | /* Extended status bits for the ST Micro variants */ |
| 106 | #define MCI_CEATAENDC (1 << 23) | 117 | #define MCI_ST_SDIOITC (1 << 22) |
| 118 | #define MCI_ST_CEATAENDC (1 << 23) | ||
| 107 | 119 | ||
| 108 | #define MMCIMASK0 0x03c | 120 | #define MMCIMASK0 0x03c |
| 109 | #define MCI_CMDCRCFAILMASK (1 << 0) | 121 | #define MCI_CMDCRCFAILMASK (1 << 0) |
| @@ -127,8 +139,9 @@ | |||
| 127 | #define MCI_RXFIFOEMPTYMASK (1 << 19) | 139 | #define MCI_RXFIFOEMPTYMASK (1 << 19) |
| 128 | #define MCI_TXDATAAVLBLMASK (1 << 20) | 140 | #define MCI_TXDATAAVLBLMASK (1 << 20) |
| 129 | #define MCI_RXDATAAVLBLMASK (1 << 21) | 141 | #define MCI_RXDATAAVLBLMASK (1 << 21) |
| 130 | #define MCI_SDIOITMASK (1 << 22) | 142 | /* Extended status bits for the ST Micro variants */ |
| 131 | #define MCI_CEATAENDMASK (1 << 23) | 143 | #define MCI_ST_SDIOITMASK (1 << 22) |
| 144 | #define MCI_ST_CEATAENDMASK (1 << 23) | ||
| 132 | 145 | ||
| 133 | #define MMCIMASK1 0x040 | 146 | #define MMCIMASK1 0x040 |
| 134 | #define MMCIFIFOCNT 0x048 | 147 | #define MMCIFIFOCNT 0x048 |