diff options
Diffstat (limited to 'drivers/mmc/host/dw_mmc.c')
-rw-r--r-- | drivers/mmc/host/dw_mmc.c | 297 |
1 files changed, 214 insertions, 83 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 8f216edbdf08..69f0cc68d5b2 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
30 | #include <linux/mmc/host.h> | 30 | #include <linux/mmc/host.h> |
31 | #include <linux/mmc/mmc.h> | 31 | #include <linux/mmc/mmc.h> |
32 | #include <linux/mmc/sd.h> | ||
32 | #include <linux/mmc/sdio.h> | 33 | #include <linux/mmc/sdio.h> |
33 | #include <linux/mmc/dw_mmc.h> | 34 | #include <linux/mmc/dw_mmc.h> |
34 | #include <linux/bitops.h> | 35 | #include <linux/bitops.h> |
@@ -81,36 +82,6 @@ struct idmac_desc { | |||
81 | }; | 82 | }; |
82 | #endif /* CONFIG_MMC_DW_IDMAC */ | 83 | #endif /* CONFIG_MMC_DW_IDMAC */ |
83 | 84 | ||
84 | static const u8 tuning_blk_pattern_4bit[] = { | ||
85 | 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, | ||
86 | 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, | ||
87 | 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, | ||
88 | 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, | ||
89 | 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, | ||
90 | 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, | ||
91 | 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, | ||
92 | 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, | ||
93 | }; | ||
94 | |||
95 | static const u8 tuning_blk_pattern_8bit[] = { | ||
96 | 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, | ||
97 | 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, | ||
98 | 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, | ||
99 | 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, | ||
100 | 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, | ||
101 | 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, | ||
102 | 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, | ||
103 | 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, | ||
104 | 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, | ||
105 | 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, | ||
106 | 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, | ||
107 | 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, | ||
108 | 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, | ||
109 | 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, | ||
110 | 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, | ||
111 | 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, | ||
112 | }; | ||
113 | |||
114 | static bool dw_mci_reset(struct dw_mci *host); | 85 | static bool dw_mci_reset(struct dw_mci *host); |
115 | 86 | ||
116 | #if defined(CONFIG_DEBUG_FS) | 87 | #if defined(CONFIG_DEBUG_FS) |
@@ -234,10 +205,13 @@ err: | |||
234 | } | 205 | } |
235 | #endif /* defined(CONFIG_DEBUG_FS) */ | 206 | #endif /* defined(CONFIG_DEBUG_FS) */ |
236 | 207 | ||
208 | static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg); | ||
209 | |||
237 | static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | 210 | static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) |
238 | { | 211 | { |
239 | struct mmc_data *data; | 212 | struct mmc_data *data; |
240 | struct dw_mci_slot *slot = mmc_priv(mmc); | 213 | struct dw_mci_slot *slot = mmc_priv(mmc); |
214 | struct dw_mci *host = slot->host; | ||
241 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; | 215 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; |
242 | u32 cmdr; | 216 | u32 cmdr; |
243 | cmd->error = -EINPROGRESS; | 217 | cmd->error = -EINPROGRESS; |
@@ -253,6 +227,34 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
253 | else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) | 227 | else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) |
254 | cmdr |= SDMMC_CMD_PRV_DAT_WAIT; | 228 | cmdr |= SDMMC_CMD_PRV_DAT_WAIT; |
255 | 229 | ||
230 | if (cmd->opcode == SD_SWITCH_VOLTAGE) { | ||
231 | u32 clk_en_a; | ||
232 | |||
233 | /* Special bit makes CMD11 not die */ | ||
234 | cmdr |= SDMMC_CMD_VOLT_SWITCH; | ||
235 | |||
236 | /* Change state to continue to handle CMD11 weirdness */ | ||
237 | WARN_ON(slot->host->state != STATE_SENDING_CMD); | ||
238 | slot->host->state = STATE_SENDING_CMD11; | ||
239 | |||
240 | /* | ||
241 | * We need to disable low power mode (automatic clock stop) | ||
242 | * while doing voltage switch so we don't confuse the card, | ||
243 | * since stopping the clock is a specific part of the UHS | ||
244 | * voltage change dance. | ||
245 | * | ||
246 | * Note that low power mode (SDMMC_CLKEN_LOW_PWR) will be | ||
247 | * unconditionally turned back on in dw_mci_setup_bus() if it's | ||
248 | * ever called with a non-zero clock. That shouldn't happen | ||
249 | * until the voltage change is all done. | ||
250 | */ | ||
251 | clk_en_a = mci_readl(host, CLKENA); | ||
252 | clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id); | ||
253 | mci_writel(host, CLKENA, clk_en_a); | ||
254 | mci_send_cmd(slot, SDMMC_CMD_UPD_CLK | | ||
255 | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
256 | } | ||
257 | |||
256 | if (cmd->flags & MMC_RSP_PRESENT) { | 258 | if (cmd->flags & MMC_RSP_PRESENT) { |
257 | /* We expect a response, so set this bit */ | 259 | /* We expect a response, so set this bit */ |
258 | cmdr |= SDMMC_CMD_RESP_EXP; | 260 | cmdr |= SDMMC_CMD_RESP_EXP; |
@@ -775,11 +777,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
775 | unsigned int clock = slot->clock; | 777 | unsigned int clock = slot->clock; |
776 | u32 div; | 778 | u32 div; |
777 | u32 clk_en_a; | 779 | u32 clk_en_a; |
780 | u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT; | ||
781 | |||
782 | /* We must continue to set bit 28 in CMD until the change is complete */ | ||
783 | if (host->state == STATE_WAITING_CMD11_DONE) | ||
784 | sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH; | ||
778 | 785 | ||
779 | if (!clock) { | 786 | if (!clock) { |
780 | mci_writel(host, CLKENA, 0); | 787 | mci_writel(host, CLKENA, 0); |
781 | mci_send_cmd(slot, | 788 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
782 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
783 | } else if (clock != host->current_speed || force_clkinit) { | 789 | } else if (clock != host->current_speed || force_clkinit) { |
784 | div = host->bus_hz / clock; | 790 | div = host->bus_hz / clock; |
785 | if (host->bus_hz % clock && host->bus_hz > clock) | 791 | if (host->bus_hz % clock && host->bus_hz > clock) |
@@ -803,15 +809,13 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
803 | mci_writel(host, CLKSRC, 0); | 809 | mci_writel(host, CLKSRC, 0); |
804 | 810 | ||
805 | /* inform CIU */ | 811 | /* inform CIU */ |
806 | mci_send_cmd(slot, | 812 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
807 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
808 | 813 | ||
809 | /* set clock to desired speed */ | 814 | /* set clock to desired speed */ |
810 | mci_writel(host, CLKDIV, div); | 815 | mci_writel(host, CLKDIV, div); |
811 | 816 | ||
812 | /* inform CIU */ | 817 | /* inform CIU */ |
813 | mci_send_cmd(slot, | 818 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
814 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
815 | 819 | ||
816 | /* enable clock; only low power if no SDIO */ | 820 | /* enable clock; only low power if no SDIO */ |
817 | clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; | 821 | clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; |
@@ -820,8 +824,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
820 | mci_writel(host, CLKENA, clk_en_a); | 824 | mci_writel(host, CLKENA, clk_en_a); |
821 | 825 | ||
822 | /* inform CIU */ | 826 | /* inform CIU */ |
823 | mci_send_cmd(slot, | 827 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
824 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
825 | 828 | ||
826 | /* keep the clock with reflecting clock dividor */ | 829 | /* keep the clock with reflecting clock dividor */ |
827 | slot->__clk_old = clock << div; | 830 | slot->__clk_old = clock << div; |
@@ -897,6 +900,17 @@ static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, | |||
897 | 900 | ||
898 | slot->mrq = mrq; | 901 | slot->mrq = mrq; |
899 | 902 | ||
903 | if (host->state == STATE_WAITING_CMD11_DONE) { | ||
904 | dev_warn(&slot->mmc->class_dev, | ||
905 | "Voltage change didn't complete\n"); | ||
906 | /* | ||
907 | * this case isn't expected to happen, so we can | ||
908 | * either crash here or just try to continue on | ||
909 | * in the closest possible state | ||
910 | */ | ||
911 | host->state = STATE_IDLE; | ||
912 | } | ||
913 | |||
900 | if (host->state == STATE_IDLE) { | 914 | if (host->state == STATE_IDLE) { |
901 | host->state = STATE_SENDING_CMD; | 915 | host->state = STATE_SENDING_CMD; |
902 | dw_mci_start_request(host, slot); | 916 | dw_mci_start_request(host, slot); |
@@ -936,6 +950,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
936 | struct dw_mci_slot *slot = mmc_priv(mmc); | 950 | struct dw_mci_slot *slot = mmc_priv(mmc); |
937 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; | 951 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; |
938 | u32 regs; | 952 | u32 regs; |
953 | int ret; | ||
939 | 954 | ||
940 | switch (ios->bus_width) { | 955 | switch (ios->bus_width) { |
941 | case MMC_BUS_WIDTH_4: | 956 | case MMC_BUS_WIDTH_4: |
@@ -972,14 +987,43 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
972 | /* Slot specific timing and width adjustment */ | 987 | /* Slot specific timing and width adjustment */ |
973 | dw_mci_setup_bus(slot, false); | 988 | dw_mci_setup_bus(slot, false); |
974 | 989 | ||
990 | if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) | ||
991 | slot->host->state = STATE_IDLE; | ||
992 | |||
975 | switch (ios->power_mode) { | 993 | switch (ios->power_mode) { |
976 | case MMC_POWER_UP: | 994 | case MMC_POWER_UP: |
995 | if (!IS_ERR(mmc->supply.vmmc)) { | ||
996 | ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, | ||
997 | ios->vdd); | ||
998 | if (ret) { | ||
999 | dev_err(slot->host->dev, | ||
1000 | "failed to enable vmmc regulator\n"); | ||
1001 | /*return, if failed turn on vmmc*/ | ||
1002 | return; | ||
1003 | } | ||
1004 | } | ||
1005 | if (!IS_ERR(mmc->supply.vqmmc) && !slot->host->vqmmc_enabled) { | ||
1006 | ret = regulator_enable(mmc->supply.vqmmc); | ||
1007 | if (ret < 0) | ||
1008 | dev_err(slot->host->dev, | ||
1009 | "failed to enable vqmmc regulator\n"); | ||
1010 | else | ||
1011 | slot->host->vqmmc_enabled = true; | ||
1012 | } | ||
977 | set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); | 1013 | set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); |
978 | regs = mci_readl(slot->host, PWREN); | 1014 | regs = mci_readl(slot->host, PWREN); |
979 | regs |= (1 << slot->id); | 1015 | regs |= (1 << slot->id); |
980 | mci_writel(slot->host, PWREN, regs); | 1016 | mci_writel(slot->host, PWREN, regs); |
981 | break; | 1017 | break; |
982 | case MMC_POWER_OFF: | 1018 | case MMC_POWER_OFF: |
1019 | if (!IS_ERR(mmc->supply.vmmc)) | ||
1020 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); | ||
1021 | |||
1022 | if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) { | ||
1023 | regulator_disable(mmc->supply.vqmmc); | ||
1024 | slot->host->vqmmc_enabled = false; | ||
1025 | } | ||
1026 | |||
983 | regs = mci_readl(slot->host, PWREN); | 1027 | regs = mci_readl(slot->host, PWREN); |
984 | regs &= ~(1 << slot->id); | 1028 | regs &= ~(1 << slot->id); |
985 | mci_writel(slot->host, PWREN, regs); | 1029 | mci_writel(slot->host, PWREN, regs); |
@@ -989,6 +1033,59 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
989 | } | 1033 | } |
990 | } | 1034 | } |
991 | 1035 | ||
1036 | static int dw_mci_card_busy(struct mmc_host *mmc) | ||
1037 | { | ||
1038 | struct dw_mci_slot *slot = mmc_priv(mmc); | ||
1039 | u32 status; | ||
1040 | |||
1041 | /* | ||
1042 | * Check the busy bit which is low when DAT[3:0] | ||
1043 | * (the data lines) are 0000 | ||
1044 | */ | ||
1045 | status = mci_readl(slot->host, STATUS); | ||
1046 | |||
1047 | return !!(status & SDMMC_STATUS_BUSY); | ||
1048 | } | ||
1049 | |||
1050 | static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) | ||
1051 | { | ||
1052 | struct dw_mci_slot *slot = mmc_priv(mmc); | ||
1053 | struct dw_mci *host = slot->host; | ||
1054 | u32 uhs; | ||
1055 | u32 v18 = SDMMC_UHS_18V << slot->id; | ||
1056 | int min_uv, max_uv; | ||
1057 | int ret; | ||
1058 | |||
1059 | /* | ||
1060 | * Program the voltage. Note that some instances of dw_mmc may use | ||
1061 | * the UHS_REG for this. For other instances (like exynos) the UHS_REG | ||
1062 | * does no harm but you need to set the regulator directly. Try both. | ||
1063 | */ | ||
1064 | uhs = mci_readl(host, UHS_REG); | ||
1065 | if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { | ||
1066 | min_uv = 2700000; | ||
1067 | max_uv = 3600000; | ||
1068 | uhs &= ~v18; | ||
1069 | } else { | ||
1070 | min_uv = 1700000; | ||
1071 | max_uv = 1950000; | ||
1072 | uhs |= v18; | ||
1073 | } | ||
1074 | if (!IS_ERR(mmc->supply.vqmmc)) { | ||
1075 | ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv); | ||
1076 | |||
1077 | if (ret) { | ||
1078 | dev_err(&mmc->class_dev, | ||
1079 | "Regulator set error %d: %d - %d\n", | ||
1080 | ret, min_uv, max_uv); | ||
1081 | return ret; | ||
1082 | } | ||
1083 | } | ||
1084 | mci_writel(host, UHS_REG, uhs); | ||
1085 | |||
1086 | return 0; | ||
1087 | } | ||
1088 | |||
992 | static int dw_mci_get_ro(struct mmc_host *mmc) | 1089 | static int dw_mci_get_ro(struct mmc_host *mmc) |
993 | { | 1090 | { |
994 | int read_only; | 1091 | int read_only; |
@@ -1131,6 +1228,9 @@ static const struct mmc_host_ops dw_mci_ops = { | |||
1131 | .get_cd = dw_mci_get_cd, | 1228 | .get_cd = dw_mci_get_cd, |
1132 | .enable_sdio_irq = dw_mci_enable_sdio_irq, | 1229 | .enable_sdio_irq = dw_mci_enable_sdio_irq, |
1133 | .execute_tuning = dw_mci_execute_tuning, | 1230 | .execute_tuning = dw_mci_execute_tuning, |
1231 | .card_busy = dw_mci_card_busy, | ||
1232 | .start_signal_voltage_switch = dw_mci_switch_voltage, | ||
1233 | |||
1134 | }; | 1234 | }; |
1135 | 1235 | ||
1136 | static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) | 1236 | static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) |
@@ -1154,7 +1254,11 @@ static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) | |||
1154 | dw_mci_start_request(host, slot); | 1254 | dw_mci_start_request(host, slot); |
1155 | } else { | 1255 | } else { |
1156 | dev_vdbg(host->dev, "list empty\n"); | 1256 | dev_vdbg(host->dev, "list empty\n"); |
1157 | host->state = STATE_IDLE; | 1257 | |
1258 | if (host->state == STATE_SENDING_CMD11) | ||
1259 | host->state = STATE_WAITING_CMD11_DONE; | ||
1260 | else | ||
1261 | host->state = STATE_IDLE; | ||
1158 | } | 1262 | } |
1159 | 1263 | ||
1160 | spin_unlock(&host->lock); | 1264 | spin_unlock(&host->lock); |
@@ -1265,8 +1369,10 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1265 | 1369 | ||
1266 | switch (state) { | 1370 | switch (state) { |
1267 | case STATE_IDLE: | 1371 | case STATE_IDLE: |
1372 | case STATE_WAITING_CMD11_DONE: | ||
1268 | break; | 1373 | break; |
1269 | 1374 | ||
1375 | case STATE_SENDING_CMD11: | ||
1270 | case STATE_SENDING_CMD: | 1376 | case STATE_SENDING_CMD: |
1271 | if (!test_and_clear_bit(EVENT_CMD_COMPLETE, | 1377 | if (!test_and_clear_bit(EVENT_CMD_COMPLETE, |
1272 | &host->pending_events)) | 1378 | &host->pending_events)) |
@@ -1299,6 +1405,14 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1299 | /* fall through */ | 1405 | /* fall through */ |
1300 | 1406 | ||
1301 | case STATE_SENDING_DATA: | 1407 | case STATE_SENDING_DATA: |
1408 | /* | ||
1409 | * We could get a data error and never a transfer | ||
1410 | * complete so we'd better check for it here. | ||
1411 | * | ||
1412 | * Note that we don't really care if we also got a | ||
1413 | * transfer complete; stopping the DMA and sending an | ||
1414 | * abort won't hurt. | ||
1415 | */ | ||
1302 | if (test_and_clear_bit(EVENT_DATA_ERROR, | 1416 | if (test_and_clear_bit(EVENT_DATA_ERROR, |
1303 | &host->pending_events)) { | 1417 | &host->pending_events)) { |
1304 | dw_mci_stop_dma(host); | 1418 | dw_mci_stop_dma(host); |
@@ -1312,7 +1426,29 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1312 | break; | 1426 | break; |
1313 | 1427 | ||
1314 | set_bit(EVENT_XFER_COMPLETE, &host->completed_events); | 1428 | set_bit(EVENT_XFER_COMPLETE, &host->completed_events); |
1429 | |||
1430 | /* | ||
1431 | * Handle an EVENT_DATA_ERROR that might have shown up | ||
1432 | * before the transfer completed. This might not have | ||
1433 | * been caught by the check above because the interrupt | ||
1434 | * could have gone off between the previous check and | ||
1435 | * the check for transfer complete. | ||
1436 | * | ||
1437 | * Technically this ought not be needed assuming we | ||
1438 | * get a DATA_COMPLETE eventually (we'll notice the | ||
1439 | * error and end the request), but it shouldn't hurt. | ||
1440 | * | ||
1441 | * This has the advantage of sending the stop command. | ||
1442 | */ | ||
1443 | if (test_and_clear_bit(EVENT_DATA_ERROR, | ||
1444 | &host->pending_events)) { | ||
1445 | dw_mci_stop_dma(host); | ||
1446 | send_stop_abort(host, data); | ||
1447 | state = STATE_DATA_ERROR; | ||
1448 | break; | ||
1449 | } | ||
1315 | prev_state = state = STATE_DATA_BUSY; | 1450 | prev_state = state = STATE_DATA_BUSY; |
1451 | |||
1316 | /* fall through */ | 1452 | /* fall through */ |
1317 | 1453 | ||
1318 | case STATE_DATA_BUSY: | 1454 | case STATE_DATA_BUSY: |
@@ -1335,6 +1471,22 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1335 | /* stop command for open-ended transfer*/ | 1471 | /* stop command for open-ended transfer*/ |
1336 | if (data->stop) | 1472 | if (data->stop) |
1337 | send_stop_abort(host, data); | 1473 | send_stop_abort(host, data); |
1474 | } else { | ||
1475 | /* | ||
1476 | * If we don't have a command complete now we'll | ||
1477 | * never get one since we just reset everything; | ||
1478 | * better end the request. | ||
1479 | * | ||
1480 | * If we do have a command complete we'll fall | ||
1481 | * through to the SENDING_STOP command and | ||
1482 | * everything will be peachy keen. | ||
1483 | */ | ||
1484 | if (!test_bit(EVENT_CMD_COMPLETE, | ||
1485 | &host->pending_events)) { | ||
1486 | host->cmd = NULL; | ||
1487 | dw_mci_request_end(host, mrq); | ||
1488 | goto unlock; | ||
1489 | } | ||
1338 | } | 1490 | } |
1339 | 1491 | ||
1340 | /* | 1492 | /* |
@@ -1821,6 +1973,14 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) | |||
1821 | } | 1973 | } |
1822 | 1974 | ||
1823 | if (pending) { | 1975 | if (pending) { |
1976 | /* Check volt switch first, since it can look like an error */ | ||
1977 | if ((host->state == STATE_SENDING_CMD11) && | ||
1978 | (pending & SDMMC_INT_VOLT_SWITCH)) { | ||
1979 | mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); | ||
1980 | pending &= ~SDMMC_INT_VOLT_SWITCH; | ||
1981 | dw_mci_cmd_interrupt(host, pending); | ||
1982 | } | ||
1983 | |||
1824 | if (pending & DW_MCI_CMD_ERROR_FLAGS) { | 1984 | if (pending & DW_MCI_CMD_ERROR_FLAGS) { |
1825 | mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); | 1985 | mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); |
1826 | host->cmd_status = pending; | 1986 | host->cmd_status = pending; |
@@ -1926,7 +2086,9 @@ static void dw_mci_work_routine_card(struct work_struct *work) | |||
1926 | 2086 | ||
1927 | switch (host->state) { | 2087 | switch (host->state) { |
1928 | case STATE_IDLE: | 2088 | case STATE_IDLE: |
2089 | case STATE_WAITING_CMD11_DONE: | ||
1929 | break; | 2090 | break; |
2091 | case STATE_SENDING_CMD11: | ||
1930 | case STATE_SENDING_CMD: | 2092 | case STATE_SENDING_CMD: |
1931 | mrq->cmd->error = -ENOMEDIUM; | 2093 | mrq->cmd->error = -ENOMEDIUM; |
1932 | if (!mrq->data) | 2094 | if (!mrq->data) |
@@ -2028,10 +2190,6 @@ static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot) | |||
2028 | { | 2190 | { |
2029 | return 0; | 2191 | return 0; |
2030 | } | 2192 | } |
2031 | static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) | ||
2032 | { | ||
2033 | return NULL; | ||
2034 | } | ||
2035 | #endif /* CONFIG_OF */ | 2193 | #endif /* CONFIG_OF */ |
2036 | 2194 | ||
2037 | static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | 2195 | static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) |
@@ -2064,7 +2222,13 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2064 | mmc->f_max = freq[1]; | 2222 | mmc->f_max = freq[1]; |
2065 | } | 2223 | } |
2066 | 2224 | ||
2067 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | 2225 | /*if there are external regulators, get them*/ |
2226 | ret = mmc_regulator_get_supply(mmc); | ||
2227 | if (ret == -EPROBE_DEFER) | ||
2228 | goto err_host_allocated; | ||
2229 | |||
2230 | if (!mmc->ocr_avail) | ||
2231 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | ||
2068 | 2232 | ||
2069 | if (host->pdata->caps) | 2233 | if (host->pdata->caps) |
2070 | mmc->caps = host->pdata->caps; | 2234 | mmc->caps = host->pdata->caps; |
@@ -2085,7 +2249,9 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2085 | if (host->pdata->caps2) | 2249 | if (host->pdata->caps2) |
2086 | mmc->caps2 = host->pdata->caps2; | 2250 | mmc->caps2 = host->pdata->caps2; |
2087 | 2251 | ||
2088 | mmc_of_parse(mmc); | 2252 | ret = mmc_of_parse(mmc); |
2253 | if (ret) | ||
2254 | goto err_host_allocated; | ||
2089 | 2255 | ||
2090 | if (host->pdata->blk_settings) { | 2256 | if (host->pdata->blk_settings) { |
2091 | mmc->max_segs = host->pdata->blk_settings->max_segs; | 2257 | mmc->max_segs = host->pdata->blk_settings->max_segs; |
@@ -2117,7 +2283,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2117 | 2283 | ||
2118 | ret = mmc_add_host(mmc); | 2284 | ret = mmc_add_host(mmc); |
2119 | if (ret) | 2285 | if (ret) |
2120 | goto err_setup_bus; | 2286 | goto err_host_allocated; |
2121 | 2287 | ||
2122 | #if defined(CONFIG_DEBUG_FS) | 2288 | #if defined(CONFIG_DEBUG_FS) |
2123 | dw_mci_init_debugfs(slot); | 2289 | dw_mci_init_debugfs(slot); |
@@ -2128,9 +2294,9 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2128 | 2294 | ||
2129 | return 0; | 2295 | return 0; |
2130 | 2296 | ||
2131 | err_setup_bus: | 2297 | err_host_allocated: |
2132 | mmc_free_host(mmc); | 2298 | mmc_free_host(mmc); |
2133 | return -EINVAL; | 2299 | return ret; |
2134 | } | 2300 | } |
2135 | 2301 | ||
2136 | static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) | 2302 | static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) |
@@ -2423,24 +2589,6 @@ int dw_mci_probe(struct dw_mci *host) | |||
2423 | } | 2589 | } |
2424 | } | 2590 | } |
2425 | 2591 | ||
2426 | host->vmmc = devm_regulator_get_optional(host->dev, "vmmc"); | ||
2427 | if (IS_ERR(host->vmmc)) { | ||
2428 | ret = PTR_ERR(host->vmmc); | ||
2429 | if (ret == -EPROBE_DEFER) | ||
2430 | goto err_clk_ciu; | ||
2431 | |||
2432 | dev_info(host->dev, "no vmmc regulator found: %d\n", ret); | ||
2433 | host->vmmc = NULL; | ||
2434 | } else { | ||
2435 | ret = regulator_enable(host->vmmc); | ||
2436 | if (ret) { | ||
2437 | if (ret != -EPROBE_DEFER) | ||
2438 | dev_err(host->dev, | ||
2439 | "regulator_enable fail: %d\n", ret); | ||
2440 | goto err_clk_ciu; | ||
2441 | } | ||
2442 | } | ||
2443 | |||
2444 | host->quirks = host->pdata->quirks; | 2592 | host->quirks = host->pdata->quirks; |
2445 | 2593 | ||
2446 | spin_lock_init(&host->lock); | 2594 | spin_lock_init(&host->lock); |
@@ -2584,8 +2732,6 @@ err_workqueue: | |||
2584 | err_dmaunmap: | 2732 | err_dmaunmap: |
2585 | if (host->use_dma && host->dma_ops->exit) | 2733 | if (host->use_dma && host->dma_ops->exit) |
2586 | host->dma_ops->exit(host); | 2734 | host->dma_ops->exit(host); |
2587 | if (host->vmmc) | ||
2588 | regulator_disable(host->vmmc); | ||
2589 | 2735 | ||
2590 | err_clk_ciu: | 2736 | err_clk_ciu: |
2591 | if (!IS_ERR(host->ciu_clk)) | 2737 | if (!IS_ERR(host->ciu_clk)) |
@@ -2621,9 +2767,6 @@ void dw_mci_remove(struct dw_mci *host) | |||
2621 | if (host->use_dma && host->dma_ops->exit) | 2767 | if (host->use_dma && host->dma_ops->exit) |
2622 | host->dma_ops->exit(host); | 2768 | host->dma_ops->exit(host); |
2623 | 2769 | ||
2624 | if (host->vmmc) | ||
2625 | regulator_disable(host->vmmc); | ||
2626 | |||
2627 | if (!IS_ERR(host->ciu_clk)) | 2770 | if (!IS_ERR(host->ciu_clk)) |
2628 | clk_disable_unprepare(host->ciu_clk); | 2771 | clk_disable_unprepare(host->ciu_clk); |
2629 | 2772 | ||
@@ -2640,9 +2783,6 @@ EXPORT_SYMBOL(dw_mci_remove); | |||
2640 | */ | 2783 | */ |
2641 | int dw_mci_suspend(struct dw_mci *host) | 2784 | int dw_mci_suspend(struct dw_mci *host) |
2642 | { | 2785 | { |
2643 | if (host->vmmc) | ||
2644 | regulator_disable(host->vmmc); | ||
2645 | |||
2646 | return 0; | 2786 | return 0; |
2647 | } | 2787 | } |
2648 | EXPORT_SYMBOL(dw_mci_suspend); | 2788 | EXPORT_SYMBOL(dw_mci_suspend); |
@@ -2651,15 +2791,6 @@ int dw_mci_resume(struct dw_mci *host) | |||
2651 | { | 2791 | { |
2652 | int i, ret; | 2792 | int i, ret; |
2653 | 2793 | ||
2654 | if (host->vmmc) { | ||
2655 | ret = regulator_enable(host->vmmc); | ||
2656 | if (ret) { | ||
2657 | dev_err(host->dev, | ||
2658 | "failed to enable regulator: %d\n", ret); | ||
2659 | return ret; | ||
2660 | } | ||
2661 | } | ||
2662 | |||
2663 | if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { | 2794 | if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { |
2664 | ret = -ENODEV; | 2795 | ret = -ENODEV; |
2665 | return ret; | 2796 | return ret; |