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-rw-r--r--drivers/misc/ad525x_dpot.c1
-rw-r--r--drivers/misc/apds9802als.c1
-rw-r--r--drivers/misc/bmp085.c1
-rw-r--r--drivers/misc/carma/carma-fpga.c1
-rw-r--r--drivers/misc/ds1682.c1
-rw-r--r--drivers/misc/eeprom/at25.c1
-rw-r--r--drivers/misc/eeprom/eeprom.c1
-rw-r--r--drivers/misc/eeprom/eeprom_93xx46.c1
-rw-r--r--drivers/misc/eeprom/max6875.c1
-rw-r--r--drivers/misc/eeprom/sunxi_sid.c3
-rw-r--r--drivers/misc/genwqe/card_debugfs.c1
-rw-r--r--drivers/misc/hmc6352.c1
-rw-r--r--drivers/misc/isl29003.c1
-rw-r--r--drivers/misc/isl29020.c1
-rw-r--r--drivers/misc/lattice-ecp3-config.c1
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d.c1
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d_i2c.c1
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d_spi.c1
-rw-r--r--drivers/misc/lkdtm.c74
-rw-r--r--drivers/misc/mei/Kconfig9
-rw-r--r--drivers/misc/mei/Makefile6
-rw-r--r--drivers/misc/mei/amthif.c3
-rw-r--r--drivers/misc/mei/client.c2
-rw-r--r--drivers/misc/mei/debugfs.c54
-rw-r--r--drivers/misc/mei/hbm.c68
-rw-r--r--drivers/misc/mei/hbm.h1
-rw-r--r--drivers/misc/mei/hw-me.c5
-rw-r--r--drivers/misc/mei/hw-txe-regs.h294
-rw-r--r--drivers/misc/mei/hw-txe.c1106
-rw-r--r--drivers/misc/mei/hw-txe.h71
-rw-r--r--drivers/misc/mei/hw.h4
-rw-r--r--drivers/misc/mei/init.c41
-rw-r--r--drivers/misc/mei/interrupt.c61
-rw-r--r--drivers/misc/mei/mei_dev.h20
-rw-r--r--drivers/misc/mei/pci-me.c1
-rw-r--r--drivers/misc/mei/pci-txe.c293
-rw-r--r--drivers/misc/sram.c2
-rw-r--r--drivers/misc/ti-st/st_core.c1
-rw-r--r--drivers/misc/ti_dac7512.c1
-rw-r--r--drivers/misc/tsl2550.c1
40 files changed, 2028 insertions, 110 deletions
diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c
index d3eee113baeb..a43053daad0e 100644
--- a/drivers/misc/ad525x_dpot.c
+++ b/drivers/misc/ad525x_dpot.c
@@ -72,7 +72,6 @@
72#include <linux/module.h> 72#include <linux/module.h>
73#include <linux/device.h> 73#include <linux/device.h>
74#include <linux/kernel.h> 74#include <linux/kernel.h>
75#include <linux/init.h>
76#include <linux/delay.h> 75#include <linux/delay.h>
77#include <linux/slab.h> 76#include <linux/slab.h>
78 77
diff --git a/drivers/misc/apds9802als.c b/drivers/misc/apds9802als.c
index 0c6e037153d2..c6cc3dc8ae1f 100644
--- a/drivers/misc/apds9802als.c
+++ b/drivers/misc/apds9802als.c
@@ -22,7 +22,6 @@
22 */ 22 */
23 23
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/slab.h> 25#include <linux/slab.h>
27#include <linux/i2c.h> 26#include <linux/i2c.h>
28#include <linux/err.h> 27#include <linux/err.h>
diff --git a/drivers/misc/bmp085.c b/drivers/misc/bmp085.c
index 820e53d0048f..9b313f7810f5 100644
--- a/drivers/misc/bmp085.c
+++ b/drivers/misc/bmp085.c
@@ -47,7 +47,6 @@
47 47
48#include <linux/module.h> 48#include <linux/module.h>
49#include <linux/device.h> 49#include <linux/device.h>
50#include <linux/init.h>
51#include <linux/slab.h> 50#include <linux/slab.h>
52#include <linux/of.h> 51#include <linux/of.h>
53#include "bmp085.h" 52#include "bmp085.h"
diff --git a/drivers/misc/carma/carma-fpga.c b/drivers/misc/carma/carma-fpga.c
index 9e2b985293fc..14d90eae605b 100644
--- a/drivers/misc/carma/carma-fpga.c
+++ b/drivers/misc/carma/carma-fpga.c
@@ -101,7 +101,6 @@
101#include <linux/kernel.h> 101#include <linux/kernel.h>
102#include <linux/module.h> 102#include <linux/module.h>
103#include <linux/poll.h> 103#include <linux/poll.h>
104#include <linux/init.h>
105#include <linux/slab.h> 104#include <linux/slab.h>
106#include <linux/kref.h> 105#include <linux/kref.h>
107#include <linux/io.h> 106#include <linux/io.h>
diff --git a/drivers/misc/ds1682.c b/drivers/misc/ds1682.c
index 154b02e5094f..6a672f9ef522 100644
--- a/drivers/misc/ds1682.c
+++ b/drivers/misc/ds1682.c
@@ -32,7 +32,6 @@
32 */ 32 */
33 33
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/i2c.h> 35#include <linux/i2c.h>
37#include <linux/string.h> 36#include <linux/string.h>
38#include <linux/list.h> 37#include <linux/list.h>
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index 4f3bca1003a1..634f72929e12 100644
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/slab.h> 14#include <linux/slab.h>
16#include <linux/delay.h> 15#include <linux/delay.h>
diff --git a/drivers/misc/eeprom/eeprom.c b/drivers/misc/eeprom/eeprom.c
index f0fa4e8ca124..33f8673d23a6 100644
--- a/drivers/misc/eeprom/eeprom.c
+++ b/drivers/misc/eeprom/eeprom.c
@@ -17,7 +17,6 @@
17 */ 17 */
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/module.h> 20#include <linux/module.h>
22#include <linux/slab.h> 21#include <linux/slab.h>
23#include <linux/jiffies.h> 22#include <linux/jiffies.h>
diff --git a/drivers/misc/eeprom/eeprom_93xx46.c b/drivers/misc/eeprom/eeprom_93xx46.c
index 78e55b501c94..9ebeacdb8ec4 100644
--- a/drivers/misc/eeprom/eeprom_93xx46.c
+++ b/drivers/misc/eeprom/eeprom_93xx46.c
@@ -11,7 +11,6 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/device.h> 12#include <linux/device.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/module.h> 14#include <linux/module.h>
16#include <linux/mutex.h> 15#include <linux/mutex.h>
17#include <linux/slab.h> 16#include <linux/slab.h>
diff --git a/drivers/misc/eeprom/max6875.c b/drivers/misc/eeprom/max6875.c
index e36157d5d3ab..580ff9df5529 100644
--- a/drivers/misc/eeprom/max6875.c
+++ b/drivers/misc/eeprom/max6875.c
@@ -27,7 +27,6 @@
27 */ 27 */
28 28
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/slab.h> 31#include <linux/slab.h>
33#include <linux/i2c.h> 32#include <linux/i2c.h>
diff --git a/drivers/misc/eeprom/sunxi_sid.c b/drivers/misc/eeprom/sunxi_sid.c
index 9c34e5704304..3f2b625b2032 100644
--- a/drivers/misc/eeprom/sunxi_sid.c
+++ b/drivers/misc/eeprom/sunxi_sid.c
@@ -21,7 +21,6 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/export.h> 22#include <linux/export.h>
23#include <linux/fs.h> 23#include <linux/fs.h>
24#include <linux/init.h>
25#include <linux/io.h> 24#include <linux/io.h>
26#include <linux/kernel.h> 25#include <linux/kernel.h>
27#include <linux/kobject.h> 26#include <linux/kobject.h>
@@ -96,7 +95,7 @@ static int sunxi_sid_remove(struct platform_device *pdev)
96} 95}
97 96
98static const struct of_device_id sunxi_sid_of_match[] = { 97static const struct of_device_id sunxi_sid_of_match[] = {
99 { .compatible = "allwinner,sun4i-sid", .data = (void *)16}, 98 { .compatible = "allwinner,sun4i-a10-sid", .data = (void *)16},
100 { .compatible = "allwinner,sun7i-a20-sid", .data = (void *)512}, 99 { .compatible = "allwinner,sun7i-a20-sid", .data = (void *)512},
101 {/* sentinel */}, 100 {/* sentinel */},
102}; 101};
diff --git a/drivers/misc/genwqe/card_debugfs.c b/drivers/misc/genwqe/card_debugfs.c
index 3bfdc07a7248..50d2096ea1c7 100644
--- a/drivers/misc/genwqe/card_debugfs.c
+++ b/drivers/misc/genwqe/card_debugfs.c
@@ -26,7 +26,6 @@
26 26
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/debugfs.h> 29#include <linux/debugfs.h>
31#include <linux/seq_file.h> 30#include <linux/seq_file.h>
32#include <linux/uaccess.h> 31#include <linux/uaccess.h>
diff --git a/drivers/misc/hmc6352.c b/drivers/misc/hmc6352.c
index 170bd3daf336..90520d76633f 100644
--- a/drivers/misc/hmc6352.c
+++ b/drivers/misc/hmc6352.c
@@ -22,7 +22,6 @@
22 */ 22 */
23 23
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/slab.h> 25#include <linux/slab.h>
27#include <linux/i2c.h> 26#include <linux/i2c.h>
28#include <linux/err.h> 27#include <linux/err.h>
diff --git a/drivers/misc/isl29003.c b/drivers/misc/isl29003.c
index e3183f26216b..12c30b486b27 100644
--- a/drivers/misc/isl29003.c
+++ b/drivers/misc/isl29003.c
@@ -26,7 +26,6 @@
26 */ 26 */
27 27
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h> 29#include <linux/slab.h>
31#include <linux/i2c.h> 30#include <linux/i2c.h>
32#include <linux/mutex.h> 31#include <linux/mutex.h>
diff --git a/drivers/misc/isl29020.c b/drivers/misc/isl29020.c
index b7f84dacf822..4a9c50a43afb 100644
--- a/drivers/misc/isl29020.c
+++ b/drivers/misc/isl29020.c
@@ -23,7 +23,6 @@
23 */ 23 */
24 24
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/i2c.h> 27#include <linux/i2c.h>
29#include <linux/err.h> 28#include <linux/err.h>
diff --git a/drivers/misc/lattice-ecp3-config.c b/drivers/misc/lattice-ecp3-config.c
index 61fbe6acabef..0a1565e63c71 100644
--- a/drivers/misc/lattice-ecp3-config.c
+++ b/drivers/misc/lattice-ecp3-config.c
@@ -12,7 +12,6 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/spi/spi.h> 15#include <linux/spi/spi.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
18#include <linux/delay.h> 17#include <linux/delay.h>
diff --git a/drivers/misc/lis3lv02d/lis3lv02d.c b/drivers/misc/lis3lv02d/lis3lv02d.c
index 036effe9a795..3ef4627f9cb1 100644
--- a/drivers/misc/lis3lv02d/lis3lv02d.c
+++ b/drivers/misc/lis3lv02d/lis3lv02d.c
@@ -23,7 +23,6 @@
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 24
25#include <linux/kernel.h> 25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/dmi.h> 26#include <linux/dmi.h>
28#include <linux/module.h> 27#include <linux/module.h>
29#include <linux/types.h> 28#include <linux/types.h>
diff --git a/drivers/misc/lis3lv02d/lis3lv02d_i2c.c b/drivers/misc/lis3lv02d/lis3lv02d_i2c.c
index 7c97550240f1..d324f8a97b88 100644
--- a/drivers/misc/lis3lv02d/lis3lv02d_i2c.c
+++ b/drivers/misc/lis3lv02d/lis3lv02d_i2c.c
@@ -26,7 +26,6 @@
26 26
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/err.h> 29#include <linux/err.h>
31#include <linux/i2c.h> 30#include <linux/i2c.h>
32#include <linux/pm_runtime.h> 31#include <linux/pm_runtime.h>
diff --git a/drivers/misc/lis3lv02d/lis3lv02d_spi.c b/drivers/misc/lis3lv02d/lis3lv02d_spi.c
index 9aa2bd2a71ae..bd06d0cfac45 100644
--- a/drivers/misc/lis3lv02d/lis3lv02d_spi.c
+++ b/drivers/misc/lis3lv02d/lis3lv02d_spi.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/err.h> 13#include <linux/err.h>
15#include <linux/input.h> 14#include <linux/input.h>
16#include <linux/interrupt.h> 15#include <linux/interrupt.h>
diff --git a/drivers/misc/lkdtm.c b/drivers/misc/lkdtm.c
index 49c7a23f02fc..d66a2f24f6b3 100644
--- a/drivers/misc/lkdtm.c
+++ b/drivers/misc/lkdtm.c
@@ -30,6 +30,7 @@
30 * 30 *
31 * See Documentation/fault-injection/provoke-crashes.txt for instructions 31 * See Documentation/fault-injection/provoke-crashes.txt for instructions
32 */ 32 */
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 34
34#include <linux/kernel.h> 35#include <linux/kernel.h>
35#include <linux/fs.h> 36#include <linux/fs.h>
@@ -45,6 +46,7 @@
45#include <linux/debugfs.h> 46#include <linux/debugfs.h>
46#include <linux/vmalloc.h> 47#include <linux/vmalloc.h>
47#include <linux/mman.h> 48#include <linux/mman.h>
49#include <asm/cacheflush.h>
48 50
49#ifdef CONFIG_IDE 51#ifdef CONFIG_IDE
50#include <linux/ide.h> 52#include <linux/ide.h>
@@ -101,6 +103,7 @@ enum ctype {
101 CT_EXEC_USERSPACE, 103 CT_EXEC_USERSPACE,
102 CT_ACCESS_USERSPACE, 104 CT_ACCESS_USERSPACE,
103 CT_WRITE_RO, 105 CT_WRITE_RO,
106 CT_WRITE_KERN,
104}; 107};
105 108
106static char* cp_name[] = { 109static char* cp_name[] = {
@@ -137,6 +140,7 @@ static char* cp_type[] = {
137 "EXEC_USERSPACE", 140 "EXEC_USERSPACE",
138 "ACCESS_USERSPACE", 141 "ACCESS_USERSPACE",
139 "WRITE_RO", 142 "WRITE_RO",
143 "WRITE_KERN",
140}; 144};
141 145
142static struct jprobe lkdtm; 146static struct jprobe lkdtm;
@@ -316,6 +320,13 @@ static void do_nothing(void)
316 return; 320 return;
317} 321}
318 322
323/* Must immediately follow do_nothing for size calculuations to work out. */
324static void do_overwritten(void)
325{
326 pr_info("do_overwritten wasn't overwritten!\n");
327 return;
328}
329
319static noinline void corrupt_stack(void) 330static noinline void corrupt_stack(void)
320{ 331{
321 /* Use default char array length that triggers stack protection. */ 332 /* Use default char array length that triggers stack protection. */
@@ -328,7 +339,12 @@ static void execute_location(void *dst)
328{ 339{
329 void (*func)(void) = dst; 340 void (*func)(void) = dst;
330 341
342 pr_info("attempting ok execution at %p\n", do_nothing);
343 do_nothing();
344
331 memcpy(dst, do_nothing, EXEC_SIZE); 345 memcpy(dst, do_nothing, EXEC_SIZE);
346 flush_icache_range((unsigned long)dst, (unsigned long)dst + EXEC_SIZE);
347 pr_info("attempting bad execution at %p\n", func);
332 func(); 348 func();
333} 349}
334 350
@@ -337,8 +353,13 @@ static void execute_user_location(void *dst)
337 /* Intentionally crossing kernel/user memory boundary. */ 353 /* Intentionally crossing kernel/user memory boundary. */
338 void (*func)(void) = dst; 354 void (*func)(void) = dst;
339 355
356 pr_info("attempting ok execution at %p\n", do_nothing);
357 do_nothing();
358
340 if (copy_to_user((void __user *)dst, do_nothing, EXEC_SIZE)) 359 if (copy_to_user((void __user *)dst, do_nothing, EXEC_SIZE))
341 return; 360 return;
361 flush_icache_range((unsigned long)dst, (unsigned long)dst + EXEC_SIZE);
362 pr_info("attempting bad execution at %p\n", func);
342 func(); 363 func();
343} 364}
344 365
@@ -463,8 +484,12 @@ static void lkdtm_do_action(enum ctype which)
463 } 484 }
464 485
465 ptr = (unsigned long *)user_addr; 486 ptr = (unsigned long *)user_addr;
487
488 pr_info("attempting bad read at %p\n", ptr);
466 tmp = *ptr; 489 tmp = *ptr;
467 tmp += 0xc0dec0de; 490 tmp += 0xc0dec0de;
491
492 pr_info("attempting bad write at %p\n", ptr);
468 *ptr = tmp; 493 *ptr = tmp;
469 494
470 vm_munmap(user_addr, PAGE_SIZE); 495 vm_munmap(user_addr, PAGE_SIZE);
@@ -475,10 +500,28 @@ static void lkdtm_do_action(enum ctype which)
475 unsigned long *ptr; 500 unsigned long *ptr;
476 501
477 ptr = (unsigned long *)&rodata; 502 ptr = (unsigned long *)&rodata;
503
504 pr_info("attempting bad write at %p\n", ptr);
478 *ptr ^= 0xabcd1234; 505 *ptr ^= 0xabcd1234;
479 506
480 break; 507 break;
481 } 508 }
509 case CT_WRITE_KERN: {
510 size_t size;
511 unsigned char *ptr;
512
513 size = (unsigned long)do_overwritten -
514 (unsigned long)do_nothing;
515 ptr = (unsigned char *)do_overwritten;
516
517 pr_info("attempting bad %zu byte write at %p\n", size, ptr);
518 memcpy(ptr, (unsigned char *)do_nothing, size);
519 flush_icache_range((unsigned long)ptr,
520 (unsigned long)(ptr + size));
521
522 do_overwritten();
523 break;
524 }
482 case CT_NONE: 525 case CT_NONE:
483 default: 526 default:
484 break; 527 break;
@@ -493,8 +536,8 @@ static void lkdtm_handler(void)
493 536
494 spin_lock_irqsave(&count_lock, flags); 537 spin_lock_irqsave(&count_lock, flags);
495 count--; 538 count--;
496 printk(KERN_INFO "lkdtm: Crash point %s of type %s hit, trigger in %d rounds\n", 539 pr_info("Crash point %s of type %s hit, trigger in %d rounds\n",
497 cp_name_to_str(cpoint), cp_type_to_str(cptype), count); 540 cp_name_to_str(cpoint), cp_type_to_str(cptype), count);
498 541
499 if (count == 0) { 542 if (count == 0) {
500 do_it = true; 543 do_it = true;
@@ -551,18 +594,18 @@ static int lkdtm_register_cpoint(enum cname which)
551 lkdtm.kp.symbol_name = "generic_ide_ioctl"; 594 lkdtm.kp.symbol_name = "generic_ide_ioctl";
552 lkdtm.entry = (kprobe_opcode_t*) jp_generic_ide_ioctl; 595 lkdtm.entry = (kprobe_opcode_t*) jp_generic_ide_ioctl;
553#else 596#else
554 printk(KERN_INFO "lkdtm: Crash point not available\n"); 597 pr_info("Crash point not available\n");
555 return -EINVAL; 598 return -EINVAL;
556#endif 599#endif
557 break; 600 break;
558 default: 601 default:
559 printk(KERN_INFO "lkdtm: Invalid Crash Point\n"); 602 pr_info("Invalid Crash Point\n");
560 return -EINVAL; 603 return -EINVAL;
561 } 604 }
562 605
563 cpoint = which; 606 cpoint = which;
564 if ((ret = register_jprobe(&lkdtm)) < 0) { 607 if ((ret = register_jprobe(&lkdtm)) < 0) {
565 printk(KERN_INFO "lkdtm: Couldn't register jprobe\n"); 608 pr_info("Couldn't register jprobe\n");
566 cpoint = CN_INVALID; 609 cpoint = CN_INVALID;
567 } 610 }
568 611
@@ -709,8 +752,7 @@ static ssize_t direct_entry(struct file *f, const char __user *user_buf,
709 if (type == CT_NONE) 752 if (type == CT_NONE)
710 return -EINVAL; 753 return -EINVAL;
711 754
712 printk(KERN_INFO "lkdtm: Performing direct entry %s\n", 755 pr_info("Performing direct entry %s\n", cp_type_to_str(type));
713 cp_type_to_str(type));
714 lkdtm_do_action(type); 756 lkdtm_do_action(type);
715 *off += count; 757 *off += count;
716 758
@@ -772,7 +814,7 @@ static int __init lkdtm_module_init(void)
772 /* Register debugfs interface */ 814 /* Register debugfs interface */
773 lkdtm_debugfs_root = debugfs_create_dir("provoke-crash", NULL); 815 lkdtm_debugfs_root = debugfs_create_dir("provoke-crash", NULL);
774 if (!lkdtm_debugfs_root) { 816 if (!lkdtm_debugfs_root) {
775 printk(KERN_ERR "lkdtm: creating root dir failed\n"); 817 pr_err("creating root dir failed\n");
776 return -ENODEV; 818 return -ENODEV;
777 } 819 }
778 820
@@ -787,28 +829,26 @@ static int __init lkdtm_module_init(void)
787 de = debugfs_create_file(cur->name, 0644, lkdtm_debugfs_root, 829 de = debugfs_create_file(cur->name, 0644, lkdtm_debugfs_root,
788 NULL, &cur->fops); 830 NULL, &cur->fops);
789 if (de == NULL) { 831 if (de == NULL) {
790 printk(KERN_ERR "lkdtm: could not create %s\n", 832 pr_err("could not create %s\n", cur->name);
791 cur->name);
792 goto out_err; 833 goto out_err;
793 } 834 }
794 } 835 }
795 836
796 if (lkdtm_parse_commandline() == -EINVAL) { 837 if (lkdtm_parse_commandline() == -EINVAL) {
797 printk(KERN_INFO "lkdtm: Invalid command\n"); 838 pr_info("Invalid command\n");
798 goto out_err; 839 goto out_err;
799 } 840 }
800 841
801 if (cpoint != CN_INVALID && cptype != CT_NONE) { 842 if (cpoint != CN_INVALID && cptype != CT_NONE) {
802 ret = lkdtm_register_cpoint(cpoint); 843 ret = lkdtm_register_cpoint(cpoint);
803 if (ret < 0) { 844 if (ret < 0) {
804 printk(KERN_INFO "lkdtm: Invalid crash point %d\n", 845 pr_info("Invalid crash point %d\n", cpoint);
805 cpoint);
806 goto out_err; 846 goto out_err;
807 } 847 }
808 printk(KERN_INFO "lkdtm: Crash point %s of type %s registered\n", 848 pr_info("Crash point %s of type %s registered\n",
809 cpoint_name, cpoint_type); 849 cpoint_name, cpoint_type);
810 } else { 850 } else {
811 printk(KERN_INFO "lkdtm: No crash points registered, enable through debugfs\n"); 851 pr_info("No crash points registered, enable through debugfs\n");
812 } 852 }
813 853
814 return 0; 854 return 0;
@@ -823,7 +863,7 @@ static void __exit lkdtm_module_exit(void)
823 debugfs_remove_recursive(lkdtm_debugfs_root); 863 debugfs_remove_recursive(lkdtm_debugfs_root);
824 864
825 unregister_jprobe(&lkdtm); 865 unregister_jprobe(&lkdtm);
826 printk(KERN_INFO "lkdtm: Crash point unregistered\n"); 866 pr_info("Crash point unregistered\n");
827} 867}
828 868
829module_init(lkdtm_module_init); 869module_init(lkdtm_module_init);
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index c76fa31e9bf6..d23384dde73b 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -34,3 +34,12 @@ config INTEL_MEI_ME
34 82Q33 Express 34 82Q33 Express
35 82X38/X48 Express 35 82X38/X48 Express
36 36
37config INTEL_MEI_TXE
38 tristate "Intel Trusted Execution Environment with ME Interface"
39 select INTEL_MEI
40 depends on X86 && PCI && WATCHDOG_CORE
41 help
42 MEI Support for Trusted Execution Environment device on Intel SoCs
43
44 Supported SoCs:
45 Intel Bay Trail
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index 08698a466268..8ebc6cda1373 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -1,6 +1,6 @@
1# 1#
2# Makefile - Intel Management Engine Interface (Intel MEI) Linux driver 2# Makefile - Intel Management Engine Interface (Intel MEI) Linux driver
3# Copyright (c) 2010-2011, Intel Corporation. 3# Copyright (c) 2010-2014, Intel Corporation.
4# 4#
5obj-$(CONFIG_INTEL_MEI) += mei.o 5obj-$(CONFIG_INTEL_MEI) += mei.o
6mei-objs := init.o 6mei-objs := init.o
@@ -17,3 +17,7 @@ mei-$(CONFIG_DEBUG_FS) += debugfs.o
17obj-$(CONFIG_INTEL_MEI_ME) += mei-me.o 17obj-$(CONFIG_INTEL_MEI_ME) += mei-me.o
18mei-me-objs := pci-me.o 18mei-me-objs := pci-me.o
19mei-me-objs += hw-me.o 19mei-me-objs += hw-me.o
20
21obj-$(CONFIG_INTEL_MEI_TXE) += mei-txe.o
22mei-txe-objs := pci-txe.o
23mei-txe-objs += hw-txe.o
diff --git a/drivers/misc/mei/amthif.c b/drivers/misc/mei/amthif.c
index 2fad84432829..f88cb26364f5 100644
--- a/drivers/misc/mei/amthif.c
+++ b/drivers/misc/mei/amthif.c
@@ -21,7 +21,6 @@
21#include <linux/fcntl.h> 21#include <linux/fcntl.h>
22#include <linux/aio.h> 22#include <linux/aio.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/init.h>
25#include <linux/ioctl.h> 24#include <linux/ioctl.h>
26#include <linux/cdev.h> 25#include <linux/cdev.h>
27#include <linux/list.h> 26#include <linux/list.h>
@@ -365,7 +364,7 @@ int mei_amthif_write(struct mei_device *dev, struct mei_cl_cb *cb)
365 if (ret) 364 if (ret)
366 return ret; 365 return ret;
367 366
368 cb->fop_type = MEI_FOP_IOCTL; 367 cb->fop_type = MEI_FOP_WRITE;
369 368
370 if (!list_empty(&dev->amthif_cmd_list.list) || 369 if (!list_empty(&dev->amthif_cmd_list.list) ||
371 dev->iamthif_state != MEI_IAMTHIF_IDLE) { 370 dev->iamthif_state != MEI_IAMTHIF_IDLE) {
diff --git a/drivers/misc/mei/client.c b/drivers/misc/mei/client.c
index 9b809cfc2899..9ac72f1ea6b9 100644
--- a/drivers/misc/mei/client.c
+++ b/drivers/misc/mei/client.c
@@ -505,7 +505,7 @@ int mei_cl_connect(struct mei_cl *cl, struct file *file)
505 goto out; 505 goto out;
506 } 506 }
507 507
508 cb->fop_type = MEI_FOP_IOCTL; 508 cb->fop_type = MEI_FOP_CONNECT;
509 509
510 if (dev->hbuf_is_ready && !mei_cl_is_other_connecting(cl)) { 510 if (dev->hbuf_is_ready && !mei_cl_is_other_connecting(cl)) {
511 dev->hbuf_is_ready = false; 511 dev->hbuf_is_ready = false;
diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
index a3ae154444b2..ced5b777c70f 100644
--- a/drivers/misc/mei/debugfs.c
+++ b/drivers/misc/mei/debugfs.c
@@ -75,6 +75,54 @@ static const struct file_operations mei_dbgfs_fops_meclients = {
75 .llseek = generic_file_llseek, 75 .llseek = generic_file_llseek,
76}; 76};
77 77
78static ssize_t mei_dbgfs_read_active(struct file *fp, char __user *ubuf,
79 size_t cnt, loff_t *ppos)
80{
81 struct mei_device *dev = fp->private_data;
82 struct mei_cl *cl;
83 const size_t bufsz = 1024;
84 char *buf;
85 int i = 0;
86 int pos = 0;
87 int ret;
88
89 if (!dev)
90 return -ENODEV;
91
92 buf = kzalloc(bufsz, GFP_KERNEL);
93 if (!buf)
94 return -ENOMEM;
95
96 pos += scnprintf(buf + pos, bufsz - pos,
97 " |me|host|state|rd|wr|\n");
98
99 mutex_lock(&dev->device_lock);
100
101 /* if the driver is not enabled the list won't b consitent */
102 if (dev->dev_state != MEI_DEV_ENABLED)
103 goto out;
104
105 list_for_each_entry(cl, &dev->file_list, link) {
106
107 pos += scnprintf(buf + pos, bufsz - pos,
108 "%2d|%2d|%4d|%5d|%2d|%2d|\n",
109 i, cl->me_client_id, cl->host_client_id, cl->state,
110 cl->reading_state, cl->writing_state);
111 i++;
112 }
113out:
114 mutex_unlock(&dev->device_lock);
115 ret = simple_read_from_buffer(ubuf, cnt, ppos, buf, pos);
116 kfree(buf);
117 return ret;
118}
119
120static const struct file_operations mei_dbgfs_fops_active = {
121 .open = simple_open,
122 .read = mei_dbgfs_read_active,
123 .llseek = generic_file_llseek,
124};
125
78static ssize_t mei_dbgfs_read_devstate(struct file *fp, char __user *ubuf, 126static ssize_t mei_dbgfs_read_devstate(struct file *fp, char __user *ubuf,
79 size_t cnt, loff_t *ppos) 127 size_t cnt, loff_t *ppos)
80{ 128{
@@ -128,6 +176,12 @@ int mei_dbgfs_register(struct mei_device *dev, const char *name)
128 dev_err(&dev->pdev->dev, "meclients: registration failed\n"); 176 dev_err(&dev->pdev->dev, "meclients: registration failed\n");
129 goto err; 177 goto err;
130 } 178 }
179 f = debugfs_create_file("active", S_IRUSR, dir,
180 dev, &mei_dbgfs_fops_active);
181 if (!f) {
182 dev_err(&dev->pdev->dev, "meclients: registration failed\n");
183 goto err;
184 }
131 f = debugfs_create_file("devstate", S_IRUSR, dir, 185 f = debugfs_create_file("devstate", S_IRUSR, dir,
132 dev, &mei_dbgfs_fops_devstate); 186 dev, &mei_dbgfs_fops_devstate);
133 if (!f) { 187 if (!f) {
diff --git a/drivers/misc/mei/hbm.c b/drivers/misc/mei/hbm.c
index 28cd74c073b9..d3fcb23bb081 100644
--- a/drivers/misc/mei/hbm.c
+++ b/drivers/misc/mei/hbm.c
@@ -147,7 +147,7 @@ int mei_hbm_start_wait(struct mei_device *dev)
147 ret = wait_event_interruptible_timeout(dev->wait_recvd_msg, 147 ret = wait_event_interruptible_timeout(dev->wait_recvd_msg,
148 dev->hbm_state == MEI_HBM_IDLE || 148 dev->hbm_state == MEI_HBM_IDLE ||
149 dev->hbm_state >= MEI_HBM_STARTED, 149 dev->hbm_state >= MEI_HBM_STARTED,
150 mei_secs_to_jiffies(MEI_INTEROP_TIMEOUT)); 150 mei_secs_to_jiffies(MEI_HBM_TIMEOUT));
151 mutex_lock(&dev->device_lock); 151 mutex_lock(&dev->device_lock);
152 152
153 if (ret <= 0 && (dev->hbm_state <= MEI_HBM_START)) { 153 if (ret <= 0 && (dev->hbm_state <= MEI_HBM_START)) {
@@ -283,17 +283,18 @@ static int mei_hbm_prop_req(struct mei_device *dev)
283} 283}
284 284
285/** 285/**
286 * mei_hbm_stop_req_prepare - prepare stop request message 286 * mei_hbm_stop_req - send stop request message
287 * 287 *
288 * @dev - mei device 288 * @dev - mei device
289 * @mei_hdr - mei message header 289 * @cl: client info
290 * @data - hbm message body buffer 290 *
291 * This function returns -EIO on write failure
291 */ 292 */
292static void mei_hbm_stop_req_prepare(struct mei_device *dev, 293static int mei_hbm_stop_req(struct mei_device *dev)
293 struct mei_msg_hdr *mei_hdr, unsigned char *data)
294{ 294{
295 struct mei_msg_hdr *mei_hdr = &dev->wr_msg.hdr;
295 struct hbm_host_stop_request *req = 296 struct hbm_host_stop_request *req =
296 (struct hbm_host_stop_request *)data; 297 (struct hbm_host_stop_request *)dev->wr_msg.data;
297 const size_t len = sizeof(struct hbm_host_stop_request); 298 const size_t len = sizeof(struct hbm_host_stop_request);
298 299
299 mei_hbm_hdr(mei_hdr, len); 300 mei_hbm_hdr(mei_hdr, len);
@@ -301,6 +302,8 @@ static void mei_hbm_stop_req_prepare(struct mei_device *dev,
301 memset(req, 0, len); 302 memset(req, 0, len);
302 req->hbm_cmd = HOST_STOP_REQ_CMD; 303 req->hbm_cmd = HOST_STOP_REQ_CMD;
303 req->reason = DRIVER_STOP_REQUEST; 304 req->reason = DRIVER_STOP_REQUEST;
305
306 return mei_write_message(dev, mei_hdr, dev->wr_msg.data);
304} 307}
305 308
306/** 309/**
@@ -405,6 +408,25 @@ int mei_hbm_cl_disconnect_req(struct mei_device *dev, struct mei_cl *cl)
405} 408}
406 409
407/** 410/**
411 * mei_hbm_cl_disconnect_rsp - sends disconnect respose to the FW
412 *
413 * @dev: the device structure
414 * @cl: a client to disconnect from
415 *
416 * This function returns -EIO on write failure
417 */
418int mei_hbm_cl_disconnect_rsp(struct mei_device *dev, struct mei_cl *cl)
419{
420 struct mei_msg_hdr *mei_hdr = &dev->wr_msg.hdr;
421 const size_t len = sizeof(struct hbm_client_connect_response);
422
423 mei_hbm_hdr(mei_hdr, len);
424 mei_hbm_cl_hdr(cl, CLIENT_DISCONNECT_RES_CMD, dev->wr_msg.data, len);
425
426 return mei_write_message(dev, mei_hdr, dev->wr_msg.data);
427}
428
429/**
408 * mei_hbm_cl_disconnect_res - disconnect response from ME 430 * mei_hbm_cl_disconnect_res - disconnect response from ME
409 * 431 *
410 * @dev: the device structure 432 * @dev: the device structure
@@ -507,7 +529,7 @@ static void mei_hbm_cl_connect_res(struct mei_device *dev,
507 list_del(&pos->list); 529 list_del(&pos->list);
508 return; 530 return;
509 } 531 }
510 if (pos->fop_type == MEI_FOP_IOCTL) { 532 if (pos->fop_type == MEI_FOP_CONNECT) {
511 if (is_treat_specially_client(cl, rs)) { 533 if (is_treat_specially_client(cl, rs)) {
512 list_del(&pos->list); 534 list_del(&pos->list);
513 cl->status = 0; 535 cl->status = 0;
@@ -525,12 +547,14 @@ static void mei_hbm_cl_connect_res(struct mei_device *dev,
525 * 547 *
526 * @dev: the device structure. 548 * @dev: the device structure.
527 * @disconnect_req: disconnect request bus message from the me 549 * @disconnect_req: disconnect request bus message from the me
550 *
551 * returns -ENOMEM on allocation failure
528 */ 552 */
529static void mei_hbm_fw_disconnect_req(struct mei_device *dev, 553static int mei_hbm_fw_disconnect_req(struct mei_device *dev,
530 struct hbm_client_connect_request *disconnect_req) 554 struct hbm_client_connect_request *disconnect_req)
531{ 555{
532 struct mei_cl *cl, *next; 556 struct mei_cl *cl, *next;
533 const size_t len = sizeof(struct hbm_client_connect_response); 557 struct mei_cl_cb *cb;
534 558
535 list_for_each_entry_safe(cl, next, &dev->file_list, link) { 559 list_for_each_entry_safe(cl, next, &dev->file_list, link) {
536 if (mei_hbm_cl_addr_equal(cl, disconnect_req)) { 560 if (mei_hbm_cl_addr_equal(cl, disconnect_req)) {
@@ -544,13 +568,17 @@ static void mei_hbm_fw_disconnect_req(struct mei_device *dev,
544 else if (cl == &dev->iamthif_cl) 568 else if (cl == &dev->iamthif_cl)
545 dev->iamthif_timer = 0; 569 dev->iamthif_timer = 0;
546 570
547 /* prepare disconnect response */ 571 cb = mei_io_cb_init(cl, NULL);
548 mei_hbm_hdr(&dev->wr_ext_msg.hdr, len); 572 if (!cb)
549 mei_hbm_cl_hdr(cl, CLIENT_DISCONNECT_RES_CMD, 573 return -ENOMEM;
550 dev->wr_ext_msg.data, len); 574 cb->fop_type = MEI_FOP_DISCONNECT_RSP;
575 cl_dbg(dev, cl, "add disconnect response as first\n");
576 list_add(&cb->list, &dev->ctrl_wr_list.list);
577
551 break; 578 break;
552 } 579 }
553 } 580 }
581 return 0;
554} 582}
555 583
556 584
@@ -629,10 +657,7 @@ int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
629 dev_warn(&dev->pdev->dev, "hbm: start: version mismatch - stopping the driver.\n"); 657 dev_warn(&dev->pdev->dev, "hbm: start: version mismatch - stopping the driver.\n");
630 658
631 dev->hbm_state = MEI_HBM_STOPPED; 659 dev->hbm_state = MEI_HBM_STOPPED;
632 mei_hbm_stop_req_prepare(dev, &dev->wr_msg.hdr, 660 if (mei_hbm_stop_req(dev)) {
633 dev->wr_msg.data);
634 if (mei_write_message(dev, &dev->wr_msg.hdr,
635 dev->wr_msg.data)) {
636 dev_err(&dev->pdev->dev, "hbm: start: failed to send stop request\n"); 661 dev_err(&dev->pdev->dev, "hbm: start: failed to send stop request\n");
637 return -EIO; 662 return -EIO;
638 } 663 }
@@ -778,10 +803,11 @@ int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
778 803
779 case ME_STOP_REQ_CMD: 804 case ME_STOP_REQ_CMD:
780 dev_dbg(&dev->pdev->dev, "hbm: stop request: message received\n"); 805 dev_dbg(&dev->pdev->dev, "hbm: stop request: message received\n");
781
782 dev->hbm_state = MEI_HBM_STOPPED; 806 dev->hbm_state = MEI_HBM_STOPPED;
783 mei_hbm_stop_req_prepare(dev, &dev->wr_ext_msg.hdr, 807 if (mei_hbm_stop_req(dev)) {
784 dev->wr_ext_msg.data); 808 dev_err(&dev->pdev->dev, "hbm: start: failed to send stop request\n");
809 return -EIO;
810 }
785 break; 811 break;
786 default: 812 default:
787 BUG(); 813 BUG();
diff --git a/drivers/misc/mei/hbm.h b/drivers/misc/mei/hbm.h
index 5f92188a5cd7..20e8782711c0 100644
--- a/drivers/misc/mei/hbm.h
+++ b/drivers/misc/mei/hbm.h
@@ -54,6 +54,7 @@ int mei_hbm_start_req(struct mei_device *dev);
54int mei_hbm_start_wait(struct mei_device *dev); 54int mei_hbm_start_wait(struct mei_device *dev);
55int mei_hbm_cl_flow_control_req(struct mei_device *dev, struct mei_cl *cl); 55int mei_hbm_cl_flow_control_req(struct mei_device *dev, struct mei_cl *cl);
56int mei_hbm_cl_disconnect_req(struct mei_device *dev, struct mei_cl *cl); 56int mei_hbm_cl_disconnect_req(struct mei_device *dev, struct mei_cl *cl);
57int mei_hbm_cl_disconnect_rsp(struct mei_device *dev, struct mei_cl *cl);
57int mei_hbm_cl_connect_req(struct mei_device *dev, struct mei_cl *cl); 58int mei_hbm_cl_connect_req(struct mei_device *dev, struct mei_cl *cl);
58bool mei_hbm_version_is_supported(struct mei_device *dev); 59bool mei_hbm_version_is_supported(struct mei_device *dev);
59 60
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 6f656c053b14..847c9e5746cb 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -240,7 +240,7 @@ static int mei_me_hw_ready_wait(struct mei_device *dev)
240 mutex_unlock(&dev->device_lock); 240 mutex_unlock(&dev->device_lock);
241 err = wait_event_interruptible_timeout(dev->wait_hw_ready, 241 err = wait_event_interruptible_timeout(dev->wait_hw_ready,
242 dev->recvd_hw_ready, 242 dev->recvd_hw_ready,
243 mei_secs_to_jiffies(MEI_INTEROP_TIMEOUT)); 243 mei_secs_to_jiffies(MEI_HW_READY_TIMEOUT));
244 mutex_lock(&dev->device_lock); 244 mutex_lock(&dev->device_lock);
245 if (!err && !dev->recvd_hw_ready) { 245 if (!err && !dev->recvd_hw_ready) {
246 if (!err) 246 if (!err)
@@ -505,9 +505,6 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
505 /* check slots available for reading */ 505 /* check slots available for reading */
506 slots = mei_count_full_read_slots(dev); 506 slots = mei_count_full_read_slots(dev);
507 while (slots > 0) { 507 while (slots > 0) {
508 /* we have urgent data to send so break the read */
509 if (dev->wr_ext_msg.hdr.length)
510 break;
511 dev_dbg(&dev->pdev->dev, "slots to read = %08x\n", slots); 508 dev_dbg(&dev->pdev->dev, "slots to read = %08x\n", slots);
512 rets = mei_irq_read_handler(dev, &complete_list, &slots); 509 rets = mei_irq_read_handler(dev, &complete_list, &slots);
513 if (rets && dev->dev_state != MEI_DEV_RESETTING) { 510 if (rets && dev->dev_state != MEI_DEV_RESETTING) {
diff --git a/drivers/misc/mei/hw-txe-regs.h b/drivers/misc/mei/hw-txe-regs.h
new file mode 100644
index 000000000000..7283c24c1af1
--- /dev/null
+++ b/drivers/misc/mei/hw-txe-regs.h
@@ -0,0 +1,294 @@
1/******************************************************************************
2 * Intel Management Engine Interface (Intel MEI) Linux driver
3 * Intel MEI Interface Header
4 *
5 * This file is provided under a dual BSD/GPLv2 license. When using or
6 * redistributing this file, you may do so under either license.
7 *
8 * GPL LICENSE SUMMARY
9 *
10 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called COPYING
23 *
24 * Contact Information:
25 * Intel Corporation.
26 * linux-mei@linux.intel.com
27 * http://www.intel.com
28 *
29 * BSD LICENSE
30 *
31 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 *
38 * * Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * * Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in
42 * the documentation and/or other materials provided with the
43 * distribution.
44 * * Neither the name Intel Corporation nor the names of its
45 * contributors may be used to endorse or promote products derived
46 * from this software without specific prior written permission.
47 *
48 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
49 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
50 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
51 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
52 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
53 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
54 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
55 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
56 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
57 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
58 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
59 *
60 *****************************************************************************/
61#ifndef _MEI_HW_TXE_REGS_H_
62#define _MEI_HW_TXE_REGS_H_
63
64#include "hw.h"
65
66#define SEC_ALIVENESS_TIMER_TIMEOUT (5 * MSEC_PER_SEC)
67#define SEC_ALIVENESS_WAIT_TIMEOUT (1 * MSEC_PER_SEC)
68#define SEC_RESET_WAIT_TIMEOUT (1 * MSEC_PER_SEC)
69#define SEC_READY_WAIT_TIMEOUT (5 * MSEC_PER_SEC)
70#define START_MESSAGE_RESPONSE_WAIT_TIMEOUT (5 * MSEC_PER_SEC)
71#define RESET_CANCEL_WAIT_TIMEOUT (1 * MSEC_PER_SEC)
72
73enum {
74 SEC_BAR,
75 BRIDGE_BAR,
76
77 NUM_OF_MEM_BARS
78};
79
80/* SeC FW Status Register
81 *
82 * FW uses this register in order to report its status to host.
83 * This register resides in PCI-E config space.
84 */
85#define PCI_CFG_TXE_FW_STS0 0x40
86# define PCI_CFG_TXE_FW_STS0_WRK_ST_MSK 0x0000000F
87# define PCI_CFG_TXE_FW_STS0_OP_ST_MSK 0x000001C0
88# define PCI_CFG_TXE_FW_STS0_FW_INIT_CMPLT 0x00000200
89# define PCI_CFG_TXE_FW_STS0_ERR_CODE_MSK 0x0000F000
90# define PCI_CFG_TXE_FW_STS0_OP_MODE_MSK 0x000F0000
91# define PCI_CFG_TXE_FW_STS0_RST_CNT_MSK 0x00F00000
92
93
94#define IPC_BASE_ADDR 0x80400 /* SeC IPC Base Address */
95
96/* IPC Input Doorbell Register */
97#define SEC_IPC_INPUT_DOORBELL_REG (0x0000 + IPC_BASE_ADDR)
98
99/* IPC Input Status Register
100 * This register indicates whether or not processing of
101 * the most recent command has been completed by the SEC
102 * New commands and payloads should not be written by the Host
103 * until this indicates that the previous command has been processed.
104 */
105#define SEC_IPC_INPUT_STATUS_REG (0x0008 + IPC_BASE_ADDR)
106# define SEC_IPC_INPUT_STATUS_RDY BIT(0)
107
108/* IPC Host Interrupt Status Register */
109#define SEC_IPC_HOST_INT_STATUS_REG (0x0010 + IPC_BASE_ADDR)
110#define SEC_IPC_HOST_INT_STATUS_OUT_DB BIT(0)
111#define SEC_IPC_HOST_INT_STATUS_IN_RDY BIT(1)
112#define SEC_IPC_HOST_INT_STATUS_HDCP_M0_RCVD BIT(5)
113#define SEC_IPC_HOST_INT_STATUS_ILL_MEM_ACCESS BIT(17)
114#define SEC_IPC_HOST_INT_STATUS_AES_HKEY_ERR BIT(18)
115#define SEC_IPC_HOST_INT_STATUS_DES_HKEY_ERR BIT(19)
116#define SEC_IPC_HOST_INT_STATUS_TMRMTB_OVERFLOW BIT(21)
117
118/* Convenient mask for pending interrupts */
119#define SEC_IPC_HOST_INT_STATUS_PENDING \
120 (SEC_IPC_HOST_INT_STATUS_OUT_DB| \
121 SEC_IPC_HOST_INT_STATUS_IN_RDY)
122
123/* IPC Host Interrupt Mask Register */
124#define SEC_IPC_HOST_INT_MASK_REG (0x0014 + IPC_BASE_ADDR)
125
126# define SEC_IPC_HOST_INT_MASK_OUT_DB BIT(0) /* Output Doorbell Int Mask */
127# define SEC_IPC_HOST_INT_MASK_IN_RDY BIT(1) /* Input Ready Int Mask */
128
129/* IPC Input Payload RAM */
130#define SEC_IPC_INPUT_PAYLOAD_REG (0x0100 + IPC_BASE_ADDR)
131/* IPC Shared Payload RAM */
132#define IPC_SHARED_PAYLOAD_REG (0x0200 + IPC_BASE_ADDR)
133
134/* SeC Address Translation Table Entry 2 - Ctrl
135 *
136 * This register resides also in SeC's PCI-E Memory space.
137 */
138#define SATT2_CTRL_REG 0x1040
139# define SATT2_CTRL_VALID_MSK BIT(0)
140# define SATT2_CTRL_BR_BASE_ADDR_REG_SHIFT 8
141# define SATT2_CTRL_BRIDGE_HOST_EN_MSK BIT(12)
142
143/* SATT Table Entry 2 SAP Base Address Register */
144#define SATT2_SAP_BA_REG 0x1044
145/* SATT Table Entry 2 SAP Size Register. */
146#define SATT2_SAP_SIZE_REG 0x1048
147 /* SATT Table Entry 2 SAP Bridge Address - LSB Register */
148#define SATT2_BRG_BA_LSB_REG 0x104C
149
150/* Host High-level Interrupt Status Register */
151#define HHISR_REG 0x2020
152/* Host High-level Interrupt Enable Register
153 *
154 * Resides in PCI memory space. This is the top hierarchy for
155 * interrupts from SeC to host, aggregating both interrupts that
156 * arrive through HICR registers as well as interrupts
157 * that arrive via IPC.
158 */
159#define HHIER_REG 0x2024
160#define IPC_HHIER_SEC BIT(0)
161#define IPC_HHIER_BRIDGE BIT(1)
162#define IPC_HHIER_MSK (IPC_HHIER_SEC | IPC_HHIER_BRIDGE)
163
164/* Host High-level Interrupt Mask Register.
165 *
166 * Resides in PCI memory space.
167 * This is the top hierarchy for masking interrupts from SeC to host.
168 */
169#define HHIMR_REG 0x2028
170#define IPC_HHIMR_SEC BIT(0)
171#define IPC_HHIMR_BRIDGE BIT(1)
172
173/* Host High-level IRQ Status Register */
174#define HHIRQSR_REG 0x202C
175
176/* Host Interrupt Cause Register 0 - SeC IPC Readiness
177 *
178 * This register is both an ICR to Host from PCI Memory Space
179 * and it is also exposed in the SeC memory space.
180 * This register is used by SeC's IPC driver in order
181 * to synchronize with host about IPC interface state.
182 */
183#define HICR_SEC_IPC_READINESS_REG 0x2040
184#define HICR_SEC_IPC_READINESS_HOST_RDY BIT(0)
185#define HICR_SEC_IPC_READINESS_SEC_RDY BIT(1)
186#define HICR_SEC_IPC_READINESS_SYS_RDY \
187 (HICR_SEC_IPC_READINESS_HOST_RDY | \
188 HICR_SEC_IPC_READINESS_SEC_RDY)
189#define HICR_SEC_IPC_READINESS_RDY_CLR BIT(2)
190
191/* Host Interrupt Cause Register 1 - Aliveness Response */
192/* This register is both an ICR to Host from PCI Memory Space
193 * and it is also exposed in the SeC memory space.
194 * The register may be used by SeC to ACK a host request for aliveness.
195 */
196#define HICR_HOST_ALIVENESS_RESP_REG 0x2044
197#define HICR_HOST_ALIVENESS_RESP_ACK BIT(0)
198
199/* Host Interrupt Cause Register 2 - SeC IPC Output Doorbell */
200#define HICR_SEC_IPC_OUTPUT_DOORBELL_REG 0x2048
201
202/* Host Interrupt Status Register.
203 *
204 * Resides in PCI memory space.
205 * This is the main register involved in generating interrupts
206 * from SeC to host via HICRs.
207 * The interrupt generation rules are as follows:
208 * An interrupt will be generated whenever for any i,
209 * there is a transition from a state where at least one of
210 * the following conditions did not hold, to a state where
211 * ALL the following conditions hold:
212 * A) HISR.INT[i]_STS == 1.
213 * B) HIER.INT[i]_EN == 1.
214 */
215#define HISR_REG 0x2060
216#define HISR_INT_0_STS BIT(0)
217#define HISR_INT_1_STS BIT(1)
218#define HISR_INT_2_STS BIT(2)
219#define HISR_INT_3_STS BIT(3)
220#define HISR_INT_4_STS BIT(4)
221#define HISR_INT_5_STS BIT(5)
222#define HISR_INT_6_STS BIT(6)
223#define HISR_INT_7_STS BIT(7)
224#define HISR_INT_STS_MSK \
225 (HISR_INT_0_STS | HISR_INT_1_STS | HISR_INT_2_STS)
226
227/* Host Interrupt Enable Register. Resides in PCI memory space. */
228#define HIER_REG 0x2064
229#define HIER_INT_0_EN BIT(0)
230#define HIER_INT_1_EN BIT(1)
231#define HIER_INT_2_EN BIT(2)
232#define HIER_INT_3_EN BIT(3)
233#define HIER_INT_4_EN BIT(4)
234#define HIER_INT_5_EN BIT(5)
235#define HIER_INT_6_EN BIT(6)
236#define HIER_INT_7_EN BIT(7)
237
238#define HIER_INT_EN_MSK \
239 (HIER_INT_0_EN | HIER_INT_1_EN | HIER_INT_2_EN)
240
241
242/* SEC Memory Space IPC output payload.
243 *
244 * This register is part of the output payload which SEC provides to host.
245 */
246#define BRIDGE_IPC_OUTPUT_PAYLOAD_REG 0x20C0
247
248/* SeC Interrupt Cause Register - Host Aliveness Request
249 * This register is both an ICR to SeC and it is also exposed
250 * in the host-visible PCI memory space.
251 * The register is used by host to request SeC aliveness.
252 */
253#define SICR_HOST_ALIVENESS_REQ_REG 0x214C
254#define SICR_HOST_ALIVENESS_REQ_REQUESTED BIT(0)
255
256
257/* SeC Interrupt Cause Register - Host IPC Readiness
258 *
259 * This register is both an ICR to SeC and it is also exposed
260 * in the host-visible PCI memory space.
261 * This register is used by the host's SeC driver uses in order
262 * to synchronize with SeC about IPC interface state.
263 */
264#define SICR_HOST_IPC_READINESS_REQ_REG 0x2150
265
266
267#define SICR_HOST_IPC_READINESS_HOST_RDY BIT(0)
268#define SICR_HOST_IPC_READINESS_SEC_RDY BIT(1)
269#define SICR_HOST_IPC_READINESS_SYS_RDY \
270 (SICR_HOST_IPC_READINESS_HOST_RDY | \
271 SICR_HOST_IPC_READINESS_SEC_RDY)
272#define SICR_HOST_IPC_READINESS_RDY_CLR BIT(2)
273
274/* SeC Interrupt Cause Register - SeC IPC Output Status
275 *
276 * This register indicates whether or not processing of the most recent
277 * command has been completed by the Host.
278 * New commands and payloads should not be written by SeC until this
279 * register indicates that the previous command has been processed.
280 */
281#define SICR_SEC_IPC_OUTPUT_STATUS_REG 0x2154
282# define SEC_IPC_OUTPUT_STATUS_RDY BIT(0)
283
284
285
286/* MEI IPC Message payload size 64 bytes */
287#define PAYLOAD_SIZE 64
288
289/* MAX size for SATT range 32MB */
290#define SATT_RANGE_MAX (32 << 20)
291
292
293#endif /* _MEI_HW_TXE_REGS_H_ */
294
diff --git a/drivers/misc/mei/hw-txe.c b/drivers/misc/mei/hw-txe.c
new file mode 100644
index 000000000000..19579e560dad
--- /dev/null
+++ b/drivers/misc/mei/hw-txe.c
@@ -0,0 +1,1106 @@
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2013-2014, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#include <linux/pci.h>
18#include <linux/jiffies.h>
19#include <linux/delay.h>
20#include <linux/kthread.h>
21
22#include <linux/mei.h>
23
24#include "mei_dev.h"
25#include "hw-txe.h"
26#include "client.h"
27#include "hbm.h"
28
29/**
30 * mei_txe_reg_read - Reads 32bit data from the device
31 *
32 * @base_addr: registers base address
33 * @offset: register offset
34 *
35 */
36static inline u32 mei_txe_reg_read(void __iomem *base_addr,
37 unsigned long offset)
38{
39 return ioread32(base_addr + offset);
40}
41
42/**
43 * mei_txe_reg_write - Writes 32bit data to the device
44 *
45 * @base_addr: registers base address
46 * @offset: register offset
47 * @value: the value to write
48 */
49static inline void mei_txe_reg_write(void __iomem *base_addr,
50 unsigned long offset, u32 value)
51{
52 iowrite32(value, base_addr + offset);
53}
54
55/**
56 * mei_txe_sec_reg_read_silent - Reads 32bit data from the SeC BAR
57 *
58 * @dev: the device structure
59 * @offset: register offset
60 *
61 * Doesn't check for aliveness while Reads 32bit data from the SeC BAR
62 */
63static inline u32 mei_txe_sec_reg_read_silent(struct mei_txe_hw *hw,
64 unsigned long offset)
65{
66 return mei_txe_reg_read(hw->mem_addr[SEC_BAR], offset);
67}
68
69/**
70 * mei_txe_sec_reg_read - Reads 32bit data from the SeC BAR
71 *
72 * @dev: the device structure
73 * @offset: register offset
74 *
75 * Reads 32bit data from the SeC BAR and shout loud if aliveness is not set
76 */
77static inline u32 mei_txe_sec_reg_read(struct mei_txe_hw *hw,
78 unsigned long offset)
79{
80 WARN(!hw->aliveness, "sec read: aliveness not asserted\n");
81 return mei_txe_sec_reg_read_silent(hw, offset);
82}
83/**
84 * mei_txe_sec_reg_write_silent - Writes 32bit data to the SeC BAR
85 * doesn't check for aliveness
86 *
87 * @dev: the device structure
88 * @offset: register offset
89 * @value: value to write
90 *
91 * Doesn't check for aliveness while writes 32bit data from to the SeC BAR
92 */
93static inline void mei_txe_sec_reg_write_silent(struct mei_txe_hw *hw,
94 unsigned long offset, u32 value)
95{
96 mei_txe_reg_write(hw->mem_addr[SEC_BAR], offset, value);
97}
98
99/**
100 * mei_txe_sec_reg_write - Writes 32bit data to the SeC BAR
101 *
102 * @dev: the device structure
103 * @offset: register offset
104 * @value: value to write
105 *
106 * Writes 32bit data from the SeC BAR and shout loud if aliveness is not set
107 */
108static inline void mei_txe_sec_reg_write(struct mei_txe_hw *hw,
109 unsigned long offset, u32 value)
110{
111 WARN(!hw->aliveness, "sec write: aliveness not asserted\n");
112 mei_txe_sec_reg_write_silent(hw, offset, value);
113}
114/**
115 * mei_txe_br_reg_read - Reads 32bit data from the Bridge BAR
116 *
117 * @hw: the device structure
118 * @offset: offset from which to read the data
119 *
120 */
121static inline u32 mei_txe_br_reg_read(struct mei_txe_hw *hw,
122 unsigned long offset)
123{
124 return mei_txe_reg_read(hw->mem_addr[BRIDGE_BAR], offset);
125}
126
127/**
128 * mei_txe_br_reg_write - Writes 32bit data to the Bridge BAR
129 *
130 * @hw: the device structure
131 * @offset: offset from which to write the data
132 * @value: the byte to write
133 */
134static inline void mei_txe_br_reg_write(struct mei_txe_hw *hw,
135 unsigned long offset, u32 value)
136{
137 mei_txe_reg_write(hw->mem_addr[BRIDGE_BAR], offset, value);
138}
139
140/**
141 * mei_txe_aliveness_set - request for aliveness change
142 *
143 * @dev: the device structure
144 * @req: requested aliveness value
145 *
146 * Request for aliveness change and returns true if the change is
147 * really needed and false if aliveness is already
148 * in the requested state
149 * Requires device lock to be held
150 */
151static bool mei_txe_aliveness_set(struct mei_device *dev, u32 req)
152{
153
154 struct mei_txe_hw *hw = to_txe_hw(dev);
155 bool do_req = hw->aliveness != req;
156
157 dev_dbg(&dev->pdev->dev, "Aliveness current=%d request=%d\n",
158 hw->aliveness, req);
159 if (do_req) {
160 hw->recvd_aliveness = false;
161 mei_txe_br_reg_write(hw, SICR_HOST_ALIVENESS_REQ_REG, req);
162 }
163 return do_req;
164}
165
166
167/**
168 * mei_txe_aliveness_req_get - get aliveness requested register value
169 *
170 * @dev: the device structure
171 *
172 * Extract HICR_HOST_ALIVENESS_RESP_ACK bit from
173 * from HICR_HOST_ALIVENESS_REQ register value
174 */
175static u32 mei_txe_aliveness_req_get(struct mei_device *dev)
176{
177 struct mei_txe_hw *hw = to_txe_hw(dev);
178 u32 reg;
179 reg = mei_txe_br_reg_read(hw, SICR_HOST_ALIVENESS_REQ_REG);
180 return reg & SICR_HOST_ALIVENESS_REQ_REQUESTED;
181}
182
183/**
184 * mei_txe_aliveness_get - get aliveness response register value
185 * @dev: the device structure
186 *
187 * Extract HICR_HOST_ALIVENESS_RESP_ACK bit
188 * from HICR_HOST_ALIVENESS_RESP register value
189 */
190static u32 mei_txe_aliveness_get(struct mei_device *dev)
191{
192 struct mei_txe_hw *hw = to_txe_hw(dev);
193 u32 reg;
194 reg = mei_txe_br_reg_read(hw, HICR_HOST_ALIVENESS_RESP_REG);
195 return reg & HICR_HOST_ALIVENESS_RESP_ACK;
196}
197
198/**
199 * mei_txe_aliveness_poll - waits for aliveness to settle
200 *
201 * @dev: the device structure
202 * @expected: expected aliveness value
203 *
204 * Polls for HICR_HOST_ALIVENESS_RESP.ALIVENESS_RESP to be set
205 * returns > 0 if the expected value was received, -ETIME otherwise
206 */
207static int mei_txe_aliveness_poll(struct mei_device *dev, u32 expected)
208{
209 struct mei_txe_hw *hw = to_txe_hw(dev);
210 int t = 0;
211
212 do {
213 hw->aliveness = mei_txe_aliveness_get(dev);
214 if (hw->aliveness == expected) {
215 dev_dbg(&dev->pdev->dev,
216 "aliveness settled after %d msecs\n", t);
217 return t;
218 }
219 mutex_unlock(&dev->device_lock);
220 msleep(MSEC_PER_SEC / 5);
221 mutex_lock(&dev->device_lock);
222 t += MSEC_PER_SEC / 5;
223 } while (t < SEC_ALIVENESS_WAIT_TIMEOUT);
224
225 dev_err(&dev->pdev->dev, "aliveness timed out\n");
226 return -ETIME;
227}
228
229/**
230 * mei_txe_aliveness_wait - waits for aliveness to settle
231 *
232 * @dev: the device structure
233 * @expected: expected aliveness value
234 *
235 * Waits for HICR_HOST_ALIVENESS_RESP.ALIVENESS_RESP to be set
236 * returns returns 0 on success and < 0 otherwise
237 */
238static int mei_txe_aliveness_wait(struct mei_device *dev, u32 expected)
239{
240 struct mei_txe_hw *hw = to_txe_hw(dev);
241 const unsigned long timeout =
242 msecs_to_jiffies(SEC_ALIVENESS_WAIT_TIMEOUT);
243 long err;
244 int ret;
245
246 hw->aliveness = mei_txe_aliveness_get(dev);
247 if (hw->aliveness == expected)
248 return 0;
249
250 mutex_unlock(&dev->device_lock);
251 err = wait_event_timeout(hw->wait_aliveness,
252 hw->recvd_aliveness, timeout);
253 mutex_lock(&dev->device_lock);
254
255 hw->aliveness = mei_txe_aliveness_get(dev);
256 ret = hw->aliveness == expected ? 0 : -ETIME;
257
258 if (ret)
259 dev_err(&dev->pdev->dev, "aliveness timed out");
260 else
261 dev_dbg(&dev->pdev->dev, "aliveness settled after %d msecs\n",
262 jiffies_to_msecs(timeout - err));
263 hw->recvd_aliveness = false;
264 return ret;
265}
266
267/**
268 * mei_txe_aliveness_set_sync - sets an wait for aliveness to complete
269 *
270 * @dev: the device structure
271 *
272 * returns returns 0 on success and < 0 otherwise
273 */
274int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req)
275{
276 if (mei_txe_aliveness_set(dev, req))
277 return mei_txe_aliveness_wait(dev, req);
278 return 0;
279}
280
281/**
282 * mei_txe_input_ready_interrupt_enable - sets the Input Ready Interrupt
283 *
284 * @dev: the device structure
285 */
286static void mei_txe_input_ready_interrupt_enable(struct mei_device *dev)
287{
288 struct mei_txe_hw *hw = to_txe_hw(dev);
289 u32 hintmsk;
290 /* Enable the SEC_IPC_HOST_INT_MASK_IN_RDY interrupt */
291 hintmsk = mei_txe_sec_reg_read(hw, SEC_IPC_HOST_INT_MASK_REG);
292 hintmsk |= SEC_IPC_HOST_INT_MASK_IN_RDY;
293 mei_txe_sec_reg_write(hw, SEC_IPC_HOST_INT_MASK_REG, hintmsk);
294}
295
296/**
297 * mei_txe_input_doorbell_set
298 * - Sets bit 0 in SEC_IPC_INPUT_DOORBELL.IPC_INPUT_DOORBELL.
299 * @dev: the device structure
300 */
301static void mei_txe_input_doorbell_set(struct mei_txe_hw *hw)
302{
303 /* Clear the interrupt cause */
304 clear_bit(TXE_INTR_IN_READY_BIT, &hw->intr_cause);
305 mei_txe_sec_reg_write(hw, SEC_IPC_INPUT_DOORBELL_REG, 1);
306}
307
308/**
309 * mei_txe_output_ready_set - Sets the SICR_SEC_IPC_OUTPUT_STATUS bit to 1
310 *
311 * @dev: the device structure
312 */
313static void mei_txe_output_ready_set(struct mei_txe_hw *hw)
314{
315 mei_txe_br_reg_write(hw,
316 SICR_SEC_IPC_OUTPUT_STATUS_REG,
317 SEC_IPC_OUTPUT_STATUS_RDY);
318}
319
320/**
321 * mei_txe_is_input_ready - check if TXE is ready for receiving data
322 *
323 * @dev: the device structure
324 */
325static bool mei_txe_is_input_ready(struct mei_device *dev)
326{
327 struct mei_txe_hw *hw = to_txe_hw(dev);
328 u32 status;
329 status = mei_txe_sec_reg_read(hw, SEC_IPC_INPUT_STATUS_REG);
330 return !!(SEC_IPC_INPUT_STATUS_RDY & status);
331}
332
333/**
334 * mei_txe_intr_clear - clear all interrupts
335 *
336 * @dev: the device structure
337 */
338static inline void mei_txe_intr_clear(struct mei_device *dev)
339{
340 struct mei_txe_hw *hw = to_txe_hw(dev);
341 mei_txe_sec_reg_write_silent(hw, SEC_IPC_HOST_INT_STATUS_REG,
342 SEC_IPC_HOST_INT_STATUS_PENDING);
343 mei_txe_br_reg_write(hw, HISR_REG, HISR_INT_STS_MSK);
344 mei_txe_br_reg_write(hw, HHISR_REG, IPC_HHIER_MSK);
345}
346
347/**
348 * mei_txe_intr_disable - disable all interrupts
349 *
350 * @dev: the device structure
351 */
352static void mei_txe_intr_disable(struct mei_device *dev)
353{
354 struct mei_txe_hw *hw = to_txe_hw(dev);
355 mei_txe_br_reg_write(hw, HHIER_REG, 0);
356 mei_txe_br_reg_write(hw, HIER_REG, 0);
357}
358/**
359 * mei_txe_intr_disable - enable all interrupts
360 *
361 * @dev: the device structure
362 */
363static void mei_txe_intr_enable(struct mei_device *dev)
364{
365 struct mei_txe_hw *hw = to_txe_hw(dev);
366 mei_txe_br_reg_write(hw, HHIER_REG, IPC_HHIER_MSK);
367 mei_txe_br_reg_write(hw, HIER_REG, HIER_INT_EN_MSK);
368}
369
370/**
371 * mei_txe_pending_interrupts - check if there are pending interrupts
372 * only Aliveness, Input ready, and output doorbell are of relevance
373 *
374 * @dev: the device structure
375 *
376 * Checks if there are pending interrupts
377 * only Aliveness, Readiness, Input ready, and Output doorbell are relevant
378 */
379static bool mei_txe_pending_interrupts(struct mei_device *dev)
380{
381
382 struct mei_txe_hw *hw = to_txe_hw(dev);
383 bool ret = (hw->intr_cause & (TXE_INTR_READINESS |
384 TXE_INTR_ALIVENESS |
385 TXE_INTR_IN_READY |
386 TXE_INTR_OUT_DB));
387
388 if (ret) {
389 dev_dbg(&dev->pdev->dev,
390 "Pending Interrupts InReady=%01d Readiness=%01d, Aliveness=%01d, OutDoor=%01d\n",
391 !!(hw->intr_cause & TXE_INTR_IN_READY),
392 !!(hw->intr_cause & TXE_INTR_READINESS),
393 !!(hw->intr_cause & TXE_INTR_ALIVENESS),
394 !!(hw->intr_cause & TXE_INTR_OUT_DB));
395 }
396 return ret;
397}
398
399/**
400 * mei_txe_input_payload_write - write a dword to the host buffer
401 * at offset idx
402 *
403 * @dev: the device structure
404 * @idx: index in the host buffer
405 * @value: value
406 */
407static void mei_txe_input_payload_write(struct mei_device *dev,
408 unsigned long idx, u32 value)
409{
410 struct mei_txe_hw *hw = to_txe_hw(dev);
411 mei_txe_sec_reg_write(hw, SEC_IPC_INPUT_PAYLOAD_REG +
412 (idx * sizeof(u32)), value);
413}
414
415/**
416 * mei_txe_out_data_read - read dword from the device buffer
417 * at offset idx
418 *
419 * @dev: the device structure
420 * @idx: index in the device buffer
421 *
422 * returns register value at index
423 */
424static u32 mei_txe_out_data_read(const struct mei_device *dev,
425 unsigned long idx)
426{
427 struct mei_txe_hw *hw = to_txe_hw(dev);
428 return mei_txe_br_reg_read(hw,
429 BRIDGE_IPC_OUTPUT_PAYLOAD_REG + (idx * sizeof(u32)));
430}
431
432/* Readiness */
433
434/**
435 * mei_txe_readiness_set_host_rdy
436 *
437 * @dev: the device structure
438 */
439static void mei_txe_readiness_set_host_rdy(struct mei_device *dev)
440{
441 struct mei_txe_hw *hw = to_txe_hw(dev);
442 mei_txe_br_reg_write(hw,
443 SICR_HOST_IPC_READINESS_REQ_REG,
444 SICR_HOST_IPC_READINESS_HOST_RDY);
445}
446
447/**
448 * mei_txe_readiness_clear
449 *
450 * @dev: the device structure
451 */
452static void mei_txe_readiness_clear(struct mei_device *dev)
453{
454 struct mei_txe_hw *hw = to_txe_hw(dev);
455 mei_txe_br_reg_write(hw, SICR_HOST_IPC_READINESS_REQ_REG,
456 SICR_HOST_IPC_READINESS_RDY_CLR);
457}
458/**
459 * mei_txe_readiness_get - Reads and returns
460 * the HICR_SEC_IPC_READINESS register value
461 *
462 * @dev: the device structure
463 */
464static u32 mei_txe_readiness_get(struct mei_device *dev)
465{
466 struct mei_txe_hw *hw = to_txe_hw(dev);
467 return mei_txe_br_reg_read(hw, HICR_SEC_IPC_READINESS_REG);
468}
469
470
471/**
472 * mei_txe_readiness_is_sec_rdy - check readiness
473 * for HICR_SEC_IPC_READINESS_SEC_RDY
474 *
475 * @readiness - cached readiness state
476 */
477static inline bool mei_txe_readiness_is_sec_rdy(u32 readiness)
478{
479 return !!(readiness & HICR_SEC_IPC_READINESS_SEC_RDY);
480}
481
482/**
483 * mei_txe_hw_is_ready - check if the hw is ready
484 *
485 * @dev: the device structure
486 */
487static bool mei_txe_hw_is_ready(struct mei_device *dev)
488{
489 u32 readiness = mei_txe_readiness_get(dev);
490 return mei_txe_readiness_is_sec_rdy(readiness);
491}
492
493/**
494 * mei_txe_host_is_ready - check if the host is ready
495 *
496 * @dev: the device structure
497 */
498static inline bool mei_txe_host_is_ready(struct mei_device *dev)
499{
500 struct mei_txe_hw *hw = to_txe_hw(dev);
501 u32 reg = mei_txe_br_reg_read(hw, HICR_SEC_IPC_READINESS_REG);
502 return !!(reg & HICR_SEC_IPC_READINESS_HOST_RDY);
503}
504
505/**
506 * mei_txe_readiness_wait - wait till readiness settles
507 *
508 * @dev: the device structure
509 *
510 * returns 0 on success and -ETIME on timeout
511 */
512static int mei_txe_readiness_wait(struct mei_device *dev)
513{
514 if (mei_txe_hw_is_ready(dev))
515 return 0;
516
517 mutex_unlock(&dev->device_lock);
518 wait_event_timeout(dev->wait_hw_ready, dev->recvd_hw_ready,
519 msecs_to_jiffies(SEC_RESET_WAIT_TIMEOUT));
520 mutex_lock(&dev->device_lock);
521 if (!dev->recvd_hw_ready) {
522 dev_err(&dev->pdev->dev, "wait for readiness failed\n");
523 return -ETIME;
524 }
525
526 dev->recvd_hw_ready = false;
527 return 0;
528}
529
530/**
531 * mei_txe_hw_config - configure hardware at the start of the devices
532 *
533 * @dev: the device structure
534 *
535 * Configure hardware at the start of the device should be done only
536 * once at the device probe time
537 */
538static void mei_txe_hw_config(struct mei_device *dev)
539{
540
541 struct mei_txe_hw *hw = to_txe_hw(dev);
542 /* Doesn't change in runtime */
543 dev->hbuf_depth = PAYLOAD_SIZE / 4;
544
545 hw->aliveness = mei_txe_aliveness_get(dev);
546 hw->readiness = mei_txe_readiness_get(dev);
547
548 dev_dbg(&dev->pdev->dev, "aliveness_resp = 0x%08x, readiness = 0x%08x.\n",
549 hw->aliveness, hw->readiness);
550}
551
552
553/**
554 * mei_txe_write - writes a message to device.
555 *
556 * @dev: the device structure
557 * @header: header of message
558 * @buf: message buffer will be written
559 * returns 1 if success, 0 - otherwise.
560 */
561
562static int mei_txe_write(struct mei_device *dev,
563 struct mei_msg_hdr *header, unsigned char *buf)
564{
565 struct mei_txe_hw *hw = to_txe_hw(dev);
566 unsigned long rem;
567 unsigned long length;
568 u32 *reg_buf = (u32 *)buf;
569 int i;
570
571 if (WARN_ON(!header || !buf))
572 return -EINVAL;
573
574 length = header->length;
575
576 dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header));
577
578 if ((length + sizeof(struct mei_msg_hdr)) > PAYLOAD_SIZE) {
579 dev_err(&dev->pdev->dev, "write length exceeded = %ld > %d\n",
580 length + sizeof(struct mei_msg_hdr), PAYLOAD_SIZE);
581 return -ERANGE;
582 }
583
584 if (WARN(!hw->aliveness, "txe write: aliveness not asserted\n"))
585 return -EAGAIN;
586
587 /* Enable Input Ready Interrupt. */
588 mei_txe_input_ready_interrupt_enable(dev);
589
590 if (!mei_txe_is_input_ready(dev)) {
591 dev_err(&dev->pdev->dev, "Input is not ready");
592 return -EAGAIN;
593 }
594
595 mei_txe_input_payload_write(dev, 0, *((u32 *)header));
596
597 for (i = 0; i < length / 4; i++)
598 mei_txe_input_payload_write(dev, i + 1, reg_buf[i]);
599
600 rem = length & 0x3;
601 if (rem > 0) {
602 u32 reg = 0;
603 memcpy(&reg, &buf[length - rem], rem);
604 mei_txe_input_payload_write(dev, i + 1, reg);
605 }
606
607 dev->hbuf_is_ready = false;
608 /* Set Input-Doorbell */
609 mei_txe_input_doorbell_set(hw);
610
611 return 0;
612}
613
614/**
615 * mei_txe_hbuf_max_len - mimics the me hbuf circular buffer
616 *
617 * @dev: the device structure
618 *
619 * returns the PAYLOAD_SIZE - 4
620 */
621static size_t mei_txe_hbuf_max_len(const struct mei_device *dev)
622{
623 return PAYLOAD_SIZE - sizeof(struct mei_msg_hdr);
624}
625
626/**
627 * mei_txe_hbuf_empty_slots - mimics the me hbuf circular buffer
628 *
629 * @dev: the device structure
630 *
631 * returns always hbuf_depth
632 */
633static int mei_txe_hbuf_empty_slots(struct mei_device *dev)
634{
635 return dev->hbuf_depth;
636}
637
638/**
639 * mei_txe_count_full_read_slots - mimics the me device circular buffer
640 *
641 * @dev: the device structure
642 *
643 * returns always buffer size in dwords count
644 */
645static int mei_txe_count_full_read_slots(struct mei_device *dev)
646{
647 /* read buffers has static size */
648 return PAYLOAD_SIZE / 4;
649}
650
651/**
652 * mei_txe_read_hdr - read message header which is always in 4 first bytes
653 *
654 * @dev: the device structure
655 *
656 * returns mei message header
657 */
658
659static u32 mei_txe_read_hdr(const struct mei_device *dev)
660{
661 return mei_txe_out_data_read(dev, 0);
662}
663/**
664 * mei_txe_read - reads a message from the txe device.
665 *
666 * @dev: the device structure
667 * @buf: message buffer will be written
668 * @len: message size will be read
669 *
670 * returns -EINVAL on error wrong argument and 0 on success
671 */
672static int mei_txe_read(struct mei_device *dev,
673 unsigned char *buf, unsigned long len)
674{
675
676 struct mei_txe_hw *hw = to_txe_hw(dev);
677 u32 i;
678 u32 *reg_buf = (u32 *)buf;
679 u32 rem = len & 0x3;
680
681 if (WARN_ON(!buf || !len))
682 return -EINVAL;
683
684 dev_dbg(&dev->pdev->dev,
685 "buffer-length = %lu buf[0]0x%08X\n",
686 len, mei_txe_out_data_read(dev, 0));
687
688 for (i = 0; i < len / 4; i++) {
689 /* skip header: index starts from 1 */
690 u32 reg = mei_txe_out_data_read(dev, i + 1);
691 dev_dbg(&dev->pdev->dev, "buf[%d] = 0x%08X\n", i, reg);
692 *reg_buf++ = reg;
693 }
694
695 if (rem) {
696 u32 reg = mei_txe_out_data_read(dev, i + 1);
697 memcpy(reg_buf, &reg, rem);
698 }
699
700 mei_txe_output_ready_set(hw);
701 return 0;
702}
703
704/**
705 * mei_txe_hw_reset - resets host and fw.
706 *
707 * @dev: the device structure
708 * @intr_enable: if interrupt should be enabled after reset.
709 *
710 * returns 0 on success and < 0 in case of error
711 */
712static int mei_txe_hw_reset(struct mei_device *dev, bool intr_enable)
713{
714 struct mei_txe_hw *hw = to_txe_hw(dev);
715
716 u32 aliveness_req;
717 /*
718 * read input doorbell to ensure consistency between Bridge and SeC
719 * return value might be garbage return
720 */
721 (void)mei_txe_sec_reg_read_silent(hw, SEC_IPC_INPUT_DOORBELL_REG);
722
723 aliveness_req = mei_txe_aliveness_req_get(dev);
724 hw->aliveness = mei_txe_aliveness_get(dev);
725
726 /* Disable interrupts in this stage we will poll */
727 mei_txe_intr_disable(dev);
728
729 /*
730 * If Aliveness Request and Aliveness Response are not equal then
731 * wait for them to be equal
732 * Since we might have interrupts disabled - poll for it
733 */
734 if (aliveness_req != hw->aliveness)
735 if (mei_txe_aliveness_poll(dev, aliveness_req) < 0) {
736 dev_err(&dev->pdev->dev,
737 "wait for aliveness settle failed ... bailing out\n");
738 return -EIO;
739 }
740
741 /*
742 * If Aliveness Request and Aliveness Response are set then clear them
743 */
744 if (aliveness_req) {
745 mei_txe_aliveness_set(dev, 0);
746 if (mei_txe_aliveness_poll(dev, 0) < 0) {
747 dev_err(&dev->pdev->dev,
748 "wait for aliveness failed ... bailing out\n");
749 return -EIO;
750 }
751 }
752
753 /*
754 * Set rediness RDY_CLR bit
755 */
756 mei_txe_readiness_clear(dev);
757
758 return 0;
759}
760
761/**
762 * mei_txe_hw_start - start the hardware after reset
763 *
764 * @dev: the device structure
765 *
766 * returns 0 on success and < 0 in case of error
767 */
768static int mei_txe_hw_start(struct mei_device *dev)
769{
770 struct mei_txe_hw *hw = to_txe_hw(dev);
771 int ret;
772
773 u32 hisr;
774
775 /* bring back interrupts */
776 mei_txe_intr_enable(dev);
777
778 ret = mei_txe_readiness_wait(dev);
779 if (ret < 0) {
780 dev_err(&dev->pdev->dev, "wating for readiness failed\n");
781 return ret;
782 }
783
784 /*
785 * If HISR.INT2_STS interrupt status bit is set then clear it.
786 */
787 hisr = mei_txe_br_reg_read(hw, HISR_REG);
788 if (hisr & HISR_INT_2_STS)
789 mei_txe_br_reg_write(hw, HISR_REG, HISR_INT_2_STS);
790
791 /* Clear the interrupt cause of OutputDoorbell */
792 clear_bit(TXE_INTR_OUT_DB_BIT, &hw->intr_cause);
793
794 ret = mei_txe_aliveness_set_sync(dev, 1);
795 if (ret < 0) {
796 dev_err(&dev->pdev->dev, "wait for aliveness failed ... bailing out\n");
797 return ret;
798 }
799
800 /* enable input ready interrupts:
801 * SEC_IPC_HOST_INT_MASK.IPC_INPUT_READY_INT_MASK
802 */
803 mei_txe_input_ready_interrupt_enable(dev);
804
805
806 /* Set the SICR_SEC_IPC_OUTPUT_STATUS.IPC_OUTPUT_READY bit */
807 mei_txe_output_ready_set(hw);
808
809 /* Set bit SICR_HOST_IPC_READINESS.HOST_RDY
810 */
811 mei_txe_readiness_set_host_rdy(dev);
812
813 return 0;
814}
815
816/**
817 * mei_txe_check_and_ack_intrs - translate multi BAR interrupt into
818 * single bit mask and acknowledge the interrupts
819 *
820 * @dev: the device structure
821 * @do_ack: acknowledge interrupts
822 */
823static bool mei_txe_check_and_ack_intrs(struct mei_device *dev, bool do_ack)
824{
825 struct mei_txe_hw *hw = to_txe_hw(dev);
826 u32 hisr;
827 u32 hhisr;
828 u32 ipc_isr;
829 u32 aliveness;
830 bool generated;
831
832 /* read interrupt registers */
833 hhisr = mei_txe_br_reg_read(hw, HHISR_REG);
834 generated = (hhisr & IPC_HHIER_MSK);
835 if (!generated)
836 goto out;
837
838 hisr = mei_txe_br_reg_read(hw, HISR_REG);
839
840 aliveness = mei_txe_aliveness_get(dev);
841 if (hhisr & IPC_HHIER_SEC && aliveness)
842 ipc_isr = mei_txe_sec_reg_read_silent(hw,
843 SEC_IPC_HOST_INT_STATUS_REG);
844 else
845 ipc_isr = 0;
846
847 generated = generated ||
848 (hisr & HISR_INT_STS_MSK) ||
849 (ipc_isr & SEC_IPC_HOST_INT_STATUS_PENDING);
850
851 if (generated && do_ack) {
852 /* Save the interrupt causes */
853 hw->intr_cause |= hisr & HISR_INT_STS_MSK;
854 if (ipc_isr & SEC_IPC_HOST_INT_STATUS_IN_RDY)
855 hw->intr_cause |= TXE_INTR_IN_READY;
856
857
858 mei_txe_intr_disable(dev);
859 /* Clear the interrupts in hierarchy:
860 * IPC and Bridge, than the High Level */
861 mei_txe_sec_reg_write_silent(hw,
862 SEC_IPC_HOST_INT_STATUS_REG, ipc_isr);
863 mei_txe_br_reg_write(hw, HISR_REG, hisr);
864 mei_txe_br_reg_write(hw, HHISR_REG, hhisr);
865 }
866
867out:
868 return generated;
869}
870
871/**
872 * mei_txe_irq_quick_handler - The ISR of the MEI device
873 *
874 * @irq: The irq number
875 * @dev_id: pointer to the device structure
876 *
877 * returns irqreturn_t
878 */
879irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id)
880{
881 struct mei_device *dev = dev_id;
882
883 if (mei_txe_check_and_ack_intrs(dev, true))
884 return IRQ_WAKE_THREAD;
885 return IRQ_NONE;
886}
887
888
889/**
890 * mei_txe_irq_thread_handler - txe interrupt thread
891 *
892 * @irq: The irq number
893 * @dev_id: pointer to the device structure
894 *
895 * returns irqreturn_t
896 *
897 */
898irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id)
899{
900 struct mei_device *dev = (struct mei_device *) dev_id;
901 struct mei_txe_hw *hw = to_txe_hw(dev);
902 struct mei_cl_cb complete_list;
903 s32 slots;
904 int rets = 0;
905
906 dev_dbg(&dev->pdev->dev, "irq thread: Interrupt Registers HHISR|HISR|SEC=%02X|%04X|%02X\n",
907 mei_txe_br_reg_read(hw, HHISR_REG),
908 mei_txe_br_reg_read(hw, HISR_REG),
909 mei_txe_sec_reg_read_silent(hw, SEC_IPC_HOST_INT_STATUS_REG));
910
911
912 /* initialize our complete list */
913 mutex_lock(&dev->device_lock);
914 mei_io_list_init(&complete_list);
915
916 if (pci_dev_msi_enabled(dev->pdev))
917 mei_txe_check_and_ack_intrs(dev, true);
918
919 /* show irq events */
920 mei_txe_pending_interrupts(dev);
921
922 hw->aliveness = mei_txe_aliveness_get(dev);
923 hw->readiness = mei_txe_readiness_get(dev);
924
925 /* Readiness:
926 * Detection of TXE driver going through reset
927 * or TXE driver resetting the HECI interface.
928 */
929 if (test_and_clear_bit(TXE_INTR_READINESS_BIT, &hw->intr_cause)) {
930 dev_dbg(&dev->pdev->dev, "Readiness Interrupt was received...\n");
931
932 /* Check if SeC is going through reset */
933 if (mei_txe_readiness_is_sec_rdy(hw->readiness)) {
934 dev_dbg(&dev->pdev->dev, "we need to start the dev.\n");
935 dev->recvd_hw_ready = true;
936 } else {
937 dev->recvd_hw_ready = false;
938 if (dev->dev_state != MEI_DEV_RESETTING) {
939
940 dev_warn(&dev->pdev->dev, "FW not ready: resetting.\n");
941 schedule_work(&dev->reset_work);
942 goto end;
943
944 }
945 }
946 wake_up(&dev->wait_hw_ready);
947 }
948
949 /************************************************************/
950 /* Check interrupt cause:
951 * Aliveness: Detection of SeC acknowledge of host request that
952 * it remain alive or host cancellation of that request.
953 */
954
955 if (test_and_clear_bit(TXE_INTR_ALIVENESS_BIT, &hw->intr_cause)) {
956 /* Clear the interrupt cause */
957 dev_dbg(&dev->pdev->dev,
958 "Aliveness Interrupt: Status: %d\n", hw->aliveness);
959 hw->recvd_aliveness = true;
960 if (waitqueue_active(&hw->wait_aliveness))
961 wake_up(&hw->wait_aliveness);
962 }
963
964
965 /* Output Doorbell:
966 * Detection of SeC having sent output to host
967 */
968 slots = mei_count_full_read_slots(dev);
969 if (test_and_clear_bit(TXE_INTR_OUT_DB_BIT, &hw->intr_cause)) {
970 /* Read from TXE */
971 rets = mei_irq_read_handler(dev, &complete_list, &slots);
972 if (rets && dev->dev_state != MEI_DEV_RESETTING) {
973 dev_err(&dev->pdev->dev,
974 "mei_irq_read_handler ret = %d.\n", rets);
975
976 schedule_work(&dev->reset_work);
977 goto end;
978 }
979 }
980 /* Input Ready: Detection if host can write to SeC */
981 if (test_and_clear_bit(TXE_INTR_IN_READY_BIT, &hw->intr_cause))
982 dev->hbuf_is_ready = true;
983
984 if (hw->aliveness && dev->hbuf_is_ready) {
985 /* if SeC did not complete reading the written data by host */
986 if (!mei_txe_is_input_ready(dev)) {
987 dev_dbg(&dev->pdev->dev, "got Input Ready Int, but SEC_IPC_INPUT_STATUS_RDY is 0.\n");
988 goto end;
989 }
990
991 rets = mei_irq_write_handler(dev, &complete_list);
992 if (rets)
993 dev_err(&dev->pdev->dev,
994 "mei_irq_write_handler ret = %d.\n", rets);
995 }
996
997
998
999 mei_irq_compl_handler(dev, &complete_list);
1000
1001end:
1002 dev_dbg(&dev->pdev->dev, "interrupt thread end ret = %d\n", rets);
1003
1004 mutex_unlock(&dev->device_lock);
1005
1006 mei_enable_interrupts(dev);
1007 return IRQ_HANDLED;
1008}
1009
1010static const struct mei_hw_ops mei_txe_hw_ops = {
1011
1012 .host_is_ready = mei_txe_host_is_ready,
1013
1014 .hw_is_ready = mei_txe_hw_is_ready,
1015 .hw_reset = mei_txe_hw_reset,
1016 .hw_config = mei_txe_hw_config,
1017 .hw_start = mei_txe_hw_start,
1018
1019 .intr_clear = mei_txe_intr_clear,
1020 .intr_enable = mei_txe_intr_enable,
1021 .intr_disable = mei_txe_intr_disable,
1022
1023 .hbuf_free_slots = mei_txe_hbuf_empty_slots,
1024 .hbuf_is_ready = mei_txe_is_input_ready,
1025 .hbuf_max_len = mei_txe_hbuf_max_len,
1026
1027 .write = mei_txe_write,
1028
1029 .rdbuf_full_slots = mei_txe_count_full_read_slots,
1030 .read_hdr = mei_txe_read_hdr,
1031
1032 .read = mei_txe_read,
1033
1034};
1035
1036/**
1037 * mei_txe_dev_init - allocates and initializes txe hardware specific structure
1038 *
1039 * @pdev - pci device
1040 * returns struct mei_device * on success or NULL;
1041 *
1042 */
1043struct mei_device *mei_txe_dev_init(struct pci_dev *pdev)
1044{
1045 struct mei_device *dev;
1046 struct mei_txe_hw *hw;
1047
1048 dev = kzalloc(sizeof(struct mei_device) +
1049 sizeof(struct mei_txe_hw), GFP_KERNEL);
1050 if (!dev)
1051 return NULL;
1052
1053 mei_device_init(dev);
1054
1055 hw = to_txe_hw(dev);
1056
1057 init_waitqueue_head(&hw->wait_aliveness);
1058
1059 dev->ops = &mei_txe_hw_ops;
1060
1061 dev->pdev = pdev;
1062 return dev;
1063}
1064
1065/**
1066 * mei_txe_setup_satt2 - SATT2 configuration for DMA support.
1067 *
1068 * @dev: the device structure
1069 * @addr: physical address start of the range
1070 * @range: physical range size
1071 */
1072int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range)
1073{
1074 struct mei_txe_hw *hw = to_txe_hw(dev);
1075
1076 u32 lo32 = lower_32_bits(addr);
1077 u32 hi32 = upper_32_bits(addr);
1078 u32 ctrl;
1079
1080 /* SATT is limited to 36 Bits */
1081 if (hi32 & ~0xF)
1082 return -EINVAL;
1083
1084 /* SATT has to be 16Byte aligned */
1085 if (lo32 & 0xF)
1086 return -EINVAL;
1087
1088 /* SATT range has to be 4Bytes aligned */
1089 if (range & 0x4)
1090 return -EINVAL;
1091
1092 /* SATT is limited to 32 MB range*/
1093 if (range > SATT_RANGE_MAX)
1094 return -EINVAL;
1095
1096 ctrl = SATT2_CTRL_VALID_MSK;
1097 ctrl |= hi32 << SATT2_CTRL_BR_BASE_ADDR_REG_SHIFT;
1098
1099 mei_txe_br_reg_write(hw, SATT2_SAP_SIZE_REG, range);
1100 mei_txe_br_reg_write(hw, SATT2_BRG_BA_LSB_REG, lo32);
1101 mei_txe_br_reg_write(hw, SATT2_CTRL_REG, ctrl);
1102 dev_dbg(&dev->pdev->dev, "SATT2: SAP_SIZE_OFFSET=0x%08X, BRG_BA_LSB_OFFSET=0x%08X, CTRL_OFFSET=0x%08X\n",
1103 range, lo32, ctrl);
1104
1105 return 0;
1106}
diff --git a/drivers/misc/mei/hw-txe.h b/drivers/misc/mei/hw-txe.h
new file mode 100644
index 000000000000..857d88ccef61
--- /dev/null
+++ b/drivers/misc/mei/hw-txe.h
@@ -0,0 +1,71 @@
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2013-2014, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#ifndef _MEI_HW_TXE_H_
18#define _MEI_HW_TXE_H_
19
20#include "hw.h"
21#include "hw-txe-regs.h"
22
23/* Flatten Hierarchy interrupt cause */
24#define TXE_INTR_READINESS_BIT 0 /* HISR_INT_0_STS */
25#define TXE_INTR_READINESS HISR_INT_0_STS
26#define TXE_INTR_ALIVENESS_BIT 1 /* HISR_INT_1_STS */
27#define TXE_INTR_ALIVENESS HISR_INT_1_STS
28#define TXE_INTR_OUT_DB_BIT 2 /* HISR_INT_2_STS */
29#define TXE_INTR_OUT_DB HISR_INT_2_STS
30#define TXE_INTR_IN_READY_BIT 8 /* beyond HISR */
31#define TXE_INTR_IN_READY BIT(8)
32
33/**
34 * struct mei_txe_hw - txe hardware specifics
35 *
36 * @mem_addr: SeC and BRIDGE bars
37 * @aliveness: aliveness (power gating) state of the hardware
38 * @readiness: readiness state of the hardware
39 * @wait_aliveness: aliveness wait queue
40 * @recvd_aliveness: aliveness interrupt was recived
41 * @intr_cause: translated interrupt cause
42 */
43struct mei_txe_hw {
44 void __iomem *mem_addr[NUM_OF_MEM_BARS];
45 u32 aliveness;
46 u32 readiness;
47
48 wait_queue_head_t wait_aliveness;
49 bool recvd_aliveness;
50
51 unsigned long intr_cause;
52};
53
54#define to_txe_hw(dev) (struct mei_txe_hw *)((dev)->hw)
55
56static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw)
57{
58 return container_of((void *)hw, struct mei_device, hw);
59}
60
61struct mei_device *mei_txe_dev_init(struct pci_dev *pdev);
62
63irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id);
64irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id);
65
66int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req);
67
68int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range);
69
70
71#endif /* _MEI_HW_TXE_H_ */
diff --git a/drivers/misc/mei/hw.h b/drivers/misc/mei/hw.h
index dd44e33ad2b6..e06779d4413e 100644
--- a/drivers/misc/mei/hw.h
+++ b/drivers/misc/mei/hw.h
@@ -22,7 +22,7 @@
22/* 22/*
23 * Timeouts in Seconds 23 * Timeouts in Seconds
24 */ 24 */
25#define MEI_INTEROP_TIMEOUT 7 /* Timeout on ready message */ 25#define MEI_HW_READY_TIMEOUT 2 /* Timeout on ready message */
26#define MEI_CONNECT_TIMEOUT 3 /* HPS: at least 2 seconds */ 26#define MEI_CONNECT_TIMEOUT 3 /* HPS: at least 2 seconds */
27 27
28#define MEI_CL_CONNECT_TIMEOUT 15 /* HPS: Client Connect Timeout */ 28#define MEI_CL_CONNECT_TIMEOUT 15 /* HPS: Client Connect Timeout */
@@ -31,13 +31,13 @@
31#define MEI_IAMTHIF_STALL_TIMER 12 /* HPS */ 31#define MEI_IAMTHIF_STALL_TIMER 12 /* HPS */
32#define MEI_IAMTHIF_READ_TIMER 10 /* HPS */ 32#define MEI_IAMTHIF_READ_TIMER 10 /* HPS */
33 33
34#define MEI_HBM_TIMEOUT 1 /* 1 second */
34 35
35/* 36/*
36 * MEI Version 37 * MEI Version
37 */ 38 */
38#define HBM_MINOR_VERSION 0 39#define HBM_MINOR_VERSION 0
39#define HBM_MAJOR_VERSION 1 40#define HBM_MAJOR_VERSION 1
40#define HBM_TIMEOUT 1 /* 1 second */
41 41
42/* Host bus message command opcode */ 42/* Host bus message command opcode */
43#define MEI_HBM_CMD_OP_MSK 0x7f 43#define MEI_HBM_CMD_OP_MSK 0x7f
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index cdd31c2a2a2b..214dcef9750a 100644
--- a/drivers/misc/mei/init.c
+++ b/drivers/misc/mei/init.c
@@ -116,7 +116,6 @@ int mei_reset(struct mei_device *dev)
116 mei_cl_unlink(&dev->wd_cl); 116 mei_cl_unlink(&dev->wd_cl);
117 mei_cl_unlink(&dev->iamthif_cl); 117 mei_cl_unlink(&dev->iamthif_cl);
118 mei_amthif_reset_params(dev); 118 mei_amthif_reset_params(dev);
119 memset(&dev->wr_ext_msg, 0, sizeof(dev->wr_ext_msg));
120 } 119 }
121 120
122 121
@@ -126,7 +125,6 @@ int mei_reset(struct mei_device *dev)
126 125
127 if (ret) { 126 if (ret) {
128 dev_err(&dev->pdev->dev, "hw_reset failed ret = %d\n", ret); 127 dev_err(&dev->pdev->dev, "hw_reset failed ret = %d\n", ret);
129 dev->dev_state = MEI_DEV_DISABLED;
130 return ret; 128 return ret;
131 } 129 }
132 130
@@ -139,7 +137,6 @@ int mei_reset(struct mei_device *dev)
139 ret = mei_hw_start(dev); 137 ret = mei_hw_start(dev);
140 if (ret) { 138 if (ret) {
141 dev_err(&dev->pdev->dev, "hw_start failed ret = %d\n", ret); 139 dev_err(&dev->pdev->dev, "hw_start failed ret = %d\n", ret);
142 dev->dev_state = MEI_DEV_DISABLED;
143 return ret; 140 return ret;
144 } 141 }
145 142
@@ -149,7 +146,7 @@ int mei_reset(struct mei_device *dev)
149 ret = mei_hbm_start_req(dev); 146 ret = mei_hbm_start_req(dev);
150 if (ret) { 147 if (ret) {
151 dev_err(&dev->pdev->dev, "hbm_start failed ret = %d\n", ret); 148 dev_err(&dev->pdev->dev, "hbm_start failed ret = %d\n", ret);
152 dev->dev_state = MEI_DEV_DISABLED; 149 dev->dev_state = MEI_DEV_RESETTING;
153 return ret; 150 return ret;
154 } 151 }
155 152
@@ -166,6 +163,7 @@ EXPORT_SYMBOL_GPL(mei_reset);
166 */ 163 */
167int mei_start(struct mei_device *dev) 164int mei_start(struct mei_device *dev)
168{ 165{
166 int ret;
169 mutex_lock(&dev->device_lock); 167 mutex_lock(&dev->device_lock);
170 168
171 /* acknowledge interrupt and stop interrupts */ 169 /* acknowledge interrupt and stop interrupts */
@@ -175,10 +173,18 @@ int mei_start(struct mei_device *dev)
175 173
176 dev_dbg(&dev->pdev->dev, "reset in start the mei device.\n"); 174 dev_dbg(&dev->pdev->dev, "reset in start the mei device.\n");
177 175
178 dev->dev_state = MEI_DEV_INITIALIZING;
179 dev->reset_count = 0; 176 dev->reset_count = 0;
180 mei_reset(dev); 177 do {
178 dev->dev_state = MEI_DEV_INITIALIZING;
179 ret = mei_reset(dev);
180
181 if (ret == -ENODEV || dev->dev_state == MEI_DEV_DISABLED) {
182 dev_err(&dev->pdev->dev, "reset failed ret = %d", ret);
183 goto err;
184 }
185 } while (ret);
181 186
187 /* we cannot start the device w/o hbm start message completed */
182 if (dev->dev_state == MEI_DEV_DISABLED) { 188 if (dev->dev_state == MEI_DEV_DISABLED) {
183 dev_err(&dev->pdev->dev, "reset failed"); 189 dev_err(&dev->pdev->dev, "reset failed");
184 goto err; 190 goto err;
@@ -238,27 +244,40 @@ int mei_restart(struct mei_device *dev)
238 244
239 mutex_unlock(&dev->device_lock); 245 mutex_unlock(&dev->device_lock);
240 246
241 if (err || dev->dev_state == MEI_DEV_DISABLED) 247 if (err == -ENODEV || dev->dev_state == MEI_DEV_DISABLED) {
248 dev_err(&dev->pdev->dev, "device disabled = %d\n", err);
242 return -ENODEV; 249 return -ENODEV;
250 }
251
252 /* try to start again */
253 if (err)
254 schedule_work(&dev->reset_work);
255
243 256
244 return 0; 257 return 0;
245} 258}
246EXPORT_SYMBOL_GPL(mei_restart); 259EXPORT_SYMBOL_GPL(mei_restart);
247 260
248
249static void mei_reset_work(struct work_struct *work) 261static void mei_reset_work(struct work_struct *work)
250{ 262{
251 struct mei_device *dev = 263 struct mei_device *dev =
252 container_of(work, struct mei_device, reset_work); 264 container_of(work, struct mei_device, reset_work);
265 int ret;
253 266
254 mutex_lock(&dev->device_lock); 267 mutex_lock(&dev->device_lock);
255 268
256 mei_reset(dev); 269 ret = mei_reset(dev);
257 270
258 mutex_unlock(&dev->device_lock); 271 mutex_unlock(&dev->device_lock);
259 272
260 if (dev->dev_state == MEI_DEV_DISABLED) 273 if (dev->dev_state == MEI_DEV_DISABLED) {
261 dev_err(&dev->pdev->dev, "reset failed"); 274 dev_err(&dev->pdev->dev, "device disabled = %d\n", ret);
275 return;
276 }
277
278 /* retry reset in case of failure */
279 if (ret)
280 schedule_work(&dev->reset_work);
262} 281}
263 282
264void mei_stop(struct mei_device *dev) 283void mei_stop(struct mei_device *dev)
diff --git a/drivers/misc/mei/interrupt.c b/drivers/misc/mei/interrupt.c
index f0fbb5179f80..75ff4092953e 100644
--- a/drivers/misc/mei/interrupt.c
+++ b/drivers/misc/mei/interrupt.c
@@ -161,6 +161,41 @@ static int mei_cl_irq_read_msg(struct mei_device *dev,
161} 161}
162 162
163/** 163/**
164 * mei_cl_irq_disconnect_rsp - send disconnection response message
165 *
166 * @cl: client
167 * @cb: callback block.
168 * @slots: free slots.
169 * @cmpl_list: complete list.
170 *
171 * returns 0, OK; otherwise, error.
172 */
173static int mei_cl_irq_disconnect_rsp(struct mei_cl *cl, struct mei_cl_cb *cb,
174 s32 *slots, struct mei_cl_cb *cmpl_list)
175{
176 struct mei_device *dev = cl->dev;
177 int ret;
178
179 u32 msg_slots =
180 mei_data2slots(sizeof(struct hbm_client_connect_response));
181
182 if (*slots < msg_slots)
183 return -EMSGSIZE;
184
185 *slots -= msg_slots;
186
187 ret = mei_hbm_cl_disconnect_rsp(dev, cl);
188
189 cl->state = MEI_FILE_DISCONNECTED;
190 cl->status = 0;
191 mei_io_cb_free(cb);
192
193 return ret;
194}
195
196
197
198/**
164 * mei_cl_irq_close - processes close related operation from 199 * mei_cl_irq_close - processes close related operation from
165 * interrupt thread context - send disconnect request 200 * interrupt thread context - send disconnect request
166 * 201 *
@@ -244,8 +279,7 @@ static int mei_cl_irq_read(struct mei_cl *cl, struct mei_cl_cb *cb,
244 279
245 280
246/** 281/**
247 * mei_cl_irq_ioctl - processes client ioctl related operation from the 282 * mei_cl_irq_connect - send connect request in irq_thread context
248 * interrupt thread context - send connection request
249 * 283 *
250 * @cl: client 284 * @cl: client
251 * @cb: callback block. 285 * @cb: callback block.
@@ -254,7 +288,7 @@ static int mei_cl_irq_read(struct mei_cl *cl, struct mei_cl_cb *cb,
254 * 288 *
255 * returns 0, OK; otherwise, error. 289 * returns 0, OK; otherwise, error.
256 */ 290 */
257static int mei_cl_irq_ioctl(struct mei_cl *cl, struct mei_cl_cb *cb, 291static int mei_cl_irq_connect(struct mei_cl *cl, struct mei_cl_cb *cb,
258 s32 *slots, struct mei_cl_cb *cmpl_list) 292 s32 *slots, struct mei_cl_cb *cmpl_list)
259{ 293{
260 struct mei_device *dev = cl->dev; 294 struct mei_device *dev = cl->dev;
@@ -263,6 +297,9 @@ static int mei_cl_irq_ioctl(struct mei_cl *cl, struct mei_cl_cb *cb,
263 u32 msg_slots = 297 u32 msg_slots =
264 mei_data2slots(sizeof(struct hbm_client_connect_request)); 298 mei_data2slots(sizeof(struct hbm_client_connect_request));
265 299
300 if (mei_cl_is_other_connecting(cl))
301 return 0;
302
266 if (*slots < msg_slots) { 303 if (*slots < msg_slots) {
267 /* return the cancel routine */ 304 /* return the cancel routine */
268 list_del(&cb->list); 305 list_del(&cb->list);
@@ -450,12 +487,6 @@ int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list)
450 wake_up_interruptible(&dev->wait_stop_wd); 487 wake_up_interruptible(&dev->wait_stop_wd);
451 } 488 }
452 489
453 if (dev->wr_ext_msg.hdr.length) {
454 mei_write_message(dev, &dev->wr_ext_msg.hdr,
455 dev->wr_ext_msg.data);
456 slots -= mei_data2slots(dev->wr_ext_msg.hdr.length);
457 dev->wr_ext_msg.hdr.length = 0;
458 }
459 if (dev->dev_state == MEI_DEV_ENABLED) { 490 if (dev->dev_state == MEI_DEV_ENABLED) {
460 if (dev->wd_pending && 491 if (dev->wd_pending &&
461 mei_cl_flow_ctrl_creds(&dev->wd_cl) > 0) { 492 mei_cl_flow_ctrl_creds(&dev->wd_cl) > 0) {
@@ -496,16 +527,18 @@ int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list)
496 return ret; 527 return ret;
497 528
498 break; 529 break;
499 case MEI_FOP_IOCTL: 530 case MEI_FOP_CONNECT:
500 /* connect message */ 531 /* connect message */
501 if (mei_cl_is_other_connecting(cl)) 532 ret = mei_cl_irq_connect(cl, cb, &slots, cmpl_list);
502 continue;
503 ret = mei_cl_irq_ioctl(cl, cb, &slots, cmpl_list);
504 if (ret) 533 if (ret)
505 return ret; 534 return ret;
506 535
507 break; 536 break;
508 537 case MEI_FOP_DISCONNECT_RSP:
538 /* send disconnect resp */
539 ret = mei_cl_irq_disconnect_rsp(cl, cb, &slots, cmpl_list);
540 if (ret)
541 return ret;
509 default: 542 default:
510 BUG(); 543 BUG();
511 } 544 }
diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h
index f7de95b4cdd9..21e52496bc6e 100644
--- a/drivers/misc/mei/mei_dev.h
+++ b/drivers/misc/mei/mei_dev.h
@@ -130,16 +130,18 @@ enum mei_wd_states {
130 130
131/** 131/**
132 * enum mei_cb_file_ops - file operation associated with the callback 132 * enum mei_cb_file_ops - file operation associated with the callback
133 * @MEI_FOP_READ - read 133 * @MEI_FOP_READ - read
134 * @MEI_FOP_WRITE - write 134 * @MEI_FOP_WRITE - write
135 * @MEI_FOP_IOCTL - ioctl 135 * @MEI_FOP_CONNECT - connect
136 * @MEI_FOP_OPEN - open 136 * @MEI_FOP_DISCONNECT_RSP - disconnect response
137 * @MEI_FOP_CLOSE - close 137 * @MEI_FOP_OPEN - open
138 * @MEI_FOP_CLOSE - close
138 */ 139 */
139enum mei_cb_file_ops { 140enum mei_cb_file_ops {
140 MEI_FOP_READ = 0, 141 MEI_FOP_READ = 0,
141 MEI_FOP_WRITE, 142 MEI_FOP_WRITE,
142 MEI_FOP_IOCTL, 143 MEI_FOP_CONNECT,
144 MEI_FOP_DISCONNECT_RSP,
143 MEI_FOP_OPEN, 145 MEI_FOP_OPEN,
144 MEI_FOP_CLOSE 146 MEI_FOP_CLOSE
145}; 147};
@@ -339,7 +341,6 @@ struct mei_cl_device {
339 * @hbuf_depth - depth of hardware host/write buffer is slots 341 * @hbuf_depth - depth of hardware host/write buffer is slots
340 * @hbuf_is_ready - query if the host host/write buffer is ready 342 * @hbuf_is_ready - query if the host host/write buffer is ready
341 * @wr_msg - the buffer for hbm control messages 343 * @wr_msg - the buffer for hbm control messages
342 * @wr_ext_msg - the buffer for hbm control responses (set in read cycle)
343 */ 344 */
344struct mei_device { 345struct mei_device {
345 struct pci_dev *pdev; /* pointer to pci device struct */ 346 struct pci_dev *pdev; /* pointer to pci device struct */
@@ -394,11 +395,6 @@ struct mei_device {
394 unsigned char data[128]; 395 unsigned char data[128];
395 } wr_msg; 396 } wr_msg;
396 397
397 struct {
398 struct mei_msg_hdr hdr;
399 unsigned char data[4]; /* All HBM messages are 4 bytes */
400 } wr_ext_msg; /* for control responses */
401
402 struct hbm_version version; 398 struct hbm_version version;
403 399
404 struct mei_me_client *me_clients; /* Note: memory has to be allocated */ 400 struct mei_me_client *me_clients; /* Note: memory has to be allocated */
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index ddadd08956f4..5434354cf1d5 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -27,7 +27,6 @@
27#include <linux/aio.h> 27#include <linux/aio.h>
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/poll.h> 29#include <linux/poll.h>
30#include <linux/init.h>
31#include <linux/ioctl.h> 30#include <linux/ioctl.h>
32#include <linux/cdev.h> 31#include <linux/cdev.h>
33#include <linux/sched.h> 32#include <linux/sched.h>
diff --git a/drivers/misc/mei/pci-txe.c b/drivers/misc/mei/pci-txe.c
new file mode 100644
index 000000000000..af4412cf2456
--- /dev/null
+++ b/drivers/misc/mei/pci-txe.c
@@ -0,0 +1,293 @@
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2013-2014, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/device.h>
20#include <linux/fs.h>
21#include <linux/errno.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/init.h>
25#include <linux/sched.h>
26#include <linux/uuid.h>
27#include <linux/jiffies.h>
28#include <linux/interrupt.h>
29#include <linux/workqueue.h>
30
31#include <linux/mei.h>
32
33
34#include "mei_dev.h"
35#include "hw-txe.h"
36
37static DEFINE_PCI_DEVICE_TABLE(mei_txe_pci_tbl) = {
38 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0F18)}, /* Baytrail */
39 {0, }
40};
41MODULE_DEVICE_TABLE(pci, mei_txe_pci_tbl);
42
43
44static void mei_txe_pci_iounmap(struct pci_dev *pdev, struct mei_txe_hw *hw)
45{
46 int i;
47 for (i = SEC_BAR; i < NUM_OF_MEM_BARS; i++) {
48 if (hw->mem_addr[i]) {
49 pci_iounmap(pdev, hw->mem_addr[i]);
50 hw->mem_addr[i] = NULL;
51 }
52 }
53}
54/**
55 * mei_probe - Device Initialization Routine
56 *
57 * @pdev: PCI device structure
58 * @ent: entry in mei_txe_pci_tbl
59 *
60 * returns 0 on success, <0 on failure.
61 */
62static int mei_txe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
63{
64 struct mei_device *dev;
65 struct mei_txe_hw *hw;
66 int err;
67 int i;
68
69 /* enable pci dev */
70 err = pci_enable_device(pdev);
71 if (err) {
72 dev_err(&pdev->dev, "failed to enable pci device.\n");
73 goto end;
74 }
75 /* set PCI host mastering */
76 pci_set_master(pdev);
77 /* pci request regions for mei driver */
78 err = pci_request_regions(pdev, KBUILD_MODNAME);
79 if (err) {
80 dev_err(&pdev->dev, "failed to get pci regions.\n");
81 goto disable_device;
82 }
83
84 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
85 if (err) {
86 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
87 if (err) {
88 dev_err(&pdev->dev, "No suitable DMA available.\n");
89 goto release_regions;
90 }
91 }
92
93 /* allocates and initializes the mei dev structure */
94 dev = mei_txe_dev_init(pdev);
95 if (!dev) {
96 err = -ENOMEM;
97 goto release_regions;
98 }
99 hw = to_txe_hw(dev);
100
101 /* mapping IO device memory */
102 for (i = SEC_BAR; i < NUM_OF_MEM_BARS; i++) {
103 hw->mem_addr[i] = pci_iomap(pdev, i, 0);
104 if (!hw->mem_addr[i]) {
105 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
106 err = -ENOMEM;
107 goto free_device;
108 }
109 }
110
111
112 pci_enable_msi(pdev);
113
114 /* clear spurious interrupts */
115 mei_clear_interrupts(dev);
116
117 /* request and enable interrupt */
118 if (pci_dev_msi_enabled(pdev))
119 err = request_threaded_irq(pdev->irq,
120 NULL,
121 mei_txe_irq_thread_handler,
122 IRQF_ONESHOT, KBUILD_MODNAME, dev);
123 else
124 err = request_threaded_irq(pdev->irq,
125 mei_txe_irq_quick_handler,
126 mei_txe_irq_thread_handler,
127 IRQF_SHARED, KBUILD_MODNAME, dev);
128 if (err) {
129 dev_err(&pdev->dev, "mei: request_threaded_irq failure. irq = %d\n",
130 pdev->irq);
131 goto free_device;
132 }
133
134 if (mei_start(dev)) {
135 dev_err(&pdev->dev, "init hw failure.\n");
136 err = -ENODEV;
137 goto release_irq;
138 }
139
140 err = mei_register(dev);
141 if (err)
142 goto release_irq;
143
144 pci_set_drvdata(pdev, dev);
145
146 return 0;
147
148release_irq:
149
150 mei_cancel_work(dev);
151
152 /* disable interrupts */
153 mei_disable_interrupts(dev);
154
155 free_irq(pdev->irq, dev);
156 pci_disable_msi(pdev);
157
158free_device:
159 mei_txe_pci_iounmap(pdev, hw);
160
161 kfree(dev);
162release_regions:
163 pci_release_regions(pdev);
164disable_device:
165 pci_disable_device(pdev);
166end:
167 dev_err(&pdev->dev, "initialization failed.\n");
168 return err;
169}
170
171/**
172 * mei_remove - Device Removal Routine
173 *
174 * @pdev: PCI device structure
175 *
176 * mei_remove is called by the PCI subsystem to alert the driver
177 * that it should release a PCI device.
178 */
179static void mei_txe_remove(struct pci_dev *pdev)
180{
181 struct mei_device *dev;
182 struct mei_txe_hw *hw;
183
184 dev = pci_get_drvdata(pdev);
185 if (!dev) {
186 dev_err(&pdev->dev, "mei: dev =NULL\n");
187 return;
188 }
189
190 hw = to_txe_hw(dev);
191
192 mei_stop(dev);
193
194 /* disable interrupts */
195 mei_disable_interrupts(dev);
196 free_irq(pdev->irq, dev);
197 pci_disable_msi(pdev);
198
199 pci_set_drvdata(pdev, NULL);
200
201 mei_txe_pci_iounmap(pdev, hw);
202
203 mei_deregister(dev);
204
205 kfree(dev);
206
207 pci_release_regions(pdev);
208 pci_disable_device(pdev);
209}
210
211
212#ifdef CONFIG_PM
213static int mei_txe_pci_suspend(struct device *device)
214{
215 struct pci_dev *pdev = to_pci_dev(device);
216 struct mei_device *dev = pci_get_drvdata(pdev);
217
218 if (!dev)
219 return -ENODEV;
220
221 dev_dbg(&pdev->dev, "suspend\n");
222
223 mei_stop(dev);
224
225 mei_disable_interrupts(dev);
226
227 free_irq(pdev->irq, dev);
228 pci_disable_msi(pdev);
229
230 return 0;
231}
232
233static int mei_txe_pci_resume(struct device *device)
234{
235 struct pci_dev *pdev = to_pci_dev(device);
236 struct mei_device *dev;
237 int err;
238
239 dev = pci_get_drvdata(pdev);
240 if (!dev)
241 return -ENODEV;
242
243 pci_enable_msi(pdev);
244
245 mei_clear_interrupts(dev);
246
247 /* request and enable interrupt */
248 if (pci_dev_msi_enabled(pdev))
249 err = request_threaded_irq(pdev->irq,
250 NULL,
251 mei_txe_irq_thread_handler,
252 IRQF_ONESHOT, KBUILD_MODNAME, dev);
253 else
254 err = request_threaded_irq(pdev->irq,
255 mei_txe_irq_quick_handler,
256 mei_txe_irq_thread_handler,
257 IRQF_SHARED, KBUILD_MODNAME, dev);
258 if (err) {
259 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
260 pdev->irq);
261 return err;
262 }
263
264 err = mei_restart(dev);
265
266 return err;
267}
268
269static SIMPLE_DEV_PM_OPS(mei_txe_pm_ops,
270 mei_txe_pci_suspend,
271 mei_txe_pci_resume);
272
273#define MEI_TXE_PM_OPS (&mei_txe_pm_ops)
274#else
275#define MEI_TXE_PM_OPS NULL
276#endif /* CONFIG_PM */
277/*
278 * PCI driver structure
279 */
280static struct pci_driver mei_txe_driver = {
281 .name = KBUILD_MODNAME,
282 .id_table = mei_txe_pci_tbl,
283 .probe = mei_txe_probe,
284 .remove = mei_txe_remove,
285 .shutdown = mei_txe_remove,
286 .driver.pm = MEI_TXE_PM_OPS,
287};
288
289module_pci_driver(mei_txe_driver);
290
291MODULE_AUTHOR("Intel Corporation");
292MODULE_DESCRIPTION("Intel(R) Trusted Execution Environment Interface");
293MODULE_LICENSE("GPL v2");
diff --git a/drivers/misc/sram.c b/drivers/misc/sram.c
index afe66571ce0b..e3e421d97ad4 100644
--- a/drivers/misc/sram.c
+++ b/drivers/misc/sram.c
@@ -87,8 +87,6 @@ static int sram_remove(struct platform_device *pdev)
87 if (gen_pool_avail(sram->pool) < gen_pool_size(sram->pool)) 87 if (gen_pool_avail(sram->pool) < gen_pool_size(sram->pool))
88 dev_dbg(&pdev->dev, "removed while SRAM allocated\n"); 88 dev_dbg(&pdev->dev, "removed while SRAM allocated\n");
89 89
90 gen_pool_destroy(sram->pool);
91
92 if (sram->clk) 90 if (sram->clk)
93 clk_disable_unprepare(sram->clk); 91 clk_disable_unprepare(sram->clk);
94 92
diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c
index 3aed525e55b4..1972d57aadb3 100644
--- a/drivers/misc/ti-st/st_core.c
+++ b/drivers/misc/ti-st/st_core.c
@@ -22,7 +22,6 @@
22#define pr_fmt(fmt) "(stc): " fmt 22#define pr_fmt(fmt) "(stc): " fmt
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/tty.h> 25#include <linux/tty.h>
27 26
28#include <linux/seq_file.h> 27#include <linux/seq_file.h>
diff --git a/drivers/misc/ti_dac7512.c b/drivers/misc/ti_dac7512.c
index 83da711ce9f1..cb0289b44a17 100644
--- a/drivers/misc/ti_dac7512.c
+++ b/drivers/misc/ti_dac7512.c
@@ -20,7 +20,6 @@
20 */ 20 */
21 21
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
25#include <linux/of.h> 24#include <linux/of.h>
26 25
diff --git a/drivers/misc/tsl2550.c b/drivers/misc/tsl2550.c
index 5bc10fa193de..b00335652e52 100644
--- a/drivers/misc/tsl2550.c
+++ b/drivers/misc/tsl2550.c
@@ -20,7 +20,6 @@
20 */ 20 */
21 21
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/slab.h> 23#include <linux/slab.h>
25#include <linux/i2c.h> 24#include <linux/i2c.h>
26#include <linux/mutex.h> 25#include <linux/mutex.h>
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 18:24:31 -0500