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-rw-r--r--drivers/mfd/Kconfig14
-rw-r--r--drivers/mfd/Makefile1
-rw-r--r--drivers/mfd/ab3550-core.c1401
3 files changed, 1416 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1c3d737ec406..a20fa230d354 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -423,6 +423,20 @@ config AB4500_CORE
423 read/write functions for the devices to get access to this chip. 423 read/write functions for the devices to get access to this chip.
424 This chip embeds various other multimedia funtionalities as well. 424 This chip embeds various other multimedia funtionalities as well.
425 425
426config AB3550_CORE
427 bool "ST-Ericsson AB3550 Mixed Signal Circuit core functions"
428 select MFD_CORE
429 depends on I2C=y && GENERIC_HARDIRQS && ABX500_CORE
430 help
431 Select this to enable the AB3550 Mixed Signal IC core
432 functionality. This connects to a AB3550 on the I2C bus
433 and expose a number of symbols needed for dependent devices
434 to read and write registers and subscribe to events from
435 this multi-functional IC. This is needed to use other features
436 of the AB3550 such as battery-backed RTC, charging control,
437 LEDs, vibrator, system power and temperature, power management
438 and ALSA sound.
439
426config MFD_TIMBERDALE 440config MFD_TIMBERDALE
427 tristate "Support for the Timberdale FPGA" 441 tristate "Support for the Timberdale FPGA"
428 select MFD_CORE 442 select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 4b8ad04ff8e2..4c684c137d43 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_ABX500_CORE) += abx500-core.o
64obj-$(CONFIG_AB3100_CORE) += ab3100-core.o 64obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
65obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o 65obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
66obj-$(CONFIG_AB4500_CORE) += ab4500-core.o 66obj-$(CONFIG_AB4500_CORE) += ab4500-core.o
67obj-$(CONFIG_AB3550_CORE) += ab3550-core.o
67obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o 68obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o
68obj-$(CONFIG_PMIC_ADP5520) += adp5520.o 69obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
69obj-$(CONFIG_LPC_SCH) += lpc_sch.o 70obj-$(CONFIG_LPC_SCH) += lpc_sch.o
diff --git a/drivers/mfd/ab3550-core.c b/drivers/mfd/ab3550-core.c
new file mode 100644
index 000000000000..1060f8e1c40a
--- /dev/null
+++ b/drivers/mfd/ab3550-core.c
@@ -0,0 +1,1401 @@
1/*
2 * Copyright (C) 2007-2010 ST-Ericsson
3 * License terms: GNU General Public License (GPL) version 2
4 * Low-level core for exclusive access to the AB3550 IC on the I2C bus
5 * and some basic chip-configuration.
6 * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
7 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
8 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
9 * Author: Rickard Andersson <rickard.andersson@stericsson.com>
10 */
11
12#include <linux/i2c.h>
13#include <linux/mutex.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#include <linux/slab.h>
17#include <linux/device.h>
18#include <linux/irq.h>
19#include <linux/interrupt.h>
20#include <linux/random.h>
21#include <linux/workqueue.h>
22#include <linux/debugfs.h>
23#include <linux/seq_file.h>
24#include <linux/uaccess.h>
25#include <linux/mfd/abx500.h>
26#include <linux/list.h>
27#include <linux/bitops.h>
28#include <linux/spinlock.h>
29#include <linux/mfd/core.h>
30
31#define AB3550_NAME_STRING "ab3550"
32#define AB3550_ID_FORMAT_STRING "AB3550 %s"
33#define AB3550_NUM_BANKS 2
34#define AB3550_NUM_EVENT_REG 5
35
36/* These are the only registers inside AB3550 used in this main file */
37
38/* Chip ID register */
39#define AB3550_CID_REG 0x20
40
41/* Interrupt event registers */
42#define AB3550_EVENT_BANK 0
43#define AB3550_EVENT_REG 0x22
44
45/* Read/write operation values. */
46#define AB3550_PERM_RD (0x01)
47#define AB3550_PERM_WR (0x02)
48
49/* Read/write permissions. */
50#define AB3550_PERM_RO (AB3550_PERM_RD)
51#define AB3550_PERM_RW (AB3550_PERM_RD | AB3550_PERM_WR)
52
53/**
54 * struct ab3550
55 * @access_mutex: lock out concurrent accesses to the AB registers
56 * @i2c_client: I2C client for this chip
57 * @chip_name: name of this chip variant
58 * @chip_id: 8 bit chip ID for this chip variant
59 * @mask_work: a worker for writing to mask registers
60 * @event_lock: a lock to protect the event_mask
61 * @event_mask: a local copy of the mask event registers
62 * @startup_events: a copy of the first reading of the event registers
63 * @startup_events_read: whether the first events have been read
64 */
65struct ab3550 {
66 struct mutex access_mutex;
67 struct i2c_client *i2c_client[AB3550_NUM_BANKS];
68 char chip_name[32];
69 u8 chip_id;
70 struct work_struct mask_work;
71 spinlock_t event_lock;
72 u8 event_mask[AB3550_NUM_EVENT_REG];
73 u8 startup_events[AB3550_NUM_EVENT_REG];
74 bool startup_events_read;
75#ifdef CONFIG_DEBUG_FS
76 unsigned int debug_bank;
77 unsigned int debug_address;
78#endif
79};
80
81/**
82 * struct ab3550_reg_range
83 * @first: the first address of the range
84 * @last: the last address of the range
85 * @perm: access permissions for the range
86 */
87struct ab3550_reg_range {
88 u8 first;
89 u8 last;
90 u8 perm;
91};
92
93/**
94 * struct ab3550_reg_ranges
95 * @count: the number of ranges in the list
96 * @range: the list of register ranges
97 */
98struct ab3550_reg_ranges {
99 u8 count;
100 const struct ab3550_reg_range *range;
101};
102
103/*
104 * Permissible register ranges for reading and writing per device and bank.
105 *
106 * The ranges must be listed in increasing address order, and no overlaps are
107 * allowed. It is assumed that write permission implies read permission
108 * (i.e. only RO and RW permissions should be used). Ranges with write
109 * permission must not be split up.
110 */
111
112#define NO_RANGE {.count = 0, .range = NULL,}
113
114static struct
115ab3550_reg_ranges ab3550_reg_ranges[AB3550_NUM_DEVICES][AB3550_NUM_BANKS] = {
116 [AB3550_DEVID_DAC] = {
117 NO_RANGE,
118 {
119 .count = 2,
120 .range = (struct ab3550_reg_range[]) {
121 {
122 .first = 0xb0,
123 .last = 0xba,
124 .perm = AB3550_PERM_RW,
125 },
126 {
127 .first = 0xbc,
128 .last = 0xc3,
129 .perm = AB3550_PERM_RW,
130 },
131 },
132 },
133 },
134 [AB3550_DEVID_LEDS] = {
135 NO_RANGE,
136 {
137 .count = 2,
138 .range = (struct ab3550_reg_range[]) {
139 {
140 .first = 0x5a,
141 .last = 0x88,
142 .perm = AB3550_PERM_RW,
143 },
144 {
145 .first = 0x8a,
146 .last = 0xad,
147 .perm = AB3550_PERM_RW,
148 },
149 }
150 },
151 },
152 [AB3550_DEVID_POWER] = {
153 {
154 .count = 1,
155 .range = (struct ab3550_reg_range[]) {
156 {
157 .first = 0x21,
158 .last = 0x21,
159 .perm = AB3550_PERM_RO,
160 },
161 }
162 },
163 NO_RANGE,
164 },
165 [AB3550_DEVID_REGULATORS] = {
166 {
167 .count = 1,
168 .range = (struct ab3550_reg_range[]) {
169 {
170 .first = 0x69,
171 .last = 0xa3,
172 .perm = AB3550_PERM_RW,
173 },
174 }
175 },
176 {
177 .count = 1,
178 .range = (struct ab3550_reg_range[]) {
179 {
180 .first = 0x14,
181 .last = 0x16,
182 .perm = AB3550_PERM_RW,
183 },
184 }
185 },
186 },
187 [AB3550_DEVID_SIM] = {
188 {
189 .count = 1,
190 .range = (struct ab3550_reg_range[]) {
191 {
192 .first = 0x21,
193 .last = 0x21,
194 .perm = AB3550_PERM_RO,
195 },
196 }
197 },
198 {
199 .count = 1,
200 .range = (struct ab3550_reg_range[]) {
201 {
202 .first = 0x14,
203 .last = 0x17,
204 .perm = AB3550_PERM_RW,
205 },
206 }
207
208 },
209 },
210 [AB3550_DEVID_UART] = {
211 NO_RANGE,
212 NO_RANGE,
213 },
214 [AB3550_DEVID_RTC] = {
215 {
216 .count = 1,
217 .range = (struct ab3550_reg_range[]) {
218 {
219 .first = 0x00,
220 .last = 0x0c,
221 .perm = AB3550_PERM_RW,
222 },
223 }
224 },
225 NO_RANGE,
226 },
227 [AB3550_DEVID_CHARGER] = {
228 {
229 .count = 2,
230 .range = (struct ab3550_reg_range[]) {
231 {
232 .first = 0x10,
233 .last = 0x1a,
234 .perm = AB3550_PERM_RW,
235 },
236 {
237 .first = 0x21,
238 .last = 0x21,
239 .perm = AB3550_PERM_RO,
240 },
241 }
242 },
243 NO_RANGE,
244 },
245 [AB3550_DEVID_ADC] = {
246 NO_RANGE,
247 {
248 .count = 1,
249 .range = (struct ab3550_reg_range[]) {
250 {
251 .first = 0x20,
252 .last = 0x56,
253 .perm = AB3550_PERM_RW,
254 },
255
256 }
257 },
258 },
259 [AB3550_DEVID_FUELGAUGE] = {
260 {
261 .count = 1,
262 .range = (struct ab3550_reg_range[]) {
263 {
264 .first = 0x21,
265 .last = 0x21,
266 .perm = AB3550_PERM_RO,
267 },
268 }
269 },
270 {
271 .count = 1,
272 .range = (struct ab3550_reg_range[]) {
273 {
274 .first = 0x00,
275 .last = 0x0e,
276 .perm = AB3550_PERM_RW,
277 },
278 }
279 },
280 },
281 [AB3550_DEVID_VIBRATOR] = {
282 NO_RANGE,
283 {
284 .count = 1,
285 .range = (struct ab3550_reg_range[]) {
286 {
287 .first = 0x10,
288 .last = 0x13,
289 .perm = AB3550_PERM_RW,
290 },
291
292 }
293 },
294 },
295 [AB3550_DEVID_CODEC] = {
296 {
297 .count = 2,
298 .range = (struct ab3550_reg_range[]) {
299 {
300 .first = 0x31,
301 .last = 0x63,
302 .perm = AB3550_PERM_RW,
303 },
304 {
305 .first = 0x65,
306 .last = 0x68,
307 .perm = AB3550_PERM_RW,
308 },
309 }
310 },
311 NO_RANGE,
312 },
313};
314
315static struct mfd_cell ab3550_devs[AB3550_NUM_DEVICES] = {
316 [AB3550_DEVID_DAC] = {
317 .name = "ab3550-dac",
318 .id = AB3550_DEVID_DAC,
319 .num_resources = 0,
320 },
321 [AB3550_DEVID_LEDS] = {
322 .name = "ab3550-leds",
323 .id = AB3550_DEVID_LEDS,
324 },
325 [AB3550_DEVID_POWER] = {
326 .name = "ab3550-power",
327 .id = AB3550_DEVID_POWER,
328 },
329 [AB3550_DEVID_REGULATORS] = {
330 .name = "ab3550-regulators",
331 .id = AB3550_DEVID_REGULATORS,
332 },
333 [AB3550_DEVID_SIM] = {
334 .name = "ab3550-sim",
335 .id = AB3550_DEVID_SIM,
336 },
337 [AB3550_DEVID_UART] = {
338 .name = "ab3550-uart",
339 .id = AB3550_DEVID_UART,
340 },
341 [AB3550_DEVID_RTC] = {
342 .name = "ab3550-rtc",
343 .id = AB3550_DEVID_RTC,
344 },
345 [AB3550_DEVID_CHARGER] = {
346 .name = "ab3550-charger",
347 .id = AB3550_DEVID_CHARGER,
348 },
349 [AB3550_DEVID_ADC] = {
350 .name = "ab3550-adc",
351 .id = AB3550_DEVID_ADC,
352 .num_resources = 10,
353 .resources = (struct resource[]) {
354 {
355 .name = "TRIGGER-0",
356 .flags = IORESOURCE_IRQ,
357 .start = 16,
358 .end = 16,
359 },
360 {
361 .name = "TRIGGER-1",
362 .flags = IORESOURCE_IRQ,
363 .start = 17,
364 .end = 17,
365 },
366 {
367 .name = "TRIGGER-2",
368 .flags = IORESOURCE_IRQ,
369 .start = 18,
370 .end = 18,
371 },
372 {
373 .name = "TRIGGER-3",
374 .flags = IORESOURCE_IRQ,
375 .start = 19,
376 .end = 19,
377 },
378 {
379 .name = "TRIGGER-4",
380 .flags = IORESOURCE_IRQ,
381 .start = 20,
382 .end = 20,
383 },
384 {
385 .name = "TRIGGER-5",
386 .flags = IORESOURCE_IRQ,
387 .start = 21,
388 .end = 21,
389 },
390 {
391 .name = "TRIGGER-6",
392 .flags = IORESOURCE_IRQ,
393 .start = 22,
394 .end = 22,
395 },
396 {
397 .name = "TRIGGER-7",
398 .flags = IORESOURCE_IRQ,
399 .start = 23,
400 .end = 23,
401 },
402 {
403 .name = "TRIGGER-VBAT-TXON",
404 .flags = IORESOURCE_IRQ,
405 .start = 13,
406 .end = 13,
407 },
408 {
409 .name = "TRIGGER-VBAT",
410 .flags = IORESOURCE_IRQ,
411 .start = 12,
412 .end = 12,
413 },
414 },
415 },
416 [AB3550_DEVID_FUELGAUGE] = {
417 .name = "ab3550-fuelgauge",
418 .id = AB3550_DEVID_FUELGAUGE,
419 },
420 [AB3550_DEVID_VIBRATOR] = {
421 .name = "ab3550-vibrator",
422 .id = AB3550_DEVID_VIBRATOR,
423 },
424 [AB3550_DEVID_CODEC] = {
425 .name = "ab3550-codec",
426 .id = AB3550_DEVID_CODEC,
427 },
428};
429
430/*
431 * I2C transactions with error messages.
432 */
433static int ab3550_i2c_master_send(struct ab3550 *ab, u8 bank, u8 *data,
434 u8 count)
435{
436 int err;
437
438 err = i2c_master_send(ab->i2c_client[bank], data, count);
439 if (err < 0) {
440 dev_err(&ab->i2c_client[0]->dev, "send error: %d\n", err);
441 return err;
442 }
443 return 0;
444}
445
446static int ab3550_i2c_master_recv(struct ab3550 *ab, u8 bank, u8 *data,
447 u8 count)
448{
449 int err;
450
451 err = i2c_master_recv(ab->i2c_client[bank], data, count);
452 if (err < 0) {
453 dev_err(&ab->i2c_client[0]->dev, "receive error: %d\n", err);
454 return err;
455 }
456 return 0;
457}
458
459/*
460 * Functionality for getting/setting register values.
461 */
462static int get_register_interruptible(struct ab3550 *ab, u8 bank, u8 reg,
463 u8 *value)
464{
465 int err;
466
467 err = mutex_lock_interruptible(&ab->access_mutex);
468 if (err)
469 return err;
470
471 err = ab3550_i2c_master_send(ab, bank, &reg, 1);
472 if (!err)
473 err = ab3550_i2c_master_recv(ab, bank, value, 1);
474
475 mutex_unlock(&ab->access_mutex);
476 return err;
477}
478
479static int get_register_page_interruptible(struct ab3550 *ab, u8 bank,
480 u8 first_reg, u8 *regvals, u8 numregs)
481{
482 int err;
483
484 err = mutex_lock_interruptible(&ab->access_mutex);
485 if (err)
486 return err;
487
488 err = ab3550_i2c_master_send(ab, bank, &first_reg, 1);
489 if (!err)
490 err = ab3550_i2c_master_recv(ab, bank, regvals, numregs);
491
492 mutex_unlock(&ab->access_mutex);
493 return err;
494}
495
496static int mask_and_set_register_interruptible(struct ab3550 *ab, u8 bank,
497 u8 reg, u8 bitmask, u8 bitvalues)
498{
499 int err = 0;
500
501 if (likely(bitmask)) {
502 u8 reg_bits[2] = {reg, 0};
503
504 err = mutex_lock_interruptible(&ab->access_mutex);
505 if (err)
506 return err;
507
508 if (bitmask == 0xFF) /* No need to read in this case. */
509 reg_bits[1] = bitvalues;
510 else { /* Read and modify the register value. */
511 u8 bits;
512
513 err = ab3550_i2c_master_send(ab, bank, &reg, 1);
514 if (err)
515 goto unlock_and_return;
516 err = ab3550_i2c_master_recv(ab, bank, &bits, 1);
517 if (err)
518 goto unlock_and_return;
519 reg_bits[1] = ((~bitmask & bits) |
520 (bitmask & bitvalues));
521 }
522 /* Write the new value. */
523 err = ab3550_i2c_master_send(ab, bank, reg_bits, 2);
524unlock_and_return:
525 mutex_unlock(&ab->access_mutex);
526 }
527 return err;
528}
529
530/*
531 * Read/write permission checking functions.
532 */
533static bool page_write_allowed(const struct ab3550_reg_ranges *ranges,
534 u8 first_reg, u8 last_reg)
535{
536 u8 i;
537
538 if (last_reg < first_reg)
539 return false;
540
541 for (i = 0; i < ranges->count; i++) {
542 if (first_reg < ranges->range[i].first)
543 break;
544 if ((last_reg <= ranges->range[i].last) &&
545 (ranges->range[i].perm & AB3550_PERM_WR))
546 return true;
547 }
548 return false;
549}
550
551static bool reg_write_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
552{
553 return page_write_allowed(ranges, reg, reg);
554}
555
556static bool page_read_allowed(const struct ab3550_reg_ranges *ranges,
557 u8 first_reg, u8 last_reg)
558{
559 u8 i;
560
561 if (last_reg < first_reg)
562 return false;
563 /* Find the range (if it exists in the list) that includes first_reg. */
564 for (i = 0; i < ranges->count; i++) {
565 if (first_reg < ranges->range[i].first)
566 return false;
567 if (first_reg <= ranges->range[i].last)
568 break;
569 }
570 /* Make sure that the entire range up to and including last_reg is
571 * readable. This may span several of the ranges in the list.
572 */
573 while ((i < ranges->count) &&
574 (ranges->range[i].perm & AB3550_PERM_RD)) {
575 if (last_reg <= ranges->range[i].last)
576 return true;
577 if ((++i >= ranges->count) ||
578 (ranges->range[i].first !=
579 (ranges->range[i - 1].last + 1))) {
580 break;
581 }
582 }
583 return false;
584}
585
586static bool reg_read_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
587{
588 return page_read_allowed(ranges, reg, reg);
589}
590
591/*
592 * The exported register access functionality.
593 */
594int ab3550_get_chip_id(struct device *dev)
595{
596 struct ab3550 *ab = dev_get_drvdata(dev->parent);
597 return (int)ab->chip_id;
598}
599
600int ab3550_mask_and_set_register_interruptible(struct device *dev, u8 bank,
601 u8 reg, u8 bitmask, u8 bitvalues)
602{
603 struct ab3550 *ab;
604 struct platform_device *pdev = to_platform_device(dev);
605
606 if ((AB3550_NUM_BANKS <= bank) ||
607 !reg_write_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
608 return -EINVAL;
609
610 ab = dev_get_drvdata(dev->parent);
611 return mask_and_set_register_interruptible(ab, bank, reg,
612 bitmask, bitvalues);
613}
614
615int ab3550_set_register_interruptible(struct device *dev, u8 bank, u8 reg,
616 u8 value)
617{
618 return ab3550_mask_and_set_register_interruptible(dev, bank, reg, 0xFF,
619 value);
620}
621
622int ab3550_get_register_interruptible(struct device *dev, u8 bank, u8 reg,
623 u8 *value)
624{
625 struct ab3550 *ab;
626 struct platform_device *pdev = to_platform_device(dev);
627
628 if ((AB3550_NUM_BANKS <= bank) ||
629 !reg_read_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
630 return -EINVAL;
631
632 ab = dev_get_drvdata(dev->parent);
633 return get_register_interruptible(ab, bank, reg, value);
634}
635
636int ab3550_get_register_page_interruptible(struct device *dev, u8 bank,
637 u8 first_reg, u8 *regvals, u8 numregs)
638{
639 struct ab3550 *ab;
640 struct platform_device *pdev = to_platform_device(dev);
641
642 if ((AB3550_NUM_BANKS <= bank) ||
643 !page_read_allowed(&ab3550_reg_ranges[pdev->id][bank],
644 first_reg, (first_reg + numregs - 1)))
645 return -EINVAL;
646
647 ab = dev_get_drvdata(dev->parent);
648 return get_register_page_interruptible(ab, bank, first_reg, regvals,
649 numregs);
650}
651
652int ab3550_event_registers_startup_state_get(struct device *dev, u8 *event)
653{
654 struct ab3550 *ab;
655
656 ab = dev_get_drvdata(dev->parent);
657 if (!ab->startup_events_read)
658 return -EAGAIN; /* Try again later */
659
660 memcpy(event, ab->startup_events, AB3550_NUM_EVENT_REG);
661 return 0;
662}
663
664int ab3550_startup_irq_enabled(struct device *dev, unsigned int irq)
665{
666 struct ab3550 *ab;
667 struct ab3550_platform_data *plf_data;
668 bool val;
669
670 ab = get_irq_chip_data(irq);
671 plf_data = ab->i2c_client[0]->dev.platform_data;
672 irq -= plf_data->irq.base;
673 val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0);
674
675 return val;
676}
677
678static struct abx500_ops ab3550_ops = {
679 .get_chip_id = ab3550_get_chip_id,
680 .get_register = ab3550_get_register_interruptible,
681 .set_register = ab3550_set_register_interruptible,
682 .get_register_page = ab3550_get_register_page_interruptible,
683 .set_register_page = NULL,
684 .mask_and_set_register = ab3550_mask_and_set_register_interruptible,
685 .event_registers_startup_state_get =
686 ab3550_event_registers_startup_state_get,
687 .startup_irq_enabled = ab3550_startup_irq_enabled,
688};
689
690static irqreturn_t ab3550_irq_handler(int irq, void *data)
691{
692 struct ab3550 *ab = data;
693 int err;
694 unsigned int i;
695 u8 e[AB3550_NUM_EVENT_REG];
696 u8 *events;
697 unsigned long flags;
698
699 events = (ab->startup_events_read ? e : ab->startup_events);
700
701 err = get_register_page_interruptible(ab, AB3550_EVENT_BANK,
702 AB3550_EVENT_REG, events, AB3550_NUM_EVENT_REG);
703 if (err)
704 goto err_event_rd;
705
706 if (!ab->startup_events_read) {
707 dev_info(&ab->i2c_client[0]->dev,
708 "startup events 0x%x,0x%x,0x%x,0x%x,0x%x\n",
709 ab->startup_events[0], ab->startup_events[1],
710 ab->startup_events[2], ab->startup_events[3],
711 ab->startup_events[4]);
712 ab->startup_events_read = true;
713 goto out;
714 }
715
716 /* The two highest bits in event[4] are not used. */
717 events[4] &= 0x3f;
718
719 spin_lock_irqsave(&ab->event_lock, flags);
720 for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
721 events[i] &= ~ab->event_mask[i];
722 spin_unlock_irqrestore(&ab->event_lock, flags);
723
724 for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
725 u8 bit;
726 u8 event_reg;
727
728 dev_dbg(&ab->i2c_client[0]->dev, "IRQ Event[%d]: 0x%2x\n",
729 i, events[i]);
730
731 event_reg = events[i];
732 for (bit = 0; event_reg; bit++, event_reg /= 2) {
733 if (event_reg % 2) {
734 unsigned int irq;
735 struct ab3550_platform_data *plf_data;
736
737 plf_data = ab->i2c_client[0]->dev.platform_data;
738 irq = plf_data->irq.base + (i * 8) + bit;
739 handle_nested_irq(irq);
740 }
741 }
742 }
743out:
744 return IRQ_HANDLED;
745
746err_event_rd:
747 dev_dbg(&ab->i2c_client[0]->dev, "error reading event registers\n");
748 return IRQ_HANDLED;
749}
750
751#ifdef CONFIG_DEBUG_FS
752static struct ab3550_reg_ranges debug_ranges[AB3550_NUM_BANKS] = {
753 {
754 .count = 6,
755 .range = (struct ab3550_reg_range[]) {
756 {
757 .first = 0x00,
758 .last = 0x0e,
759 },
760 {
761 .first = 0x10,
762 .last = 0x1a,
763 },
764 {
765 .first = 0x1e,
766 .last = 0x4f,
767 },
768 {
769 .first = 0x51,
770 .last = 0x63,
771 },
772 {
773 .first = 0x65,
774 .last = 0xa3,
775 },
776 {
777 .first = 0xa5,
778 .last = 0xa8,
779 },
780 }
781 },
782 {
783 .count = 8,
784 .range = (struct ab3550_reg_range[]) {
785 {
786 .first = 0x00,
787 .last = 0x0e,
788 },
789 {
790 .first = 0x10,
791 .last = 0x17,
792 },
793 {
794 .first = 0x1a,
795 .last = 0x1c,
796 },
797 {
798 .first = 0x20,
799 .last = 0x56,
800 },
801 {
802 .first = 0x5a,
803 .last = 0x88,
804 },
805 {
806 .first = 0x8a,
807 .last = 0xad,
808 },
809 {
810 .first = 0xb0,
811 .last = 0xba,
812 },
813 {
814 .first = 0xbc,
815 .last = 0xc3,
816 },
817 }
818 },
819};
820
821static int ab3550_registers_print(struct seq_file *s, void *p)
822{
823 struct ab3550 *ab = s->private;
824 int bank;
825
826 seq_printf(s, AB3550_NAME_STRING " register values:\n");
827
828 for (bank = 0; bank < AB3550_NUM_BANKS; bank++) {
829 unsigned int i;
830
831 seq_printf(s, " bank %d:\n", bank);
832 for (i = 0; i < debug_ranges[bank].count; i++) {
833 u8 reg;
834
835 for (reg = debug_ranges[bank].range[i].first;
836 reg <= debug_ranges[bank].range[i].last;
837 reg++) {
838 u8 value;
839
840 get_register_interruptible(ab, bank, reg,
841 &value);
842 seq_printf(s, " [%d/0x%02X]: 0x%02X\n", bank,
843 reg, value);
844 }
845 }
846 }
847 return 0;
848}
849
850static int ab3550_registers_open(struct inode *inode, struct file *file)
851{
852 return single_open(file, ab3550_registers_print, inode->i_private);
853}
854
855static const struct file_operations ab3550_registers_fops = {
856 .open = ab3550_registers_open,
857 .read = seq_read,
858 .llseek = seq_lseek,
859 .release = single_release,
860 .owner = THIS_MODULE,
861};
862
863static int ab3550_bank_print(struct seq_file *s, void *p)
864{
865 struct ab3550 *ab = s->private;
866
867 seq_printf(s, "%d\n", ab->debug_bank);
868 return 0;
869}
870
871static int ab3550_bank_open(struct inode *inode, struct file *file)
872{
873 return single_open(file, ab3550_bank_print, inode->i_private);
874}
875
876static ssize_t ab3550_bank_write(struct file *file,
877 const char __user *user_buf,
878 size_t count, loff_t *ppos)
879{
880 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
881 char buf[32];
882 int buf_size;
883 unsigned long user_bank;
884 int err;
885
886 /* Get userspace string and assure termination */
887 buf_size = min(count, (sizeof(buf) - 1));
888 if (copy_from_user(buf, user_buf, buf_size))
889 return -EFAULT;
890 buf[buf_size] = 0;
891
892 err = strict_strtoul(buf, 0, &user_bank);
893 if (err)
894 return -EINVAL;
895
896 if (user_bank >= AB3550_NUM_BANKS) {
897 dev_err(&ab->i2c_client[0]->dev,
898 "debugfs error input > number of banks\n");
899 return -EINVAL;
900 }
901
902 ab->debug_bank = user_bank;
903
904 return buf_size;
905}
906
907static int ab3550_address_print(struct seq_file *s, void *p)
908{
909 struct ab3550 *ab = s->private;
910
911 seq_printf(s, "0x%02X\n", ab->debug_address);
912 return 0;
913}
914
915static int ab3550_address_open(struct inode *inode, struct file *file)
916{
917 return single_open(file, ab3550_address_print, inode->i_private);
918}
919
920static ssize_t ab3550_address_write(struct file *file,
921 const char __user *user_buf,
922 size_t count, loff_t *ppos)
923{
924 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
925 char buf[32];
926 int buf_size;
927 unsigned long user_address;
928 int err;
929
930 /* Get userspace string and assure termination */
931 buf_size = min(count, (sizeof(buf) - 1));
932 if (copy_from_user(buf, user_buf, buf_size))
933 return -EFAULT;
934 buf[buf_size] = 0;
935
936 err = strict_strtoul(buf, 0, &user_address);
937 if (err)
938 return -EINVAL;
939 if (user_address > 0xff) {
940 dev_err(&ab->i2c_client[0]->dev,
941 "debugfs error input > 0xff\n");
942 return -EINVAL;
943 }
944 ab->debug_address = user_address;
945 return buf_size;
946}
947
948static int ab3550_val_print(struct seq_file *s, void *p)
949{
950 struct ab3550 *ab = s->private;
951 int err;
952 u8 regvalue;
953
954 err = get_register_interruptible(ab, (u8)ab->debug_bank,
955 (u8)ab->debug_address, &regvalue);
956 if (err)
957 return -EINVAL;
958 seq_printf(s, "0x%02X\n", regvalue);
959
960 return 0;
961}
962
963static int ab3550_val_open(struct inode *inode, struct file *file)
964{
965 return single_open(file, ab3550_val_print, inode->i_private);
966}
967
968static ssize_t ab3550_val_write(struct file *file,
969 const char __user *user_buf,
970 size_t count, loff_t *ppos)
971{
972 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
973 char buf[32];
974 int buf_size;
975 unsigned long user_val;
976 int err;
977 u8 regvalue;
978
979 /* Get userspace string and assure termination */
980 buf_size = min(count, (sizeof(buf)-1));
981 if (copy_from_user(buf, user_buf, buf_size))
982 return -EFAULT;
983 buf[buf_size] = 0;
984
985 err = strict_strtoul(buf, 0, &user_val);
986 if (err)
987 return -EINVAL;
988 if (user_val > 0xff) {
989 dev_err(&ab->i2c_client[0]->dev,
990 "debugfs error input > 0xff\n");
991 return -EINVAL;
992 }
993 err = mask_and_set_register_interruptible(
994 ab, (u8)ab->debug_bank,
995 (u8)ab->debug_address, 0xFF, (u8)user_val);
996 if (err)
997 return -EINVAL;
998
999 get_register_interruptible(ab, (u8)ab->debug_bank,
1000 (u8)ab->debug_address, &regvalue);
1001 if (err)
1002 return -EINVAL;
1003
1004 return buf_size;
1005}
1006
1007static const struct file_operations ab3550_bank_fops = {
1008 .open = ab3550_bank_open,
1009 .write = ab3550_bank_write,
1010 .read = seq_read,
1011 .llseek = seq_lseek,
1012 .release = single_release,
1013 .owner = THIS_MODULE,
1014};
1015
1016static const struct file_operations ab3550_address_fops = {
1017 .open = ab3550_address_open,
1018 .write = ab3550_address_write,
1019 .read = seq_read,
1020 .llseek = seq_lseek,
1021 .release = single_release,
1022 .owner = THIS_MODULE,
1023};
1024
1025static const struct file_operations ab3550_val_fops = {
1026 .open = ab3550_val_open,
1027 .write = ab3550_val_write,
1028 .read = seq_read,
1029 .llseek = seq_lseek,
1030 .release = single_release,
1031 .owner = THIS_MODULE,
1032};
1033
1034static struct dentry *ab3550_dir;
1035static struct dentry *ab3550_reg_file;
1036static struct dentry *ab3550_bank_file;
1037static struct dentry *ab3550_address_file;
1038static struct dentry *ab3550_val_file;
1039
1040static inline void ab3550_setup_debugfs(struct ab3550 *ab)
1041{
1042 ab->debug_bank = 0;
1043 ab->debug_address = 0x00;
1044
1045 ab3550_dir = debugfs_create_dir(AB3550_NAME_STRING, NULL);
1046 if (!ab3550_dir)
1047 goto exit_no_debugfs;
1048
1049 ab3550_reg_file = debugfs_create_file("all-registers",
1050 S_IRUGO, ab3550_dir, ab, &ab3550_registers_fops);
1051 if (!ab3550_reg_file)
1052 goto exit_destroy_dir;
1053
1054 ab3550_bank_file = debugfs_create_file("register-bank",
1055 (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_bank_fops);
1056 if (!ab3550_bank_file)
1057 goto exit_destroy_reg;
1058
1059 ab3550_address_file = debugfs_create_file("register-address",
1060 (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_address_fops);
1061 if (!ab3550_address_file)
1062 goto exit_destroy_bank;
1063
1064 ab3550_val_file = debugfs_create_file("register-value",
1065 (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_val_fops);
1066 if (!ab3550_val_file)
1067 goto exit_destroy_address;
1068
1069 return;
1070
1071exit_destroy_address:
1072 debugfs_remove(ab3550_address_file);
1073exit_destroy_bank:
1074 debugfs_remove(ab3550_bank_file);
1075exit_destroy_reg:
1076 debugfs_remove(ab3550_reg_file);
1077exit_destroy_dir:
1078 debugfs_remove(ab3550_dir);
1079exit_no_debugfs:
1080 dev_err(&ab->i2c_client[0]->dev, "failed to create debugfs entries.\n");
1081 return;
1082}
1083
1084static inline void ab3550_remove_debugfs(void)
1085{
1086 debugfs_remove(ab3550_val_file);
1087 debugfs_remove(ab3550_address_file);
1088 debugfs_remove(ab3550_bank_file);
1089 debugfs_remove(ab3550_reg_file);
1090 debugfs_remove(ab3550_dir);
1091}
1092
1093#else /* !CONFIG_DEBUG_FS */
1094static inline void ab3550_setup_debugfs(struct ab3550 *ab)
1095{
1096}
1097static inline void ab3550_remove_debugfs(void)
1098{
1099}
1100#endif
1101
1102/*
1103 * Basic set-up, datastructure creation/destruction and I2C interface.
1104 * This sets up a default config in the AB3550 chip so that it
1105 * will work as expected.
1106 */
1107static int __init ab3550_setup(struct ab3550 *ab)
1108{
1109 int err = 0;
1110 int i;
1111 struct ab3550_platform_data *plf_data;
1112 struct abx500_init_settings *settings;
1113
1114 plf_data = ab->i2c_client[0]->dev.platform_data;
1115 settings = plf_data->init_settings;
1116
1117 for (i = 0; i < plf_data->init_settings_sz; i++) {
1118 err = mask_and_set_register_interruptible(ab,
1119 settings[i].bank,
1120 settings[i].reg,
1121 0xFF, settings[i].setting);
1122 if (err)
1123 goto exit_no_setup;
1124
1125 /* If event mask register update the event mask in ab3550 */
1126 if ((settings[i].bank == 0) &&
1127 (AB3550_IMR1 <= settings[i].reg) &&
1128 (settings[i].reg <= AB3550_IMR5)) {
1129 ab->event_mask[settings[i].reg - AB3550_IMR1] =
1130 settings[i].setting;
1131 }
1132 }
1133exit_no_setup:
1134 return err;
1135}
1136
1137static void ab3550_mask_work(struct work_struct *work)
1138{
1139 struct ab3550 *ab = container_of(work, struct ab3550, mask_work);
1140 int i;
1141 unsigned long flags;
1142 u8 mask[AB3550_NUM_EVENT_REG];
1143
1144 spin_lock_irqsave(&ab->event_lock, flags);
1145 for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
1146 mask[i] = ab->event_mask[i];
1147 spin_unlock_irqrestore(&ab->event_lock, flags);
1148
1149 for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
1150 int err;
1151
1152 err = mask_and_set_register_interruptible(ab, 0,
1153 (AB3550_IMR1 + i), ~0, mask[i]);
1154 if (err)
1155 dev_err(&ab->i2c_client[0]->dev,
1156 "ab3550_mask_work failed 0x%x,0x%x\n",
1157 (AB3550_IMR1 + i), mask[i]);
1158 }
1159}
1160
1161static void ab3550_mask(unsigned int irq)
1162{
1163 unsigned long flags;
1164 struct ab3550 *ab;
1165 struct ab3550_platform_data *plf_data;
1166
1167 ab = get_irq_chip_data(irq);
1168 plf_data = ab->i2c_client[0]->dev.platform_data;
1169 irq -= plf_data->irq.base;
1170
1171 spin_lock_irqsave(&ab->event_lock, flags);
1172 ab->event_mask[irq / 8] |= BIT(irq % 8);
1173 spin_unlock_irqrestore(&ab->event_lock, flags);
1174
1175 schedule_work(&ab->mask_work);
1176}
1177
1178static void ab3550_unmask(unsigned int irq)
1179{
1180 unsigned long flags;
1181 struct ab3550 *ab;
1182 struct ab3550_platform_data *plf_data;
1183
1184 ab = get_irq_chip_data(irq);
1185 plf_data = ab->i2c_client[0]->dev.platform_data;
1186 irq -= plf_data->irq.base;
1187
1188 spin_lock_irqsave(&ab->event_lock, flags);
1189 ab->event_mask[irq / 8] &= ~BIT(irq % 8);
1190 spin_unlock_irqrestore(&ab->event_lock, flags);
1191
1192 schedule_work(&ab->mask_work);
1193}
1194
1195static void noop(unsigned int irq)
1196{
1197}
1198
1199static struct irq_chip ab3550_irq_chip = {
1200 .name = "ab3550-core", /* Keep the same name as the request */
1201 .startup = NULL, /* defaults to enable */
1202 .shutdown = NULL, /* defaults to disable */
1203 .enable = NULL, /* defaults to unmask */
1204 .disable = ab3550_mask, /* No default to mask in chip.c */
1205 .ack = noop,
1206 .mask = ab3550_mask,
1207 .unmask = ab3550_unmask,
1208 .end = NULL,
1209};
1210
1211struct ab_family_id {
1212 u8 id;
1213 char *name;
1214};
1215
1216static const struct ab_family_id ids[] __initdata = {
1217 /* AB3550 */
1218 {
1219 .id = AB3550_P1A,
1220 .name = "P1A"
1221 },
1222 /* Terminator */
1223 {
1224 .id = 0x00,
1225 }
1226};
1227
1228static int __init ab3550_probe(struct i2c_client *client,
1229 const struct i2c_device_id *id)
1230{
1231 struct ab3550 *ab;
1232 struct ab3550_platform_data *ab3550_plf_data =
1233 client->dev.platform_data;
1234 int err;
1235 int i;
1236 int num_i2c_clients = 0;
1237
1238 ab = kzalloc(sizeof(struct ab3550), GFP_KERNEL);
1239 if (!ab) {
1240 dev_err(&client->dev,
1241 "could not allocate " AB3550_NAME_STRING " device\n");
1242 return -ENOMEM;
1243 }
1244
1245 /* Initialize data structure */
1246 mutex_init(&ab->access_mutex);
1247 spin_lock_init(&ab->event_lock);
1248 ab->i2c_client[0] = client;
1249
1250 i2c_set_clientdata(client, ab);
1251
1252 /* Read chip ID register */
1253 err = get_register_interruptible(ab, 0, AB3550_CID_REG, &ab->chip_id);
1254 if (err) {
1255 dev_err(&client->dev, "could not communicate with the analog "
1256 "baseband chip\n");
1257 goto exit_no_detect;
1258 }
1259
1260 for (i = 0; ids[i].id != 0x0; i++) {
1261 if (ids[i].id == ab->chip_id) {
1262 snprintf(&ab->chip_name[0], sizeof(ab->chip_name) - 1,
1263 AB3550_ID_FORMAT_STRING, ids[i].name);
1264 break;
1265 }
1266 }
1267
1268 if (ids[i].id == 0x0) {
1269 dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
1270 ab->chip_id);
1271 dev_err(&client->dev, "driver not started!\n");
1272 goto exit_no_detect;
1273 }
1274
1275 dev_info(&client->dev, "detected AB chip: %s\n", &ab->chip_name[0]);
1276
1277 /* Attach other dummy I2C clients. */
1278 while (++num_i2c_clients < AB3550_NUM_BANKS) {
1279 ab->i2c_client[num_i2c_clients] =
1280 i2c_new_dummy(client->adapter,
1281 (client->addr + num_i2c_clients));
1282 if (!ab->i2c_client[num_i2c_clients]) {
1283 err = -ENOMEM;
1284 goto exit_no_dummy_client;
1285 }
1286 strlcpy(ab->i2c_client[num_i2c_clients]->name, id->name,
1287 sizeof(ab->i2c_client[num_i2c_clients]->name));
1288 }
1289
1290 err = ab3550_setup(ab);
1291 if (err)
1292 goto exit_no_setup;
1293
1294 INIT_WORK(&ab->mask_work, ab3550_mask_work);
1295
1296 for (i = 0; i < ab3550_plf_data->irq.count; i++) {
1297 unsigned int irq;
1298
1299 irq = ab3550_plf_data->irq.base + i;
1300 set_irq_chip_data(irq, ab);
1301 set_irq_chip_and_handler(irq, &ab3550_irq_chip,
1302 handle_simple_irq);
1303 set_irq_nested_thread(irq, 1);
1304#ifdef CONFIG_ARM
1305 set_irq_flags(irq, IRQF_VALID);
1306#else
1307 set_irq_noprobe(irq);
1308#endif
1309 }
1310
1311 err = request_threaded_irq(client->irq, NULL, ab3550_irq_handler,
1312 IRQF_ONESHOT, "ab3550-core", ab);
1313 /* This real unpredictable IRQ is of course sampled for entropy */
1314 rand_initialize_irq(client->irq);
1315
1316 if (err)
1317 goto exit_no_irq;
1318
1319 err = abx500_register_ops(&client->dev, &ab3550_ops);
1320 if (err)
1321 goto exit_no_ops;
1322
1323 /* Set up and register the platform devices. */
1324 for (i = 0; i < AB3550_NUM_DEVICES; i++) {
1325 ab3550_devs[i].platform_data = ab3550_plf_data->dev_data[i];
1326 ab3550_devs[i].data_size = ab3550_plf_data->dev_data_sz[i];
1327 }
1328
1329 err = mfd_add_devices(&client->dev, 0, ab3550_devs,
1330 ARRAY_SIZE(ab3550_devs), NULL,
1331 ab3550_plf_data->irq.base);
1332
1333 ab3550_setup_debugfs(ab);
1334
1335 return 0;
1336
1337exit_no_ops:
1338exit_no_irq:
1339exit_no_setup:
1340exit_no_dummy_client:
1341 /* Unregister the dummy i2c clients. */
1342 while (--num_i2c_clients)
1343 i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
1344exit_no_detect:
1345 kfree(ab);
1346 return err;
1347}
1348
1349static int __exit ab3550_remove(struct i2c_client *client)
1350{
1351 struct ab3550 *ab = i2c_get_clientdata(client);
1352 int num_i2c_clients = AB3550_NUM_BANKS;
1353
1354 mfd_remove_devices(&client->dev);
1355 ab3550_remove_debugfs();
1356
1357 while (--num_i2c_clients)
1358 i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
1359
1360 /*
1361 * At this point, all subscribers should have unregistered
1362 * their notifiers so deactivate IRQ
1363 */
1364 free_irq(client->irq, ab);
1365 i2c_set_clientdata(client, NULL);
1366 kfree(ab);
1367 return 0;
1368}
1369
1370static const struct i2c_device_id ab3550_id[] = {
1371 {AB3550_NAME_STRING, 0},
1372 {}
1373};
1374MODULE_DEVICE_TABLE(i2c, ab3550_id);
1375
1376static struct i2c_driver ab3550_driver = {
1377 .driver = {
1378 .name = AB3550_NAME_STRING,
1379 .owner = THIS_MODULE,
1380 },
1381 .id_table = ab3550_id,
1382 .probe = ab3550_probe,
1383 .remove = __exit_p(ab3550_remove),
1384};
1385
1386static int __init ab3550_i2c_init(void)
1387{
1388 return i2c_add_driver(&ab3550_driver);
1389}
1390
1391static void __exit ab3550_i2c_exit(void)
1392{
1393 i2c_del_driver(&ab3550_driver);
1394}
1395
1396subsys_initcall(ab3550_i2c_init);
1397module_exit(ab3550_i2c_exit);
1398
1399MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>");
1400MODULE_DESCRIPTION("AB3550 core driver");
1401MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 13:28:37 -0500