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-rw-r--r--drivers/mfd/Kconfig23
-rw-r--r--drivers/mfd/Makefile4
-rw-r--r--drivers/mfd/dm355evm_msp.c10
-rw-r--r--drivers/mfd/htc-egpio.c4
-rw-r--r--drivers/mfd/pcf50633-adc.c277
-rw-r--r--drivers/mfd/pcf50633-core.c710
-rw-r--r--drivers/mfd/pcf50633-gpio.c118
-rw-r--r--drivers/mfd/sm501.c56
-rw-r--r--drivers/mfd/twl4030-core.c11
-rw-r--r--drivers/mfd/wm8350-core.c48
-rw-r--r--drivers/mfd/wm8350-regmap.c2
11 files changed, 1228 insertions, 35 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 416f9e7286ba..06a2b0f7737c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -217,6 +217,29 @@ config MFD_WM8350_I2C
217 I2C as the control interface. Additional options must be 217 I2C as the control interface. Additional options must be
218 selected to enable support for the functionality of the chip. 218 selected to enable support for the functionality of the chip.
219 219
220config MFD_PCF50633
221 tristate "Support for NXP PCF50633"
222 depends on I2C
223 help
224 Say yes here if you have NXP PCF50633 chip on your board.
225 This core driver provides register access and IRQ handling
226 facilities, and registers devices for the various functions
227 so that function-specific drivers can bind to them.
228
229config PCF50633_ADC
230 tristate "Support for NXP PCF50633 ADC"
231 depends on MFD_PCF50633
232 help
233 Say yes here if you want to include support for ADC in the
234 NXP PCF50633 chip.
235
236config PCF50633_GPIO
237 tristate "Support for NXP PCF50633 GPIO"
238 depends on MFD_PCF50633
239 help
240 Say yes here if you want to include support GPIO for pins on
241 the PCF50633 chip.
242
220endmenu 243endmenu
221 244
222menu "Multimedia Capabilities Port drivers" 245menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0c9418b36c26..3afb5192e4da 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -37,3 +37,7 @@ endif
37obj-$(CONFIG_UCB1400_CORE) += ucb1400_core.o 37obj-$(CONFIG_UCB1400_CORE) += ucb1400_core.o
38 38
39obj-$(CONFIG_PMIC_DA903X) += da903x.o 39obj-$(CONFIG_PMIC_DA903X) += da903x.o
40
41obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o
42obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
43obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o \ No newline at end of file
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c
index 4214b3f72426..7ac12cb0be4a 100644
--- a/drivers/mfd/dm355evm_msp.c
+++ b/drivers/mfd/dm355evm_msp.c
@@ -107,6 +107,9 @@ static const u8 msp_gpios[] = {
107 MSP_GPIO(0, SWITCH1), MSP_GPIO(1, SWITCH1), 107 MSP_GPIO(0, SWITCH1), MSP_GPIO(1, SWITCH1),
108 MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1), 108 MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1),
109 MSP_GPIO(4, SWITCH1), 109 MSP_GPIO(4, SWITCH1),
110 /* switches on MMC/SD sockets */
111 MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */
112 MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */
110}; 113};
111 114
112#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) 115#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3)
@@ -304,6 +307,13 @@ static int add_children(struct i2c_client *client)
304 gpio_export(gpio, false); 307 gpio_export(gpio, false);
305 } 308 }
306 309
310 /* MMC/SD inputs -- right after the last config input */
311 if (client->dev.platform_data) {
312 void (*mmcsd_setup)(unsigned) = client->dev.platform_data;
313
314 mmcsd_setup(dm355evm_msp_gpio.base + 8 + 5);
315 }
316
307 /* RTC is a 32 bit counter, no alarm */ 317 /* RTC is a 32 bit counter, no alarm */
308 if (msp_has_rtc()) { 318 if (msp_has_rtc()) {
309 child = add_child(client, "rtc-dm355evm", 319 child = add_child(client, "rtc-dm355evm",
diff --git a/drivers/mfd/htc-egpio.c b/drivers/mfd/htc-egpio.c
index 1a4d04664d6d..aa266e1f69b2 100644
--- a/drivers/mfd/htc-egpio.c
+++ b/drivers/mfd/htc-egpio.c
@@ -286,7 +286,7 @@ static int __init egpio_probe(struct platform_device *pdev)
286 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 286 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
287 if (!res) 287 if (!res)
288 goto fail; 288 goto fail;
289 ei->base_addr = ioremap_nocache(res->start, res->end - res->start); 289 ei->base_addr = ioremap_nocache(res->start, resource_size(res));
290 if (!ei->base_addr) 290 if (!ei->base_addr)
291 goto fail; 291 goto fail;
292 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr); 292 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
@@ -307,7 +307,7 @@ static int __init egpio_probe(struct platform_device *pdev)
307 307
308 ei->nchips = pdata->num_chips; 308 ei->nchips = pdata->num_chips;
309 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL); 309 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
310 if (!ei) { 310 if (!ei->chip) {
311 ret = -ENOMEM; 311 ret = -ENOMEM;
312 goto fail; 312 goto fail;
313 } 313 }
diff --git a/drivers/mfd/pcf50633-adc.c b/drivers/mfd/pcf50633-adc.c
new file mode 100644
index 000000000000..c2d05becfa97
--- /dev/null
+++ b/drivers/mfd/pcf50633-adc.c
@@ -0,0 +1,277 @@
1/* NXP PCF50633 ADC Driver
2 *
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Balaji Rao <balajirrao@openmoko.org>
5 * All rights reserved.
6 *
7 * Broken down from monstrous PCF50633 driver mainly by
8 * Harald Welte, Andy Green and Werner Almesberger
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * NOTE: This driver does not yet support subtractive ADC mode, which means
16 * you can do only one measurement per read request.
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/device.h>
23#include <linux/platform_device.h>
24#include <linux/completion.h>
25
26#include <linux/mfd/pcf50633/core.h>
27#include <linux/mfd/pcf50633/adc.h>
28
29struct pcf50633_adc_request {
30 int mux;
31 int avg;
32 int result;
33 void (*callback)(struct pcf50633 *, void *, int);
34 void *callback_param;
35
36 /* Used in case of sync requests */
37 struct completion completion;
38
39};
40
41#define PCF50633_MAX_ADC_FIFO_DEPTH 8
42
43struct pcf50633_adc {
44 struct pcf50633 *pcf;
45
46 /* Private stuff */
47 struct pcf50633_adc_request *queue[PCF50633_MAX_ADC_FIFO_DEPTH];
48 int queue_head;
49 int queue_tail;
50 struct mutex queue_mutex;
51};
52
53static inline struct pcf50633_adc *__to_adc(struct pcf50633 *pcf)
54{
55 return platform_get_drvdata(pcf->adc_pdev);
56}
57
58static void adc_setup(struct pcf50633 *pcf, int channel, int avg)
59{
60 channel &= PCF50633_ADCC1_ADCMUX_MASK;
61
62 /* kill ratiometric, but enable ACCSW biasing */
63 pcf50633_reg_write(pcf, PCF50633_REG_ADCC2, 0x00);
64 pcf50633_reg_write(pcf, PCF50633_REG_ADCC3, 0x01);
65
66 /* start ADC conversion on selected channel */
67 pcf50633_reg_write(pcf, PCF50633_REG_ADCC1, channel | avg |
68 PCF50633_ADCC1_ADCSTART | PCF50633_ADCC1_RES_10BIT);
69}
70
71static void trigger_next_adc_job_if_any(struct pcf50633 *pcf)
72{
73 struct pcf50633_adc *adc = __to_adc(pcf);
74 int head;
75
76 mutex_lock(&adc->queue_mutex);
77
78 head = adc->queue_head;
79
80 if (!adc->queue[head]) {
81 mutex_unlock(&adc->queue_mutex);
82 return;
83 }
84 mutex_unlock(&adc->queue_mutex);
85
86 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg);
87}
88
89static int
90adc_enqueue_request(struct pcf50633 *pcf, struct pcf50633_adc_request *req)
91{
92 struct pcf50633_adc *adc = __to_adc(pcf);
93 int head, tail;
94
95 mutex_lock(&adc->queue_mutex);
96
97 head = adc->queue_head;
98 tail = adc->queue_tail;
99
100 if (adc->queue[tail]) {
101 mutex_unlock(&adc->queue_mutex);
102 return -EBUSY;
103 }
104
105 adc->queue[tail] = req;
106 adc->queue_tail = (tail + 1) & (PCF50633_MAX_ADC_FIFO_DEPTH - 1);
107
108 mutex_unlock(&adc->queue_mutex);
109
110 trigger_next_adc_job_if_any(pcf);
111
112 return 0;
113}
114
115static void
116pcf50633_adc_sync_read_callback(struct pcf50633 *pcf, void *param, int result)
117{
118 struct pcf50633_adc_request *req = param;
119
120 req->result = result;
121 complete(&req->completion);
122}
123
124int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg)
125{
126 struct pcf50633_adc_request *req;
127
128 /* req is freed when the result is ready, in interrupt handler */
129 req = kzalloc(sizeof(*req), GFP_KERNEL);
130 if (!req)
131 return -ENOMEM;
132
133 req->mux = mux;
134 req->avg = avg;
135 req->callback = pcf50633_adc_sync_read_callback;
136 req->callback_param = req;
137
138 init_completion(&req->completion);
139 adc_enqueue_request(pcf, req);
140 wait_for_completion(&req->completion);
141
142 return req->result;
143}
144EXPORT_SYMBOL_GPL(pcf50633_adc_sync_read);
145
146int pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
147 void (*callback)(struct pcf50633 *, void *, int),
148 void *callback_param)
149{
150 struct pcf50633_adc_request *req;
151
152 /* req is freed when the result is ready, in interrupt handler */
153 req = kmalloc(sizeof(*req), GFP_KERNEL);
154 if (!req)
155 return -ENOMEM;
156
157 req->mux = mux;
158 req->avg = avg;
159 req->callback = callback;
160 req->callback_param = callback_param;
161
162 adc_enqueue_request(pcf, req);
163
164 return 0;
165}
166EXPORT_SYMBOL_GPL(pcf50633_adc_async_read);
167
168static int adc_result(struct pcf50633 *pcf)
169{
170 u8 adcs1, adcs3;
171 u16 result;
172
173 adcs1 = pcf50633_reg_read(pcf, PCF50633_REG_ADCS1);
174 adcs3 = pcf50633_reg_read(pcf, PCF50633_REG_ADCS3);
175 result = (adcs1 << 2) | (adcs3 & PCF50633_ADCS3_ADCDAT1L_MASK);
176
177 dev_dbg(pcf->dev, "adc result = %d\n", result);
178
179 return result;
180}
181
182static void pcf50633_adc_irq(int irq, void *data)
183{
184 struct pcf50633_adc *adc = data;
185 struct pcf50633 *pcf = adc->pcf;
186 struct pcf50633_adc_request *req;
187 int head;
188
189 mutex_lock(&adc->queue_mutex);
190 head = adc->queue_head;
191
192 req = adc->queue[head];
193 if (WARN_ON(!req)) {
194 dev_err(pcf->dev, "pcf50633-adc irq: ADC queue empty!\n");
195 mutex_unlock(&adc->queue_mutex);
196 return;
197 }
198 adc->queue[head] = NULL;
199 adc->queue_head = (head + 1) &
200 (PCF50633_MAX_ADC_FIFO_DEPTH - 1);
201
202 mutex_unlock(&adc->queue_mutex);
203
204 req->callback(pcf, req->callback_param, adc_result(pcf));
205 kfree(req);
206
207 trigger_next_adc_job_if_any(pcf);
208}
209
210static int __devinit pcf50633_adc_probe(struct platform_device *pdev)
211{
212 struct pcf50633_subdev_pdata *pdata = pdev->dev.platform_data;
213 struct pcf50633_adc *adc;
214
215 adc = kzalloc(sizeof(*adc), GFP_KERNEL);
216 if (!adc)
217 return -ENOMEM;
218
219 adc->pcf = pdata->pcf;
220 platform_set_drvdata(pdev, adc);
221
222 pcf50633_register_irq(pdata->pcf, PCF50633_IRQ_ADCRDY,
223 pcf50633_adc_irq, adc);
224
225 mutex_init(&adc->queue_mutex);
226
227 return 0;
228}
229
230static int __devexit pcf50633_adc_remove(struct platform_device *pdev)
231{
232 struct pcf50633_adc *adc = platform_get_drvdata(pdev);
233 int i, head;
234
235 pcf50633_free_irq(adc->pcf, PCF50633_IRQ_ADCRDY);
236
237 mutex_lock(&adc->queue_mutex);
238 head = adc->queue_head;
239
240 if (WARN_ON(adc->queue[head]))
241 dev_err(adc->pcf->dev,
242 "adc driver removed with request pending\n");
243
244 for (i = 0; i < PCF50633_MAX_ADC_FIFO_DEPTH; i++)
245 kfree(adc->queue[i]);
246
247 mutex_unlock(&adc->queue_mutex);
248 kfree(adc);
249
250 return 0;
251}
252
253static struct platform_driver pcf50633_adc_driver = {
254 .driver = {
255 .name = "pcf50633-adc",
256 },
257 .probe = pcf50633_adc_probe,
258 .remove = __devexit_p(pcf50633_adc_remove),
259};
260
261static int __init pcf50633_adc_init(void)
262{
263 return platform_driver_register(&pcf50633_adc_driver);
264}
265module_init(pcf50633_adc_init);
266
267static void __exit pcf50633_adc_exit(void)
268{
269 platform_driver_unregister(&pcf50633_adc_driver);
270}
271module_exit(pcf50633_adc_exit);
272
273MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>");
274MODULE_DESCRIPTION("PCF50633 adc driver");
275MODULE_LICENSE("GPL");
276MODULE_ALIAS("platform:pcf50633-adc");
277
diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c
new file mode 100644
index 000000000000..2e36057659e1
--- /dev/null
+++ b/drivers/mfd/pcf50633-core.c
@@ -0,0 +1,710 @@
1/* NXP PCF50633 Power Management Unit (PMU) driver
2 *
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
5 * Balaji Rao <balajirrao@openmoko.org>
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/device.h>
17#include <linux/sysfs.h>
18#include <linux/device.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/interrupt.h>
22#include <linux/workqueue.h>
23#include <linux/platform_device.h>
24#include <linux/i2c.h>
25#include <linux/irq.h>
26
27#include <linux/mfd/pcf50633/core.h>
28
29/* Two MBCS registers used during cold start */
30#define PCF50633_REG_MBCS1 0x4b
31#define PCF50633_REG_MBCS2 0x4c
32#define PCF50633_MBCS1_USBPRES 0x01
33#define PCF50633_MBCS1_ADAPTPRES 0x01
34
35static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
36{
37 int ret;
38
39 ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg,
40 num, data);
41 if (ret < 0)
42 dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg);
43
44 return ret;
45}
46
47static int __pcf50633_write(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
48{
49 int ret;
50
51 ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg,
52 num, data);
53 if (ret < 0)
54 dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg);
55
56 return ret;
57
58}
59
60/* Read a block of upto 32 regs */
61int pcf50633_read_block(struct pcf50633 *pcf, u8 reg,
62 int nr_regs, u8 *data)
63{
64 int ret;
65
66 mutex_lock(&pcf->lock);
67 ret = __pcf50633_read(pcf, reg, nr_regs, data);
68 mutex_unlock(&pcf->lock);
69
70 return ret;
71}
72EXPORT_SYMBOL_GPL(pcf50633_read_block);
73
74/* Write a block of upto 32 regs */
75int pcf50633_write_block(struct pcf50633 *pcf , u8 reg,
76 int nr_regs, u8 *data)
77{
78 int ret;
79
80 mutex_lock(&pcf->lock);
81 ret = __pcf50633_write(pcf, reg, nr_regs, data);
82 mutex_unlock(&pcf->lock);
83
84 return ret;
85}
86EXPORT_SYMBOL_GPL(pcf50633_write_block);
87
88u8 pcf50633_reg_read(struct pcf50633 *pcf, u8 reg)
89{
90 u8 val;
91
92 mutex_lock(&pcf->lock);
93 __pcf50633_read(pcf, reg, 1, &val);
94 mutex_unlock(&pcf->lock);
95
96 return val;
97}
98EXPORT_SYMBOL_GPL(pcf50633_reg_read);
99
100int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val)
101{
102 int ret;
103
104 mutex_lock(&pcf->lock);
105 ret = __pcf50633_write(pcf, reg, 1, &val);
106 mutex_unlock(&pcf->lock);
107
108 return ret;
109}
110EXPORT_SYMBOL_GPL(pcf50633_reg_write);
111
112int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val)
113{
114 int ret;
115 u8 tmp;
116
117 val &= mask;
118
119 mutex_lock(&pcf->lock);
120 ret = __pcf50633_read(pcf, reg, 1, &tmp);
121 if (ret < 0)
122 goto out;
123
124 tmp &= ~mask;
125 tmp |= val;
126 ret = __pcf50633_write(pcf, reg, 1, &tmp);
127
128out:
129 mutex_unlock(&pcf->lock);
130
131 return ret;
132}
133EXPORT_SYMBOL_GPL(pcf50633_reg_set_bit_mask);
134
135int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 val)
136{
137 int ret;
138 u8 tmp;
139
140 mutex_lock(&pcf->lock);
141 ret = __pcf50633_read(pcf, reg, 1, &tmp);
142 if (ret < 0)
143 goto out;
144
145 tmp &= ~val;
146 ret = __pcf50633_write(pcf, reg, 1, &tmp);
147
148out:
149 mutex_unlock(&pcf->lock);
150
151 return ret;
152}
153EXPORT_SYMBOL_GPL(pcf50633_reg_clear_bits);
154
155/* sysfs attributes */
156static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
157 char *buf)
158{
159 struct pcf50633 *pcf = dev_get_drvdata(dev);
160 u8 dump[16];
161 int n, n1, idx = 0;
162 char *buf1 = buf;
163 static u8 address_no_read[] = { /* must be ascending */
164 PCF50633_REG_INT1,
165 PCF50633_REG_INT2,
166 PCF50633_REG_INT3,
167 PCF50633_REG_INT4,
168 PCF50633_REG_INT5,
169 0 /* terminator */
170 };
171
172 for (n = 0; n < 256; n += sizeof(dump)) {
173 for (n1 = 0; n1 < sizeof(dump); n1++)
174 if (n == address_no_read[idx]) {
175 idx++;
176 dump[n1] = 0x00;
177 } else
178 dump[n1] = pcf50633_reg_read(pcf, n + n1);
179
180 hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
181 buf1 += strlen(buf1);
182 *buf1++ = '\n';
183 *buf1 = '\0';
184 }
185
186 return buf1 - buf;
187}
188static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
189
190static ssize_t show_resume_reason(struct device *dev,
191 struct device_attribute *attr, char *buf)
192{
193 struct pcf50633 *pcf = dev_get_drvdata(dev);
194 int n;
195
196 n = sprintf(buf, "%02x%02x%02x%02x%02x\n",
197 pcf->resume_reason[0],
198 pcf->resume_reason[1],
199 pcf->resume_reason[2],
200 pcf->resume_reason[3],
201 pcf->resume_reason[4]);
202
203 return n;
204}
205static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL);
206
207static struct attribute *pcf_sysfs_entries[] = {
208 &dev_attr_dump_regs.attr,
209 &dev_attr_resume_reason.attr,
210 NULL,
211};
212
213static struct attribute_group pcf_attr_group = {
214 .name = NULL, /* put in device directory */
215 .attrs = pcf_sysfs_entries,
216};
217
218int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
219 void (*handler) (int, void *), void *data)
220{
221 if (irq < 0 || irq > PCF50633_NUM_IRQ || !handler)
222 return -EINVAL;
223
224 if (WARN_ON(pcf->irq_handler[irq].handler))
225 return -EBUSY;
226
227 mutex_lock(&pcf->lock);
228 pcf->irq_handler[irq].handler = handler;
229 pcf->irq_handler[irq].data = data;
230 mutex_unlock(&pcf->lock);
231
232 return 0;
233}
234EXPORT_SYMBOL_GPL(pcf50633_register_irq);
235
236int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
237{
238 if (irq < 0 || irq > PCF50633_NUM_IRQ)
239 return -EINVAL;
240
241 mutex_lock(&pcf->lock);
242 pcf->irq_handler[irq].handler = NULL;
243 mutex_unlock(&pcf->lock);
244
245 return 0;
246}
247EXPORT_SYMBOL_GPL(pcf50633_free_irq);
248
249static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
250{
251 u8 reg, bits, tmp;
252 int ret = 0, idx;
253
254 idx = irq >> 3;
255 reg = PCF50633_REG_INT1M + idx;
256 bits = 1 << (irq & 0x07);
257
258 mutex_lock(&pcf->lock);
259
260 if (mask) {
261 ret = __pcf50633_read(pcf, reg, 1, &tmp);
262 if (ret < 0)
263 goto out;
264
265 tmp |= bits;
266
267 ret = __pcf50633_write(pcf, reg, 1, &tmp);
268 if (ret < 0)
269 goto out;
270
271 pcf->mask_regs[idx] &= ~bits;
272 pcf->mask_regs[idx] |= bits;
273 } else {
274 ret = __pcf50633_read(pcf, reg, 1, &tmp);
275 if (ret < 0)
276 goto out;
277
278 tmp &= ~bits;
279
280 ret = __pcf50633_write(pcf, reg, 1, &tmp);
281 if (ret < 0)
282 goto out;
283
284 pcf->mask_regs[idx] &= ~bits;
285 }
286out:
287 mutex_unlock(&pcf->lock);
288
289 return ret;
290}
291
292int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
293{
294 dev_info(pcf->dev, "Masking IRQ %d\n", irq);
295
296 return __pcf50633_irq_mask_set(pcf, irq, 1);
297}
298EXPORT_SYMBOL_GPL(pcf50633_irq_mask);
299
300int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
301{
302 dev_info(pcf->dev, "Unmasking IRQ %d\n", irq);
303
304 return __pcf50633_irq_mask_set(pcf, irq, 0);
305}
306EXPORT_SYMBOL_GPL(pcf50633_irq_unmask);
307
308int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
309{
310 u8 reg, bits;
311
312 reg = irq >> 3;
313 bits = 1 << (irq & 0x07);
314
315 return pcf->mask_regs[reg] & bits;
316}
317EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get);
318
319static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
320{
321 if (pcf->irq_handler[irq].handler)
322 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
323}
324
325/* Maximum amount of time ONKEY is held before emergency action is taken */
326#define PCF50633_ONKEY1S_TIMEOUT 8
327
328static void pcf50633_irq_worker(struct work_struct *work)
329{
330 struct pcf50633 *pcf;
331 int ret, i, j;
332 u8 pcf_int[5], chgstat;
333
334 pcf = container_of(work, struct pcf50633, irq_work);
335
336 /* Read the 5 INT regs in one transaction */
337 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
338 ARRAY_SIZE(pcf_int), pcf_int);
339 if (ret != ARRAY_SIZE(pcf_int)) {
340 dev_err(pcf->dev, "Error reading INT registers\n");
341
342 /*
343 * If this doesn't ACK the interrupt to the chip, we'll be
344 * called once again as we're level triggered.
345 */
346 goto out;
347 }
348
349 /* We immediately read the usb and adapter status. We thus make sure
350 * only of USBINS/USBREM IRQ handlers are called */
351 if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) {
352 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
353 if (chgstat & (0x3 << 4))
354 pcf_int[0] &= ~(1 << PCF50633_INT1_USBREM);
355 else
356 pcf_int[0] &= ~(1 << PCF50633_INT1_USBINS);
357 }
358
359 /* Make sure only one of ADPINS or ADPREM is set */
360 if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) {
361 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
362 if (chgstat & (0x3 << 4))
363 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPREM);
364 else
365 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPINS);
366 }
367
368 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
369 "INT4=0x%02x INT5=0x%02x\n", pcf_int[0],
370 pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]);
371
372 /* Some revisions of the chip don't have a 8s standby mode on
373 * ONKEY1S press. We try to manually do it in such cases. */
374 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
375 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
376 pcf->onkey1s_held);
377 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
378 if (pcf->pdata->force_shutdown)
379 pcf->pdata->force_shutdown(pcf);
380 }
381
382 if (pcf_int[2] & PCF50633_INT3_ONKEY1S) {
383 dev_info(pcf->dev, "ONKEY1S held\n");
384 pcf->onkey1s_held = 1 ;
385
386 /* Unmask IRQ_SECOND */
387 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
388 PCF50633_INT1_SECOND);
389
390 /* Unmask IRQ_ONKEYR */
391 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
392 PCF50633_INT2_ONKEYR);
393 }
394
395 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
396 pcf->onkey1s_held = 0;
397
398 /* Mask SECOND and ONKEYR interrupts */
399 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
400 pcf50633_reg_set_bit_mask(pcf,
401 PCF50633_REG_INT1M,
402 PCF50633_INT1_SECOND,
403 PCF50633_INT1_SECOND);
404
405 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
406 pcf50633_reg_set_bit_mask(pcf,
407 PCF50633_REG_INT2M,
408 PCF50633_INT2_ONKEYR,
409 PCF50633_INT2_ONKEYR);
410 }
411
412 /* Have we just resumed ? */
413 if (pcf->is_suspended) {
414 pcf->is_suspended = 0;
415
416 /* Set the resume reason filtering out non resumers */
417 for (i = 0; i < ARRAY_SIZE(pcf_int); i++)
418 pcf->resume_reason[i] = pcf_int[i] &
419 pcf->pdata->resumers[i];
420
421 /* Make sure we don't pass on any ONKEY events to
422 * userspace now */
423 pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF);
424 }
425
426 for (i = 0; i < ARRAY_SIZE(pcf_int); i++) {
427 /* Unset masked interrupts */
428 pcf_int[i] &= ~pcf->mask_regs[i];
429
430 for (j = 0; j < 8 ; j++)
431 if (pcf_int[i] & (1 << j))
432 pcf50633_irq_call_handler(pcf, (i * 8) + j);
433 }
434
435out:
436 put_device(pcf->dev);
437 enable_irq(pcf->irq);
438}
439
440static irqreturn_t pcf50633_irq(int irq, void *data)
441{
442 struct pcf50633 *pcf = data;
443
444 dev_dbg(pcf->dev, "pcf50633_irq\n");
445
446 get_device(pcf->dev);
447 disable_irq(pcf->irq);
448 schedule_work(&pcf->irq_work);
449
450 return IRQ_HANDLED;
451}
452
453static void
454pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name,
455 struct platform_device **pdev)
456{
457 struct pcf50633_subdev_pdata *subdev_pdata;
458 int ret;
459
460 *pdev = platform_device_alloc(name, -1);
461 if (!*pdev) {
462 dev_err(pcf->dev, "Falied to allocate %s\n", name);
463 return;
464 }
465
466 subdev_pdata = kmalloc(sizeof(*subdev_pdata), GFP_KERNEL);
467 if (!subdev_pdata) {
468 dev_err(pcf->dev, "Error allocating subdev pdata\n");
469 platform_device_put(*pdev);
470 }
471
472 subdev_pdata->pcf = pcf;
473 platform_device_add_data(*pdev, subdev_pdata, sizeof(*subdev_pdata));
474
475 (*pdev)->dev.parent = pcf->dev;
476
477 ret = platform_device_add(*pdev);
478 if (ret) {
479 dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret);
480 platform_device_put(*pdev);
481 *pdev = NULL;
482 }
483}
484
485#ifdef CONFIG_PM
486static int pcf50633_suspend(struct device *dev, pm_message_t state)
487{
488 struct pcf50633 *pcf;
489 int ret = 0, i;
490 u8 res[5];
491
492 pcf = dev_get_drvdata(dev);
493
494 /* Make sure our interrupt handlers are not called
495 * henceforth */
496 disable_irq(pcf->irq);
497
498 /* Make sure that any running IRQ worker has quit */
499 cancel_work_sync(&pcf->irq_work);
500
501 /* Save the masks */
502 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
503 ARRAY_SIZE(pcf->suspend_irq_masks),
504 pcf->suspend_irq_masks);
505 if (ret < 0) {
506 dev_err(pcf->dev, "error saving irq masks\n");
507 goto out;
508 }
509
510 /* Write wakeup irq masks */
511 for (i = 0; i < ARRAY_SIZE(res); i++)
512 res[i] = ~pcf->pdata->resumers[i];
513
514 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
515 ARRAY_SIZE(res), &res[0]);
516 if (ret < 0) {
517 dev_err(pcf->dev, "error writing wakeup irq masks\n");
518 goto out;
519 }
520
521 pcf->is_suspended = 1;
522
523out:
524 return ret;
525}
526
527static int pcf50633_resume(struct device *dev)
528{
529 struct pcf50633 *pcf;
530 int ret;
531
532 pcf = dev_get_drvdata(dev);
533
534 /* Write the saved mask registers */
535 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
536 ARRAY_SIZE(pcf->suspend_irq_masks),
537 pcf->suspend_irq_masks);
538 if (ret < 0)
539 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
540
541 /* Restore regulators' state */
542
543
544 get_device(pcf->dev);
545
546 /*
547 * Clear any pending interrupts and set resume reason if any.
548 * This will leave with enable_irq()
549 */
550 pcf50633_irq_worker(&pcf->irq_work);
551
552 return 0;
553}
554#else
555#define pcf50633_suspend NULL
556#define pcf50633_resume NULL
557#endif
558
559static int __devinit pcf50633_probe(struct i2c_client *client,
560 const struct i2c_device_id *ids)
561{
562 struct pcf50633 *pcf;
563 struct pcf50633_platform_data *pdata = client->dev.platform_data;
564 int i, ret = 0;
565 int version, variant;
566
567 pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
568 if (!pcf)
569 return -ENOMEM;
570
571 pcf->pdata = pdata;
572
573 mutex_init(&pcf->lock);
574
575 i2c_set_clientdata(client, pcf);
576 pcf->dev = &client->dev;
577 pcf->i2c_client = client;
578 pcf->irq = client->irq;
579
580 INIT_WORK(&pcf->irq_work, pcf50633_irq_worker);
581
582 version = pcf50633_reg_read(pcf, 0);
583 variant = pcf50633_reg_read(pcf, 1);
584 if (version < 0 || variant < 0) {
585 dev_err(pcf->dev, "Unable to probe pcf50633\n");
586 ret = -ENODEV;
587 goto err;
588 }
589
590 dev_info(pcf->dev, "Probed device version %d variant %d\n",
591 version, variant);
592
593 /* Enable all interrupts except RTC SECOND */
594 pcf->mask_regs[0] = 0x80;
595 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
596 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
597 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
598 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
599 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
600
601 /* Create sub devices */
602 pcf50633_client_dev_register(pcf, "pcf50633-input",
603 &pcf->input_pdev);
604 pcf50633_client_dev_register(pcf, "pcf50633-rtc",
605 &pcf->rtc_pdev);
606 pcf50633_client_dev_register(pcf, "pcf50633-mbc",
607 &pcf->mbc_pdev);
608 pcf50633_client_dev_register(pcf, "pcf50633-adc",
609 &pcf->adc_pdev);
610
611 for (i = 0; i < PCF50633_NUM_REGULATORS; i++) {
612 struct platform_device *pdev;
613
614 pdev = platform_device_alloc("pcf50633-regltr", i);
615 if (!pdev) {
616 dev_err(pcf->dev, "Cannot create regulator\n");
617 continue;
618 }
619
620 pdev->dev.parent = pcf->dev;
621 pdev->dev.platform_data = &pdata->reg_init_data[i];
622 pdev->dev.driver_data = pcf;
623 pcf->regulator_pdev[i] = pdev;
624
625 platform_device_add(pdev);
626 }
627
628 if (client->irq) {
629 ret = request_irq(client->irq, pcf50633_irq,
630 IRQF_TRIGGER_LOW, "pcf50633", pcf);
631
632 if (ret) {
633 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
634 goto err;
635 }
636 } else {
637 dev_err(pcf->dev, "No IRQ configured\n");
638 goto err;
639 }
640
641 if (enable_irq_wake(client->irq) < 0)
642 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
643 "in this hardware revision", client->irq);
644
645 ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group);
646 if (ret)
647 dev_err(pcf->dev, "error creating sysfs entries\n");
648
649 if (pdata->probe_done)
650 pdata->probe_done(pcf);
651
652 return 0;
653
654err:
655 kfree(pcf);
656 return ret;
657}
658
659static int __devexit pcf50633_remove(struct i2c_client *client)
660{
661 struct pcf50633 *pcf = i2c_get_clientdata(client);
662 int i;
663
664 free_irq(pcf->irq, pcf);
665
666 platform_device_unregister(pcf->input_pdev);
667 platform_device_unregister(pcf->rtc_pdev);
668 platform_device_unregister(pcf->mbc_pdev);
669 platform_device_unregister(pcf->adc_pdev);
670
671 for (i = 0; i < PCF50633_NUM_REGULATORS; i++)
672 platform_device_unregister(pcf->regulator_pdev[i]);
673
674 kfree(pcf);
675
676 return 0;
677}
678
679static struct i2c_device_id pcf50633_id_table[] = {
680 {"pcf50633", 0x73},
681 {/* end of list */}
682};
683
684static struct i2c_driver pcf50633_driver = {
685 .driver = {
686 .name = "pcf50633",
687 .suspend = pcf50633_suspend,
688 .resume = pcf50633_resume,
689 },
690 .id_table = pcf50633_id_table,
691 .probe = pcf50633_probe,
692 .remove = __devexit_p(pcf50633_remove),
693};
694
695static int __init pcf50633_init(void)
696{
697 return i2c_add_driver(&pcf50633_driver);
698}
699
700static void __exit pcf50633_exit(void)
701{
702 i2c_del_driver(&pcf50633_driver);
703}
704
705MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 PMU");
706MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
707MODULE_LICENSE("GPL");
708
709module_init(pcf50633_init);
710module_exit(pcf50633_exit);
diff --git a/drivers/mfd/pcf50633-gpio.c b/drivers/mfd/pcf50633-gpio.c
new file mode 100644
index 000000000000..2fa2eca5c9cc
--- /dev/null
+++ b/drivers/mfd/pcf50633-gpio.c
@@ -0,0 +1,118 @@
1/* NXP PCF50633 GPIO Driver
2 *
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Balaji Rao <balajirrao@openmoko.org>
5 * All rights reserved.
6 *
7 * Broken down from monstrous PCF50633 driver mainly by
8 * Harald Welte, Andy Green and Werner Almesberger
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#include <linux/kernel.h>
18
19#include <linux/mfd/pcf50633/core.h>
20#include <linux/mfd/pcf50633/gpio.h>
21
22enum pcf50633_regulator_id {
23 PCF50633_REGULATOR_AUTO,
24 PCF50633_REGULATOR_DOWN1,
25 PCF50633_REGULATOR_DOWN2,
26 PCF50633_REGULATOR_LDO1,
27 PCF50633_REGULATOR_LDO2,
28 PCF50633_REGULATOR_LDO3,
29 PCF50633_REGULATOR_LDO4,
30 PCF50633_REGULATOR_LDO5,
31 PCF50633_REGULATOR_LDO6,
32 PCF50633_REGULATOR_HCLDO,
33 PCF50633_REGULATOR_MEMLDO,
34};
35
36#define PCF50633_REG_AUTOOUT 0x1a
37#define PCF50633_REG_DOWN1OUT 0x1e
38#define PCF50633_REG_DOWN2OUT 0x22
39#define PCF50633_REG_MEMLDOOUT 0x26
40#define PCF50633_REG_LDO1OUT 0x2d
41#define PCF50633_REG_LDO2OUT 0x2f
42#define PCF50633_REG_LDO3OUT 0x31
43#define PCF50633_REG_LDO4OUT 0x33
44#define PCF50633_REG_LDO5OUT 0x35
45#define PCF50633_REG_LDO6OUT 0x37
46#define PCF50633_REG_HCLDOOUT 0x39
47
48static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = {
49 [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT,
50 [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT,
51 [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT,
52 [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT,
53 [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT,
54 [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT,
55 [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT,
56 [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT,
57 [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT,
58 [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT,
59 [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT,
60};
61
62int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val)
63{
64 u8 reg;
65
66 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
67
68 return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val);
69}
70EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
71
72u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio)
73{
74 u8 reg, val;
75
76 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
77 val = pcf50633_reg_read(pcf, reg) & 0x07;
78
79 return val;
80}
81EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
82
83int pcf50633_gpio_invert_set(struct pcf50633 *pcf, int gpio, int invert)
84{
85 u8 val, reg;
86
87 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
88 val = !!invert << 3;
89
90 return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val);
91}
92EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_set);
93
94int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio)
95{
96 u8 reg, val;
97
98 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
99 val = pcf50633_reg_read(pcf, reg);
100
101 return val & (1 << 3);
102}
103EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_get);
104
105int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf,
106 int gpio, int regulator, int on)
107{
108 u8 reg, val, mask;
109
110 /* the *ENA register is always one after the *OUT register */
111 reg = pcf50633_regulator_registers[regulator] + 1;
112
113 val = !!on << (gpio - PCF50633_GPIO1);
114 mask = 1 << (gpio - PCF50633_GPIO1);
115
116 return pcf50633_reg_set_bit_mask(pcf, reg, mask, val);
117}
118EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set);
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 170f9d47c2f9..4c7b7962f6b8 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -41,6 +41,7 @@ struct sm501_gpio_chip {
41 struct gpio_chip gpio; 41 struct gpio_chip gpio;
42 struct sm501_gpio *ourgpio; /* to get back to parent. */ 42 struct sm501_gpio *ourgpio; /* to get back to parent. */
43 void __iomem *regbase; 43 void __iomem *regbase;
44 void __iomem *control; /* address of control reg. */
44}; 45};
45 46
46struct sm501_gpio { 47struct sm501_gpio {
@@ -908,6 +909,25 @@ static int sm501_gpio_get(struct gpio_chip *chip, unsigned offset)
908 return result & 1UL; 909 return result & 1UL;
909} 910}
910 911
912static void sm501_gpio_ensure_gpio(struct sm501_gpio_chip *smchip,
913 unsigned long bit)
914{
915 unsigned long ctrl;
916
917 /* check and modify if this pin is not set as gpio. */
918
919 if (readl(smchip->control) & bit) {
920 dev_info(sm501_gpio_to_dev(smchip->ourgpio)->dev,
921 "changing mode of gpio, bit %08lx\n", bit);
922
923 ctrl = readl(smchip->control);
924 ctrl &= ~bit;
925 writel(ctrl, smchip->control);
926
927 sm501_sync_regs(sm501_gpio_to_dev(smchip->ourgpio));
928 }
929}
930
911static void sm501_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 931static void sm501_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
912 932
913{ 933{
@@ -929,6 +949,8 @@ static void sm501_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
929 writel(val, regs); 949 writel(val, regs);
930 950
931 sm501_sync_regs(sm501_gpio_to_dev(smgpio)); 951 sm501_sync_regs(sm501_gpio_to_dev(smgpio));
952 sm501_gpio_ensure_gpio(smchip, bit);
953
932 spin_unlock_irqrestore(&smgpio->lock, save); 954 spin_unlock_irqrestore(&smgpio->lock, save);
933} 955}
934 956
@@ -941,8 +963,8 @@ static int sm501_gpio_input(struct gpio_chip *chip, unsigned offset)
941 unsigned long save; 963 unsigned long save;
942 unsigned long ddr; 964 unsigned long ddr;
943 965
944 dev_info(sm501_gpio_to_dev(smgpio)->dev, "%s(%p,%d)\n", 966 dev_dbg(sm501_gpio_to_dev(smgpio)->dev, "%s(%p,%d)\n",
945 __func__, chip, offset); 967 __func__, chip, offset);
946 968
947 spin_lock_irqsave(&smgpio->lock, save); 969 spin_lock_irqsave(&smgpio->lock, save);
948 970
@@ -950,6 +972,8 @@ static int sm501_gpio_input(struct gpio_chip *chip, unsigned offset)
950 writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW); 972 writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW);
951 973
952 sm501_sync_regs(sm501_gpio_to_dev(smgpio)); 974 sm501_sync_regs(sm501_gpio_to_dev(smgpio));
975 sm501_gpio_ensure_gpio(smchip, bit);
976
953 spin_unlock_irqrestore(&smgpio->lock, save); 977 spin_unlock_irqrestore(&smgpio->lock, save);
954 978
955 return 0; 979 return 0;
@@ -1012,9 +1036,11 @@ static int __devinit sm501_gpio_register_chip(struct sm501_devdata *sm,
1012 if (base > 0) 1036 if (base > 0)
1013 base += 32; 1037 base += 32;
1014 chip->regbase = gpio->regs + SM501_GPIO_DATA_HIGH; 1038 chip->regbase = gpio->regs + SM501_GPIO_DATA_HIGH;
1039 chip->control = sm->regs + SM501_GPIO63_32_CONTROL;
1015 gchip->label = "SM501-HIGH"; 1040 gchip->label = "SM501-HIGH";
1016 } else { 1041 } else {
1017 chip->regbase = gpio->regs + SM501_GPIO_DATA_LOW; 1042 chip->regbase = gpio->regs + SM501_GPIO_DATA_LOW;
1043 chip->control = sm->regs + SM501_GPIO31_0_CONTROL;
1018 gchip->label = "SM501-LOW"; 1044 gchip->label = "SM501-LOW";
1019 } 1045 }
1020 1046
@@ -1024,7 +1050,7 @@ static int __devinit sm501_gpio_register_chip(struct sm501_devdata *sm,
1024 return gpiochip_add(gchip); 1050 return gpiochip_add(gchip);
1025} 1051}
1026 1052
1027static int sm501_register_gpio(struct sm501_devdata *sm) 1053static int __devinit sm501_register_gpio(struct sm501_devdata *sm)
1028{ 1054{
1029 struct sm501_gpio *gpio = &sm->gpio; 1055 struct sm501_gpio *gpio = &sm->gpio;
1030 resource_size_t iobase = sm->io_res->start + SM501_GPIO; 1056 resource_size_t iobase = sm->io_res->start + SM501_GPIO;
@@ -1295,7 +1321,7 @@ static unsigned int sm501_mem_local[] = {
1295 * Common init code for an SM501 1321 * Common init code for an SM501
1296*/ 1322*/
1297 1323
1298static int sm501_init_dev(struct sm501_devdata *sm) 1324static int __devinit sm501_init_dev(struct sm501_devdata *sm)
1299{ 1325{
1300 struct sm501_initdata *idata; 1326 struct sm501_initdata *idata;
1301 struct sm501_platdata *pdata; 1327 struct sm501_platdata *pdata;
@@ -1371,7 +1397,7 @@ static int sm501_init_dev(struct sm501_devdata *sm)
1371 return 0; 1397 return 0;
1372} 1398}
1373 1399
1374static int sm501_plat_probe(struct platform_device *dev) 1400static int __devinit sm501_plat_probe(struct platform_device *dev)
1375{ 1401{
1376 struct sm501_devdata *sm; 1402 struct sm501_devdata *sm;
1377 int ret; 1403 int ret;
@@ -1560,8 +1586,8 @@ static struct sm501_platdata sm501_pci_platdata = {
1560 .gpio_base = -1, 1586 .gpio_base = -1,
1561}; 1587};
1562 1588
1563static int sm501_pci_probe(struct pci_dev *dev, 1589static int __devinit sm501_pci_probe(struct pci_dev *dev,
1564 const struct pci_device_id *id) 1590 const struct pci_device_id *id)
1565{ 1591{
1566 struct sm501_devdata *sm; 1592 struct sm501_devdata *sm;
1567 int err; 1593 int err;
@@ -1667,7 +1693,7 @@ static void sm501_dev_remove(struct sm501_devdata *sm)
1667 sm501_gpio_remove(sm); 1693 sm501_gpio_remove(sm);
1668} 1694}
1669 1695
1670static void sm501_pci_remove(struct pci_dev *dev) 1696static void __devexit sm501_pci_remove(struct pci_dev *dev)
1671{ 1697{
1672 struct sm501_devdata *sm = pci_get_drvdata(dev); 1698 struct sm501_devdata *sm = pci_get_drvdata(dev);
1673 1699
@@ -1701,16 +1727,16 @@ static struct pci_device_id sm501_pci_tbl[] = {
1701 1727
1702MODULE_DEVICE_TABLE(pci, sm501_pci_tbl); 1728MODULE_DEVICE_TABLE(pci, sm501_pci_tbl);
1703 1729
1704static struct pci_driver sm501_pci_drv = { 1730static struct pci_driver sm501_pci_driver = {
1705 .name = "sm501", 1731 .name = "sm501",
1706 .id_table = sm501_pci_tbl, 1732 .id_table = sm501_pci_tbl,
1707 .probe = sm501_pci_probe, 1733 .probe = sm501_pci_probe,
1708 .remove = sm501_pci_remove, 1734 .remove = __devexit_p(sm501_pci_remove),
1709}; 1735};
1710 1736
1711MODULE_ALIAS("platform:sm501"); 1737MODULE_ALIAS("platform:sm501");
1712 1738
1713static struct platform_driver sm501_plat_drv = { 1739static struct platform_driver sm501_plat_driver = {
1714 .driver = { 1740 .driver = {
1715 .name = "sm501", 1741 .name = "sm501",
1716 .owner = THIS_MODULE, 1742 .owner = THIS_MODULE,
@@ -1723,14 +1749,14 @@ static struct platform_driver sm501_plat_drv = {
1723 1749
1724static int __init sm501_base_init(void) 1750static int __init sm501_base_init(void)
1725{ 1751{
1726 platform_driver_register(&sm501_plat_drv); 1752 platform_driver_register(&sm501_plat_driver);
1727 return pci_register_driver(&sm501_pci_drv); 1753 return pci_register_driver(&sm501_pci_driver);
1728} 1754}
1729 1755
1730static void __exit sm501_base_exit(void) 1756static void __exit sm501_base_exit(void)
1731{ 1757{
1732 platform_driver_unregister(&sm501_plat_drv); 1758 platform_driver_unregister(&sm501_plat_driver);
1733 pci_unregister_driver(&sm501_pci_drv); 1759 pci_unregister_driver(&sm501_pci_driver);
1734} 1760}
1735 1761
1736module_init(sm501_base_init); 1762module_init(sm501_base_init);
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index b59c385cbc12..68826f1e36bc 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -38,6 +38,9 @@
38#include <linux/i2c.h> 38#include <linux/i2c.h>
39#include <linux/i2c/twl4030.h> 39#include <linux/i2c/twl4030.h>
40 40
41#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
42#include <mach/cpu.h>
43#endif
41 44
42/* 45/*
43 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power 46 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
@@ -646,7 +649,7 @@ static inline int __init unprotect_pm_master(void)
646 return e; 649 return e;
647} 650}
648 651
649static void __init clocks_init(void) 652static void __init clocks_init(struct device *dev)
650{ 653{
651 int e = 0; 654 int e = 0;
652 struct clk *osc; 655 struct clk *osc;
@@ -655,9 +658,9 @@ static void __init clocks_init(void)
655 658
656#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 659#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
657 if (cpu_is_omap2430()) 660 if (cpu_is_omap2430())
658 osc = clk_get(NULL, "osc_ck"); 661 osc = clk_get(dev, "osc_ck");
659 else 662 else
660 osc = clk_get(NULL, "osc_sys_ck"); 663 osc = clk_get(dev, "osc_sys_ck");
661 664
662 if (IS_ERR(osc)) { 665 if (IS_ERR(osc)) {
663 printk(KERN_WARNING "Skipping twl4030 internal clock init and " 666 printk(KERN_WARNING "Skipping twl4030 internal clock init and "
@@ -773,7 +776,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
773 inuse = true; 776 inuse = true;
774 777
775 /* setup clock framework */ 778 /* setup clock framework */
776 clocks_init(); 779 clocks_init(&client->dev);
777 780
778 /* Maybe init the T2 Interrupt subsystem */ 781 /* Maybe init the T2 Interrupt subsystem */
779 if (client->irq 782 if (client->irq
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
index f92595c8f165..84d5ea1ec171 100644
--- a/drivers/mfd/wm8350-core.c
+++ b/drivers/mfd/wm8350-core.c
@@ -1111,7 +1111,7 @@ int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
1111 do { 1111 do {
1112 schedule_timeout_interruptible(1); 1112 schedule_timeout_interruptible(1);
1113 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1); 1113 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
1114 } while (tries-- && (reg & WM8350_AUXADC_POLL)); 1114 } while (--tries && (reg & WM8350_AUXADC_POLL));
1115 1115
1116 if (!tries) 1116 if (!tries)
1117 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel); 1117 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
@@ -1297,14 +1297,29 @@ static void wm8350_client_dev_register(struct wm8350 *wm8350,
1297int wm8350_device_init(struct wm8350 *wm8350, int irq, 1297int wm8350_device_init(struct wm8350 *wm8350, int irq,
1298 struct wm8350_platform_data *pdata) 1298 struct wm8350_platform_data *pdata)
1299{ 1299{
1300 int ret = -EINVAL; 1300 int ret;
1301 u16 id1, id2, mask_rev; 1301 u16 id1, id2, mask_rev;
1302 u16 cust_id, mode, chip_rev; 1302 u16 cust_id, mode, chip_rev;
1303 1303
1304 /* get WM8350 revision and config mode */ 1304 /* get WM8350 revision and config mode */
1305 wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1); 1305 ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
1306 wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2); 1306 if (ret != 0) {
1307 wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev), &mask_rev); 1307 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1308 goto err;
1309 }
1310
1311 ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
1312 if (ret != 0) {
1313 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
1314 goto err;
1315 }
1316
1317 ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
1318 &mask_rev);
1319 if (ret != 0) {
1320 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
1321 goto err;
1322 }
1308 1323
1309 id1 = be16_to_cpu(id1); 1324 id1 = be16_to_cpu(id1);
1310 id2 = be16_to_cpu(id2); 1325 id2 = be16_to_cpu(id2);
@@ -1404,14 +1419,12 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1404 return ret; 1419 return ret;
1405 } 1420 }
1406 1421
1407 if (pdata && pdata->init) { 1422 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
1408 ret = pdata->init(wm8350); 1423 wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK, 0xFFFF);
1409 if (ret != 0) { 1424 wm8350_reg_write(wm8350, WM8350_INT_STATUS_2_MASK, 0xFFFF);
1410 dev_err(wm8350->dev, "Platform init() failed: %d\n", 1425 wm8350_reg_write(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, 0xFFFF);
1411 ret); 1426 wm8350_reg_write(wm8350, WM8350_GPIO_INT_STATUS_MASK, 0xFFFF);
1412 goto err; 1427 wm8350_reg_write(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK, 0xFFFF);
1413 }
1414 }
1415 1428
1416 mutex_init(&wm8350->auxadc_mutex); 1429 mutex_init(&wm8350->auxadc_mutex);
1417 mutex_init(&wm8350->irq_mutex); 1430 mutex_init(&wm8350->irq_mutex);
@@ -1430,6 +1443,15 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1430 } 1443 }
1431 wm8350->chip_irq = irq; 1444 wm8350->chip_irq = irq;
1432 1445
1446 if (pdata && pdata->init) {
1447 ret = pdata->init(wm8350);
1448 if (ret != 0) {
1449 dev_err(wm8350->dev, "Platform init() failed: %d\n",
1450 ret);
1451 goto err;
1452 }
1453 }
1454
1433 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0); 1455 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
1434 1456
1435 wm8350_client_dev_register(wm8350, "wm8350-codec", 1457 wm8350_client_dev_register(wm8350, "wm8350-codec",
diff --git a/drivers/mfd/wm8350-regmap.c b/drivers/mfd/wm8350-regmap.c
index 68887b817d17..9a4cc954cb7c 100644
--- a/drivers/mfd/wm8350-regmap.c
+++ b/drivers/mfd/wm8350-regmap.c
@@ -3188,7 +3188,7 @@ const struct wm8350_reg_access wm8350_reg_io_map[] = {
3188 { 0x7CFF, 0x0C00, 0x7FFF }, /* R1 - ID */ 3188 { 0x7CFF, 0x0C00, 0x7FFF }, /* R1 - ID */
3189 { 0x0000, 0x0000, 0x0000 }, /* R2 */ 3189 { 0x0000, 0x0000, 0x0000 }, /* R2 */
3190 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */ 3190 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */
3191 { 0xFCF7, 0xFCF7, 0xF800 }, /* R4 - System Control 2 */ 3191 { 0xFEF7, 0xFEF7, 0xF800 }, /* R4 - System Control 2 */
3192 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */ 3192 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */
3193 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */ 3193 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */
3194 { 0x0000, 0x0000, 0x0000 }, /* R7 */ 3194 { 0x0000, 0x0000, 0x0000 }, /* R7 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 03:19:18 -0500