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path: root/drivers/mfd/twl4030-madc.c
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Diffstat (limited to 'drivers/mfd/twl4030-madc.c')
-rw-r--r--drivers/mfd/twl4030-madc.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c
index 7cbf2aa9e64f..834f824d3c11 100644
--- a/drivers/mfd/twl4030-madc.c
+++ b/drivers/mfd/twl4030-madc.c
@@ -740,6 +740,28 @@ static int __devinit twl4030_madc_probe(struct platform_device *pdev)
740 TWL4030_BCI_BCICTL1); 740 TWL4030_BCI_BCICTL1);
741 goto err_i2c; 741 goto err_i2c;
742 } 742 }
743
744 /* Check that MADC clock is on */
745 ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, &regval, TWL4030_REG_GPBR1);
746 if (ret) {
747 dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
748 TWL4030_REG_GPBR1);
749 goto err_i2c;
750 }
751
752 /* If MADC clk is not on, turn it on */
753 if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
754 dev_info(&pdev->dev, "clk disabled, enabling\n");
755 regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
756 ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
757 TWL4030_REG_GPBR1);
758 if (ret) {
759 dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
760 TWL4030_REG_GPBR1);
761 goto err_i2c;
762 }
763 }
764
743 platform_set_drvdata(pdev, madc); 765 platform_set_drvdata(pdev, madc);
744 mutex_init(&madc->lock); 766 mutex_init(&madc->lock);
745 ret = request_threaded_irq(platform_get_irq(pdev, 0), NULL, 767 ret = request_threaded_irq(platform_get_irq(pdev, 0), NULL,